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Author SHA1 Message Date
MightyPork 20dfa7e158 mod fcap to always fully deinit the timer when IDLE 2018-02-20 15:58:20 +01:00
MightyPork 1a6dd4b5ae indirect frequency measurement 2018-02-20 13:24:35 +01:00
MightyPork 6d8aa4d31d fixed broken new unit callsign assign algo 2018-02-18 09:15:44 +01:00
MightyPork 003ae692e6 sipo finished 2018-02-16 23:01:47 +01:00
MightyPork 9cff75554b sipo implemented 2018-02-16 16:10:18 +01:00
MightyPork 98900cdb3b wip sipo 2018-02-16 00:06:03 +01:00
MightyPork 658b1befee adding comments to adc 2018-02-14 23:18:53 +01:00
MightyPork 4c6dae2b23 fixed a bug with parsing adc channels 2018-02-09 19:25:52 +01:00
MightyPork 9808f6eb59 Fixed soem ADC bugs and optimized things a bit 2018-02-09 19:21:56 +01:00
MightyPork 36a81aa0b5 Simplified ADC config and rearranged the struct a little 2018-02-09 16:17:59 +01:00
MightyPork c9abc666af removed some escessive checks 2018-02-08 23:04:04 +01:00
MightyPork 3c51c0633f Made "usb tx done" notification bypass the usual bounce via the main thread, made higher samplerate achievable 2018-02-08 21:31:06 +01:00
MightyPork 4a2fcf17f0 Add protections to GEX to prevent ADC DMA overrun, shows that the previously tested high speeds were not real 2018-02-08 20:48:06 +01:00
MightyPork 19a0040324 Merge branch 'adc' 2018-02-07 23:52:35 +01:00
MightyPork 3b341cd033 Merge branch 'adc-fault' into adc 2018-02-07 23:50:39 +01:00
MightyPork 85453afa44 Fixzed triggers and also missed TC/TH 2018-02-07 23:50:30 +01:00
MightyPork d6e73a5641 Some optimizations to make it better work at higher speeds. Triggers don't work 2018-02-07 23:14:50 +01:00
MightyPork dcddca9dd8 Added some protections against creash due to high frequency, but its not ideal ... 2018-02-07 22:33:54 +01:00
MightyPork 3584830dc5 failing 2018-02-07 21:18:06 +01:00
MightyPork ddfbbeeb95 more parts of adc fixed 2018-02-07 20:57:02 +01:00
MightyPork 835423099b fixeng stuff up , block capture verified and implemented in python 2018-02-07 17:18:03 +01:00
MightyPork 72b331bce5 renamed enum constant to BLCAP 2018-02-07 15:58:47 +01:00
MightyPork d4e1d85bb4 some small adc fixes (impreoving trigger) 2018-02-07 15:52:55 +01:00
MightyPork f80761b327 todos 2018-02-04 22:33:51 +01:00
MightyPork a4e04dc04e triggering works, also autotrig 2018-02-04 22:32:22 +01:00
MightyPork 21d9e97653 added docs 2018-02-04 21:24:24 +01:00
MightyPork 260fcc3e65 experimental ADC front-end with dummy reports 2018-02-04 19:00:57 +01:00
MightyPork 02f69b0e37 work on ADC sampling, not tested, missing commands 2018-02-04 17:43:59 +01:00
MightyPork 300a6a6e90 split ll extensions from hw_utils to own file 2018-02-04 10:40:11 +01:00
MightyPork c5f41819b1 move the 1wire report to a job 2018-02-04 10:30:26 +01:00
MightyPork 0a33551474 oops fix bug 2018-02-03 22:49:09 +01:00
MightyPork 10cc13bc82 added a buffer size check 2018-02-03 22:47:50 +01:00
MightyPork d8933cbf81 fixed buffer sizing and added buf size to config 2018-02-03 22:45:40 +01:00
MightyPork 3ebc19fc2d fixes and start of ADC. Not really working yet 2018-02-03 22:06:31 +01:00
MightyPork 538a4876b2 ADC skeleton 2018-02-03 11:59:59 +01:00
MightyPork 611b38c5e6 cleaning 2018-02-03 11:54:22 +01:00
MightyPork 96a7b58091 1wire split 2018-02-03 11:43:05 +01:00
MightyPork d47d487b8a split SPI 2018-02-03 11:35:16 +01:00
MightyPork 5a853244d5 din renames, dout split 2018-02-03 11:30:22 +01:00
MightyPork 41364db93a split neopixel 2018-02-03 10:48:24 +01:00
MightyPork 2006936c21 added the template unit 2018-02-03 10:42:37 +01:00
MightyPork 8643d16989 Split i2c 2018-02-03 10:32:12 +01:00
MightyPork f1b8db78d4 split DIN 2018-02-03 10:27:37 +01:00
MightyPork 4bd8dc6cb0 split some files in units to smaller .c files, comments etc 2018-02-03 10:09:51 +01:00
MightyPork b6f7060516 1wire cleaning, added 1w UU, renamed some error messages 2018-02-01 17:20:25 +01:00
MightyPork 0e378b6547 added 1wire search algorithm 2018-02-01 15:53:29 +01:00
MightyPork a81190c2e1 1w everything implemented except search funcs, timer works ok 2018-01-30 22:42:00 +01:00
MightyPork af35cee030 untested new onewire commands (all except search algos) 2018-01-30 22:16:22 +01:00
MightyPork 55816fc810 added software timer instantiation + config (unused) 2018-01-30 21:04:45 +01:00
MightyPork c9aa39af80 words 2018-01-29 22:55:22 +01:00
MightyPork c641bef80a added 'parasitic' config field 2018-01-29 22:49:18 +01:00
MightyPork eca8319820 onewire basic impl + fixed a bug in usec delays 2018-01-29 22:37:12 +01:00
MightyPork 9e65c8409a fixed inverted presence check 2018-01-29 08:55:05 +01:00
MightyPork 18e76ad060 base of 1wire, need to make async 2018-01-29 08:40:41 +01:00
MightyPork a63f040271 Added compile flag to replace TF with simple loopback for transport testing 2018-01-28 15:54:26 +01:00
MightyPork 04e32860f7 implemented precision timestamps in report messages 2018-01-27 20:27:33 +01:00
MightyPork 94e87c74d3 implemented timebase using TIM14 instead of TIM1 2018-01-27 18:55:17 +01:00
MightyPork 1159fef33b add a newline to ini 2018-01-27 11:06:13 +01:00
MightyPork 88bd46f516 fixed the crash and implemented trigger arming 2018-01-27 11:02:19 +01:00
MightyPork 45b4fb45e9 exti working but something is fucked up in the job queue or tinyframe 2018-01-26 23:01:19 +01:00
MightyPork 255f96c754 Installed new TinyFrame 2018-01-26 17:23:05 +01:00
MightyPork 3784a46951 everything is now documented 2018-01-25 22:23:10 +01:00
MightyPork a44eb5f16a doc for all units 2018-01-25 08:22:43 +01:00
MightyPork ceb658e246 more doc comments 2018-01-25 08:11:27 +01:00
MightyPork b2ead539bf added more comments 2018-01-24 23:04:05 +01:00
MightyPork 334a89f055 fixed weirdness 2018-01-24 22:43:00 +01:00
MightyPork 63a7852554 bleh 2018-01-24 22:30:35 +01:00
MightyPork 8e9c653090 Doc comments and explanations 2018-01-24 22:09:42 +01:00
MightyPork 052fa4ce08 Added exti resources to the enum and name generator 2018-01-24 21:35:10 +01:00
MightyPork 4930f14047 made usart rxbuf large again 2018-01-15 15:46:36 +01:00
MightyPork d1e24608c7 remove redundant gpio clock enables 2018-01-15 15:11:55 +01:00
MightyPork 5edbf1306f removed the DMA timeout message 2018-01-15 15:07:52 +01:00
MightyPork bbbd216244 Merge branch 'uart' 2018-01-15 15:05:25 +01:00
MightyPork 8272a36aee Implemented unit timed tick and uart rx timeout 2018-01-15 15:04:09 +01:00
MightyPork b3d1f95e7d cleanup and added sync + async commands 2018-01-15 14:06:48 +01:00
MightyPork 5d12b23ceb deleted old sync sending code 2018-01-15 12:57:59 +01:00
MightyPork b5d2930e30 uart tx now pretty reliable, but msg queue sometimes seemingly gets corrupted (checksum mismatch) 2018-01-15 12:53:06 +01:00
MightyPork 6da4bd5d63 Merge branch 'uart-dmalign' into uart 2018-01-15 12:21:33 +01:00
MightyPork 2d53fc29be removed the alignment crap, left one length field byte and wraparound markers. Works except one mysterious lock-up 2018-01-15 12:21:22 +01:00
MightyPork 08b4010b13 uhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh 2018-01-15 11:45:00 +01:00
MightyPork 77f794e94a some debuggiong. Tx is not reliable and sometimes duplicates or loses bytes 2018-01-15 02:24:46 +01:00
MightyPork 2881c2ff2a almost finished DMA reception 2018-01-14 21:44:11 +01:00
MightyPork e2e4d91cf3 Added func for simple periph clock toggling without the horrible if jungle 2018-01-14 12:49:09 +01:00
MightyPork 137619d942 added a safeguard 2018-01-14 00:29:29 +01:00
MightyPork c4cc3bb9ce fixed bug with settings fucking up units that were already loaded 2018-01-14 00:27:34 +01:00
MightyPork 05875a8167 fixed bogus slotcount use display + moved some stuff to dynalloc to save ram 2018-01-14 00:21:13 +01:00
MightyPork 7df577f9b1 toggle to disable logging resources stuff 2018-01-14 00:09:40 +01:00
MightyPork ace2bd6357 switch to freeRtos malloc + improve malloc_safe utils, fixed memleak 2018-01-14 00:04:53 +01:00
MightyPork 0ef1134aa0 some traps 2018-01-13 21:49:13 +01:00
MightyPork 69443613fc some more stack shrinking 2018-01-13 21:33:19 +01:00
MightyPork 8a28395102 fix-up PRINTF to use PUTS when no variable args are given 2018-01-13 20:54:57 +01:00
MightyPork 7280338f8b take some steps towards reducing memory footprint in stack buffers 2018-01-13 20:51:09 +01:00
MightyPork d49081b190 basic work on uart 2018-01-13 19:49:12 +01:00
MightyPork 8852f9f8b4 enable all periph clocks by default on startup, added testing synchronous uart write command 2018-01-13 12:30:17 +01:00
MightyPork 29264540f7 added uart init (untested) and more config option 2018-01-13 01:37:14 +01:00
MightyPork e88bf84ea1 basic usart skeleton 2018-01-12 12:03:46 +01:00
MightyPork 9c5d889cfc remove debug for freeing pins 2018-01-12 10:20:27 +01:00
MightyPork d05330c0c0 updated tinyframe 2018-01-12 10:18:09 +01:00
MightyPork 15ebb6ab10 removed some excessive logging 2018-01-12 10:03:07 +01:00
MightyPork e471497577 added error logging to tinyframe 2018-01-12 09:55:47 +01:00