Added exti resources to the enum and name generator

sipo
Ondřej Hruška 7 years ago
parent 4930f14047
commit 052fa4ce08
Signed by: MightyPork
GPG Key ID: 2C5FD5035250423D
  1. 19
      framework/resources.c
  2. 26
      framework/rsc_enum.h

@ -14,24 +14,37 @@ static ResourceMap global_rscmap;
// here are the resource names for better debugging
// this list doesn't include GPIO names, they can be easily generated
// this list doesn't include GPIO and EXTI names, they can be easily generated
const char *const rsc_names[] = {
#define X(res_name) #res_name,
XX_RESOURCES
#undef X
};
// Check that EXTI have higher values than GPIOs in the enum
// (determines the logic in the name generation code below)
COMPILER_ASSERT(R_EXTI0 > R_PA0);
/** Get rsc name */
const char * rsc_get_name(Resource rsc)
{
assert_param(rsc < RESOURCE_COUNT);
static char gpionamebuf[5];
static char gpionamebuf[8];
// we assume the returned value is not stored anywhere
// and is directly used in a sprintf call, hence a static buffer is OK to use
if (rsc >= R_EXTI0) {
uint8_t index = rsc - R_EXTI0;
SNPRINTF(gpionamebuf, 8, "EXTI%d", index);
return gpionamebuf;
}
if (rsc >= R_PA0) {
// we assume the returned value is not stored anywhere
// and is directly used in a sprintf call.
uint8_t index = rsc - R_PA0;
SNPRINTF(gpionamebuf, 5, "P%c%d", 'A'+(index/16), index%16);
SNPRINTF(gpionamebuf, 8, "P%c%d", 'A'+(index/16), index%16);
return gpionamebuf;
}

@ -45,29 +45,10 @@
X(PF0) X(PF1) X(PF2) X(PF3) X(PF4) X(PF5) X(PF6) X(PF7) \
X(PF8) X(PF9) X(PF10) X(PF11) X(PF12) X(PF13) X(PF14) X(PF15) \
// GPIOs are allocated whenever the pin is needed
// (e.g. when used for SPI, the R_SPI resource as well as the corresponding R_GPIO resources must be claimed)
#define XX_RESOURCES_EXTI \
X(EXTI0) X(EXTI1) X(EXTI2) X(EXTI3) X(EXTI4) X(EXTI5) X(EXTI6) X(EXTI7) \
X(EXTI8) X(EXTI9) X(EXTI10) X(EXTI11) X(EXTI12) X(EXTI13) X(EXTI14) X(EXTI15)
// Peripheral blocks (IPs) - not all chips have all blocks, usually the 1 and 2 are present as a minimum, if any.
// It doesn't really make sense to expose multiple instances of buses that support addressing
// ADCs - some more advanced chips support differential input mode on some (not all!) inputs
// Usually only one or two instances are present
// DAC - often only one is present, or none.
// UARTs
// - 1 and 2 are present universally, 2 is connected to VCOM on Nucleo/Discovery boards, good for debug messages
// 4 and 5 don't support synchronous mode.
// Timers
// - some support quadrature input, probably all support external clock / gating / clock-out/PWM generation
// Not all chips have all timers and not all timers are equal.
// DMA - Direct memory access lines
// The resource registry will be pre-loaded with platform-specific config of which blocks are available - the rest will be "pre-claimed"
// (i.e. unavailable to functional modules)
typedef enum hw_resource Resource;
@ -75,6 +56,7 @@ enum hw_resource {
#define X(res_name) R_##res_name,
XX_RESOURCES
XX_RESOURCES_GPIO
XX_RESOURCES_EXTI
#undef X
R_NONE,
RESOURCE_COUNT = R_NONE,

Loading…
Cancel
Save