indirect frequency measurement
This commit is contained in:
@@ -15,6 +15,7 @@ GEX_SRC_DIR = \
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User/units/spi \
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User/units/adc \
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User/units/sipo \
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User/units/fcap \
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User/TinyFrame \
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User/CWPack \
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User/tasks
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@@ -61,6 +61,7 @@ static struct callbacks_ {
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struct cbslot dma2_7;
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struct cbslot dma2_8;
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struct cbslot tim2;
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struct cbslot tim6;
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struct cbslot tim7;
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struct cbslot tim15;
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@@ -102,7 +103,7 @@ void irqd_init(void)
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HAL_NVIC_SetPriority(ADC1_COMP_IRQn, 1, 0); // ADC group completion - higher prio than DMA to let it handle the last halfword first
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// NVIC_EnableIRQ(TIM1_IRQn); /*!< TIM1 global Interrupt */
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// NVIC_EnableIRQ(TIM2_IRQn); /*!< TIM2 global Interrupt */
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NVIC_EnableIRQ(TIM2_IRQn); /*!< TIM2 global Interrupt */
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// NVIC_EnableIRQ(TIM3_IRQn); /*!< TIM3 global Interrupt */
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NVIC_EnableIRQ(TIM6_DAC_IRQn); /*!< TIM6 global and DAC channel underrun error Interrupt */
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@@ -159,6 +160,7 @@ static struct cbslot *get_slot_for_periph(void *periph)
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else if (periph == USART5) slot = &callbacks.usart5;
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#endif
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else if (periph == TIM2) slot = &callbacks.tim2;
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else if (periph == TIM6) slot = &callbacks.tim6;
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else if (periph == TIM7) slot = &callbacks.tim7;
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else if (periph == TIM15) slot = &callbacks.tim15;
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@@ -304,6 +306,11 @@ void EXTI4_15_IRQHandler(void)
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// TIM14 is used to generate HAL timebase and its handler is in the file "timebase.c"
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void TIM2_IRQHandler(void)
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{
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CALL_IRQ_HANDLER(callbacks.tim2);
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}
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void TIM6_DAC_IRQHandler(void)
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{
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CALL_IRQ_HANDLER(callbacks.tim6);
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@@ -2,6 +2,7 @@
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// Created by MightyPork on 2017/11/26.
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//
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#include <units/fcap/unit_fcap.h>
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#include "platform.h"
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#include "usbd_core.h"
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#include "USB/usb_device.h"
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@@ -88,6 +89,7 @@ void plat_init_resources(void)
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ureg_add_type(&UNIT_1WIRE);
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ureg_add_type(&UNIT_ADC);
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ureg_add_type(&UNIT_SIPO);
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ureg_add_type(&UNIT_FCAP);
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// Free all present resources
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{
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@@ -0,0 +1,11 @@
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//
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// Created by MightyPork on 2018/02/03.
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//
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#include "platform.h"
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#include "unit_base.h"
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#include "unit_fcap.h"
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#define FCAP_INTERNAL
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#include "_fcap_internal.h"
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@@ -0,0 +1,197 @@
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//
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// Created by MightyPork on 2018/02/20.
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//
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#include "platform.h"
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#define FCAP_INTERNAL
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#include "_fcap_internal.h"
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static void UFCAP_PWMBurstReportJob(Job *job)
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{
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Unit *unit = job->unit;
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struct priv * const priv = unit->data;
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uint8_t buf[20];
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PayloadBuilder pb = pb_start(buf, 20, NULL);
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pb_u16(&pb, PLAT_AHB_MHZ);
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pb_u16(&pb, priv->pwm_burst.n_count);
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pb_u64(&pb, priv->pwm_burst.period_acu);
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pb_u64(&pb, priv->pwm_burst.ontime_acu);
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assert_param(pb.ok);
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com_respond_pb(priv->request_id, MSG_SUCCESS, &pb);
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// timer is already stopped, now in OPMODE_BUSY
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priv->opmode = OPMODE_IDLE;
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}
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void UFCAP_TimerHandler(void *arg)
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{
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Unit *unit = arg;
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assert_param(unit);
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struct priv * const priv = unit->data;
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assert_param(priv);
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TIM_TypeDef * const TIMx = priv->TIMx;
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if (priv->opmode == OPMODE_PWM_CONT) {
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if (LL_TIM_IsActiveFlag_CC1(TIMx)) {
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// assert_param(!LL_TIM_IsActiveFlag_CC1OVR(TIMx));
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priv->pwm_cont.last_period = LL_TIM_IC_GetCaptureCH1(TIMx);
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priv->pwm_cont.last_ontime = priv->pwm_cont.ontime;
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LL_TIM_ClearFlag_CC1(TIMx);
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LL_TIM_ClearFlag_CC1OVR(TIMx);
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}
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if (LL_TIM_IsActiveFlag_CC2(TIMx)) {
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// assert_param(!LL_TIM_IsActiveFlag_CC2OVR(TIMx));
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priv->pwm_cont.ontime = LL_TIM_IC_GetCaptureCH2(TIMx);
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LL_TIM_ClearFlag_CC2(TIMx);
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LL_TIM_ClearFlag_CC2OVR(TIMx);
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}
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}
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else if (priv->opmode == OPMODE_PWM_BURST) {
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if (LL_TIM_IsActiveFlag_CC1(TIMx)) {
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// assert_param(!LL_TIM_IsActiveFlag_CC1OVR(TIMx));
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const uint32_t period = LL_TIM_IC_GetCaptureCH1(TIMx);
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const uint32_t ontime = priv->pwm_burst.ontime;
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if (priv->pwm_burst.n_skip > 0) {
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priv->pwm_burst.n_skip--;
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} else {
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priv->pwm_burst.ontime_acu += ontime;
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priv->pwm_burst.period_acu += period;
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if (++priv->pwm_burst.n_count == priv->pwm_burst.n_target) {
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priv->opmode = OPMODE_BUSY;
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UFCAP_StopMeasurement(unit);
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Job j = {
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.cb = UFCAP_PWMBurstReportJob,
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.unit = unit,
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};
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scheduleJob(&j);
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}
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}
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LL_TIM_ClearFlag_CC1(TIMx);
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LL_TIM_ClearFlag_CC1OVR(TIMx);
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}
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if (LL_TIM_IsActiveFlag_CC2(TIMx)) {
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// assert_param(!LL_TIM_IsActiveFlag_CC2OVR(TIMx));
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priv->pwm_burst.ontime = LL_TIM_IC_GetCaptureCH2(TIMx);
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LL_TIM_ClearFlag_CC2(TIMx);
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LL_TIM_ClearFlag_CC2OVR(TIMx);
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}
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}
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else if (priv->opmode == OPMODE_IDLE) {
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// clear everything - in idle it would cycle in the handler forever
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TIMx->SR = 0;
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}
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}
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static void UFCAP_ClearTimerConfig(Unit *unit)
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{
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struct priv * const priv = unit->data;
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TIM_TypeDef * const TIMx = priv->TIMx;
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// CLEAR CURRENT STATE, STOP
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UFCAP_StopMeasurement(unit);
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// CONFIGURE TIMER BASIC PARAMS
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LL_TIM_SetPrescaler(TIMx, 0);
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LL_TIM_SetAutoReload(TIMx, 0xFFFFFFFF);
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LL_TIM_EnableARRPreload(TIMx);
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LL_TIM_GenerateEvent_UPDATE(TIMx);
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}
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void UFCAP_StopMeasurement(Unit *unit)
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{
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struct priv * const priv = unit->data;
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TIM_TypeDef * const TIMx = priv->TIMx;
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LL_TIM_DisableCounter(TIMx);
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LL_TIM_DisableIT_CC1(TIMx);
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LL_TIM_DisableIT_CC2(TIMx);
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LL_TIM_ClearFlag_CC1(TIMx);
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LL_TIM_ClearFlag_CC2(TIMx);
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LL_TIM_ClearFlag_CC1OVR(TIMx);
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LL_TIM_ClearFlag_CC2OVR(TIMx);
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LL_TIM_SetCounter(TIMx, 0);
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}
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void UFCAP_SwitchMode(Unit *unit, enum fcap_opmode opmode)
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{
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struct priv * const priv = unit->data;
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if (opmode == priv->opmode) return;
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priv->opmode = opmode;
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switch (opmode) {
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case OPMODE_IDLE:
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// XXX maybe we should report the abort to the PC-side listener
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UFCAP_StopMeasurement(unit);
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break;
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case OPMODE_PWM_CONT:
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priv->pwm_cont.last_ontime = 0;
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priv->pwm_cont.last_period = 0;
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priv->pwm_cont.ontime = 0;
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UFCAP_ConfigureForPWMCapture(unit); // is also stopped and restarted
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break;
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case OPMODE_PWM_BURST:
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priv->pwm_burst.ontime = 0;
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priv->pwm_burst.n_count = 0;
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priv->pwm_burst.n_skip = 1; // discard the first cycle (will be incomplete)
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priv->pwm_burst.period_acu = 0;
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priv->pwm_burst.ontime_acu = 0;
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UFCAP_ConfigureForPWMCapture(unit); // is also stopped and restarted
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break;
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default:
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trap("Unhandled opmode %d", (int)opmode);
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}
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}
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void UFCAP_ConfigureForPWMCapture(Unit *unit)
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{
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struct priv * const priv = unit->data;
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TIM_TypeDef * const TIMx = priv->TIMx;
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const uint32_t ll_ch_a = priv->ll_ch_a;
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const uint32_t ll_ch_b = priv->ll_ch_b;
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UFCAP_ClearTimerConfig(unit);
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// Enable channels and select mapping to TIx signals
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// A - will be used to measure period
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// B - will be used to measure the duty cycle
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// _________ ______
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// _______| |________________|
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// A B A
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// irq irq,cap irq
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// reset
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// B irq may be used if we want to measure a pulse width
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// Normally TI1 = CH1, TI2 = CH2.
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// It's possible to select the other channel, which we use to connect both TIx to the shame CHx.
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LL_TIM_IC_SetActiveInput(TIMx, ll_ch_a, priv->a_direct ? LL_TIM_ACTIVEINPUT_DIRECTTI : LL_TIM_ACTIVEINPUT_INDIRECTTI);
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LL_TIM_IC_SetActiveInput(TIMx, ll_ch_b, priv->a_direct ? LL_TIM_ACTIVEINPUT_INDIRECTTI : LL_TIM_ACTIVEINPUT_DIRECTTI);
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LL_TIM_CC_EnableChannel(TIMx, ll_ch_a | ll_ch_b);
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LL_TIM_IC_SetPolarity(TIMx, ll_ch_a, LL_TIM_IC_POLARITY_RISING);
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LL_TIM_IC_SetPolarity(TIMx, ll_ch_b, LL_TIM_IC_POLARITY_FALLING);
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LL_TIM_SetSlaveMode(TIMx, LL_TIM_SLAVEMODE_RESET);
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LL_TIM_SetTriggerInput(TIMx, LL_TIM_TS_TI1FP1); // Use Filtered Input 1 (TI1)
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LL_TIM_EnableMasterSlaveMode(TIMx);
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LL_TIM_EnableIT_CC1(TIMx);
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LL_TIM_EnableIT_CC2(TIMx);
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LL_TIM_EnableCounter(TIMx);
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}
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@@ -0,0 +1,120 @@
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//
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// Created by MightyPork on 2018/02/03.
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//
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#include "platform.h"
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#include "unit_base.h"
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#define FCAP_INTERNAL
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#include "_fcap_internal.h"
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/** Allocate data structure and set defaults */
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error_t UFCAP_preInit(Unit *unit)
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{
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struct priv *priv = unit->data = calloc_ck(1, sizeof(struct priv));
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if (priv == NULL) return E_OUT_OF_MEM;
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priv->signal_pname = 'A';
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priv->signal_pnum = 0;
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priv->opmode = OPMODE_PWM_CONT;
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return E_SUCCESS;
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}
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/** Finalize unit set-up */
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error_t UFCAP_init(Unit *unit)
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{
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bool suc = true;
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struct priv *priv = unit->data;
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// ---- Resolve what to configure ----
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TIM_TypeDef * const TIMx = TIM2;
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Resource timRsc = R_TIM2;
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uint32_t ll_ch_a = 0;
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uint32_t ll_ch_b = 0;
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switch (priv->signal_pname) {
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case 'A':
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switch (priv->signal_pnum) {
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case 5:
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case 15:
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case 0: ll_ch_a = LL_TIM_CHANNEL_CH1; break;
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case 1: ll_ch_a = LL_TIM_CHANNEL_CH2; break;
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default:
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dbg("Bad signal pin!");
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return E_BAD_CONFIG;
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}
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break;
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case 'B':
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switch (priv->signal_pnum) {
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case 3: ll_ch_a = LL_TIM_CHANNEL_CH2; break;
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default:
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dbg("Bad signal pin!");
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return E_BAD_CONFIG;
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}
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break;
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default:
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dbg("Bad signal pin port!");
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return E_BAD_CONFIG;
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}
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const uint32_t ll_timpin_af = LL_GPIO_AF_2;
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bool a_direct = true;
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switch (ll_ch_a) {
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case LL_TIM_CHANNEL_CH1:
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ll_ch_b = LL_TIM_CHANNEL_CH2;
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break;
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case LL_TIM_CHANNEL_CH2:
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ll_ch_b = LL_TIM_CHANNEL_CH1;
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a_direct = false;
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break;
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}
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// ---- CLAIM ----
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TRY(rsc_claim_pin(unit, priv->signal_pname, priv->signal_pnum));
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TRY(rsc_claim(unit, timRsc));
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// ---- INIT ----
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assert_param(ll_ch_a != ll_ch_b);
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priv->TIMx = TIMx;
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priv->ll_ch_a = ll_ch_a;
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priv->ll_ch_b = ll_ch_b;
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priv->a_direct = a_direct;
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TRY(hw_configure_gpio_af(priv->signal_pname, priv->signal_pnum, ll_timpin_af));
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hw_periph_clock_enable(TIMx);
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irqd_attach(TIMx, UFCAP_TimerHandler, unit);
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UFCAP_SwitchMode(unit, OPMODE_IDLE);
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return E_SUCCESS;
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}
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/** Tear down the unit */
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void UFCAP_deInit(Unit *unit)
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{
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struct priv *priv = unit->data;
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// de-init peripherals
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if (unit->status == E_SUCCESS ) {
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UFCAP_SwitchMode(unit, OPMODE_IDLE);
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TIM_TypeDef *TIMx = priv->TIMx;
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LL_TIM_DeInit(TIMx);
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irqd_attach(TIMx, UFCAP_TimerHandler, unit);
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}
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// Release all resources, deinit pins
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rsc_teardown(unit);
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// Free memory
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free_ck(unit->data);
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}
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@@ -0,0 +1,90 @@
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//
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// Created by MightyPork on 2018/02/03.
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//
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#ifndef GEX_F072_FCAP_INTERNAL_H
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#define GEX_F072_FCAP_INTERNAL_H
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#ifndef FCAP_INTERNAL
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#error bad include!
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#endif
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#include "unit_base.h"
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enum fcap_opmode {
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OPMODE_IDLE = 0,
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OPMODE_BUSY = 1, // used after capture is done, before it's reported
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OPMODE_PWM_CONT = 2,
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OPMODE_PWM_BURST = 3, // averaging
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};
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/** Private data structure */
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struct priv {
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// settings
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char signal_pname; // the input pin - one of TIM2 channels
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uint8_t signal_pnum;
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// internal state
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TIM_TypeDef *TIMx;
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uint32_t ll_ch_b;
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uint32_t ll_ch_a;
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bool a_direct;
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enum fcap_opmode opmode;
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TF_ID request_id;
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union {
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struct {
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uint32_t ontime; // length of the captured positive pulse in the current interval
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uint32_t last_period; //!< length of the captured interval between two rising edges
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uint32_t last_ontime; //!< length of the last captured ontime
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} pwm_cont;
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struct {
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uint32_t ontime; // length of the captured positive pulse in the current interval
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uint64_t period_acu; //!< length of the captured interval between two rising edges, sum
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uint64_t ontime_acu; //!< length of the last captured ontime, sum
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uint16_t n_count; //!< Periods captured
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uint16_t n_target; //!< Periods captured - requested count
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uint8_t n_skip; //!< Periods to skip before starting the real capture
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} pwm_burst;
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};
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};
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/** Allocate data structure and set defaults */
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error_t UFCAP_preInit(Unit *unit);
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/** Load from a binary buffer stored in Flash */
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void UFCAP_loadBinary(Unit *unit, PayloadParser *pp);
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/** Write to a binary buffer for storing in Flash */
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void UFCAP_writeBinary(Unit *unit, PayloadBuilder *pb);
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// ------------------------------------------------------------------------
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/** Parse a key-value pair from the INI file */
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error_t UFCAP_loadIni(Unit *unit, const char *key, const char *value);
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/** Generate INI file section for the unit */
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void UFCAP_writeIni(Unit *unit, IniWriter *iw);
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// ------------------------------------------------------------------------
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/** Finalize unit set-up */
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error_t UFCAP_init(Unit *unit);
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/** Tear down the unit */
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void UFCAP_deInit(Unit *unit);
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// ------------------------------------------------------------------------
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|
||||
void UFCAP_TimerHandler(void *arg);
|
||||
|
||||
void UFCAP_StopMeasurement(Unit *unit);
|
||||
|
||||
void UFCAP_ConfigureForPWMCapture(Unit *unit);
|
||||
|
||||
void UFCAP_SwitchMode(Unit *unit, enum fcap_opmode opmode);
|
||||
|
||||
#endif //GEX_F072_FCAP_INTERNAL_H
|
||||
@@ -0,0 +1,62 @@
|
||||
//
|
||||
// Created by MightyPork on 2018/02/03.
|
||||
//
|
||||
|
||||
#include "platform.h"
|
||||
#include "unit_base.h"
|
||||
|
||||
#define FCAP_INTERNAL
|
||||
#include "_fcap_internal.h"
|
||||
|
||||
/** Load from a binary buffer stored in Flash */
|
||||
void UFCAP_loadBinary(Unit *unit, PayloadParser *pp)
|
||||
{
|
||||
struct priv *priv = unit->data;
|
||||
|
||||
uint8_t version = pp_u8(pp);
|
||||
(void)version;
|
||||
|
||||
priv->signal_pname = pp_char(pp);
|
||||
priv->signal_pnum = pp_u8(pp);
|
||||
}
|
||||
|
||||
/** Write to a binary buffer for storing in Flash */
|
||||
void UFCAP_writeBinary(Unit *unit, PayloadBuilder *pb)
|
||||
{
|
||||
struct priv *priv = unit->data;
|
||||
|
||||
pb_u8(pb, 0); // version
|
||||
|
||||
pb_char(pb, priv->signal_pname);
|
||||
pb_u8(pb, priv->signal_pnum);
|
||||
}
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
|
||||
/** Parse a key-value pair from the INI file */
|
||||
error_t UFCAP_loadIni(Unit *unit, const char *key, const char *value)
|
||||
{
|
||||
bool suc = true;
|
||||
struct priv *priv = unit->data;
|
||||
|
||||
if (streq(key, "signal-pin")) {
|
||||
suc = parse_pin(value, &priv->signal_pname, &priv->signal_pnum);
|
||||
}
|
||||
else {
|
||||
return E_BAD_KEY;
|
||||
}
|
||||
|
||||
if (!suc) return E_BAD_VALUE;
|
||||
return E_SUCCESS;
|
||||
}
|
||||
|
||||
/** Generate INI file section for the unit */
|
||||
void UFCAP_writeIni(Unit *unit, IniWriter *iw)
|
||||
{
|
||||
struct priv *priv = unit->data;
|
||||
|
||||
iw_comment(iw, "Signal input pin");
|
||||
iw_comment(iw, "One of: A0, A1, A5, A15, B3");
|
||||
iw_entry(iw, "signal-pin", "%c%d", priv->signal_pname, priv->signal_pnum);
|
||||
}
|
||||
|
||||
@@ -0,0 +1,84 @@
|
||||
//
|
||||
// Created by MightyPork on 2017/11/25.
|
||||
//
|
||||
|
||||
#include "unit_base.h"
|
||||
#include "unit_fcap.h"
|
||||
|
||||
#define FCAP_INTERNAL
|
||||
#include "_fcap_internal.h"
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
|
||||
enum FcapCmd_ {
|
||||
CMD_STOP = 0,
|
||||
CMD_PWM_CONT_START = 1,
|
||||
CMD_PWM_BURST_START = 2,
|
||||
CMD_PWM_CONT_READ = 10,
|
||||
};
|
||||
|
||||
/** Handle a request message */
|
||||
static error_t UFCAP_handleRequest(Unit *unit, TF_ID frame_id, uint8_t command, PayloadParser *pp)
|
||||
{
|
||||
struct priv *priv = unit->data;
|
||||
|
||||
switch (command) {
|
||||
case CMD_STOP:
|
||||
UFCAP_SwitchMode(unit, OPMODE_IDLE);
|
||||
return E_SUCCESS;
|
||||
|
||||
case CMD_PWM_CONT_START:
|
||||
if (priv->opmode == OPMODE_PWM_CONT) return E_SUCCESS; // no-op
|
||||
if (priv->opmode != OPMODE_IDLE) return E_BUSY;
|
||||
|
||||
UFCAP_SwitchMode(unit, OPMODE_PWM_CONT);
|
||||
return E_SUCCESS;
|
||||
|
||||
case CMD_PWM_BURST_START:
|
||||
if (priv->opmode != OPMODE_IDLE) return E_BAD_MODE;
|
||||
|
||||
uint16_t count = pp_u16(pp);
|
||||
priv->pwm_burst.n_target = count;
|
||||
priv->request_id = frame_id;
|
||||
UFCAP_SwitchMode(unit, OPMODE_PWM_BURST);
|
||||
return E_SUCCESS;
|
||||
|
||||
case CMD_PWM_CONT_READ:
|
||||
if (priv->opmode != OPMODE_PWM_CONT) {
|
||||
return E_BAD_MODE;
|
||||
}
|
||||
if (priv->pwm_cont.last_period == 0) {
|
||||
return E_BUSY;
|
||||
}
|
||||
|
||||
PayloadBuilder pb = pb_start(unit_tmp512, UNIT_TMP_LEN, NULL);
|
||||
pb_u16(&pb, PLAT_AHB_MHZ);
|
||||
pb_u32(&pb, priv->pwm_cont.last_period);
|
||||
pb_u32(&pb, priv->pwm_cont.last_ontime);
|
||||
|
||||
com_respond_pb(frame_id, MSG_SUCCESS, &pb);
|
||||
return E_SUCCESS;
|
||||
|
||||
default:
|
||||
return E_UNKNOWN_COMMAND;
|
||||
}
|
||||
}
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
|
||||
/** Frequency capture */
|
||||
const UnitDriver UNIT_FCAP = {
|
||||
.name = "FCAP",
|
||||
.description = "Frequency and pulse measurement",
|
||||
// Settings
|
||||
.preInit = UFCAP_preInit,
|
||||
.cfgLoadBinary = UFCAP_loadBinary,
|
||||
.cfgWriteBinary = UFCAP_writeBinary,
|
||||
.cfgLoadIni = UFCAP_loadIni,
|
||||
.cfgWriteIni = UFCAP_writeIni,
|
||||
// Init
|
||||
.init = UFCAP_init,
|
||||
.deInit = UFCAP_deInit,
|
||||
// Function
|
||||
.handleRequest = UFCAP_handleRequest,
|
||||
};
|
||||
@@ -0,0 +1,16 @@
|
||||
//
|
||||
// Created by MightyPork on 2017/11/25.
|
||||
//
|
||||
// Digital input unit; single or multiple pin read access on one port (A-F)
|
||||
//
|
||||
|
||||
#ifndef U_FCAP_H
|
||||
#define U_FCAP_H
|
||||
|
||||
#include "unit.h"
|
||||
|
||||
extern const UnitDriver UNIT_FCAP;
|
||||
|
||||
// UU_ prototypes
|
||||
|
||||
#endif //U_FCAP_H
|
||||
@@ -28,6 +28,7 @@
|
||||
X(CHECKSUM_MISMATCH, NULL) /* bus checksum failed */ \
|
||||
X(PROTOCOL_BREACH, NULL) /* eating with the wrong spoon */ \
|
||||
X(BUSY, NULL) /* Unit is busy */ \
|
||||
X(BAD_MODE, NULL) /* Command not permissible in current opmode */ \
|
||||
\
|
||||
/* VFS user errors (those are meant to be shown to user) */ \
|
||||
X(VFS_ERROR_DURING_TRANSFER, "Error during transfer") \
|
||||
|
||||
Reference in New Issue
Block a user