parent
9c5d889cfc
commit
e88bf84ea1
GPG Key ID:
2C5FD5035250423D
@ -0,0 +1,419 @@ |
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//
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// Created by MightyPork on 2018/01/02.
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//
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#include "platform.h" |
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#include "comm/messages.h" |
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#include "unit_base.h" |
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#include "utils/avrlibc.h" |
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#include "unit_uart.h" |
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// SPI master
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/** Private data structure */ |
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struct priv { |
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uint8_t periph_num; //!< 1-6
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uint8_t remap; //!< UART remap option
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uint32_t baudrate; //!< UART baud rate
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uint8_t parity; //!< 0-none, 1-odd, 2-even
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uint8_t stopbits; //!< 1-one, 2-2, 3-1.5
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bool enable_rx; //!< Configure and enable the Rx line
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bool enable_tx; //!< Configure and enable the Tx line
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uint8_t hw_flow_control; //!< HW flow control 0-none, 1-RTX, 2-CTS, 3-both
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bool clock_output; //!< Output serial clock
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bool cpol; //!< clock CPOL setting
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bool cpha; //!< clock CPHA setting
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uint32_t rx_buf_size; //!< Receive buffer size
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uint32_t rx_full_thr; //!< Receive buffer full threshold (will be sent to PC)
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uint16_t rx_timeout; //!< Receive timeout (time of inactivity before flushing to PC)
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USART_TypeDef *periph; |
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}; |
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/** Allocate data structure and set defaults */ |
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static error_t UUSART_preInit(Unit *unit) |
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{ |
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bool suc = true; |
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struct priv *priv = unit->data = calloc_ck(1, sizeof(struct priv), &suc); |
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if (!suc) return E_OUT_OF_MEM; |
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// some defaults
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priv->periph_num = 1; |
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priv->remap = 0; |
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priv->baudrate = 115200; |
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priv->parity = 0; //!< 0-none, 1-odd, 2-even
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priv->stopbits = 1; //!< 1-one, 2-2, 3-1.5
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priv->enable_rx = true; |
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priv->enable_tx = true; |
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priv->hw_flow_control = false; |
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priv->clock_output = false; |
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priv->cpol = 0; |
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priv->cpha = 0; |
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priv->rx_buf_size = 128; |
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priv->rx_full_thr = 90; |
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priv->rx_timeout = 3; // ms
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return E_SUCCESS; |
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} |
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// ------------------------------------------------------------------------
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/** Load from a binary buffer stored in Flash */ |
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static void UUSART_loadBinary(Unit *unit, PayloadParser *pp) |
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{ |
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struct priv *priv = unit->data; |
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uint8_t version = pp_u8(pp); |
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(void)version; |
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priv->periph_num = pp_u8(pp); |
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priv->remap = pp_u8(pp); |
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priv->baudrate = pp_u32(pp); |
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priv->parity = pp_u8(pp); |
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priv->stopbits = pp_u8(pp); |
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priv->enable_rx = pp_bool(pp); |
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priv->enable_tx = pp_bool(pp); |
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priv->hw_flow_control = pp_u8(pp); |
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priv->clock_output = pp_bool(pp); |
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priv->cpol = pp_bool(pp); |
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priv->cpha = pp_bool(pp); |
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priv->rx_buf_size = pp_u32(pp); |
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priv->rx_full_thr = pp_u32(pp); |
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priv->rx_timeout = pp_u16(pp); |
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} |
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/** Write to a binary buffer for storing in Flash */ |
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static void UUSART_writeBinary(Unit *unit, PayloadBuilder *pb) |
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{ |
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struct priv *priv = unit->data; |
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pb_u8(pb, 0); // version
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pb_u8(pb, priv->periph_num); |
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pb_u8(pb, priv->remap); |
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pb_u32(pb, priv->baudrate); |
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pb_u8(pb, priv->parity); |
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pb_u8(pb, priv->stopbits); |
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pb_bool(pb, priv->enable_rx); |
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pb_bool(pb, priv->enable_tx); |
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pb_u8(pb, priv->hw_flow_control); |
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pb_bool(pb, priv->clock_output); |
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pb_bool(pb, priv->cpol); |
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pb_bool(pb, priv->cpha); |
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pb_u32(pb, priv->rx_buf_size); |
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pb_u32(pb, priv->rx_full_thr); |
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pb_u16(pb, priv->rx_timeout); |
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} |
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// ------------------------------------------------------------------------
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/** Parse a key-value pair from the INI file */ |
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static error_t UUSART_loadIni(Unit *unit, const char *key, const char *value) |
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{ |
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bool suc = true; |
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struct priv *priv = unit->data; |
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if (streq(key, "device")) { |
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priv->periph_num = (uint8_t) avr_atoi(value); |
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} |
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else if (streq(key, "remap")) { |
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priv->remap = (uint8_t) avr_atoi(value); |
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} |
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else if (streq(key, "baud-rate")) { |
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priv->baudrate = (uint32_t ) avr_atoi(value); |
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} |
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else if (streq(key, "parity")) { |
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priv->parity = (uint8_t) avr_atoi(value); |
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} |
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else if (streq(key, "stop-bits")) { |
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priv->stopbits = (uint8_t) (1 + str_parse_012(value, "1", "2", "1.5", &suc)); |
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} |
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else if (streq(key, "enable-rx")) { |
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priv->enable_rx = str_parse_yn(value, &suc); |
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} |
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else if (streq(key, "enable-tx")) { |
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priv->enable_tx = str_parse_yn(value, &suc); |
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} |
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else if (streq(key, "hw-flow-control")) { |
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priv->hw_flow_control = (uint8_t) avr_atoi(value); |
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} |
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else if (streq(key, "synchronous")) { |
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priv->clock_output = (bool) avr_atoi(value); |
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} |
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else if (streq(key, "cpol")) { |
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priv->cpol = (bool) avr_atoi(value); |
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} |
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else if (streq(key, "cpha")) { |
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priv->cpha = (bool) avr_atoi(value); |
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} |
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else if (streq(key, "rx-buffer")) { |
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priv->rx_buf_size = (uint32_t ) avr_atoi(value); |
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} |
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else if (streq(key, "rx-full-theshold")) { |
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priv->rx_full_thr = (uint32_t ) avr_atoi(value); |
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} |
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else if (streq(key, "rx-timeout")) { |
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priv->rx_timeout = (uint16_t ) avr_atoi(value); |
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} |
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else { |
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return E_BAD_KEY; |
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} |
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if (!suc) return E_BAD_VALUE; |
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return E_SUCCESS; |
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} |
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/** Generate INI file section for the unit */ |
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static void UUSART_writeIni(Unit *unit, IniWriter *iw) |
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{ |
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struct priv *priv = unit->data; |
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iw_comment(iw, "Peripheral number (UARTx)"); |
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iw_entry(iw, "device", "%d", (int)priv->periph_num); |
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iw_comment(iw, "Pin mappings (SCK,MISO,MOSI)"); |
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#if GEX_PLAT_F072_DISCOVERY |
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// TODO
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// iw_comment(iw, " SPI1: (0) A5,A6,A7 (1) B3,B4,B5 (2) E13,E14,E15");
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// iw_comment(iw, " SPI2: (0) B13,B14,B15 (1) D1,D3,D4");
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#elif GEX_PLAT_F103_BLUEPILL |
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#error "NO IMPL" |
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#elif GEX_PLAT_F303_DISCOVERY |
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#error "NO IMPL" |
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#elif GEX_PLAT_F407_DISCOVERY |
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#error "NO IMPL" |
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#else |
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#error "BAD PLATFORM!" |
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#endif |
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iw_entry(iw, "remap", "%d", (int)priv->remap); |
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iw_cmt_newline(iw); |
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iw_comment(iw, "Baud rate"); // TODO examples/range
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iw_entry(iw, "baud-rate", "%d", (int)priv->baudrate); |
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iw_comment(iw, "Parity (0-none, 1-odd, 2-even)"); |
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iw_entry(iw, "parity", "%d", (int)priv->parity); |
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iw_comment(iw, "Stop-bits (1, 1.5, 2)"); |
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iw_entry(iw, "stop-bits", "%s", (priv->stopbits==3)?"1.5":(priv->stopbits==2?"2":"1")); |
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iw_comment(iw, "Enable the RX / TX lines"); |
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iw_entry(iw, "exable-rx", str_yn(priv->enable_rx)); |
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iw_entry(iw, "exable-tx", str_yn(priv->enable_tx)); |
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iw_comment(iw, "Hardware flow control (NONE, RTS, CTS, ALL)"); |
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iw_entry(iw, "hw-flow-control", "%s", str_4(priv->hw_flow_control, 0, "NONE", 1, "RTS", 2, "CTS", 3, "ALL")); |
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iw_comment(iw, "Clock output (Y,N) - N for async"); |
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iw_entry(iw, "clock-output", str_yn(priv->clock_output)); |
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iw_comment(iw, "Sync: Clock polarity: 0,1 (clock idle level)"); |
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iw_entry(iw, "cpol", "%d", (int)priv->cpol); |
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iw_comment(iw, "Sync: Clock phase: 0,1 (active edge, 0-first, 1-second)"); |
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iw_entry(iw, "cpha", "%d", (int)priv->cpha); |
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iw_comment(iw, "Receive buffer capacity, full threshold and flush timeout"); |
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iw_entry(iw, "rx-buffer", "%d", (int)priv->rx_buf_size); |
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iw_entry(iw, "rx-full-theshold", "%d", (int)priv->rx_full_thr); |
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iw_entry(iw, "rx-timeout", "%d", (int)priv->rx_timeout); |
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} |
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// ------------------------------------------------------------------------
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/** Finalize unit set-up */ |
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static error_t UUSART_init(Unit *unit) |
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{ |
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bool suc = true; |
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struct priv *priv = unit->data; |
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if (!(priv->periph_num >= 1 && priv->periph_num <= 4)) { |
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dbg("!! Bad UART periph"); |
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// TODO count based on platform chip
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return E_BAD_CONFIG; |
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} |
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// assign and claim the peripheral
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if (priv->periph_num == 1) { |
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TRY(rsc_claim(unit, R_USART1)); |
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priv->periph = USART1; |
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} |
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else if (priv->periph_num == 2) { |
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TRY(rsc_claim(unit, R_USART2)); |
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priv->periph = USART2; |
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} |
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else if (priv->periph_num == 3) { |
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TRY(rsc_claim(unit, R_USART3)); |
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priv->periph = USART3; |
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} |
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else if (priv->periph_num == 4) { |
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TRY(rsc_claim(unit, R_USART4)); |
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priv->periph = USART4; |
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} |
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// This is written for F072, other platforms will need adjustments
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// Configure UART pins (AF)
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char uart_portname; |
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uint8_t pin_rx; |
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uint8_t pin_tx; |
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uint8_t pin_clk; |
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uint8_t pin_rts; |
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uint8_t pin_cts; |
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uint32_t af_uart; |
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// TODO
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#if GEX_PLAT_F072_DISCOVERY |
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// SPI1 - many options
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// sck, miso, mosi, af
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if (priv->periph_num == 1) { |
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// SPI1
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if (priv->remap == 0) { |
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uart_portname = 'A'; |
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// af_spi = LL_GPIO_AF_0;
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// pin_sck = 5;
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// pin_miso = 6;
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// pin_mosi = 7;
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} |
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else { |
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return E_BAD_CONFIG; |
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} |
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} |
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// TODO other periphs
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#elif GEX_PLAT_F103_BLUEPILL |
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#error "NO IMPL" |
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#elif GEX_PLAT_F303_DISCOVERY |
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#error "NO IMPL" |
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#elif GEX_PLAT_F407_DISCOVERY |
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#error "NO IMPL" |
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#else |
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#error "BAD PLATFORM!" |
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#endif |
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//
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// // first, we have to claim the pins
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// TRY(rsc_claim_pin(unit, uart_portname, pin_mosi));
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// TRY(rsc_claim_pin(unit, uart_portname, pin_miso));
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// TRY(rsc_claim_pin(unit, uart_portname, pin_sck));
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//
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// configure_gpio_alternate(uart_portname, pin_mosi, af_spi);
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// configure_gpio_alternate(uart_portname, pin_miso, af_spi);
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// configure_gpio_alternate(uart_portname, pin_sck, af_spi);
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//
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// if (priv->periph_num == 1) {
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// __HAL_RCC_SPI1_CLK_ENABLE();
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// } else {
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// __HAL_RCC_SPI2_CLK_ENABLE();
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// }
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//
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// // configure SSN GPIOs
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// {
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// // Claim all needed pins
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// TRY(rsc_claim_gpios(unit, priv->ssn_port_name, priv->ssn_pins));
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// TRY(configure_sparse_pins(priv->ssn_port_name, priv->ssn_pins, &priv->ssn_port,
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// LL_GPIO_MODE_OUTPUT, LL_GPIO_OUTPUT_PUSHPULL));
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// // Set the initial state - all high
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// priv->ssn_port->BSRR = priv->ssn_pins;
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// }
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//
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// // Configure SPI - must be configured under reset
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// LL_SPI_Disable(priv->periph);
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// {
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// uint32_t presc = priv->prescaller;
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// uint32_t lz = __CLZ(presc);
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// if (lz < 23) lz = 23;
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// if (lz > 30) lz = 30;
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// presc = (32 - lz - 2);
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// LL_SPI_SetBaudRatePrescaler(priv->periph, (presc<<SPI_CR1_BR_Pos)&SPI_CR1_BR_Msk);
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//
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// LL_SPI_SetClockPolarity(priv->periph, priv->cpol ? LL_SPI_POLARITY_HIGH : LL_SPI_POLARITY_LOW);
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// LL_SPI_SetClockPhase(priv->periph, priv->cpha ? LL_SPI_PHASE_1EDGE : LL_SPI_PHASE_2EDGE);
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// LL_SPI_SetTransferDirection(priv->periph, priv->tx_only ? LL_SPI_HALF_DUPLEX_TX : LL_SPI_FULL_DUPLEX);
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// LL_SPI_SetTransferBitOrder(priv->periph, priv->lsb_first ? LL_SPI_LSB_FIRST : LL_SPI_MSB_FIRST);
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//
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// LL_SPI_SetNSSMode(priv->periph, LL_SPI_NSS_SOFT);
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// LL_SPI_SetDataWidth(priv->periph, LL_SPI_DATAWIDTH_8BIT);
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// LL_SPI_SetRxFIFOThreshold(priv->periph, LL_SPI_RX_FIFO_TH_QUARTER); // trigger RXNE on 1 byte
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//
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// LL_SPI_SetMode(priv->periph, LL_SPI_MODE_MASTER);
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// }
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// LL_SPI_Enable(priv->periph);
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return E_SUCCESS; |
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} |
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/** Tear down the unit */ |
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static void UUSART_deInit(Unit *unit) |
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{ |
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struct priv *priv = unit->data; |
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// // de-init the pins & peripheral only if inited correctly
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// if (unit->status == E_SUCCESS) {
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// assert_param(priv->periph);
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//
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// LL_SPI_DeInit(priv->periph);
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//
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// if (priv->periph_num == 1) {
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// __HAL_RCC_SPI1_CLK_DISABLE();
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// } else {
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// __HAL_RCC_SPI2_CLK_DISABLE();
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// }
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// }
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// Release all resources
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rsc_teardown(unit); |
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// Free memory
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free(unit->data); |
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unit->data = NULL; |
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} |
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// ------------------------------------------------------------------------
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enum PinCmd_ { |
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CMD_WRITE = 0, |
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}; |
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/** Handle a request message */ |
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static error_t UUSART_handleRequest(Unit *unit, TF_ID frame_id, uint8_t command, PayloadParser *pp) |
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{ |
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switch (command) { |
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case CMD_WRITE: |
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return E_NOT_IMPLEMENTED; |
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default: |
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return E_UNKNOWN_COMMAND; |
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} |
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} |
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// ------------------------------------------------------------------------
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/** Unit template */ |
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const UnitDriver UNIT_USART = { |
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.name = "USART", |
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.description = "Serial port", |
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// Settings
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.preInit = UUSART_preInit, |
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.cfgLoadBinary = UUSART_loadBinary, |
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.cfgWriteBinary = UUSART_writeBinary, |
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.cfgLoadIni = UUSART_loadIni, |
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.cfgWriteIni = UUSART_writeIni, |
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// Init
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.init = UUSART_init, |
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.deInit = UUSART_deInit, |
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// Function
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.handleRequest = UUSART_handleRequest, |
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}; |
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@ -0,0 +1,12 @@ |
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//
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// Created by MightyPork on 2018/01/02.
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//
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#ifndef GEX_F072_UNIT_USART_H |
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#define GEX_F072_UNIT_USART_H |
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#include "unit.h" |
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extern const UnitDriver UNIT_USART; |
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#endif //GEX_F072_UNIT_USART_H
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