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@ -2,14 +2,23 @@ |
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// Created by MightyPork on 2018/02/20.
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//
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#include <stm32f072xb.h> |
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#include "platform.h" |
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#define FCAP_INTERNAL |
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#include "_fcap_internal.h" |
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void UFCAP_StopMeasurement(Unit *unit); |
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void UFCAP_ConfigureForPWMCapture(Unit *unit); |
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void UFCAP_ConfigureForDirectCapture(Unit *unit); |
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static void UFCAP_StopMeasurement(Unit *unit); |
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static void UFCAP_ConfigureForPWMCapture(Unit *unit); |
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static void UFCAP_ConfigureForDirectCapture(Unit *unit); |
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static void UFCAP_ConfigureForFreeCapture(Unit *unit); |
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uint32_t UFCAP_GetFreeCounterValue(Unit *unit) |
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{ |
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struct priv * const priv = unit->data; |
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TIM_TypeDef * const TIMx = priv->TIMx; |
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return TIMx->CNT; |
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} |
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static void UFCAP_PWMBurstReportJob(Job *job) |
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{ |
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@ -32,7 +41,26 @@ static void UFCAP_PWMBurstReportJob(Job *job) |
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priv->opmode = OPMODE_IDLE; |
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} |
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void UFCAP_TimerHandler(void *arg) |
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static void UFCAP_CountBurstReportJob(Job *job) |
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{ |
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Unit *unit = job->unit; |
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struct priv * const priv = unit->data; |
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uint8_t buf[6]; |
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PayloadBuilder pb = pb_start(buf, 20, NULL); |
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pb_u16(&pb, priv->cnt_burst.msec); |
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pb_u32(&pb, job->data1); |
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assert_param(pb.ok); |
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com_respond_pb(priv->request_id, MSG_SUCCESS, &pb); |
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// timer is already stopped, now in OPMODE_BUSY
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priv->opmode = OPMODE_IDLE; |
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} |
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void UFCAP_TIMxHandler(void *arg) |
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{ |
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Unit *unit = arg; |
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assert_param(unit); |
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@ -100,6 +128,45 @@ void UFCAP_TimerHandler(void *arg) |
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} |
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} |
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void UFCAP_TIMyHandler(void *arg) |
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{ |
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Unit *unit = arg; |
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assert_param(unit); |
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struct priv *const priv = unit->data; |
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assert_param(priv); |
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TIM_TypeDef * const TIMx = priv->TIMx; |
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TIM_TypeDef * const TIMy = priv->TIMy; |
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uint32_t cnt = TIMx->CNT; // TIMx should be stopped now
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dbg("> TIMy Handler, TIMx cntr is %d", cnt); |
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priv->cnt_cont.last_count = cnt; |
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if (priv->opmode == OPMODE_COUNTER_CONT) { |
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LL_TIM_SetCounter(TIMx, 0); |
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LL_TIM_EnableCounter(TIMy); // next loop
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} else if (priv->opmode == OPMODE_COUNTER_BURST) { |
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priv->opmode = OPMODE_BUSY; |
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UFCAP_StopMeasurement(unit); |
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Job j = { |
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.cb = UFCAP_CountBurstReportJob, |
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.unit = unit, |
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.data1 = cnt, |
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}; |
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scheduleJob(&j); |
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} |
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else if (priv->opmode == OPMODE_IDLE) { |
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// clear everything - in idle it would cycle in the handler forever
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TIMy->SR = 0; |
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} |
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else { |
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trap("Unhandled fcap TIMy irq"); |
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} |
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LL_TIM_ClearFlag_UPDATE(TIMy); |
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} |
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static void UFCAP_ClearTimerConfig(Unit *unit) |
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{ |
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struct priv * const priv = unit->data; |
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@ -120,7 +187,7 @@ static void UFCAP_ClearTimerConfig(Unit *unit) |
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* |
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* @param unit |
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*/ |
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void UFCAP_StopMeasurement(Unit *unit) |
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static void UFCAP_StopMeasurement(Unit *unit) |
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{ |
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struct priv * const priv = unit->data; |
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@ -166,9 +233,20 @@ void UFCAP_SwitchMode(Unit *unit, enum fcap_opmode opmode) |
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break; |
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case OPMODE_COUNTER_CONT: |
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priv->cnt_cont.last_count = 0; |
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priv->n_skip = 1; // discard the first cycle (will be incomplete)
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UFCAP_ConfigureForDirectCapture(unit); |
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break; |
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case OPMODE_COUNTER_BURST: |
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priv->n_skip = 0; // no skip here (if there was any)
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UFCAP_ConfigureForDirectCapture(unit); |
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break; |
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case OPMODE_COUNTER_FREERUNNING: |
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UFCAP_ConfigureForFreeCapture(unit); |
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break; |
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default: |
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trap("Unhandled opmode %d", (int)opmode); |
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} |
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@ -178,7 +256,7 @@ void UFCAP_SwitchMode(Unit *unit, enum fcap_opmode opmode) |
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* Configure peripherals for an indirect capture (PWM measurement) - continuous or burst |
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* @param unit |
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*/ |
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void UFCAP_ConfigureForPWMCapture(Unit *unit) |
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static void UFCAP_ConfigureForPWMCapture(Unit *unit) |
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{ |
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struct priv * const priv = unit->data; |
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TIM_TypeDef * const TIMx = priv->TIMx; |
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@ -222,30 +300,34 @@ void UFCAP_ConfigureForPWMCapture(Unit *unit) |
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* Configure peripherals for an indirect capture (PWM measurement) - continuous or burst |
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* @param unit |
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*/ |
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void UFCAP_ConfigureForDirectCapture(Unit *unit) |
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static void UFCAP_ConfigureForDirectCapture(Unit *unit) |
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{ |
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struct priv * const priv = unit->data; |
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const uint32_t ll_ch_a = priv->ll_ch_a; //
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// dbg("Configuring Direct capture...");
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UFCAP_ClearTimerConfig(unit); |
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{ |
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TIM_TypeDef *const TIMy = priv->TIMy; |
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uint16_t presc = PLAT_AHB_MHZ * 500; // this produces 2 kHz
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uint32_t count = 2001; |
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assert_param(PLAT_AHB_MHZ<=65); |
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uint16_t presc = PLAT_AHB_MHZ*1000; |
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uint32_t count = priv->cnt_cont.msec+1; // it's one tick longer because we generate OCREF on the exact msec count - it must be at least 1 tick long
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LL_TIM_SetPrescaler(TIMy, (uint32_t) (presc - 1)); |
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LL_TIM_SetAutoReload(TIMy, count - 1); |
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LL_TIM_EnableARRPreload(TIMy); |
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LL_TIM_GenerateEvent_UPDATE(TIMy); |
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LL_TIM_SetOnePulseMode(TIMy, LL_TIM_ONEPULSEMODE_SINGLE); // TODO check if this works
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LL_TIM_SetOnePulseMode(TIMy, LL_TIM_ONEPULSEMODE_SINGLE); |
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LL_TIM_OC_EnableFast(TIMy, LL_TIM_CHANNEL_CH1); |
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dbg("TIMy presc %d, count %d", (int) presc, (int) count); |
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// dbg("TIMy presc %d, count %d", (int) presc, (int) count);
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LL_TIM_SetTriggerOutput(TIMy, LL_TIM_TRGO_OC1REF); |
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LL_TIM_OC_SetMode(TIMy, LL_TIM_CHANNEL_CH1, LL_TIM_OCMODE_PWM1); // 1 until CC, then 0
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LL_TIM_OC_SetCompareCH1(TIMy, count - 1); // XXX maybe this must be lower
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LL_TIM_OC_SetCompareCH1(TIMy, count-1); |
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LL_TIM_CC_EnableChannel(TIMy, LL_TIM_CHANNEL_CH1); // enable the output channel that produces a trigger
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LL_TIM_EnableIT_UPDATE(TIMy); |
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} |
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{ |
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@ -254,11 +336,27 @@ void UFCAP_ConfigureForDirectCapture(Unit *unit) |
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LL_TIM_SetSlaveMode(TIMx, LL_TIM_SLAVEMODE_GATED); |
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LL_TIM_SetTriggerInput(TIMx, LL_TIM_TS_ITR3); // ITR3 is TIM14 which we use as TIMy
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LL_TIM_EnableMasterSlaveMode(TIMx); |
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LL_TIM_EnableExternalClock(TIMx); // TODO must check and deny this mode if the pin is not on CH1 = external trigger input
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LL_TIM_SetCounter(TIMx, 0); |
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LL_TIM_EnableCounter(TIMx); |
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} |
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LL_TIM_EnableCounter(priv->TIMy); // XXX this will start the pulse (maybe)
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LL_TIM_EnableCounter(priv->TIMy); // XXX this will start the first pulse (maybe)
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} |
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/**
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* Freerunning capture (counting pulses - geiger) |
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* @param unit |
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*/ |
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static void UFCAP_ConfigureForFreeCapture(Unit *unit) |
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{ |
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struct priv * const priv = unit->data; |
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TIM_TypeDef *const TIMx = priv->TIMx; |
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LL_TIM_EnableExternalClock(TIMx); |
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LL_TIM_SetCounter(TIMx, 0); |
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LL_TIM_EnableCounter(TIMx); |
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} |
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