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146 lines
4.5 KiB
146 lines
4.5 KiB
//
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// Created by MightyPork on 2017/11/25.
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//
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#include "unit_base.h"
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#include "unit_fcap.h"
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#define FCAP_INTERNAL
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#include "_fcap_internal.h"
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// ------------------------------------------------------------------------
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enum FcapCmd_ {
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CMD_STOP = 0,
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CMD_INDIRECT_CONT_START = 1,
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CMD_INDIRECT_BURST_START = 2,
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CMD_DIRECT_CONT_START = 3,
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CMD_DIRECT_BURST_START = 4,
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CMD_FREERUNNING_START = 5,
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CMD_INDIRECT_CONT_READ = 10,
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CMD_DIRECT_CONT_READ = 11,
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CMD_FREERUNNING_READ = 12,
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};
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/** Handle a request message */
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static error_t UFCAP_handleRequest(Unit *unit, TF_ID frame_id, uint8_t command, PayloadParser *pp)
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{
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struct priv *priv = unit->data;
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PayloadBuilder pb = pb_start(unit_tmp512, UNIT_TMP_LEN, NULL);
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uint16_t msec;
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const char* msg_denied_on_pin = "Not available on the selected pin!";
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switch (command) {
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case CMD_STOP:
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UFCAP_SwitchMode(unit, OPMODE_IDLE);
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return E_SUCCESS;
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case CMD_INDIRECT_CONT_START:
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if (priv->opmode == OPMODE_PWM_CONT) return E_SUCCESS; // no-op
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if (priv->opmode != OPMODE_IDLE) return E_BUSY;
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UFCAP_SwitchMode(unit, OPMODE_PWM_CONT);
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return E_SUCCESS;
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case CMD_INDIRECT_BURST_START:
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if (priv->opmode != OPMODE_IDLE) return E_BAD_MODE;
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uint16_t count = pp_u16(pp);
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priv->pwm_burst.n_target = count;
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priv->request_id = frame_id;
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UFCAP_SwitchMode(unit, OPMODE_PWM_BURST);
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return E_SUCCESS;
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case CMD_INDIRECT_CONT_READ:
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if (priv->opmode != OPMODE_PWM_CONT) {
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return E_BAD_MODE;
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}
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if (priv->pwm_cont.last_period == 0) {
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return E_BUSY;
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}
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pb_u16(&pb, PLAT_AHB_MHZ);
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pb_u32(&pb, priv->pwm_cont.last_period);
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pb_u32(&pb, priv->pwm_cont.last_ontime);
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com_respond_pb(frame_id, MSG_SUCCESS, &pb);
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return E_SUCCESS;
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case CMD_DIRECT_CONT_START:
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if (!priv->a_direct) {
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// This works only if we use the ETR pin. TIM2 shares CH1 with ETR.
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// If CH2 is selected as input, ETR is not available.
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com_respond_str(MSG_ERROR, frame_id, msg_denied_on_pin);
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return E_FAILURE;
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}
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if (priv->opmode == OPMODE_COUNTER_CONT) return E_SUCCESS; // no-op
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if (priv->opmode != OPMODE_IDLE) return E_BUSY;
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msec = pp_u16(pp);
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priv->cnt_cont.msec = msec;
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UFCAP_SwitchMode(unit, OPMODE_COUNTER_CONT);
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return E_SUCCESS;
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case CMD_DIRECT_CONT_READ:
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if (!priv->a_direct) { // see above
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com_respond_str(MSG_ERROR, frame_id, msg_denied_on_pin);
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return E_FAILURE;
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}
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if (priv->opmode != OPMODE_COUNTER_CONT) return E_BAD_MODE;
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if (priv->cnt_cont.last_count == 0) return E_BUSY;
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pb_u32(&pb, priv->cnt_cont.last_count);
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pb_u16(&pb, priv->cnt_cont.msec);
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com_respond_pb(frame_id, MSG_SUCCESS, &pb);
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return E_SUCCESS;
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case CMD_DIRECT_BURST_START:
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if (priv->opmode != OPMODE_IDLE) return E_BAD_MODE;
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msec = pp_u16(pp);
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priv->cnt_burst.msec = msec;
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priv->request_id = frame_id;
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UFCAP_SwitchMode(unit, OPMODE_COUNTER_BURST);
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return E_SUCCESS;
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case CMD_FREERUNNING_START:
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if (priv->opmode != OPMODE_IDLE) return E_BAD_MODE;
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UFCAP_SwitchMode(unit, OPMODE_COUNTER_FREERUNNING);
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return E_SUCCESS;
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case CMD_FREERUNNING_READ:
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if (priv->opmode != OPMODE_COUNTER_FREERUNNING) {
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return E_BAD_MODE;
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}
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pb_u32(&pb, UFCAP_GetFreeCounterValue(unit));
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com_respond_pb(frame_id, MSG_SUCCESS, &pb);
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return E_SUCCESS;
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default:
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return E_UNKNOWN_COMMAND;
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}
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}
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// ------------------------------------------------------------------------
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/** Frequency capture */
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const UnitDriver UNIT_FCAP = {
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.name = "FCAP",
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.description = "Frequency and pulse measurement",
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// Settings
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.preInit = UFCAP_preInit,
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.cfgLoadBinary = UFCAP_loadBinary,
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.cfgWriteBinary = UFCAP_writeBinary,
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.cfgLoadIni = UFCAP_loadIni,
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.cfgWriteIni = UFCAP_writeIni,
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// Init
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.init = UFCAP_init,
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.deInit = UFCAP_deInit,
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// Function
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.handleRequest = UFCAP_handleRequest,
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};
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