From 805e47594a2ebcbebe84ee0aeca9c8ddcf57613b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ond=C5=99ej=20Hru=C5=A1ka?= Date: Wed, 21 Feb 2018 23:11:06 +0100 Subject: [PATCH] direct measurement (need more testing) --- platform/irq_dispatcher.c | 7 +- platform/plat_compat.h | 2 +- units/fcap/_fcap_core.c | 126 ++++++++++++++++++++++++++++++++---- units/fcap/_fcap_init.c | 16 +++-- units/fcap/_fcap_internal.h | 13 +++- units/fcap/_fcap_settings.c | 5 +- units/fcap/unit_fcap.c | 51 +++++++++++++-- 7 files changed, 188 insertions(+), 32 deletions(-) diff --git a/platform/irq_dispatcher.c b/platform/irq_dispatcher.c index 9becbea..93ff1cf 100644 --- a/platform/irq_dispatcher.c +++ b/platform/irq_dispatcher.c @@ -317,8 +317,6 @@ void EXTI4_15_IRQHandler(void) // ------------ INTERRUPTS ------------- -// TIM14 is used to generate HAL timebase and its handler is in the file "timebase.c" - void TIM2_IRQHandler(void) { CALL_IRQ_HANDLER(callbacks.tim2); @@ -334,6 +332,11 @@ void TIM7_IRQHandler(void) CALL_IRQ_HANDLER(callbacks.tim7); } +void TIM14_IRQHandler(void) +{ + CALL_IRQ_HANDLER(callbacks.tim14); +} + void TIM15_IRQHandler(void) { CALL_IRQ_HANDLER(callbacks.tim15); diff --git a/platform/plat_compat.h b/platform/plat_compat.h index 076a531..b2dedea 100644 --- a/platform/plat_compat.h +++ b/platform/plat_compat.h @@ -51,7 +51,7 @@ #define INI_VALUE_MAX 30 // Ini parser value buffer // -------- Stack buffers ---------- -#define DBG_BUF_LEN 80 // Size of the snprintf buffer for debug messages +#define DBG_BUF_LEN 100 // Size of the snprintf buffer for debug messages #define ERR_MSG_STR_LEN 64 // Error message buffer size #define IWBUFFER_LEN 80 // Ini writer buffer for sprintf diff --git a/units/fcap/_fcap_core.c b/units/fcap/_fcap_core.c index b9e5809..8186f95 100644 --- a/units/fcap/_fcap_core.c +++ b/units/fcap/_fcap_core.c @@ -2,14 +2,23 @@ // Created by MightyPork on 2018/02/20. // +#include #include "platform.h" #define FCAP_INTERNAL #include "_fcap_internal.h" -void UFCAP_StopMeasurement(Unit *unit); -void UFCAP_ConfigureForPWMCapture(Unit *unit); -void UFCAP_ConfigureForDirectCapture(Unit *unit); +static void UFCAP_StopMeasurement(Unit *unit); +static void UFCAP_ConfigureForPWMCapture(Unit *unit); +static void UFCAP_ConfigureForDirectCapture(Unit *unit); +static void UFCAP_ConfigureForFreeCapture(Unit *unit); + +uint32_t UFCAP_GetFreeCounterValue(Unit *unit) +{ + struct priv * const priv = unit->data; + TIM_TypeDef * const TIMx = priv->TIMx; + return TIMx->CNT; +} static void UFCAP_PWMBurstReportJob(Job *job) { @@ -32,7 +41,26 @@ static void UFCAP_PWMBurstReportJob(Job *job) priv->opmode = OPMODE_IDLE; } -void UFCAP_TimerHandler(void *arg) +static void UFCAP_CountBurstReportJob(Job *job) +{ + Unit *unit = job->unit; + struct priv * const priv = unit->data; + + uint8_t buf[6]; + PayloadBuilder pb = pb_start(buf, 20, NULL); + + pb_u16(&pb, priv->cnt_burst.msec); + pb_u32(&pb, job->data1); + + assert_param(pb.ok); + + com_respond_pb(priv->request_id, MSG_SUCCESS, &pb); + + // timer is already stopped, now in OPMODE_BUSY + priv->opmode = OPMODE_IDLE; +} + +void UFCAP_TIMxHandler(void *arg) { Unit *unit = arg; assert_param(unit); @@ -100,6 +128,45 @@ void UFCAP_TimerHandler(void *arg) } } +void UFCAP_TIMyHandler(void *arg) +{ + Unit *unit = arg; + assert_param(unit); + struct priv *const priv = unit->data; + assert_param(priv); + + TIM_TypeDef * const TIMx = priv->TIMx; + TIM_TypeDef * const TIMy = priv->TIMy; + uint32_t cnt = TIMx->CNT; // TIMx should be stopped now + + dbg("> TIMy Handler, TIMx cntr is %d", cnt); + priv->cnt_cont.last_count = cnt; + + if (priv->opmode == OPMODE_COUNTER_CONT) { + LL_TIM_SetCounter(TIMx, 0); + LL_TIM_EnableCounter(TIMy); // next loop + } else if (priv->opmode == OPMODE_COUNTER_BURST) { + priv->opmode = OPMODE_BUSY; + UFCAP_StopMeasurement(unit); + + Job j = { + .cb = UFCAP_CountBurstReportJob, + .unit = unit, + .data1 = cnt, + }; + scheduleJob(&j); + } + else if (priv->opmode == OPMODE_IDLE) { + // clear everything - in idle it would cycle in the handler forever + TIMy->SR = 0; + } + else { + trap("Unhandled fcap TIMy irq"); + } + + LL_TIM_ClearFlag_UPDATE(TIMy); +} + static void UFCAP_ClearTimerConfig(Unit *unit) { struct priv * const priv = unit->data; @@ -120,7 +187,7 @@ static void UFCAP_ClearTimerConfig(Unit *unit) * * @param unit */ -void UFCAP_StopMeasurement(Unit *unit) +static void UFCAP_StopMeasurement(Unit *unit) { struct priv * const priv = unit->data; @@ -166,9 +233,20 @@ void UFCAP_SwitchMode(Unit *unit, enum fcap_opmode opmode) break; case OPMODE_COUNTER_CONT: + priv->cnt_cont.last_count = 0; + priv->n_skip = 1; // discard the first cycle (will be incomplete) + UFCAP_ConfigureForDirectCapture(unit); + break; + + case OPMODE_COUNTER_BURST: + priv->n_skip = 0; // no skip here (if there was any) UFCAP_ConfigureForDirectCapture(unit); break; + case OPMODE_COUNTER_FREERUNNING: + UFCAP_ConfigureForFreeCapture(unit); + break; + default: trap("Unhandled opmode %d", (int)opmode); } @@ -178,7 +256,7 @@ void UFCAP_SwitchMode(Unit *unit, enum fcap_opmode opmode) * Configure peripherals for an indirect capture (PWM measurement) - continuous or burst * @param unit */ -void UFCAP_ConfigureForPWMCapture(Unit *unit) +static void UFCAP_ConfigureForPWMCapture(Unit *unit) { struct priv * const priv = unit->data; TIM_TypeDef * const TIMx = priv->TIMx; @@ -222,30 +300,34 @@ void UFCAP_ConfigureForPWMCapture(Unit *unit) * Configure peripherals for an indirect capture (PWM measurement) - continuous or burst * @param unit */ -void UFCAP_ConfigureForDirectCapture(Unit *unit) +static void UFCAP_ConfigureForDirectCapture(Unit *unit) { struct priv * const priv = unit->data; - const uint32_t ll_ch_a = priv->ll_ch_a; // + +// dbg("Configuring Direct capture..."); UFCAP_ClearTimerConfig(unit); { TIM_TypeDef *const TIMy = priv->TIMy; - uint16_t presc = PLAT_AHB_MHZ * 500; // this produces 2 kHz - uint32_t count = 2001; + assert_param(PLAT_AHB_MHZ<=65); + uint16_t presc = PLAT_AHB_MHZ*1000; + uint32_t count = priv->cnt_cont.msec+1; // it's one tick longer because we generate OCREF on the exact msec count - it must be at least 1 tick long LL_TIM_SetPrescaler(TIMy, (uint32_t) (presc - 1)); LL_TIM_SetAutoReload(TIMy, count - 1); LL_TIM_EnableARRPreload(TIMy); LL_TIM_GenerateEvent_UPDATE(TIMy); - LL_TIM_SetOnePulseMode(TIMy, LL_TIM_ONEPULSEMODE_SINGLE); // TODO check if this works + LL_TIM_SetOnePulseMode(TIMy, LL_TIM_ONEPULSEMODE_SINGLE); LL_TIM_OC_EnableFast(TIMy, LL_TIM_CHANNEL_CH1); - dbg("TIMy presc %d, count %d", (int) presc, (int) count); +// dbg("TIMy presc %d, count %d", (int) presc, (int) count); LL_TIM_SetTriggerOutput(TIMy, LL_TIM_TRGO_OC1REF); LL_TIM_OC_SetMode(TIMy, LL_TIM_CHANNEL_CH1, LL_TIM_OCMODE_PWM1); // 1 until CC, then 0 - LL_TIM_OC_SetCompareCH1(TIMy, count - 1); // XXX maybe this must be lower + LL_TIM_OC_SetCompareCH1(TIMy, count-1); LL_TIM_CC_EnableChannel(TIMy, LL_TIM_CHANNEL_CH1); // enable the output channel that produces a trigger + + LL_TIM_EnableIT_UPDATE(TIMy); } { @@ -254,11 +336,27 @@ void UFCAP_ConfigureForDirectCapture(Unit *unit) LL_TIM_SetSlaveMode(TIMx, LL_TIM_SLAVEMODE_GATED); LL_TIM_SetTriggerInput(TIMx, LL_TIM_TS_ITR3); // ITR3 is TIM14 which we use as TIMy LL_TIM_EnableMasterSlaveMode(TIMx); + LL_TIM_EnableExternalClock(TIMx); // TODO must check and deny this mode if the pin is not on CH1 = external trigger input + LL_TIM_SetCounter(TIMx, 0); LL_TIM_EnableCounter(TIMx); } - LL_TIM_EnableCounter(priv->TIMy); // XXX this will start the pulse (maybe) + LL_TIM_EnableCounter(priv->TIMy); // XXX this will start the first pulse (maybe) } + +/** + * Freerunning capture (counting pulses - geiger) + * @param unit + */ +static void UFCAP_ConfigureForFreeCapture(Unit *unit) +{ + struct priv * const priv = unit->data; + + TIM_TypeDef *const TIMx = priv->TIMx; + LL_TIM_EnableExternalClock(TIMx); + LL_TIM_SetCounter(TIMx, 0); + LL_TIM_EnableCounter(TIMx); +} diff --git a/units/fcap/_fcap_init.c b/units/fcap/_fcap_init.c index b9e05cc..21df121 100644 --- a/units/fcap/_fcap_init.c +++ b/units/fcap/_fcap_init.c @@ -88,18 +88,24 @@ error_t UFCAP_init(Unit *unit) assert_param(ll_ch_a != ll_ch_b); priv->TIMx = TIMx; + priv->TIMy = TIMy; priv->ll_ch_a = ll_ch_a; priv->ll_ch_b = ll_ch_b; priv->a_direct = a_direct; TRY(hw_configure_gpio_af(priv->signal_pname, priv->signal_pnum, ll_timpin_af)); + GPIO_TypeDef *gpio = hw_port2periph(priv->signal_pname, &suc); + uint32_t ll_pin = hw_pin2ll(priv->signal_pnum, &suc); + LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_DOWN); // XXX change to pull-up if the polarity is inverted + hw_periph_clock_enable(TIMx); hw_periph_clock_enable(TIMy); - irqd_attach(TIMx, UFCAP_TimerHandler, unit); - // TODO attach TIMy to a handler + irqd_attach(TIMx, UFCAP_TIMxHandler, unit); + irqd_attach(TIMy, UFCAP_TIMyHandler, unit); - UFCAP_SwitchMode(unit, OPMODE_IDLE); +// UFCAP_SwitchMode(unit, OPMODE_IDLE); + UFCAP_SwitchMode(unit, OPMODE_COUNTER_CONT); return E_SUCCESS; } @@ -117,8 +123,8 @@ void UFCAP_deInit(Unit *unit) TIM_TypeDef *TIMy = priv->TIMy; LL_TIM_DeInit(TIMx); LL_TIM_DeInit(TIMy); - irqd_detach(TIMx, UFCAP_TimerHandler); - // TODO detach TIMy when any handler is added + irqd_detach(TIMx, UFCAP_TIMxHandler); + irqd_detach(TIMy, UFCAP_TIMyHandler); hw_periph_clock_disable(TIMx); hw_periph_clock_disable(TIMy); } diff --git a/units/fcap/_fcap_internal.h b/units/fcap/_fcap_internal.h index 10ffc95..162f707 100644 --- a/units/fcap/_fcap_internal.h +++ b/units/fcap/_fcap_internal.h @@ -17,7 +17,8 @@ enum fcap_opmode { OPMODE_PWM_CONT = 2, OPMODE_PWM_BURST = 3, // averaging OPMODE_COUNTER_CONT = 4, - OPMODE_COUNTER_BURST = 5, // averaging + OPMODE_COUNTER_BURST = 5, + OPMODE_COUNTER_FREERUNNING = 6, }; /** Private data structure */ @@ -55,7 +56,12 @@ struct priv { struct { uint32_t last_count; //!< Pulse count in the last capture window + uint16_t msec; //!< Configured nbr of milliseconds to count } cnt_cont; + + struct { + uint16_t msec; //!< Configured nbr of milliseconds to count + } cnt_burst; }; }; @@ -88,6 +94,9 @@ void UFCAP_deInit(Unit *unit); void UFCAP_SwitchMode(Unit *unit, enum fcap_opmode opmode); -void UFCAP_TimerHandler(void *arg); +void UFCAP_TIMxHandler(void *arg); +void UFCAP_TIMyHandler(void *arg); + +uint32_t UFCAP_GetFreeCounterValue(Unit *unit); #endif //GEX_F072_FCAP_INTERNAL_H diff --git a/units/fcap/_fcap_settings.c b/units/fcap/_fcap_settings.c index de702de..28401d7 100644 --- a/units/fcap/_fcap_settings.c +++ b/units/fcap/_fcap_settings.c @@ -55,8 +55,9 @@ void UFCAP_writeIni(Unit *unit, IniWriter *iw) { struct priv *priv = unit->data; - iw_comment(iw, "Signal input pin"); - iw_comment(iw, "One of: A0, A1, A5, A15, B3"); + iw_comment(iw, "Signal input pin - one of:"); + iw_comment(iw, " Full support: A0, A5, A15"); + iw_comment(iw, " Indirect only: A1, B3"); iw_entry(iw, "signal-pin", "%c%d", priv->signal_pname, priv->signal_pnum); } diff --git a/units/fcap/unit_fcap.c b/units/fcap/unit_fcap.c index fcc460d..a78d21f 100644 --- a/units/fcap/unit_fcap.c +++ b/units/fcap/unit_fcap.c @@ -15,8 +15,12 @@ enum FcapCmd_ { CMD_INDIRECT_CONT_START = 1, CMD_INDIRECT_BURST_START = 2, CMD_DIRECT_CONT_START = 3, + CMD_DIRECT_BURST_START = 4, + CMD_FREERUNNING_START = 5, + CMD_INDIRECT_CONT_READ = 10, CMD_DIRECT_CONT_READ = 11, + CMD_FREERUNNING_READ = 12, }; /** Handle a request message */ @@ -24,6 +28,9 @@ static error_t UFCAP_handleRequest(Unit *unit, TF_ID frame_id, uint8_t command, { struct priv *priv = unit->data; PayloadBuilder pb = pb_start(unit_tmp512, UNIT_TMP_LEN, NULL); + uint16_t msec; + + const char* msg_denied_on_pin = "Not available on the selected pin!"; switch (command) { case CMD_STOP: @@ -62,23 +69,55 @@ static error_t UFCAP_handleRequest(Unit *unit, TF_ID frame_id, uint8_t command, return E_SUCCESS; case CMD_DIRECT_CONT_START: + if (!priv->a_direct) { + // This works only if we use the ETR pin. TIM2 shares CH1 with ETR. + // If CH2 is selected as input, ETR is not available. + com_respond_str(MSG_ERROR, frame_id, msg_denied_on_pin); + return E_FAILURE; + } if (priv->opmode == OPMODE_COUNTER_CONT) return E_SUCCESS; // no-op if (priv->opmode != OPMODE_IDLE) return E_BUSY; + msec = pp_u16(pp); + priv->cnt_cont.msec = msec; + UFCAP_SwitchMode(unit, OPMODE_COUNTER_CONT); return E_SUCCESS; case CMD_DIRECT_CONT_READ: - if (priv->opmode != OPMODE_COUNTER_CONT) { - return E_BAD_MODE; - } - if (priv->cnt_cont.last_count == 0) { - return E_BUSY; + if (!priv->a_direct) { // see above + com_respond_str(MSG_ERROR, frame_id, msg_denied_on_pin); + return E_FAILURE; } + if (priv->opmode != OPMODE_COUNTER_CONT) return E_BAD_MODE; + if (priv->cnt_cont.last_count == 0) return E_BUSY; - // TODO also add the window len - may need to shorten it for fast signals (or if fast capture is required) pb_u32(&pb, priv->cnt_cont.last_count); + pb_u16(&pb, priv->cnt_cont.msec); + + com_respond_pb(frame_id, MSG_SUCCESS, &pb); + return E_SUCCESS; + + case CMD_DIRECT_BURST_START: + if (priv->opmode != OPMODE_IDLE) return E_BAD_MODE; + + msec = pp_u16(pp); + priv->cnt_burst.msec = msec; + priv->request_id = frame_id; + UFCAP_SwitchMode(unit, OPMODE_COUNTER_BURST); + return E_SUCCESS; + + case CMD_FREERUNNING_START: + if (priv->opmode != OPMODE_IDLE) return E_BAD_MODE; + UFCAP_SwitchMode(unit, OPMODE_COUNTER_FREERUNNING); + return E_SUCCESS; + + case CMD_FREERUNNING_READ: + if (priv->opmode != OPMODE_COUNTER_FREERUNNING) { + return E_BAD_MODE; + } + pb_u32(&pb, UFCAP_GetFreeCounterValue(unit)); com_respond_pb(frame_id, MSG_SUCCESS, &pb); return E_SUCCESS;