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137 lines
3.4 KiB
137 lines
3.4 KiB
//
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// Created by MightyPork on 2018/02/03.
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//
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#include "platform.h"
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#include "unit_base.h"
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#define FCAP_INTERNAL
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#include "_fcap_internal.h"
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/** Allocate data structure and set defaults */
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error_t UFCAP_preInit(Unit *unit)
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{
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struct priv *priv = unit->data = calloc_ck(1, sizeof(struct priv));
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if (priv == NULL) return E_OUT_OF_MEM;
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priv->signal_pname = 'A';
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priv->signal_pnum = 0;
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priv->opmode = OPMODE_PWM_CONT;
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return E_SUCCESS;
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}
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/** Finalize unit set-up */
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error_t UFCAP_init(Unit *unit)
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{
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bool suc = true;
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struct priv *priv = unit->data;
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// ---- Resolve what to configure ----
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TIM_TypeDef * const TIMx = TIM2;
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Resource timRsc = R_TIM2;
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TIM_TypeDef * const TIMy = TIM14;
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Resource tim2Rsc = R_TIM14;
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uint32_t ll_ch_a = 0;
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uint32_t ll_ch_b = 0;
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switch (priv->signal_pname) {
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case 'A':
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switch (priv->signal_pnum) {
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case 5:
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case 15:
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case 0: ll_ch_a = LL_TIM_CHANNEL_CH1; break;
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case 1: ll_ch_a = LL_TIM_CHANNEL_CH2; break;
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default:
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dbg("Bad signal pin!");
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return E_BAD_CONFIG;
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}
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break;
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case 'B':
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switch (priv->signal_pnum) {
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case 3: ll_ch_a = LL_TIM_CHANNEL_CH2; break;
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default:
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dbg("Bad signal pin!");
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return E_BAD_CONFIG;
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}
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break;
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default:
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dbg("Bad signal pin port!");
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return E_BAD_CONFIG;
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}
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const uint32_t ll_timpin_af = LL_GPIO_AF_2;
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bool a_direct = true;
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switch (ll_ch_a) {
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case LL_TIM_CHANNEL_CH1:
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ll_ch_b = LL_TIM_CHANNEL_CH2;
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break;
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case LL_TIM_CHANNEL_CH2:
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ll_ch_b = LL_TIM_CHANNEL_CH1;
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a_direct = false;
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break;
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}
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// ---- CLAIM ----
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TRY(rsc_claim_pin(unit, priv->signal_pname, priv->signal_pnum));
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TRY(rsc_claim(unit, timRsc));
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TRY(rsc_claim(unit, tim2Rsc));
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// ---- INIT ----
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assert_param(ll_ch_a != ll_ch_b);
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priv->TIMx = TIMx;
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priv->TIMy = TIMy;
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priv->ll_ch_a = ll_ch_a;
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priv->ll_ch_b = ll_ch_b;
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priv->a_direct = a_direct;
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TRY(hw_configure_gpio_af(priv->signal_pname, priv->signal_pnum, ll_timpin_af));
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GPIO_TypeDef *gpio = hw_port2periph(priv->signal_pname, &suc);
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uint32_t ll_pin = hw_pin2ll(priv->signal_pnum, &suc);
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LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_DOWN); // XXX change to pull-up if the polarity is inverted
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hw_periph_clock_enable(TIMx);
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hw_periph_clock_enable(TIMy);
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irqd_attach(TIMx, UFCAP_TIMxHandler, unit);
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irqd_attach(TIMy, UFCAP_TIMyHandler, unit);
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// UFCAP_SwitchMode(unit, OPMODE_IDLE);
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UFCAP_SwitchMode(unit, OPMODE_COUNTER_CONT);
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return E_SUCCESS;
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}
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/** Tear down the unit */
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void UFCAP_deInit(Unit *unit)
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{
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struct priv *priv = unit->data;
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// de-init peripherals
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if (unit->status == E_SUCCESS ) {
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UFCAP_SwitchMode(unit, OPMODE_IDLE);
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TIM_TypeDef *TIMx = priv->TIMx;
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TIM_TypeDef *TIMy = priv->TIMy;
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LL_TIM_DeInit(TIMx);
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LL_TIM_DeInit(TIMy);
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irqd_detach(TIMx, UFCAP_TIMxHandler);
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irqd_detach(TIMy, UFCAP_TIMyHandler);
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hw_periph_clock_disable(TIMx);
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hw_periph_clock_disable(TIMy);
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}
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// Release all resources, deinit pins
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rsc_teardown(unit);
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// Free memory
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free_ck(unit->data);
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}
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