parent
b8909fca06
commit
20639b77a6
GPG Key ID:
2C5FD5035250423D
@ -1,75 +0,0 @@ |
||||
//
|
||||
// Created by MightyPork on 2018/04/06.
|
||||
//
|
||||
|
||||
#ifndef GEX_F072_NRF_PINS_H |
||||
#define GEX_F072_NRF_PINS_H |
||||
|
||||
#include "platform.h" |
||||
|
||||
#if defined(GEX_PLAT_F072_DISCOVERY) || defined(GEX_PLAT_F072_HUB) |
||||
|
||||
// This config was used only for development when NRF was enabled for those platforms. It is normally disabled.
|
||||
#define NRF_SPI SPI1 |
||||
#define NRF_R_SPI R_SPI1 |
||||
|
||||
#define NRF_IRQ_Pin LL_GPIO_PIN_10 |
||||
#define NRF_IRQ_GPIO_Port GPIOB |
||||
#define NRF_R_IRQ R_PB10 |
||||
#define NRF_EXTI_LINENUM 10 |
||||
#define NRF_SYSCFG_EXTI_PORT LL_SYSCFG_EXTI_PORTB |
||||
|
||||
#define NRF_NSS_Pin LL_GPIO_PIN_11 |
||||
#define NRF_NSS_GPIO_Port GPIOB |
||||
#define NRF_R_NSS R_PB11 |
||||
|
||||
#define NRF_CE_Pin LL_GPIO_PIN_12 |
||||
#define NRF_CE_GPIO_Port GPIOB |
||||
#define NRF_R_CE R_PB12 |
||||
|
||||
#define NRF_RST_Pin LL_GPIO_PIN_13 |
||||
#define NRF_RST_GPIO_Port GPIOB |
||||
#define NRF_R_RST R_PB13 |
||||
|
||||
#define NRF_R_SCK R_PA5 |
||||
#define NRF_SCK_AF LL_GPIO_AF_0 |
||||
#define NRF_R_MISO R_PA6 |
||||
#define NRF_MISO_AF LL_GPIO_AF_0 |
||||
#define NRF_R_MOSI R_PA7 |
||||
#define NRF_MOSI_AF LL_GPIO_AF_0 |
||||
|
||||
#elif defined(GEX_PLAT_F072_ZERO) |
||||
|
||||
#define NRF_SPI SPI2 |
||||
#define NRF_R_SPI R_SPI2 |
||||
|
||||
#define NRF_IRQ_Pin LL_GPIO_PIN_15 |
||||
#define NRF_IRQ_GPIO_Port GPIOC |
||||
#define NRF_R_IRQ R_PC15 |
||||
#define NRF_EXTI_LINENUM 15 |
||||
#define NRF_SYSCFG_EXTI_PORT LL_SYSCFG_EXTI_PORTC |
||||
|
||||
#define NRF_NSS_Pin LL_GPIO_PIN_13 |
||||
#define NRF_NSS_GPIO_Port GPIOC |
||||
#define NRF_R_NSS R_PC13 |
||||
|
||||
#define NRF_CE_Pin LL_GPIO_PIN_14 |
||||
#define NRF_CE_GPIO_Port GPIOC |
||||
#define NRF_R_CE R_PC14 |
||||
|
||||
#define NRF_RST_Pin LL_GPIO_PIN_12 |
||||
#define NRF_RST_GPIO_Port GPIOC |
||||
#define NRF_R_RST R_PC12 |
||||
|
||||
#define NRF_R_SCK R_PB13 |
||||
#define NRF_SCK_AF LL_GPIO_AF_0 |
||||
#define NRF_R_MISO R_PC2 |
||||
#define NRF_MISO_AF LL_GPIO_AF_1 |
||||
#define NRF_R_MOSI R_PC3 |
||||
#define NRF_MOSI_AF LL_GPIO_AF_1 |
||||
|
||||
#else |
||||
#error "Missing NRF config for this platform." |
||||
#endif |
||||
|
||||
#endif //GEX_F072_NRF_PINS_H
|
||||
@ -0,0 +1,64 @@ |
||||
//
|
||||
// Created by MightyPork on 2018/07/07.
|
||||
//
|
||||
|
||||
#ifndef GEX_CORE_PLAT_CONFIG_H |
||||
#define GEX_CORE_PLAT_CONFIG_H |
||||
|
||||
#define VFS_DRIVE_NAME "GEX" |
||||
|
||||
// -------- Priorities -------------
|
||||
#define TSK_MAIN_PRIO osPriorityNormal |
||||
#define TSK_JOBS_PRIO osPriorityHigh |
||||
#define TSK_TIMERS_PRIO 4 // this must be in the 0-7 range
|
||||
|
||||
// -------- Static buffers ---------
|
||||
// USB / VFS task stack size
|
||||
#if DISABLE_MSC |
||||
#define TSK_STACK_MAIN 100 // without MSC the stack usage is significantly lower
|
||||
#else |
||||
#define TSK_STACK_MAIN 160 |
||||
#endif |
||||
|
||||
// 180 is normally enough if not doing extensive debug logging
|
||||
#define TSK_STACK_MSG 220 // TF message handler task stack size (all unit commands run on this thread)
|
||||
#define TSK_STACK_IDLE 64 //configMINIMAL_STACK_SIZE
|
||||
#define TSK_STACK_TIMERS 64 //configTIMER_TASK_STACK_DEPTH
|
||||
|
||||
#define PLAT_HEAP_SIZE 4096 |
||||
|
||||
|
||||
|
||||
#define BULK_READ_BUF_LEN 256 // Buffer for TF bulk reads
|
||||
#define UNIT_TMP_LEN 256 // Buffer for internal unit operations
|
||||
|
||||
#define FLASH_SAVE_BUF_LEN 128 // Malloc'd buffer for saving to flash
|
||||
|
||||
#define MSG_QUE_SLOT_SIZE 64 // FIXME this should be possible to lower, but there's some bug with bulk transfer / INI parser
|
||||
#define RX_QUE_CAPACITY 16 // TinyFrame rx queue size (64 bytes each)
|
||||
|
||||
#define TF_MAX_PAYLOAD_RX 512 // TF max Rx payload
|
||||
#define TF_SENDBUF_LEN 512 // TF transmit buffer (can be less than a full frame)
|
||||
|
||||
#define TF_MAX_ID_LST 4 // Frame ID listener count
|
||||
#define TF_MAX_TYPE_LST 6 // Frame Type listener count
|
||||
#define TF_MAX_GEN_LST 1 // Generic listener count
|
||||
|
||||
#define USBD_MAX_STR_DESC_SIZ 64 // Descriptor conversion buffer (used for converting ASCII to UTF-16, must be 2x the size of the longest descriptor)
|
||||
#define MSC_MEDIA_PACKET 512 // Mass storage sector size (packet)
|
||||
|
||||
#define INI_KEY_MAX 20 // Ini parser key buffer
|
||||
#define INI_VALUE_MAX 30 // Ini parser value buffer
|
||||
|
||||
// -------- Stack buffers ----------
|
||||
#define DBG_BUF_LEN 100 // Size of the snprintf buffer for debug messages
|
||||
#define ERR_MSG_STR_LEN 64 // Error message buffer size
|
||||
#define IWBUFFER_LEN 80 // Ini writer buffer for sprintf
|
||||
|
||||
// -------- Timeouts ------------
|
||||
#define TF_PARSER_TIMEOUT_TICKS 100 // Timeout for receiving & parsing a frame
|
||||
#define BULK_LST_TIMEOUT_MS 2000 // timeout for the bulk transaction to expire
|
||||
#define MSG_QUE_POST_TIMEOUT 200 // Time to post to the messages / jobs queue
|
||||
|
||||
|
||||
#endif //GEX_CORE_PLAT_CONFIG_H
|
||||
@ -0,0 +1,41 @@ |
||||
// |
||||
// Definition of nRF24L01+ pin mappings for the platform |
||||
// This file may be omitted if SUPPORT_NRF is not set in plat_compat.h |
||||
// See rsc_enum.h for the R_ resource constants |
||||
// |
||||
|
||||
#ifndef GEX_NRF_PINS_H |
||||
#define GEX_NRF_PINS_H |
||||
|
||||
#include "platform.h" |
||||
#include "rsc_enum.h" |
||||
|
||||
#define NRF_SPI SPI2 |
||||
#define NRF_R_SPI R_SPI2 |
||||
|
||||
#define NRF_IRQ_Pin LL_GPIO_PIN_15 |
||||
#define NRF_IRQ_GPIO_Port GPIOC |
||||
#define NRF_R_IRQ R_PC15 |
||||
#define NRF_EXTI_LINENUM 15 |
||||
#define NRF_SYSCFG_EXTI_PORT LL_SYSCFG_EXTI_PORTC |
||||
|
||||
#define NRF_NSS_Pin LL_GPIO_PIN_13 |
||||
#define NRF_NSS_GPIO_Port GPIOC |
||||
#define NRF_R_NSS R_PC13 |
||||
|
||||
#define NRF_CE_Pin LL_GPIO_PIN_14 |
||||
#define NRF_CE_GPIO_Port GPIOC |
||||
#define NRF_R_CE R_PC14 |
||||
|
||||
#define NRF_RST_Pin LL_GPIO_PIN_12 |
||||
#define NRF_RST_GPIO_Port GPIOC |
||||
#define NRF_R_RST R_PC12 |
||||
|
||||
#define NRF_R_SCK R_PB13 |
||||
#define NRF_SCK_AF LL_GPIO_AF_0 |
||||
#define NRF_R_MISO R_PC2 |
||||
#define NRF_MISO_AF LL_GPIO_AF_1 |
||||
#define NRF_R_MOSI R_PC3 |
||||
#define NRF_MOSI_AF LL_GPIO_AF_1 |
||||
|
||||
#endif //GEX_NRF_PINS_H |
||||
@ -0,0 +1,28 @@ |
||||
#if defined(GEX_PLAT_F103_BLUEPILL) || defined(GEX_PLAT_F303_DISCOVERY) \ |
||||
|| defined(GEX_PLAT_F407_DISCOVERY) |
||||
// This is for F103+ |
||||
|
||||
/* The lowest interrupt priority that can be used in a call to a "set priority" |
||||
function. */ |
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15 |
||||
|
||||
#define configPRIO_BITS 4 |
||||
|
||||
/* The highest interrupt priority that can be used by any interrupt service |
||||
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL |
||||
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER |
||||
PRIORITY THAN THIS! (higher priorities are lower numeric values. */ |
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5 |
||||
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 |
||||
#elif defined(STM32F072xB) |
||||
// This is for F072 |
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 3 |
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 1 |
||||
|
||||
#define configPRIO_BITS 2 |
||||
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 |
||||
#else |
||||
#error "BAD PLATFORM!!" |
||||
#endif |
||||
@ -0,0 +1,41 @@ |
||||
|
||||
#define DEBUG_USART_BAUD 115200 |
||||
|
||||
#if GEX_PLAT_F072 |
||||
|
||||
#define DEBUG_USART USART1 |
||||
#define DEBUG_USART_RSC R_USART1 |
||||
#define DEBUG_USART_PORT 'A' |
||||
#define DEBUG_USART_PIN 9 |
||||
#define DEBUG_USART_AF 1 |
||||
#define DEBUG_USART_PCLK PLAT_APB1_HZ |
||||
|
||||
#elif GEX_PLAT_F103 |
||||
|
||||
#define DEBUG_USART USART2 |
||||
#define DEBUG_USART_RSC R_USART2 |
||||
#define DEBUG_USART_PORT 'A' |
||||
#define DEBUG_USART_PIN 2 |
||||
#define DEBUG_USART_PCLK PLAT_APB1_HZ |
||||
|
||||
#elif GEX_PLAT_F303 |
||||
|
||||
#define DEBUG_USART USART3 |
||||
#define DEBUG_USART_RSC R_USART3 |
||||
#define DEBUG_USART_PORT 'D' |
||||
#define DEBUG_USART_PIN 8 |
||||
#define DEBUG_USART_AF 7 |
||||
#define DEBUG_USART_PCLK PLAT_APB1_HZ |
||||
|
||||
#elif GEX_PLAT_F407 |
||||
|
||||
#define DEBUG_USART USART2 |
||||
#define DEBUG_USART_RSC R_USART2 |
||||
#define DEBUG_USART_PORT 'A' |
||||
#define DEBUG_USART_PIN 2 |
||||
#define DEBUG_USART_AF 7 |
||||
#define DEBUG_USART_PCLK PLAT_APB1_HZ |
||||
|
||||
#else |
||||
#error "BAD PLATFORM!" |
||||
#endif |
||||
@ -0,0 +1,194 @@ |
||||
|
||||
#if defined(GEX_PLAT_F103_BLUEPILL) |
||||
// Platform STM32F103C8T6 Bluepill ($4 board from eBay) |
||||
|
||||
// Units supported by the platform (known to work correctly) |
||||
|
||||
// free all present resources |
||||
{ |
||||
rsc_free_range(NULL, R_ADC1, R_ADC2); |
||||
rsc_free_range(NULL, R_I2C1, R_I2C2); |
||||
rsc_free_range(NULL, R_SPI1, R_SPI2); |
||||
rsc_free_range(NULL, R_TIM1, R_TIM4); |
||||
rsc_free_range(NULL, R_USART1, R_USART3); |
||||
rsc_free_range(NULL, R_PA0, R_PA15); |
||||
rsc_free_range(NULL, R_PB0, R_PB15); |
||||
rsc_free_range(NULL, R_PC13, R_PC15); |
||||
rsc_free_range(NULL, R_PD0, R_PD1); |
||||
} |
||||
|
||||
// Claim resources not available due to board layout or internal usage |
||||
{ |
||||
// HAL timebase |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_TIM1); |
||||
// HSE crystal |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PD0); |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PD1); |
||||
// SWD |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA13); |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA14); |
||||
// USB |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA11); |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA12); |
||||
// BOOT pin(s) |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PB2); // BOOT1 |
||||
} |
||||
#elif defined(STM32F072xB) |
||||
// Platform STM32F073RBT |
||||
|
||||
|
||||
// Free all present resources |
||||
{ |
||||
rsc_free(NULL, R_ADC1); |
||||
// rsc_free(NULL, R_CAN1); |
||||
// rsc_free_range(NULL, R_COMP1, R_COMP2); |
||||
rsc_free(NULL, R_DAC1); |
||||
// rsc_free(NULL, R_HDMI_CEC); |
||||
rsc_free(NULL, R_TSC); |
||||
rsc_free_range(NULL, R_I2C1, R_I2C2); |
||||
// rsc_free_range(NULL, R_I2S1, R_I2S2); |
||||
rsc_free_range(NULL, R_SPI1, R_SPI2); |
||||
rsc_free_range(NULL, R_TIM1, R_TIM3); |
||||
rsc_free_range(NULL, R_TIM6, R_TIM7); |
||||
rsc_free_range(NULL, R_TIM14, R_TIM17); |
||||
rsc_free_range(NULL, R_USART1, R_USART4); |
||||
rsc_free_range(NULL, R_DMA1_1, R_DMA1_7); |
||||
|
||||
rsc_free_range(NULL, R_PA0, R_PA15); |
||||
rsc_free_range(NULL, R_PB0, R_PB15); |
||||
rsc_free_range(NULL, R_PC0, R_PC15); |
||||
rsc_free(NULL, R_PD2); |
||||
rsc_free_range(NULL, R_PF0, R_PF1); |
||||
} |
||||
|
||||
// Claim resources not available due to board layout or internal usage |
||||
{ |
||||
// HAL timebase |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_TIM17); |
||||
// HSE crystal |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PF0); |
||||
|
||||
#if PLAT_FULL_XTAL |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PF1); // - not used in BYPASS mode |
||||
#endif |
||||
|
||||
// SWD |
||||
// rv |= rsc_claim(&UNIT_SYSTEM, R_PA13); |
||||
// rv |= rsc_claim(&UNIT_SYSTEM, R_PA14); |
||||
// USB |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA11); |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA12); |
||||
|
||||
#if defined(GEX_PLAT_F072_ZERO) |
||||
// unconnected pins |
||||
rv |= rsc_claim_range(&UNIT_PLATFORM, R_PC0, R_PC1); |
||||
rv |= rsc_claim_range(&UNIT_PLATFORM, R_PC4, R_PC9); |
||||
#endif |
||||
} |
||||
#elif defined(GEX_PLAT_F303_DISCOVERY) |
||||
// Platform STM32F303VCT |
||||
|
||||
// Additional GPIO ports |
||||
__HAL_RCC_GPIOF_CLK_ENABLE(); |
||||
|
||||
// Units supported by the platform (known to work correctly) |
||||
// ureg_add_type(&UNIT_XYZ); |
||||
|
||||
// Free all present resources |
||||
{ |
||||
rsc_free_range(NULL, R_ADC1, R_ADC4); |
||||
// rsc_free(NULL, R_CAN1); |
||||
// rsc_free_range(NULL, R_COMP1, R_COMP7); |
||||
// rsc_free(NULL, R_HDMI_CEC); |
||||
rsc_free(NULL, R_DAC1); |
||||
rsc_free_range(NULL, R_I2C1, R_I2C2); |
||||
rsc_free_range(NULL, R_I2S2, R_I2S3); |
||||
// rsc_free_range(NULL, R_OPAMP1, R_OPAMP4); |
||||
rsc_free_range(NULL, R_SPI1, R_SPI3); |
||||
rsc_free_range(NULL, R_TIM1, R_TIM4); |
||||
rsc_free_range(NULL, R_TIM6, R_TIM8); |
||||
rsc_free_range(NULL, R_TIM15, R_TIM17); |
||||
rsc_free(NULL, R_TSC); |
||||
rsc_free_range(NULL, R_USART1, R_USART5); |
||||
|
||||
rsc_free_range(NULL, R_PA0, R_PA15); |
||||
rsc_free_range(NULL, R_PB0, R_PB15); |
||||
rsc_free_range(NULL, R_PC0, R_PC15); |
||||
rsc_free_range(NULL, R_PD0, R_PD15); |
||||
rsc_free_range(NULL, R_PE0, R_PE15); |
||||
|
||||
rsc_free_range(NULL, R_PF0, R_PF2); |
||||
rsc_free(NULL, R_PF4); |
||||
rsc_free_range(NULL, R_PF9, R_PF10); |
||||
} |
||||
|
||||
// Claim resources not available due to board layout or internal usage |
||||
{ |
||||
// HAL timebase |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_TIM1); |
||||
// HSE crystal |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PF0); |
||||
//rv |= rsc_claim(&UNIT_SYSTEM, R_PF1); // - not used in BYPASS mode |
||||
// SWD |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA13); |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA14); |
||||
// USB |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA11); |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA12); |
||||
// BOOT pin(s) |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PB2); // BOOT1 |
||||
} |
||||
#elif defined(GEX_PLAT_F407_DISCOVERY) |
||||
// Platform STM32F407VGT |
||||
|
||||
// Additional GPIO ports |
||||
__HAL_RCC_GPIOF_CLK_ENABLE(); |
||||
|
||||
// Units supported by the platform (known to work correctly) |
||||
// ureg_add_type(&UNIT_XYZ); |
||||
|
||||
// Free all present resources |
||||
{ |
||||
rsc_free_range(NULL, R_ADC1, R_ADC3); |
||||
// rsc_free_range(NULL, R_CAN1, R_CAN2); |
||||
// rsc_free_range(NULL, R_COMP1, R_COMP7); |
||||
rsc_free(NULL, R_DAC1); |
||||
// rsc_free(NULL, R_DCMI); |
||||
// rsc_free(NULL, R_ETH); |
||||
// rsc_free(NULL, R_FSMC); |
||||
rsc_free_range(NULL, R_I2C1, R_I2C3); |
||||
rsc_free_range(NULL, R_I2S2, R_I2S3); |
||||
// rsc_free(NULL, R_SDIO); |
||||
rsc_free_range(NULL, R_SPI1, R_SPI3); |
||||
rsc_free_range(NULL, R_TIM1, R_TIM14); |
||||
rsc_free_range(NULL, R_USART1, R_USART3); |
||||
rsc_free(NULL, R_USART6); |
||||
|
||||
rsc_free_range(NULL, R_PA0, R_PA15); |
||||
rsc_free_range(NULL, R_PB0, R_PB15); |
||||
rsc_free_range(NULL, R_PC0, R_PC15); |
||||
rsc_free_range(NULL, R_PD0, R_PD15); |
||||
rsc_free_range(NULL, R_PE0, R_PE15); |
||||
// also has 2 PH pins |
||||
|
||||
// F407 appears to have fewer GPIOs than F303? |
||||
} |
||||
|
||||
// Claim resources not available due to board layout or internal usage |
||||
{ |
||||
// HAL timebase |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_TIM1); |
||||
// HSE crystal |
||||
// H0 and H1 |
||||
// SWD |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA13); |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA14); |
||||
// USB |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA11); |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PA12); |
||||
// BOOT pin(s) |
||||
rv |= rsc_claim(&UNIT_SYSTEM, R_PB2); // BOOT1 |
||||
} |
||||
#else |
||||
#error "BAD PLATFORM!" |
||||
#endif |
||||
@ -0,0 +1,46 @@ |
||||
#ifndef GEX_PLAT_COMPAT_H |
||||
#define GEX_PLAT_COMPAT_H |
||||
|
||||
// string identifying the GEX board |
||||
#define GEX_PLATFORM "Discovery-XYZ" |
||||
#define GEX_PLAT_XYZ 1 // only with the MCU name |
||||
|
||||
// GEX_PLAT_XYZ_BOARD is defined in build.mk to identify particular board layout |
||||
|
||||
#define PLAT_AHB_MHZ 72 |
||||
#define PLAT_APB1_MHZ 36 |
||||
|
||||
#include ... // all useful from the peripheral library (HAL / LL) |
||||
|
||||
// in bytes |
||||
#define FLASH_SIZE (128*1024) |
||||
// in bytes |
||||
#define SETTINGS_BLOCK_SIZE (2*1024) |
||||
// address where the settings block starts |
||||
#define SETTINGS_FLASH_ADDR (0x08000000 + FLASH_SIZE - SETTINGS_BLOCK_SIZE) |
||||
|
||||
#define PORTS_COUNT 5 // number of available GPIO ports A,B,C,D,E,F... |
||||
#define LOCK_JUMPER_PORT 'A' |
||||
#define LOCK_JUMPER_PIN 2 |
||||
|
||||
#define STATUS_LED_PORT 'A' |
||||
#define STATUS_LED_PIN 15 |
||||
|
||||
// Feature flags: |
||||
#define PLAT_FLASHBANKS 0 // has the Banks field on the Flash config struct |
||||
#define PLAT_NO_FLOATING_INPUTS 0 // can't have digital inputs with no pull resistor |
||||
#define PLAT_USB_PHYCLOCK 0 // requires special config of phy clock for USB |
||||
#define PLAT_USB_OTGFS 0 // uses the USB OTG IP, needs different config code |
||||
#define PLAT_LOCK_BTN 1 // use a lock button instead of a lock jumper (push to toggle) |
||||
#define PLAT_LOCK_1CLOSED 1 // lock jumper is active (closed / button pressed) in logical 1 |
||||
#define PLAT_NO_AFNUM 0 // legacy platform without numbered AF alternatives |
||||
#define PLAT_FULL_XTAL 1 // use two-wire xtal attachment |
||||
#define PLAT_USB_PU_CTL 1 // platform has USB pullup control |
||||
|
||||
// FreeRTOS config |
||||
#define PLAT_FREERTOS_LOWEST_INTERRUPT_PRIORITY 3 |
||||
#define PLAT_FREERTOS_MAX_SYSCALL_INTERRUPT_PRIORITY 1 |
||||
#define PLAT_FREERTOS_PRIO_BITS 2 |
||||
#define PLAT_FREERTOS_USE_PORT_OPTIMISED_TASK_SELECTION 0 |
||||
|
||||
#endif //GEX_PLAT_COMPAT_H |
||||
Binary file not shown.
Loading…
Reference in new issue