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92 lines
2.4 KiB
92 lines
2.4 KiB
//
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// Created by MightyPork on 2017/11/26.
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//
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#include "platform.h"
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#include "usbd_core.h"
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#include "USB/usb_device.h"
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#include "framework/resources.h"
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#include "framework/unit_registry.h"
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#include "comm/interfaces.h"
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#include "hw_utils.h"
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#include "units_manifest.h"
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extern uint32_t plat_init_resources2(void);
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// TODO split this and the plat_compat files to per-platform ones stored in the platform project
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void plat_init_resources(void)
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{
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// we use |= here, even though return values are not booleans - success is 0,
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// thus any problem results in nonzero and the assert will trip.
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uint32_t rv = 0;
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// periphs available everywhere - enable clock
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hw_periph_clock_enable(DMA1);
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#ifdef DMA2
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hw_periph_clock_enable(DMA2);
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#endif
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// EXTI are always available
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rsc_free_range(NULL, R_EXTI0, R_EXTI15);
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// --- platform specific resource releases and claims ---
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// Units supported by the platform (known to work correctly)
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// - this is a macro created in the Makefile, registering all enabled units
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UNITS_REGISTER_CMD;
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rv = plat_init_resources2();
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assert_param(rv == 0);
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}
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// ---- USB reconnect ----
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/**
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* USB re-connect (to apply change of the LOCK jumper)
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*/
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void plat_usb_reconnect(void)
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{
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if (gActiveComport != COMPORT_USB) return;
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// TODO add other reset methods available on different chips (e.g. externam FET)
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USBD_LL_Reset(&hUsbDeviceFS);
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#if PLAT_USB_PU_CTL
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HAL_PCD_DevDisconnect(&hpcd_USB_FS);
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osDelay(100);
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HAL_PCD_DevConnect(&hpcd_USB_FS);
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#endif
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}
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void plat_print_system_pinout(IniWriter *iw)
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{
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if (iw->count == 0) return;
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iw_string(iw, "System pin-out\r\n"
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"--------------\r\n");
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#if PLAT_LOCK_BTN
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iw_sprintf(iw, "Lock button (active="
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#if PLAT_LOCK_1CLOSED
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"high"
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#else
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"low"
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#endif
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"): P%c%d\r\n", LOCK_JUMPER_PORT, LOCK_JUMPER_PIN);
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#else
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iw_sprintf(iw, "Lock jumper (closed="
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#if PLAT_LOCK_1CLOSED
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"high"
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#else
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"low"
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#endif
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"): P%c%d\r\n", LOCK_JUMPER_PORT, LOCK_JUMPER_PIN);
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#endif
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iw_sprintf(iw, "Indicator LED (anode): P%c%d\r\n", STATUS_LED_PORT, STATUS_LED_PIN);
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iw_sprintf(iw, "System clock speed: %d MHz\r\n", PLAT_AHB_MHZ);
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}
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