got the voc sensor to do something

CMakeLists.txt

@@ -3,7 +3,7 @@ project(proj)
 
 set(CMAKE_CXX_STANDARD 11)
 
-add_definitions(-DSTM32L073xx)
+add_definitions(-DSTM32L073xx -DUSE_FULL_LL_DRIVER)
 
 set(SOURCE_FILES
         Src/system_stm32l0xx.c
@@ -79,6 +79,7 @@ set(SOURCE_FILES
         Inc/hw_gpio.h
         Inc/hw_msp.h
         Inc/hw_rtc.h
+        Inc/hw_i2c.h
         Inc/hw_spi.h
         Inc/stm32l0xx_hw_conf.h
         Inc/vcom.h
@@ -87,6 +88,7 @@ set(SOURCE_FILES
         Src/hw_gpio.c
         Src/hw_rtc.c
         Src/hw_spi.c
+        Src/hw_i2c.c
         Src/stm32l0xx_hw.c
         Src/vcom.c
         Src/stm32l0xx_hal_msp.c
@@ -143,13 +145,233 @@ set(SOURCE_FILES
         Middlewares/Third_Party/Lora/Utilities/timeServer.h
         Middlewares/Third_Party/Lora/Utilities/low_power.c
         Middlewares/Third_Party/Lora/Utilities/delay.c
-        )
+        ./Drivers/CMSIS/Include/cmsis_gcc.h
+        ./Drivers/CMSIS/Include/core_sc000.h
+        ./Drivers/CMSIS/Include/core_cm7.h
+        ./Drivers/CMSIS/Include/core_cm0.h
+        ./Drivers/CMSIS/Include/cmsis_armcc_V6.h
+        ./Drivers/CMSIS/Include/arm_math.h
+        ./Drivers/CMSIS/Include/core_sc300.h
+        ./Drivers/CMSIS/Include/core_cmInstr.h
+        ./Drivers/CMSIS/Include/cmsis_armcc.h
+        ./Drivers/CMSIS/Include/core_cmSimd.h
+        ./Drivers/CMSIS/Include/core_cm0plus.h
+        ./Drivers/CMSIS/Include/core_cm4.h
+        ./Drivers/CMSIS/Include/arm_common_tables.h
+        ./Drivers/CMSIS/Include/core_cm3.h
+        ./Drivers/CMSIS/Include/core_cmFunc.h
+        ./Drivers/CMSIS/Include/arm_const_structs.h
+        ./Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h
+        ./Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h
+        ./Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dac_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_wwdg.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_irda_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_conf_template.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cryp.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rng.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_crc.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_wwdg.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cryp_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smbus.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dac.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_comp.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_firewall.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_comp_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crc.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dac.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_spi.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_iwdg.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smartcard.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lcd.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smartcard_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_irda.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_crc_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_comp.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rng.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rtc.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lptim.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tsc.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2s.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h
+        ./Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h
+        ./Drivers/BSP/sx1272mb2das/sx1272mb2das.h
+        ./Drivers/BSP/Components/sx1272/sx1272Regs-LoRa.h
+        ./Drivers/BSP/Components/sx1272/sx1272Regs-Fsk.h
+        ./Drivers/BSP/Components/sx1272/sx1272.h
+        ./junk/stm32l0xx_hal_conf.h
+        ./junk/usart.h
+        ./junk/rtc.h
+        ./junk/stm32l0xx_it.h
+        ./junk/i2c.h
+        ./junk/spi.h
+        ./junk/gpio.h
+        ./Inc/hw_gpio.h
+        ./Inc/stm32l0xx_hal_conf.h
+        ./Inc/Commissioning.h
+        ./Inc/hw.h
+        ./Inc/stm32l0xx_hw_conf.h
+        ./Inc/stm32l0xx_it.h
+        ./Inc/hw_spi.h
+        ./Inc/debug.h
+        ./Inc/hw_conf.h
+        ./Inc/vcom.h
+        ./Inc/main.h
+        ./Inc/hw_rtc.h
+        ./Inc/hw_i2c.h
+        ./Inc/hw_msp.h
+        ./Middlewares/Third_Party/Lora/Core/lora_mac_version.h
+        ./Middlewares/Third_Party/Lora/Core/lora.h
+        ./Middlewares/Third_Party/Lora/Crypto/cmac.h
+        ./Middlewares/Third_Party/Lora/Crypto/aes.h
+        ./Middlewares/Third_Party/Lora/Phy/radio.h
+        ./Middlewares/Third_Party/Lora/Conf/Commissioning_template.h
+        ./Middlewares/Third_Party/Lora/Conf/Inc/hw_gpio_template.h
+        ./Middlewares/Third_Party/Lora/Conf/Inc/hw_template.h
+        ./Middlewares/Third_Party/Lora/Conf/Inc/hw_rtc_template.h
+        ./Middlewares/Third_Party/Lora/Conf/Inc/hw_spi_template.h
+        ./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.h
+        ./Middlewares/Third_Party/Lora/Mac/timer.h
+        ./Middlewares/Third_Party/Lora/Mac/region/RegionUS915-Hybrid.h
+        ./Middlewares/Third_Party/Lora/Mac/region/RegionUS915.h
+        ./Middlewares/Third_Party/Lora/Mac/region/RegionCN470.h
+        ./Middlewares/Third_Party/Lora/Mac/region/RegionKR920.h
+        ./Middlewares/Third_Party/Lora/Mac/region/RegionAU915.h
+        ./Middlewares/Third_Party/Lora/Mac/region/RegionCN779.h
+        ./Middlewares/Third_Party/Lora/Mac/region/RegionIN865.h
+        ./Middlewares/Third_Party/Lora/Mac/region/RegionAS923.h
+        ./Middlewares/Third_Party/Lora/Mac/region/Region.h
+        ./Middlewares/Third_Party/Lora/Mac/region/RegionEU433.h
+        ./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.h
+        ./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.h
+        ./Middlewares/Third_Party/Lora/Mac/LoRaMac.h
+        ./Middlewares/Third_Party/Lora/Mac/LoRaMacTest.h
+        ./Middlewares/Third_Party/Lora/Utilities/utilities.h
+        ./Middlewares/Third_Party/Lora/Utilities/delay.h
+        ./Middlewares/Third_Party/Lora/Utilities/timeServer.h
+        ./Middlewares/Third_Party/Lora/Utilities/low_power.h
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_firewall.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2s.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_irda.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lcd.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lptim.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_msp_template-c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rng.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tsc.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_usart.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_wwdg.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_comp.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crc.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crs.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dac.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lptim.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rng.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rtc.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_spi.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c
+        Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c
+        Drivers/BME680/bme680.c
+        Drivers/BME680/bme680.h
+        Drivers/BME680/bme680_defs.h
+        Src/voc_sensor.c
+        Src/voc_sensor.h)
 
 include_directories(Drivers/CMSIS/Device/ST/STM32L0xx/Include)
 include_directories(Drivers/CMSIS/Include)
 include_directories(Drivers/STM32L0xx_HAL_Driver/Inc)
 include_directories(Drivers/STM32L0xx_HAL_Driver/Inc/Legacy)
-include_directories(Inc
+include_directories(
+        Inc
         Middlewares/Third_Party/Lora/Core
         Middlewares/Third_Party/Lora/Crypto
         Middlewares/Third_Party/Lora/Mac

Drivers/BME680/bme680.h

@@ -0,0 +1,225 @@
+/**
+ * Copyright (C) 2017 - 2018 Bosch Sensortec GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * Neither the name of the copyright holder nor the names of the
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+ * OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * The information provided is believed to be accurate and reliable.
+ * The copyright holder assumes no responsibility
+ * for the consequences of use
+ * of such information nor for any infringement of patents or
+ * other rights of third parties which may result from its use.
+ * No license is granted by implication or otherwise under any patent or
+ * patent rights of the copyright holder.
+ *
+ * @file	bme680.h
+ * @date	30 Oct 2017
+ * @version	3.5.3
+ * @brief
+ *
+ */
+/*! @file bme680.h
+ @brief Sensor driver for BME680 sensor */
+/*!
+ * @defgroup BME680 SENSOR API
+ * @{*/
+#ifndef BME680_H_
+#define BME680_H_
+
+/*! CPP guard */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/* Header includes */
+#include "bme680_defs.h"
+
+/* function prototype declarations */
+/*!
+ *  @brief This API is the entry point.
+ *  It reads the chip-id and calibration data from the sensor.
+ *
+ *  @param[in,out] dev : Structure instance of bme680_dev
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success / +ve value -> Warning / -ve value -> Error
+ */
+int8_t bme680_init(struct bme680_dev *dev);
+
+/*!
+ * @brief This API writes the given data to the register address
+ * of the sensor.
+ *
+ * @param[in] reg_addr : Register address from where the data to be written.
+ * @param[in] reg_data : Pointer to data buffer which is to be written
+ * in the sensor.
+ * @param[in] len : No of bytes of data to write..
+ * @param[in] dev : Structure instance of bme680_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / +ve value -> Warning / -ve value -> Error
+ */
+int8_t bme680_set_regs(const uint8_t *reg_addr, const uint8_t *reg_data, uint8_t len, struct bme680_dev *dev);
+
+/*!
+ * @brief This API reads the data from the given register address of the sensor.
+ *
+ * @param[in] reg_addr : Register address from where the data to be read
+ * @param[out] reg_data : Pointer to data buffer to store the read data.
+ * @param[in] len : No of bytes of data to be read.
+ * @param[in] dev : Structure instance of bme680_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / +ve value -> Warning / -ve value -> Error
+ */
+int8_t bme680_get_regs(uint8_t reg_addr, uint8_t *reg_data, uint16_t len, struct bme680_dev *dev);
+
+/*!
+ * @brief This API performs the soft reset of the sensor.
+ *
+ * @param[in] dev : Structure instance of bme680_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / +ve value -> Warning / -ve value -> Error.
+ */
+int8_t bme680_soft_reset(struct bme680_dev *dev);
+
+/*!
+ * @brief This API is used to set the power mode of the sensor.
+ *
+ * @param[in] dev : Structure instance of bme680_dev
+ * @note : Pass the value to bme680_dev.power_mode structure variable.
+ *
+ *  value	|	mode
+ * -------------|------------------
+ *	0x00	|	BME680_SLEEP_MODE
+ *	0x01	|	BME680_FORCED_MODE
+ *
+ * * @return Result of API execution status
+ * @retval zero -> Success / +ve value -> Warning / -ve value -> Error
+ */
+int8_t bme680_set_sensor_mode(struct bme680_dev *dev);
+
+/*!
+ * @brief This API is used to get the power mode of the sensor.
+ *
+ * @param[in] dev : Structure instance of bme680_dev
+ * @note : bme680_dev.power_mode structure variable hold the power mode.
+ *
+ *  value	|	mode
+ * ---------|------------------
+ *	0x00	|	BME680_SLEEP_MODE
+ *	0x01	|	BME680_FORCED_MODE
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / +ve value -> Warning / -ve value -> Error
+ */
+int8_t bme680_get_sensor_mode(struct bme680_dev *dev);
+
+/*!
+ * @brief This API is used to set the profile duration of the sensor.
+ *
+ * @param[in] dev	   : Structure instance of bme680_dev.
+ * @param[in] duration : Duration of the measurement in ms.
+ *
+ * @return Nothing
+ */
+void bme680_set_profile_dur(uint16_t duration, struct bme680_dev *dev);
+
+/*!
+ * @brief This API is used to get the profile duration of the sensor.
+ *
+ * @param[in] dev	   : Structure instance of bme680_dev.
+ * @param[in] duration : Duration of the measurement in ms.
+ *
+ * @return Nothing
+ */
+void bme680_get_profile_dur(uint16_t *duration, const struct bme680_dev *dev);
+
+/*!
+ * @brief This API reads the pressure, temperature and humidity and gas data
+ * from the sensor, compensates the data and store it in the bme680_data
+ * structure instance passed by the user.
+ *
+ * @param[out] data: Structure instance to hold the data.
+ * @param[in] dev : Structure instance of bme680_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / +ve value -> Warning / -ve value -> Error
+ */
+int8_t bme680_get_sensor_data(struct bme680_field_data *data, struct bme680_dev *dev);
+
+/*!
+ * @brief This API is used to set the oversampling, filter and T,P,H, gas selection
+ * settings in the sensor.
+ *
+ * @param[in] dev : Structure instance of bme680_dev.
+ * @param[in] desired_settings : Variable used to select the settings which
+ * are to be set in the sensor.
+ *
+ *	 Macros	                   |  Functionality
+ *---------------------------------|----------------------------------------------
+ *	BME680_OST_SEL             |    To set temperature oversampling.
+ *	BME680_OSP_SEL             |    To set pressure oversampling.
+ *	BME680_OSH_SEL             |    To set humidity oversampling.
+ *	BME680_GAS_MEAS_SEL        |    To set gas measurement setting.
+ *	BME680_FILTER_SEL          |    To set filter setting.
+ *	BME680_HCNTRL_SEL          |    To set humidity control setting.
+ *	BME680_RUN_GAS_SEL         |    To set run gas setting.
+ *	BME680_NBCONV_SEL          |    To set NB conversion setting.
+ *	BME680_GAS_SENSOR_SEL      |    To set all gas sensor related settings
+ *
+ * @note : Below are the macros to be used by the user for selecting the
+ * desired settings. User can do OR operation of these macros for configuring
+ * multiple settings.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / +ve value -> Warning / -ve value -> Error.
+ */
+int8_t bme680_set_sensor_settings(uint16_t desired_settings, struct bme680_dev *dev);
+
+/*!
+ * @brief This API is used to get the oversampling, filter and T,P,H, gas selection
+ * settings in the sensor.
+ *
+ * @param[in] dev : Structure instance of bme680_dev.
+ * @param[in] desired_settings : Variable used to select the settings which
+ * are to be get from the sensor.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / +ve value -> Warning / -ve value -> Error.
+ */
+int8_t bme680_get_sensor_settings(uint16_t desired_settings, struct bme680_dev *dev);
+#ifdef __cplusplus
+}
+#endif /* End of CPP guard */
+#endif /* BME680_H_ */
+/** @}*/

Drivers/BME680/bme680_defs.h

@@ -0,0 +1,512 @@
+/**
+ * Copyright (C) 2017 - 2018 Bosch Sensortec GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * Neither the name of the copyright holder nor the names of the
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+ * OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * The information provided is believed to be accurate and reliable.
+ * The copyright holder assumes no responsibility
+ * for the consequences of use
+ * of such information nor for any infringement of patents or
+ * other rights of third parties which may result from its use.
+ * No license is granted by implication or otherwise under any patent or
+ * patent rights of the copyright holder.
+ *
+ * @file    bme680_defs.h
+ * @date	30 Oct 2017
+ * @version	3.5.3
+ * @brief
+ *
+ */
+
+/*! @file bme680_defs.h
+ @brief Sensor driver for BME680 sensor */
+/*!
+ * @defgroup BME680 SENSOR API
+ * @brief
+ * @{*/
+#ifndef BME680_DEFS_H_
+#define BME680_DEFS_H_
+
+/********************************************************/
+/* header includes */
+#ifdef __KERNEL__
+#include <linux/types.h>
+#include <linux/kernel.h>
+#else
+#include <stdint.h>
+#include <stddef.h>
+#endif
+
+/******************************************************************************/
+/*! @name		Common macros					      */
+/******************************************************************************/
+
+#if !defined(UINT8_C) && !defined(INT8_C)
+#define INT8_C(x)       S8_C(x)
+#define UINT8_C(x)      U8_C(x)
+#endif
+
+#if !defined(UINT16_C) && !defined(INT16_C)
+#define INT16_C(x)      S16_C(x)
+#define UINT16_C(x)     U16_C(x)
+#endif
+
+#if !defined(INT32_C) && !defined(UINT32_C)
+#define INT32_C(x)      S32_C(x)
+#define UINT32_C(x)     U32_C(x)
+#endif
+
+#if !defined(INT64_C) && !defined(UINT64_C)
+#define INT64_C(x)      S64_C(x)
+#define UINT64_C(x)     U64_C(x)
+#endif
+
+/**@}*/
+
+/**\name C standard macros */
+#ifndef NULL
+#ifdef __cplusplus
+#define NULL   0
+#else
+#define NULL   ((void *) 0)
+#endif
+#endif
+
+/** BME680 General config */
+#define BME680_POLL_PERIOD_MS		UINT8_C(10)
+
+/** BME680 I2C addresses */
+#define BME680_I2C_ADDR_PRIMARY		UINT8_C(0x76)
+#define BME680_I2C_ADDR_SECONDARY	UINT8_C(0x77)
+
+/** BME680 unique chip identifier */
+#define BME680_CHIP_ID  UINT8_C(0x61)
+
+/** BME680 coefficients related defines */
+#define BME680_COEFF_SIZE		UINT8_C(0x41)
+#define BME680_COEFF_ADDR1_LEN		UINT8_C(25)
+#define BME680_COEFF_ADDR2_LEN		UINT8_C(16)
+
+/** BME680 field_x related defines */
+#define BME680_FIELD_LENGTH		UINT8_C(15)
+#define BME680_FIELD_ADDR_OFFSET	UINT8_C(17)
+
+/** Soft reset command */
+#define BME680_SOFT_RESET_CMD   UINT8_C(0xb6)
+
+/** Error code definitions */
+#define BME680_OK		INT8_C(0)
+/* Errors */
+#define BME680_E_NULL_PTR		    INT8_C(-1)
+#define BME680_E_COM_FAIL		    INT8_C(-2)
+#define BME680_E_DEV_NOT_FOUND		INT8_C(-3)
+#define BME680_E_INVALID_LENGTH		INT8_C(-4)
+
+/* Warnings */
+#define BME680_W_DEFINE_PWR_MODE	INT8_C(1)
+#define BME680_W_NO_NEW_DATA        INT8_C(2)
+
+/* Info's */
+#define BME680_I_MIN_CORRECTION		UINT8_C(1)
+#define BME680_I_MAX_CORRECTION		UINT8_C(2)
+
+/** Register map */
+/** Other coefficient's address */
+#define BME680_ADDR_RES_HEAT_VAL_ADDR	UINT8_C(0x00)
+#define BME680_ADDR_RES_HEAT_RANGE_ADDR	UINT8_C(0x02)
+#define BME680_ADDR_RANGE_SW_ERR_ADDR	UINT8_C(0x04)
+#define BME680_ADDR_SENS_CONF_START	UINT8_C(0x5A)
+#define BME680_ADDR_GAS_CONF_START	UINT8_C(0x64)
+
+/** Field settings */
+#define BME680_FIELD0_ADDR		UINT8_C(0x1d)
+
+/** Heater settings */
+#define BME680_RES_HEAT0_ADDR		UINT8_C(0x5a)
+#define BME680_GAS_WAIT0_ADDR		UINT8_C(0x64)
+
+/** Sensor configuration registers */
+#define BME680_CONF_HEAT_CTRL_ADDR		UINT8_C(0x70)
+#define BME680_CONF_ODR_RUN_GAS_NBC_ADDR	UINT8_C(0x71)
+#define BME680_CONF_OS_H_ADDR			UINT8_C(0x72)
+#define BME680_MEM_PAGE_ADDR			UINT8_C(0xf3)
+#define BME680_CONF_T_P_MODE_ADDR		UINT8_C(0x74)
+#define BME680_CONF_ODR_FILT_ADDR		UINT8_C(0x75)
+
+/** Coefficient's address */
+#define BME680_COEFF_ADDR1	UINT8_C(0x89)
+#define BME680_COEFF_ADDR2	UINT8_C(0xe1)
+
+/** Chip identifier */
+#define BME680_CHIP_ID_ADDR	UINT8_C(0xd0)
+
+/** Soft reset register */
+#define BME680_SOFT_RESET_ADDR		UINT8_C(0xe0)
+
+/** Heater control settings */
+#define BME680_ENABLE_HEATER		UINT8_C(0x00)
+#define BME680_DISABLE_HEATER		UINT8_C(0x08)
+
+/** Gas measurement settings */
+#define BME680_DISABLE_GAS_MEAS		UINT8_C(0x00)
+#define BME680_ENABLE_GAS_MEAS		UINT8_C(0x01)
+
+/** Over-sampling settings */
+#define BME680_OS_NONE		UINT8_C(0)
+#define BME680_OS_1X		UINT8_C(1)
+#define BME680_OS_2X		UINT8_C(2)
+#define BME680_OS_4X		UINT8_C(3)
+#define BME680_OS_8X		UINT8_C(4)
+#define BME680_OS_16X		UINT8_C(5)
+
+/** IIR filter settings */
+#define BME680_FILTER_SIZE_0	UINT8_C(0)
+#define BME680_FILTER_SIZE_1	UINT8_C(1)
+#define BME680_FILTER_SIZE_3	UINT8_C(2)
+#define BME680_FILTER_SIZE_7	UINT8_C(3)
+#define BME680_FILTER_SIZE_15	UINT8_C(4)
+#define BME680_FILTER_SIZE_31	UINT8_C(5)
+#define BME680_FILTER_SIZE_63	UINT8_C(6)
+#define BME680_FILTER_SIZE_127	UINT8_C(7)
+
+/** Power mode settings */
+#define BME680_SLEEP_MODE	UINT8_C(0)
+#define BME680_FORCED_MODE	UINT8_C(1)
+
+/** Delay related macro declaration */
+#define BME680_RESET_PERIOD	UINT32_C(10)
+
+/** SPI memory page settings */
+#define BME680_MEM_PAGE0	UINT8_C(0x10)
+#define BME680_MEM_PAGE1	UINT8_C(0x00)
+
+/** Ambient humidity shift value for compensation */
+#define BME680_HUM_REG_SHIFT_VAL	UINT8_C(4)
+
+/** Run gas enable and disable settings */
+#define BME680_RUN_GAS_DISABLE	UINT8_C(0)
+#define BME680_RUN_GAS_ENABLE	UINT8_C(1)
+
+/** Buffer length macro declaration */
+#define BME680_TMP_BUFFER_LENGTH	UINT8_C(40)
+#define BME680_REG_BUFFER_LENGTH	UINT8_C(6)
+#define BME680_FIELD_DATA_LENGTH	UINT8_C(3)
+#define BME680_GAS_REG_BUF_LENGTH	UINT8_C(20)
+#define BME680_GAS_HEATER_PROF_LEN_MAX  UINT8_C(10)
+
+/** Settings selector */
+#define BME680_OST_SEL			UINT16_C(1)
+#define BME680_OSP_SEL			UINT16_C(2)
+#define BME680_OSH_SEL			UINT16_C(4)
+#define BME680_GAS_MEAS_SEL		UINT16_C(8)
+#define BME680_FILTER_SEL		UINT16_C(16)
+#define BME680_HCNTRL_SEL		UINT16_C(32)
+#define BME680_RUN_GAS_SEL		UINT16_C(64)
+#define BME680_NBCONV_SEL		UINT16_C(128)
+#define BME680_GAS_SENSOR_SEL		(BME680_GAS_MEAS_SEL | BME680_RUN_GAS_SEL | BME680_NBCONV_SEL)
+
+/** Number of conversion settings*/
+#define BME680_NBCONV_MIN		UINT8_C(0)
+#define BME680_NBCONV_MAX		UINT8_C(10)
+
+/** Mask definitions */
+#define BME680_GAS_MEAS_MSK	UINT8_C(0x30)
+#define BME680_NBCONV_MSK	UINT8_C(0X0F)
+#define BME680_FILTER_MSK	UINT8_C(0X1C)
+#define BME680_OST_MSK		UINT8_C(0XE0)
+#define BME680_OSP_MSK		UINT8_C(0X1C)
+#define BME680_OSH_MSK		UINT8_C(0X07)
+#define BME680_HCTRL_MSK	UINT8_C(0x08)
+#define BME680_RUN_GAS_MSK	UINT8_C(0x10)
+#define BME680_MODE_MSK		UINT8_C(0x03)
+#define BME680_RHRANGE_MSK	UINT8_C(0x30)
+#define BME680_RSERROR_MSK	UINT8_C(0xf0)
+#define BME680_NEW_DATA_MSK	UINT8_C(0x80)
+#define BME680_GAS_INDEX_MSK	UINT8_C(0x0f)
+#define BME680_GAS_RANGE_MSK	UINT8_C(0x0f)
+#define BME680_GASM_VALID_MSK	UINT8_C(0x20)
+#define BME680_HEAT_STAB_MSK	UINT8_C(0x10)
+#define BME680_MEM_PAGE_MSK	UINT8_C(0x10)
+#define BME680_SPI_RD_MSK	UINT8_C(0x80)
+#define BME680_SPI_WR_MSK	UINT8_C(0x7f)
+#define	BME680_BIT_H1_DATA_MSK	UINT8_C(0x0F)
+
+/** Bit position definitions for sensor settings */
+#define BME680_GAS_MEAS_POS	UINT8_C(4)
+#define BME680_FILTER_POS	UINT8_C(2)
+#define BME680_OST_POS		UINT8_C(5)
+#define BME680_OSP_POS		UINT8_C(2)
+#define BME680_RUN_GAS_POS	UINT8_C(4)
+
+/** Array Index to Field data mapping for Calibration Data*/
+#define BME680_T2_LSB_REG	(1)
+#define BME680_T2_MSB_REG	(2)
+#define BME680_T3_REG		(3)
+#define BME680_P1_LSB_REG	(5)
+#define BME680_P1_MSB_REG	(6)
+#define BME680_P2_LSB_REG	(7)
+#define BME680_P2_MSB_REG	(8)
+#define BME680_P3_REG		(9)
+#define BME680_P4_LSB_REG	(11)
+#define BME680_P4_MSB_REG	(12)
+#define BME680_P5_LSB_REG	(13)
+#define BME680_P5_MSB_REG	(14)
+#define BME680_P7_REG		(15)
+#define BME680_P6_REG		(16)
+#define BME680_P8_LSB_REG	(19)
+#define BME680_P8_MSB_REG	(20)
+#define BME680_P9_LSB_REG	(21)
+#define BME680_P9_MSB_REG	(22)
+#define BME680_P10_REG		(23)
+#define BME680_H2_MSB_REG	(25)
+#define BME680_H2_LSB_REG	(26)
+#define BME680_H1_LSB_REG	(26)
+#define BME680_H1_MSB_REG	(27)
+#define BME680_H3_REG		(28)
+#define BME680_H4_REG		(29)
+#define BME680_H5_REG		(30)
+#define BME680_H6_REG		(31)
+#define BME680_H7_REG		(32)
+#define BME680_T1_LSB_REG	(33)
+#define BME680_T1_MSB_REG	(34)
+#define BME680_GH2_LSB_REG	(35)
+#define BME680_GH2_MSB_REG	(36)
+#define BME680_GH1_REG		(37)
+#define BME680_GH3_REG		(38)
+
+/** BME680 register buffer index settings*/
+#define BME680_REG_FILTER_INDEX		UINT8_C(5)
+#define BME680_REG_TEMP_INDEX		UINT8_C(4)
+#define BME680_REG_PRES_INDEX		UINT8_C(4)
+#define BME680_REG_HUM_INDEX		UINT8_C(2)
+#define BME680_REG_NBCONV_INDEX		UINT8_C(1)
+#define BME680_REG_RUN_GAS_INDEX	UINT8_C(1)
+#define BME680_REG_HCTRL_INDEX		UINT8_C(0)
+
+/** Macro to combine two 8 bit data's to form a 16 bit data */
+#define BME680_CONCAT_BYTES(msb, lsb)	(((uint16_t)msb << 8) | (uint16_t)lsb)
+
+/** Macro to SET and GET BITS of a register */
+#define BME680_SET_BITS(reg_data, bitname, data) \
+		((reg_data & ~(bitname##_MSK)) | \
+		((data << bitname##_POS) & bitname##_MSK))
+#define BME680_GET_BITS(reg_data, bitname)	((reg_data & (bitname##_MSK)) >> \
+	(bitname##_POS))
+
+/** Macro variant to handle the bitname position if it is zero */
+#define BME680_SET_BITS_POS_0(reg_data, bitname, data) \
+				((reg_data & ~(bitname##_MSK)) | \
+				(data & bitname##_MSK))
+#define BME680_GET_BITS_POS_0(reg_data, bitname)  (reg_data & (bitname##_MSK))
+
+/** Type definitions */
+/*
+ * Generic communication function pointer
+ * @param[in] dev_id: Place holder to store the id of the device structure
+ *                    Can be used to store the index of the Chip select or
+ *                    I2C address of the device.
+ * @param[in] reg_addr:	Used to select the register the where data needs to
+ *                      be read from or written to.
+ * @param[in/out] reg_data: Data array to read/write
+ * @param[in] len: Length of the data array
+ */
+typedef int8_t (*bme680_com_fptr_t)(uint8_t dev_id, uint8_t reg_addr, uint8_t *data, uint16_t len);
+
+/*
+ * Delay function pointer
+ * @param[in] period: Time period in milliseconds
+ */
+typedef void (*bme680_delay_fptr_t)(uint32_t period);
+
+/*!
+ * @brief Interface selection Enumerations
+ */
+enum bme680_intf {
+	/*! SPI interface */
+	BME680_SPI_INTF,
+	/*! I2C interface */
+	BME680_I2C_INTF
+};
+
+/* structure definitions */
+/*!
+ * @brief Sensor field data structure
+ */
+struct	bme680_field_data {
+	/*! Contains new_data, gasm_valid & heat_stab */
+	uint8_t status;
+	/*! The index of the heater profile used */
+	uint8_t gas_index;
+	/*! Measurement index to track order */
+	uint8_t meas_index;
+	/*! Temperature in degree celsius x100 */
+	int16_t temperature;
+	/*! Pressure in Pascal */
+	uint32_t pressure;
+	/*! Humidity in % relative humidity x1000 */
+	uint32_t humidity;
+	/*! Gas resistance in Ohms */
+	uint32_t gas_resistance;
+};
+
+/*!
+ * @brief Structure to hold the Calibration data
+ */
+struct	bme680_calib_data {
+	/*! Variable to store calibrated humidity data */
+	uint16_t par_h1;
+	/*! Variable to store calibrated humidity data */
+	uint16_t par_h2;
+	/*! Variable to store calibrated humidity data */
+	int8_t par_h3;
+	/*! Variable to store calibrated humidity data */
+	int8_t par_h4;
+	/*! Variable to store calibrated humidity data */
+	int8_t par_h5;
+	/*! Variable to store calibrated humidity data */
+	uint8_t par_h6;
+	/*! Variable to store calibrated humidity data */
+	int8_t par_h7;
+	/*! Variable to store calibrated gas data */
+	int8_t par_gh1;
+	/*! Variable to store calibrated gas data */
+	int16_t par_gh2;
+	/*! Variable to store calibrated gas data */
+	int8_t par_gh3;
+	/*! Variable to store calibrated temperature data */
+	uint16_t par_t1;
+	/*! Variable to store calibrated temperature data */
+	int16_t par_t2;
+	/*! Variable to store calibrated temperature data */
+	int8_t par_t3;
+	/*! Variable to store calibrated pressure data */
+	uint16_t par_p1;
+	/*! Variable to store calibrated pressure data */
+	int16_t par_p2;
+	/*! Variable to store calibrated pressure data */
+	int8_t par_p3;
+	/*! Variable to store calibrated pressure data */
+	int16_t par_p4;
+	/*! Variable to store calibrated pressure data */
+	int16_t par_p5;
+	/*! Variable to store calibrated pressure data */
+	int8_t par_p6;
+	/*! Variable to store calibrated pressure data */
+	int8_t par_p7;
+	/*! Variable to store calibrated pressure data */
+	int16_t par_p8;
+	/*! Variable to store calibrated pressure data */
+	int16_t par_p9;
+	/*! Variable to store calibrated pressure data */
+	uint8_t par_p10;
+	/*! Variable to store t_fine size */
+	int32_t t_fine;
+	/*! Variable to store heater resistance range */
+	uint8_t res_heat_range;
+	/*! Variable to store heater resistance value */
+	int8_t res_heat_val;
+	/*! Variable to store error range */
+	int8_t range_sw_err;
+};
+
+/*!
+ * @brief BME680 sensor settings structure which comprises of ODR,
+ * over-sampling and filter settings.
+ */
+struct	bme680_tph_sett {
+	/*! Humidity oversampling */
+	uint8_t os_hum;
+	/*! Temperature oversampling */
+	uint8_t os_temp;
+	/*! Pressure oversampling */
+	uint8_t os_pres;
+	/*! Filter coefficient */
+	uint8_t filter;
+};
+
+/*!
+ * @brief BME680 gas sensor which comprises of gas settings
+ *  and status parameters
+ */
+struct	bme680_gas_sett {
+	/*! Variable to store nb conversion */
+	uint8_t nb_conv;
+	/*! Variable to store heater control */
+	uint8_t heatr_ctrl;
+	/*! Run gas enable value */
+	uint8_t run_gas;
+	/*! Pointer to store heater temperature */
+	uint16_t heatr_temp;
+	/*! Pointer to store duration profile */
+	uint16_t heatr_dur;
+};
+
+/*!
+ * @brief BME680 device structure
+ */
+struct	bme680_dev {
+	/*! Chip Id */
+	uint8_t chip_id;
+	/*! Device Id */
+	uint8_t dev_id;
+	/*! SPI/I2C interface */
+	enum bme680_intf intf;
+	/*! Memory page used */
+	uint8_t mem_page;
+	/*! Ambient temperature in Degree C*/
+	int8_t amb_temp;
+	/*! Sensor calibration data */
+	struct bme680_calib_data calib;
+	/*! Sensor settings */
+	struct bme680_tph_sett tph_sett;
+	/*! Gas Sensor settings */
+	struct bme680_gas_sett gas_sett;
+	/*! Sensor power modes */
+	uint8_t power_mode;
+	/*! New sensor fields */
+	uint8_t new_fields;
+	/*! Store the info messages */
+	uint8_t info_msg;
+	/*! Burst read structure */
+	bme680_com_fptr_t read;
+	/*! Burst write structure */
+	bme680_com_fptr_t write;
+	/*! Delay in ms */
+	bme680_delay_fptr_t delay_ms;
+	/*! Communication function result */
+	int8_t com_rslt;
+};
+
+
+
+#endif /* BME680_DEFS_H_ */
+/** @}*/
+/** @}*/

Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c

@@ -239,6 +239,7 @@
   */
 
 /* Includes ------------------------------------------------------------------*/
+#include <vcom.h>
 #include "stm32l0xx_hal.h"
 
 /** @addtogroup STM32L0xx_HAL_Driver
@@ -1892,6 +1893,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
   {
     if ((pData == NULL) || (Size == 0U))
     {
+      PRINTF("Bad pData or Size=0\r\n");
       return  HAL_ERROR;
     }
 
@@ -1903,6 +1905,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
 
     if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
     {
+      PRINTF("Timeout\r\n");
       return HAL_TIMEOUT;
     }
 
@@ -1918,6 +1921,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
     /* Send Slave Address and Memory Address */
     if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
     {
+      PRINTF("Error in memory read - %d\r\n", hi2c->ErrorCode);
       if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
       {
         /* Process Unlocked */
@@ -1950,6 +1954,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
       /* Wait until RXNE flag is set */
       if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
       {
+        PRINTF("waiting for flag timeout1\r\n");
         return HAL_TIMEOUT;
       }
 
@@ -1963,6 +1968,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
         /* Wait until TCR flag is set */
         if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
         {
+          PRINTF("waiting for flag timeout2\r\n");
           return HAL_TIMEOUT;
         }
 
@@ -1986,6 +1992,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
     {
       if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
       {
+        PRINTF("waiting for stop error %d\r\n", hi2c->ErrorCode);
         return HAL_ERROR;
       }
       else
@@ -2010,6 +2017,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
   }
   else
   {
+    PRINTF("busy!!\r\n");
     return HAL_BUSY;
   }
 }
@@ -3713,6 +3721,7 @@ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t
   /* Wait until TXIS flag is set */
   if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
   {
+    PRINTF("I2C_RequestMemoryRead error %d\r\n", hi2c->ErrorCode);
     if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
     {
       return HAL_ERROR;
@@ -3738,6 +3747,7 @@ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t
     /* Wait until TXIS flag is set */
     if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
     {
+      PRINTF("I2C_RequestMemoryRead error2 %d\r\n", hi2c->ErrorCode);
       if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
       {
         return HAL_ERROR;
@@ -3755,6 +3765,7 @@ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t
   /* Wait until TC flag is set */
   if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK)
   {
+    PRINTF("I2C_RequestMemoryRead TIMEOUT\r\n");
     return HAL_TIMEOUT;
   }
 
@@ -4507,6 +4518,7 @@ static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
     /* Check if a NACK is detected */
     if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
     {
+      PRINTF("I2C_WaitOnTXISFlagUntilTimeout ->I2C_IsAcknowledgeFailed error\r\n");
       return HAL_ERROR;
     }
 
@@ -4522,6 +4534,7 @@ static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
         /* Process Unlocked */
         __HAL_UNLOCK(hi2c);
 
+        PRINTF("I2C_WaitOnTXISFlagUntilTimeout timeout\r\n");
         return HAL_TIMEOUT;
       }
     }

Inc/debug.h

@@ -69,7 +69,7 @@
 
 void DBG_Init( void );
 
-void Error_Handler( void );
+//void Error_Handler( void );
 
 #ifdef DEBUG
 
@@ -116,6 +116,10 @@ void Error_Handler( void );
 
 #endif /* DEBUG */
 
+ void _Error_Handler(char *, int);
+
+#define Error_Handler() _Error_Handler(__FILE__, __LINE__)
+
 #ifdef __cplusplus
 }
 #endif

Inc/hw_i2c.h

@@ -0,0 +1,80 @@
+/**
+  ******************************************************************************
+  * File Name          : I2C.h
+  * Description        : This file provides code for the configuration
+  *                      of the I2C instances.
+  ******************************************************************************
+  ** This notice applies to any and all portions of this file
+  * that are not between comment pairs USER CODE BEGIN and
+  * USER CODE END. Other portions of this file, whether 
+  * inserted by the user or by software development tools
+  * are owned by their respective copyright owners.
+  *
+  * COPYRIGHT(c) 2017 STMicroelectronics
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __i2c_H
+#define __i2c_H
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l0xx_hal.h"
+#include "main.h"
+#include "debug.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern I2C_HandleTypeDef hi2c1;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_I2C1_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ i2c_H */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Inc/main.h

@@ -75,9 +75,7 @@
 #ifdef __cplusplus
  extern "C" {
 #endif
-void _Error_Handler(char *, int);
 
-#define Error_Handler() _Error_Handler(__FILE__, __LINE__)
 #ifdef __cplusplus
 }
 #endif

Makefile

@@ -0,0 +1,292 @@
+##########################################################################################################################
+# File automatically-generated by tool: [projectgenerator] version: [2.26.0] date: [Thu Nov 16 09:19:43 CET 2017] 
+##########################################################################################################################
+
+# ------------------------------------------------
+# Generic Makefile (based on gcc)
+#
+# ChangeLog :
+#	2017-02-10 - Several enhancements + project update mode
+#   2015-07-22 - first version
+# ------------------------------------------------
+
+######################################
+# target
+######################################
+TARGET = bees
+
+
+######################################
+# building variables
+######################################
+# debug build?
+DEBUG = 1
+# optimization
+OPT = -Og
+
+
+#######################################
+# paths
+#######################################
+
+# Build path
+BUILD_DIR = build
+
+######################################
+# source
+######################################
+# C sources
+C_SOURCES =  \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lptim.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_usart.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crc.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_spi.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crs.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rng.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dac.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_wwdg.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rtc.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2s.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_irda.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lptim.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_comp.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rng.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_firewall.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tsc.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lcd.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd_ex.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c \
+./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c \
+./Drivers/BSP/sx1272mb2das/sx1272mb2das.c \
+./Drivers/BSP/Components/sx1272/sx1272.c \
+./Middlewares/Third_Party/Lora/Core/lora.c \
+./Middlewares/Third_Party/Lora/Crypto/aes.c \
+./Middlewares/Third_Party/Lora/Crypto/cmac.c \
+./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c \
+./Middlewares/Third_Party/Lora/Mac/region/Region.c \
+./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c \
+./Middlewares/Third_Party/Lora/Mac/LoRaMac.c \
+./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c \
+./Middlewares/Third_Party/Lora/Utilities/delay.c \
+./Middlewares/Third_Party/Lora/Utilities/timeServer.c \
+./Middlewares/Third_Party/Lora/Utilities/utilities.c \
+./Middlewares/Third_Party/Lora/Utilities/low_power.c \
+./Src/vcom.c \
+./Src/stm32l0xx_hw.c \
+./Src/hw_rtc.c \
+./Src/stm32l0xx_hal_msp.c \
+./Src/debug.c \
+./Src/hw_i2c.c \
+./Src/hw_gpio.c \
+./Src/hw_spi.c \
+./Src/main.c \
+./Src/system_stm32l0xx.c \
+./Src/stm32l0xx_it.c \
+Src/voc_sensor.c \
+Drivers/BME680/bme680.c
+
+
+# ASM sources
+ASM_SOURCES =  \
+startup/startup_stm32l073xx.s
+
+
+######################################
+# firmware library
+######################################
+PERIFLIB_SOURCES = 
+
+
+#######################################
+# binaries
+#######################################
+BINPATH = /bin
+PREFIX = arm-none-eabi-
+CC = $(BINPATH)/$(PREFIX)gcc
+AS = $(BINPATH)/$(PREFIX)gcc -x assembler-with-cpp
+CP = $(BINPATH)/$(PREFIX)objcopy
+AR = $(BINPATH)/$(PREFIX)ar
+SZ = $(BINPATH)/$(PREFIX)size
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary -S
+ 
+#######################################
+# CFLAGS
+#######################################
+# cpu
+CPU = -mcpu=cortex-m0plus
+
+# fpu
+# NONE for Cortex-M0/M0+/M3
+
+# float-abi
+
+
+# mcu
+MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
+
+# macros for gcc
+# AS defines
+AS_DEFS = 
+
+# C defines
+C_DEFS =  \
+-DUSE_HAL_DRIVER \
+-DSTM32L073xx \
+-DREGION_EU868 \
+-DUSE_FULL_LL_DRIVER
+
+
+# AS includes
+AS_INCLUDES = 
+
+# C includes
+C_INCLUDES =  \
+        -IInc \
+        -IDrivers/STM32L0xx_HAL_Driver/Inc \
+        -IDrivers/STM32L0xx_HAL_Driver/Inc/Legacy \
+        -IDrivers/CMSIS/Device/ST/STM32L0xx/Include \
+        -IDrivers/CMSIS/Include \
+        -IMiddlewares/Third_Party/Lora/Core \
+        -IMiddlewares/Third_Party/Lora/Crypto \
+        -IMiddlewares/Third_Party/Lora/Mac \
+        -IMiddlewares/Third_Party/Lora/Phy \
+        -IMiddlewares/Third_Party/Lora/Utilities \
+        -IMiddlewares/Third_Party/Lora/Mac/region \
+        -IDrivers/BSP/Components/sx1272
+
+
+# compile gcc flags
+ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
+
+CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
+
+ifeq ($(DEBUG), 1)
+CFLAGS += -ggdb -g -gdwarf-2
+endif
+
+
+# Generate dependency information
+CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.d)"
+
+CFLAGS      += -D__weak="__attribute__((weak))" -D__packed="__attribute__((__packed__))"
+CFLAGS      += -std=gnu99 -Wfatal-errors
+CFLAGS      += -Wall -Wextra -Wshadow
+CFLAGS      += -Wwrite-strings -Wold-style-definition -Winline -Wno-missing-noreturn -Wstrict-prototypes
+CFLAGS      += -Wredundant-decls -Wfloat-equal -Wsign-compare
+CFLAGS      += -fno-common -ffunction-sections -fdata-sections -Wno-unused-function
+CFLAGS      += -MD -Wno-format-zero-length -Wno-redundant-decls -Wno-unused-parameter
+CFLAGS      += -Wno-discarded-qualifiers -Wno-unused-variable
+CFLAGS      += -Wno-float-equal -Wno-implicit-fallthrough
+CFLAGS      += -fmerge-constants -fmerge-all-constants -finline-small-functions -findirect-inlining
+
+#######################################
+# LDFLAGS
+#######################################
+# link script
+LDSCRIPT = STM32L073RZTx_FLASH.ld
+
+# libraries
+LIBS = -lc -lm -lnosys
+LIBDIR =
+LDFLAGS = $(MCU) -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections
+# -specs=nano.specs
+
+# default action: build all
+all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin
+
+
+#######################################
+# build the application
+#######################################
+# list of objects
+OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))
+vpath %.c $(sort $(dir $(C_SOURCES)))
+# list of ASM program objects
+OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o)))
+vpath %.s $(sort $(dir $(ASM_SOURCES)))
+
+.PHONY: flash dis
+
+$(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR) 
+	@$(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@
+
+$(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR)
+	@$(AS) -c $(CFLAGS) $< -o $@
+
+$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile
+	@$(CC) $(OBJECTS) $(LDFLAGS) -o $@
+	@$(SZ) $@
+
+$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
+	@$(HEX) $< $@
+	
+$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
+	@$(BIN) $< $@
+	
+$(BUILD_DIR):
+	@mkdir -p $@
+
+flash: $(BUILD_DIR)/$(TARGET).bin
+	@printf "  FLASH  $<\n"
+	@st-flash write $< 0x8000000
+
+dis: $(BUILD_DIR)/$(TARGET).elf
+	@arm-none-eabi-objdump -Sslrtd build/mf103.elf > disassembly.lst
+
+#######################################
+# clean up
+#######################################
+clean:
+	-rm -fR .dep $(BUILD_DIR)
+  
+#######################################
+# dependencies
+#######################################
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+# *** EOF ***

Middlewares/Third_Party/Lora/Core/lora.c

@@ -179,7 +179,7 @@ struct ComplianceTest_s
 /*!
  * \brief   Prepares the payload of the frame
  */
-static void PrepareTxFrame( )
+static void PrepareTxFrame( void)
 {
     if( ComplianceTest.Running == true )
     {
@@ -260,15 +260,15 @@ static bool SendFrame( void )
 
 void OnSendEvent( void )
 {
-    MibRequestConfirm_t mibReq;
+    MibRequestConfirm_t _mibReq;
     LoRaMacStatus_t status;
 
-    mibReq.Type = MIB_NETWORK_JOINED;
+    _mibReq.Type = MIB_NETWORK_JOINED;
-    status = LoRaMacMibGetRequestConfirm( &mibReq );
+    status = LoRaMacMibGetRequestConfirm( &_mibReq );
 
     if( status == LORAMAC_STATUS_OK )
     {
-        if( mibReq.Param.IsNetworkJoined == true )
+        if( _mibReq.Param.IsNetworkJoined == true )
         {
             DeviceState = DEVICE_STATE_SEND;
             NextTx = true;
@@ -399,10 +399,10 @@ static void McpsIndication( McpsIndication_t *mcpsIndication )
                     ComplianceTest.Running = true;
                     ComplianceTest.State = 1;
                     
-                    MibRequestConfirm_t mibReq;
+                    MibRequestConfirm_t _mibReq;
-                    mibReq.Type = MIB_ADR;
+                    _mibReq.Type = MIB_ADR;
-                    mibReq.Param.AdrEnable = true;
+                    _mibReq.Param.AdrEnable = true;
-                    LoRaMacMibSetRequestConfirm( &mibReq );
+                    LoRaMacMibSetRequestConfirm( &_mibReq );
 
 #if defined( REGION_EU868 )
                     LoRaMacTestSetDutyCycleOn( false );
@@ -418,10 +418,10 @@ static void McpsIndication( McpsIndication_t *mcpsIndication )
                     ComplianceTest.DownLinkCounter = 0;
                     ComplianceTest.Running = false;
                     
-                    MibRequestConfirm_t mibReq;
+                    MibRequestConfirm_t _mibReq;
-                    mibReq.Type = MIB_ADR;
+                    _mibReq.Type = MIB_ADR;
-                    mibReq.Param.AdrEnable = LoRaParamInit->AdrEnable;
+                    _mibReq.Param.AdrEnable = LoRaParamInit->AdrEnable;
-                    LoRaMacMibSetRequestConfirm( &mibReq );
+                    LoRaMacMibSetRequestConfirm( &_mibReq );
 #if defined( REGION_EU868 )
                     LoRaMacTestSetDutyCycleOn( LORAWAN_DUTYCYCLE_ON );
 #endif

Src/debug.c

@@ -103,6 +103,7 @@ void DBG_Init( void )
 #endif
 }
 
+#if 0
 /**
   * @brief Error_Handler
   * @param None
@@ -113,6 +114,15 @@ void Error_Handler(void)
   DBG_PRINTF("Error_Handler\n\r");
   while(1);
 }
+#endif
+
+void _Error_Handler(char * file, int line)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  PRINTF("INIT ERROR, %s:%d", file, (uint16_t) line);
+  /* USER CODE END Error_Handler_Debug */
+}
+
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 

Src/hw_i2c.c

@@ -0,0 +1,162 @@
+/**
+  ******************************************************************************
+  * File Name          : I2C.c
+  * Description        : This file provides code for the configuration
+  *                      of the I2C instances.
+  ******************************************************************************
+  ** This notice applies to any and all portions of this file
+  * that are not between comment pairs USER CODE BEGIN and
+  * USER CODE END. Other portions of this file, whether 
+  * inserted by the user or by software development tools
+  * are owned by their respective copyright owners.
+  *
+  * COPYRIGHT(c) 2017 STMicroelectronics
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "hw.h"
+#include "hw_i2c.h"
+#include "debug.h"
+
+static inline uint32_t setupTiming(void)
+{
+	const uint32_t presc = 15;
+
+	// delays
+	const uint32_t sdadel = 2;
+	const uint32_t scldel = 2;
+
+	const uint32_t scll = 6;
+	const uint32_t sclh = 7;
+
+	return presc << I2C_TIMINGR_PRESC_Pos |
+			scldel << I2C_TIMINGR_SCLDEL_Pos |
+			sdadel << I2C_TIMINGR_SDADEL_Pos |
+			sclh << I2C_TIMINGR_SCLH_Pos |
+			scll << I2C_TIMINGR_SCLL_Pos;
+}
+
+I2C_HandleTypeDef hi2c1;
+
+/* I2C1 init function */
+void MX_I2C1_Init(void)
+{
+	hi2c1.Instance = I2C1;
+	hi2c1.Init.Timing = setupTiming(); //0x00000708;
+	hi2c1.Init.OwnAddress1 = 0;
+	hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+	hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+	hi2c1.Init.OwnAddress2 = 0;
+	hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
+	hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+	hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+	if (HAL_I2C_Init(&hi2c1) != HAL_OK)
+	{
+		_Error_Handler(__FILE__, __LINE__);
+	}
+
+	/**Configure Analogue filter
+	*/
+	if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
+	{
+		_Error_Handler(__FILE__, __LINE__);
+	}
+
+	/**Configure Digital filter
+	*/
+	if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
+	{
+		_Error_Handler(__FILE__, __LINE__);
+	}
+
+}
+
+void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
+{
+
+	GPIO_InitTypeDef GPIO_InitStruct;
+	if(i2cHandle->Instance==I2C1)
+	{
+		/* USER CODE BEGIN I2C1_MspInit 0 */
+
+		/* USER CODE END I2C1_MspInit 0 */
+
+		/**I2C1 GPIO Configuration
+		PB8     ------> I2C1_SCL
+		PB9     ------> I2C1_SDA
+		*/
+		GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
+		GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+		GPIO_InitStruct.Pull = GPIO_PULLUP;
+		GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+		GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
+		HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+		/* I2C1 clock enable */
+		__HAL_RCC_I2C1_CLK_ENABLE();
+		/* USER CODE BEGIN I2C1_MspInit 1 */
+
+		/* USER CODE END I2C1_MspInit 1 */
+	}
+}
+
+void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
+{
+
+	if(i2cHandle->Instance==I2C1)
+	{
+		/* USER CODE BEGIN I2C1_MspDeInit 0 */
+
+		/* USER CODE END I2C1_MspDeInit 0 */
+		/* Peripheral clock disable */
+		__HAL_RCC_I2C1_CLK_DISABLE();
+
+		/**I2C1 GPIO Configuration
+		PB8     ------> I2C1_SCL
+		PB9     ------> I2C1_SDA
+		*/
+		HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8|GPIO_PIN_9);
+
+		/* USER CODE BEGIN I2C1_MspDeInit 1 */
+
+		/* USER CODE END I2C1_MspDeInit 1 */
+	}
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Src/main.c

@@ -59,12 +59,16 @@ Maintainer: Miguel Luis, Gregory Cristian and Wael Guibene
   */
 
 /* Includes ------------------------------------------------------------------*/
+#include <hw_i2c.h>
+#include <stm32l0xx_ll_i2c.h>
+#include "stm32l0xx_ll_i2c.h"
 #include "hw.h"
 #include "low_power.h"
 #include "lora.h"
 //#include "bsp.h"
 #include "timeServer.h"
 #include "vcom.h"
+#include "voc_sensor.h"
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
@@ -137,6 +141,185 @@ static LoRaParam_t LoRaParamInit = {TX_ON_TIMER,
 
 /* Private functions ---------------------------------------------------------*/
 
+#if 0
+typedef enum {
+	i2cSpeed_std,
+	i2cSpeed_fast,
+	i2cSpeed_fastPlus,
+	i2cSpeed_count,
+} i2cSpeed_t;
+
+void i2cInit(I2C_TypeDef *i2c, i2cSpeed_t spd);
+
+#define I2C_7BIT_ADDR (0 << 31)
+#define I2C_10BIT_ADDR (1 << 31)
+
+// Returns number of bytes written
+uint32_t i2cWrite(I2C_TypeDef *i2c, uint32_t addr, uint8_t *txBuffer,
+				  uint32_t len);
+
+// Returns number of bytes read
+uint32_t i2cRead(I2C_TypeDef *i2c, uint8_t addr, uint8_t *rxBuffer,
+				 uint32_t numBytes);
+
+#define I2C_READ 0
+#define I2C_WRITE 1
+
+static uint32_t setupTiming(i2cSpeed_t spd, uint32_t clockFreq) {
+	(void) spd;
+	(void) clockFreq;
+	uint32_t presc = 0;
+	uint32_t sdadel = 2;
+	uint32_t scldel = 2;
+	uint32_t scll = 6;
+	uint32_t sclh = 7;
+
+	return  presc << 28 |
+			scldel << 20 |
+			sdadel << 16 |
+			sclh << 8 |
+			scll;
+}
+
+void i2cInit(I2C_TypeDef *i2c, i2cSpeed_t spd) {
+	// Setup timing register
+	i2c->TIMINGR = setupTiming(spd, SystemCoreClock);
+
+	// Reset state
+	i2c->CR1 &= ~I2C_CR1_PE;
+}
+
+static uint32_t i2cSetup(uint32_t addr, uint8_t direction) {
+	uint32_t ret = 0;
+	if (addr & I2C_10BIT_ADDR) {
+		ret = (addr & 0x000003FF) | I2C_CR2_ADD10;
+	} else {
+		// 7 Bit Address
+		ret = (addr & 0x0000007F) << 1;
+	}
+
+	if (direction == I2C_READ) {
+		ret |= I2C_CR2_RD_WRN;
+		if (addr & I2C_10BIT_ADDR) {
+			ret |= I2C_CR2_HEAD10R;
+		}
+	}
+
+	return ret;
+}
+
+// Will return the number of data bytes written to the device
+uint32_t i2cWrite(I2C_TypeDef *i2c, uint32_t addr, uint8_t *txBuffer,
+				  uint32_t len) {
+
+	uint32_t numTxBytes = 0;
+
+	i2c->CR1 &= ~I2C_CR1_PE;
+	i2c->CR2 = 0;
+
+	i2c->CR2 = i2cSetup(addr, I2C_WRITE);
+
+	if (len > 0xFF) {
+		i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD;
+	} else {
+		i2c->CR2 |= ((len & 0xFF) << 16) | I2C_CR2_AUTOEND;
+	}
+	i2c->CR1 |= I2C_CR1_PE;
+	i2c->CR2 |= I2C_CR2_START;
+	while(i2c->CR2 & I2C_CR2_START);
+	uint8_t done = 0;
+	uint32_t i = 0;
+	while (!done && i < 0x0000001F) {
+		i++;
+		if (i2c->ISR & I2C_ISR_NACKF) {
+			// Was not acknowledged, disable device and exit
+			done = 1;
+		}
+
+		if (i2c->ISR & I2C_ISR_TXIS) {
+			// Device acknowledged and we must send the next byte
+			if (numTxBytes < len){
+				i2c->TXDR = txBuffer[numTxBytes++];
+			}
+
+			i = 0;
+
+		}
+
+		if (i2c->ISR & I2C_ISR_TC) {
+			done = 1;
+		}
+
+		if (i2c->ISR & I2C_ISR_TCR) {
+			i = 0;
+			if ((len - numTxBytes) > 0xFF) {
+				i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD;
+			} else {
+				i2c->CR2 &= ~(0x00FF0000 | I2C_CR2_RELOAD);
+				i2c->CR2 |= ((len - numTxBytes) & 0xFF) << 16 |
+							I2C_CR2_AUTOEND;
+			}
+		}
+
+	}
+	i2c->CR1 &= ~I2C_CR1_PE;
+	return numTxBytes;
+}
+
+uint32_t i2cRead(I2C_TypeDef *i2c, uint8_t addr, uint8_t *rxBuffer,
+				 uint32_t numBytes) {
+
+	uint32_t numRxBytes = 0;
+
+	i2c->CR1 &= ~I2C_CR1_PE;
+	i2c->CR2 = 0;
+
+	i2c->CR2 = i2cSetup(addr, I2C_READ);
+
+	if (numBytes > 0xFF) {
+		i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD;
+	} else {
+		i2c->CR2 |= ((numBytes & 0xFF) << 16) | I2C_CR2_AUTOEND;
+	}
+	i2c->CR1 |= I2C_CR1_PE;
+	i2c->CR2 |= I2C_CR2_START;
+
+	while(i2c->CR2 & I2C_CR2_START);
+	uint8_t done = 0;
+	uint32_t i = 0;
+	while (!done && i < 0x0000001F) {
+		i++;
+
+		if (i2c->ISR & I2C_ISR_RXNE) {
+			// Device acknowledged and we must send the next byte
+			if (numRxBytes < numBytes){
+				rxBuffer[numRxBytes++] = i2c->RXDR;
+			}
+
+			i = 0;
+		}
+
+		if (i2c->ISR & I2C_ISR_TC) {
+			done = 1;
+		}
+
+		if (i2c->ISR & I2C_ISR_TCR) {
+			i = 0;
+			if ((numBytes - numRxBytes) > 0xFF) {
+				i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD;
+			} else {
+				i2c->CR2 &= ~(0x00FF0000 | I2C_CR2_RELOAD);
+				i2c->CR2 |= ((numBytes - numRxBytes) & 0xFF) << 16 |
+							I2C_CR2_AUTOEND;
+			}
+		}
+
+	}
+	i2c->CR1 &= ~I2C_CR1_PE;
+	return numRxBytes;
+}
+#endif
+
 
 /**
   * @brief  Main program
@@ -154,11 +337,29 @@ int main(void)
 	/* Configure the debug mode*/
 	DBG_Init();
 
+	__HAL_RCC_GPIOA_CLK_ENABLE();
+	__HAL_RCC_GPIOC_CLK_ENABLE();
+
 	/* Configure the hardware*/
 	HW_Init();
+	MX_I2C1_Init();
+
+	// BLINKY
+	GPIO_InitTypeDef initStruct = { 0 };
+	initStruct.Mode =GPIO_MODE_OUTPUT_PP;
+	initStruct.Pull = GPIO_NOPULL;
+	initStruct.Speed = GPIO_SPEED_HIGH;
+	HW_GPIO_Init(GPIOC, GPIO_PIN_7, &initStruct);
 
 	/* USER CODE BEGIN 1 */
 	/* USER CODE END 1 */
+	voc_init();
+
+	while(1) {
+		GPIOC->ODR ^= 1<<7;
+		voc_measure();
+	}
+#if 0
 
 	/* Configure the Lora Stack*/
 	lora_Init(&LoRaMainCallbacks, &LoRaParamInit);
@@ -184,6 +385,7 @@ int main(void)
 		/* USER CODE BEGIN 2 */
 		/* USER CODE END 2 */
 	}
+#endif
 }
 
 static void LoraTxData(lora_AppData_t *AppData, FunctionalState *IsTxConfirmed)
@@ -219,5 +421,4 @@ static void LoraRxData(lora_AppData_t *AppData)
 	}
 	/* USER CODE END 4 */
 }
-
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Src/stm32l0xx_it.c

@@ -102,6 +102,7 @@ void NMI_Handler(void)
 
 void HardFault_Handler(void)
 {
+  PRINTF("\r\nHARDFAULT!\r\n");
   while(1)
   {
     __NOP();

Src/voc_sensor.c

@@ -0,0 +1,197 @@
+//
+// Created by MightyPork on 2017/11/17.
+//
+
+#include <hw.h>
+#include <hw_i2c.h>
+#include "voc_sensor.h"
+
+struct bme680_dev gas_sensor;
+
+static void user_delay_ms(uint32_t period)
+{
+	/*
+	 * Return control or wait,
+	 * for a period amount of milliseconds
+	 */
+	HAL_Delay(period);
+}
+
+#if 0
+static int8_t user_spi_read(uint8_t dev_id, uint8_t reg_addr, uint8_t *reg_data, uint16_t len)
+{
+	int8_t rslt = 0; /* Return 0 for Success, non-zero for failure */
+
+	/*
+	 * The parameter dev_id can be used as a variable to select which Chip Select pin has
+	 * to be set low to activate the relevant device on the SPI bus
+	 */
+
+	/*
+	 * Data on the bus should be like
+	 * |----------------+---------------------+-------------|
+	 * | MOSI           | MISO                | Chip Select |
+	 * |----------------+---------------------|-------------|
+	 * | (don't care)   | (don't care)        | HIGH        |
+	 * | (reg_addr)     | (don't care)        | LOW         |
+	 * | (don't care)   | (reg_data[0])       | LOW         |
+	 * | (....)         | (....)              | LOW         |
+	 * | (don't care)   | (reg_data[len - 1]) | LOW         |
+	 * | (don't care)   | (don't care)        | HIGH        |
+	 * |----------------+---------------------|-------------|
+	 */
+
+	return rslt;
+}
+
+static int8_t user_spi_write(uint8_t dev_id, uint8_t reg_addr, uint8_t *reg_data, uint16_t len)
+{
+	int8_t rslt = 0; /* Return 0 for Success, non-zero for failure */
+
+	/*
+	 * The parameter dev_id can be used as a variable to select which Chip Select pin has
+	 * to be set low to activate the relevant device on the SPI bus
+	 */
+
+	/*
+	 * Data on the bus should be like
+	 * |---------------------+--------------+-------------|
+	 * | MOSI                | MISO         | Chip Select |
+	 * |---------------------+--------------|-------------|
+	 * | (don't care)        | (don't care) | HIGH        |
+	 * | (reg_addr)          | (don't care) | LOW         |
+	 * | (reg_data[0])       | (don't care) | LOW         |
+	 * | (....)              | (....)       | LOW         |
+	 * | (reg_data[len - 1]) | (don't care) | LOW         |
+	 * | (don't care)        | (don't care) | HIGH        |
+	 * |---------------------+--------------|-------------|
+	 */
+
+	return rslt;
+}
+#endif
+
+static int8_t user_i2c_read(uint8_t dev_id, uint8_t reg_addr, uint8_t *reg_data, uint16_t len)
+{
+	int8_t rslt = 0; /* Return 0 for Success, non-zero for failure */
+
+	/*
+	 * The parameter dev_id can be used as a variable to store the I2C address of the device
+	 */
+
+	/*
+	 * Data on the bus should be like
+	 * |------------+---------------------|
+	 * | I2C action | Data                |
+	 * |------------+---------------------|
+	 * | Start      | -                   |
+	 * | Write      | (reg_addr)          |
+	 * | Stop       | -                   |
+	 * | Start      | -                   |
+	 * | Read       | (reg_data[0])       |
+	 * | Read       | (....)              |
+	 * | Read       | (reg_data[len - 1]) |
+	 * | Stop       | -                   |
+	 * |------------+---------------------|
+	 */
+	HAL_I2C_Master_Transmit(&hi2c1, dev_id<<1, &reg_addr, 1, 100);
+	HAL_I2C_Master_Receive(&hi2c1, dev_id<<1, reg_data, len, 100);
+
+	return rslt;
+}
+
+static int8_t user_i2c_write(uint8_t dev_id, uint8_t reg_addr, uint8_t *reg_data, uint16_t len)
+{
+	/*
+	 * The parameter dev_id can be used as a variable to store the I2C address of the device
+	 */
+
+	/*
+	 * Data on the bus should be like
+	 * |------------+---------------------|
+	 * | I2C action | Data                |
+	 * |------------+---------------------|
+	 * | Start      | -                   |
+	 * | Write      | (reg_addr)          |
+	 * | Write      | (reg_data[0])       |
+	 * | Write      | (....)              |
+	 * | Write      | (reg_data[len - 1]) |
+	 * | Stop       | -                   |
+	 * |------------+---------------------|
+	 */
+	uint8_t data[64];
+	data[0] = reg_addr;
+	for (int i = 0; i < len; i++) {
+		data[i+1] = reg_data[i];
+	}
+	HAL_I2C_Master_Transmit(&hi2c1, dev_id<<1, &data[0], (uint16_t) (len + 1), 100);
+
+	return BME680_OK;
+}
+
+
+void voc_init(void)
+{
+	int8_t rslt;
+	gas_sensor.dev_id = BME680_I2C_ADDR_PRIMARY;
+	gas_sensor.intf = BME680_I2C_INTF;
+	gas_sensor.read = user_i2c_read;
+	gas_sensor.write = user_i2c_write;
+	gas_sensor.delay_ms = user_delay_ms;
+
+	PRINTF("BME680 initializing...\r\n");
+	rslt = bme680_init(&gas_sensor);
+	assert_param(rslt == BME680_OK);
+
+
+	PRINTF("BME680 configuring...\r\n");
+	/* Set the temperature, pressure and humidity settings */
+	gas_sensor.tph_sett.os_hum = BME680_OS_2X;
+	gas_sensor.tph_sett.os_pres = BME680_OS_4X;
+	gas_sensor.tph_sett.os_temp = BME680_OS_8X;
+	gas_sensor.tph_sett.filter = BME680_FILTER_SIZE_3;
+
+	/* Set the remaining gas sensor settings and link the heating profile */
+	gas_sensor.gas_sett.run_gas = BME680_ENABLE_GAS_MEAS;
+	/* Create a ramp heat waveform in 3 steps */
+	gas_sensor.gas_sett.heatr_temp = 320; /* degree Celsius */
+	gas_sensor.gas_sett.heatr_dur = 150; /* milliseconds */
+
+	/* Select the power mode */
+	/* Must be set before writing the sensor configuration */
+	gas_sensor.power_mode = BME680_FORCED_MODE;
+
+	/* Set the required sensor settings needed */
+	uint8_t set_required_settings = BME680_OST_SEL | BME680_OSP_SEL | BME680_OSH_SEL | BME680_FILTER_SEL | BME680_GAS_SENSOR_SEL;
+
+	/* Set the desired sensor configuration */
+	rslt = bme680_set_sensor_settings(set_required_settings,&gas_sensor);
+	assert_param(rslt == BME680_OK);
+}
+
+void voc_measure(void)
+{
+	/* Set the power mode */
+	int8_t rslt;
+
+	rslt = bme680_set_sensor_mode(&gas_sensor);
+	assert_param(rslt == BME680_OK);
+
+	/* Get the total measurement duration so as to sleep or wait till the
+	 * measurement is complete */
+	uint16_t meas_period;
+	bme680_get_profile_dur(&meas_period, &gas_sensor);
+	HAL_Delay(meas_period); /* Delay till the measurement is ready */
+	struct bme680_field_data data;
+
+	rslt = bme680_get_sensor_data(&data, &gas_sensor);
+	assert_param(rslt == BME680_OK);
+
+	PRINTF("T: %.2f degC, P: %.2f hPa, H %.2f %%rH ", data.temperature / 100.0f,
+		   data.pressure / 100.0f, data.humidity / 1000.0f );
+	/* Avoid using measurements from an unstable heating setup */
+	if(data.status & BME680_GASM_VALID_MSK)
+		PRINTF(", G: %d ohms", data.gas_resistance);
+
+	PRINTF("\r\n");
+}

Src/voc_sensor.h

@@ -0,0 +1,15 @@
+//
+// Created by MightyPork on 2017/11/17.
+//
+
+#ifndef PROJ_VOC_SENSOR_H
+#define PROJ_VOC_SENSOR_H
+
+#include "../Drivers/BME680/bme680.h"
+
+extern struct bme680_dev gas_sensor;
+
+void voc_init(void);
+void voc_measure(void);
+
+#endif //PROJ_VOC_SENSOR_H

build/LoRaMac.d

@@ -0,0 +1,43 @@
+build/LoRaMac.d: Middlewares/Third_Party/Lora/Mac/LoRaMac.c \
+ Middlewares/Third_Party/Lora/Phy/radio.h \
+ Middlewares/Third_Party/Lora/Utilities/timeServer.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Middlewares/Third_Party/Lora/Mac/LoRaMac.h \
+ Middlewares/Third_Party/Lora/Mac/region/Region.h \
+ Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.h Inc/debug.h \
+ Inc/hw_conf.h Inc/vcom.h Middlewares/Third_Party/Lora/Mac/LoRaMacTest.h
+
+Middlewares/Third_Party/Lora/Phy/radio.h:
+
+Middlewares/Third_Party/Lora/Utilities/timeServer.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Middlewares/Third_Party/Lora/Mac/LoRaMac.h:
+
+Middlewares/Third_Party/Lora/Mac/region/Region.h:
+
+Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.h:
+
+Inc/debug.h:
+
+Inc/hw_conf.h:
+
+Inc/vcom.h:
+
+Middlewares/Third_Party/Lora/Mac/LoRaMacTest.h:

build/LoRaMacCrypto.d

@@ -0,0 +1,31 @@
+build/LoRaMacCrypto.d: Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Middlewares/Third_Party/Lora/Crypto/aes.h \
+ Middlewares/Third_Party/Lora/Crypto/cmac.h \
+ Middlewares/Third_Party/Lora/Crypto/aes.h \
+ Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.h
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Middlewares/Third_Party/Lora/Crypto/aes.h:
+
+Middlewares/Third_Party/Lora/Crypto/cmac.h:
+
+Middlewares/Third_Party/Lora/Crypto/aes.h:
+
+Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.h:

build/Region.d

@@ -0,0 +1,34 @@
+build/Region.d: Middlewares/Third_Party/Lora/Mac/region/Region.c \
+ Middlewares/Third_Party/Lora/Mac/timer.h \
+ Middlewares/Third_Party/Lora/Utilities/timeServer.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Middlewares/Third_Party/Lora/Mac/LoRaMac.h \
+ Middlewares/Third_Party/Lora/Mac/region/Region.h \
+ Middlewares/Third_Party/Lora/Mac/region/RegionEU868.h
+
+Middlewares/Third_Party/Lora/Mac/timer.h:
+
+Middlewares/Third_Party/Lora/Utilities/timeServer.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Middlewares/Third_Party/Lora/Mac/LoRaMac.h:
+
+Middlewares/Third_Party/Lora/Mac/region/Region.h:
+
+Middlewares/Third_Party/Lora/Mac/region/RegionEU868.h:

build/RegionCommon.d

@@ -0,0 +1,35 @@
+build/RegionCommon.d: \
+ Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c \
+ Middlewares/Third_Party/Lora/Mac/timer.h \
+ Middlewares/Third_Party/Lora/Utilities/timeServer.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h \
+ Middlewares/Third_Party/Lora/Mac/LoRaMac.h \
+ Middlewares/Third_Party/Lora/Mac/region/RegionCommon.h
+
+Middlewares/Third_Party/Lora/Mac/timer.h:
+
+Middlewares/Third_Party/Lora/Utilities/timeServer.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Middlewares/Third_Party/Lora/Mac/LoRaMac.h:
+
+Middlewares/Third_Party/Lora/Mac/region/RegionCommon.h:

build/RegionEU868.d

@@ -0,0 +1,51 @@
+build/RegionEU868.d: \
+ Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c \
+ Middlewares/Third_Party/Lora/Phy/radio.h \
+ Middlewares/Third_Party/Lora/Mac/timer.h \
+ Middlewares/Third_Party/Lora/Utilities/timeServer.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Middlewares/Third_Party/Lora/Mac/LoRaMac.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h \
+ Middlewares/Third_Party/Lora/Mac/region/Region.h \
+ Middlewares/Third_Party/Lora/Mac/region/RegionCommon.h \
+ Middlewares/Third_Party/Lora/Mac/region/RegionEU868.h Inc/debug.h \
+ Inc/hw_conf.h Inc/vcom.h
+
+Middlewares/Third_Party/Lora/Phy/radio.h:
+
+Middlewares/Third_Party/Lora/Mac/timer.h:
+
+Middlewares/Third_Party/Lora/Utilities/timeServer.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Middlewares/Third_Party/Lora/Mac/LoRaMac.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Middlewares/Third_Party/Lora/Mac/region/Region.h:
+
+Middlewares/Third_Party/Lora/Mac/region/RegionCommon.h:
+
+Middlewares/Third_Party/Lora/Mac/region/RegionEU868.h:
+
+Inc/debug.h:
+
+Inc/hw_conf.h:
+
+Inc/vcom.h:

build/aes.d

@@ -0,0 +1,4 @@
+build/aes.d: Middlewares/Third_Party/Lora/Crypto/aes.c \
+ Middlewares/Third_Party/Lora/Crypto/aes.h
+
+Middlewares/Third_Party/Lora/Crypto/aes.h:

build/bme680.d

@@ -0,0 +1,6 @@
+build/bme680.d: Drivers/BME680/bme680.c Drivers/BME680/bme680.h \
+ Drivers/BME680/bme680_defs.h
+
+Drivers/BME680/bme680.h:
+
+Drivers/BME680/bme680_defs.h:

build/cmac.d

@@ -0,0 +1,25 @@
+build/cmac.d: Middlewares/Third_Party/Lora/Crypto/cmac.c \
+ Middlewares/Third_Party/Lora/Crypto/aes.h \
+ Middlewares/Third_Party/Lora/Crypto/cmac.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h
+
+Middlewares/Third_Party/Lora/Crypto/aes.h:
+
+Middlewares/Third_Party/Lora/Crypto/cmac.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:

build/cmac.lst

@@ -0,0 +1,844 @@
+ARM GAS  /tmp/ccUuuSOT.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"cmac.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              		.section	.text.AES_CMAC_Init,"ax",%progbits
+  16              		.align	1
+  17              		.global	AES_CMAC_Init
+  18              		.syntax unified
+  19              		.code	16
+  20              		.thumb_func
+  21              		.fpu softvfp
+  23              	AES_CMAC_Init:
+  24              	.LFB82:
+  25              		.file 1 "./Middlewares/Third_Party/Lora/Crypto/cmac.c"
+   1:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** /**************************************************************************
+   2:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** Copyright (C) 2009 Lander Casado, Philippas Tsigas
+   3:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+   4:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** All rights reserved.
+   5:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+   6:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** Permission is hereby granted, free of charge, to any person obtaining
+   7:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** a copy of this software and associated documentation files 
+   8:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** (the "Software"), to deal with the Software without restriction, including
+   9:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** without limitation the rights to use, copy, modify, merge, publish, 
+  10:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** distribute, sublicense, and/or sell copies of the Software, and to
+  11:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** permit persons to whom the Software is furnished to do so, subject to
+  12:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** the following conditions: 
+  13:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+  14:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** Redistributions of source code must retain the above copyright notice, 
+  15:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** this list of conditions and the following disclaimers. Redistributions in
+  16:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** binary form must reproduce the above copyright notice, this list of
+  17:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** conditions and the following disclaimers in the documentation and/or 
+  18:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** other materials provided with the distribution.
+  19:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+  20:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** In no event shall the authors or copyright holders be liable for any special,
+  21:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** incidental, indirect or consequential damages of any kind, or any damages 
+  22:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** whatsoever resulting from loss of use, data or profits, whether or not 
+  23:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** advised of the possibility of damage, and on any theory of liability, 
+  24:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** arising out of or in connection with the use or performance of this software.
+  25:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****  
+  26:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+  27:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+  28:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+  29:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+  30:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
+  31:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
+  32:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** DEALINGS WITH THE SOFTWARE
+  33:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ARM GAS  /tmp/ccUuuSOT.s 			page 2
+
+
+  34:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** *****************************************************************************/
+  35:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** //#include <sys/param.h>
+  36:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** //#include <sys/systm.h> 
+  37:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** #include <stdint.h>
+  38:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** #include "aes.h"
+  39:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** #include "cmac.h"
+  40:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** #include "utilities.h"
+  41:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+  42:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** #define LSHIFT(v, r) do {                                       \
+  43:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****   int32_t i;                                                  \
+  44:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****            for (i = 0; i < 15; i++)                                \
+  45:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     (r)[i] = (v)[i] << 1 | (v)[i + 1] >> 7;         \
+  46:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             (r)[15] = (v)[15] << 1;                                 \
+  47:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****     } while (0)
+  48:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****     
+  49:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** #define XOR(v, r) do {                                          \
+  50:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             int32_t i;                                                  \
+  51:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             for (i = 0; i < 16; i++)     \
+  52:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****         {   \
+  53:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     (r)[i] = (r)[i] ^ (v)[i]; \
+  54:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****         }                          \
+  55:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****     } while (0) \
+  56:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+  57:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+  58:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** void AES_CMAC_Init(AES_CMAC_CTX *ctx)
+  59:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** {
+  26              		.loc 1 59 0
+  27              		.cfi_startproc
+  28              		@ args = 0, pretend = 0, frame = 0
+  29              		@ frame_needed = 0, uses_anonymous_args = 0
+  30              	.LVL0:
+  31 0000 10B5     		push	{r4, lr}
+  32              	.LCFI0:
+  33              		.cfi_def_cfa_offset 8
+  34              		.cfi_offset 4, -8
+  35              		.cfi_offset 14, -4
+  36 0002 0400     		movs	r4, r0
+  60:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             memset1(ctx->X, 0, sizeof ctx->X);
+  37              		.loc 1 60 0
+  38 0004 F130     		adds	r0, r0, #241
+  39              	.LVL1:
+  40 0006 1022     		movs	r2, #16
+  41 0008 0021     		movs	r1, #0
+  42 000a FFF7FEFF 		bl	memset1
+  43              	.LVL2:
+  61:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             ctx->M_n = 0;
+  44              		.loc 1 61 0
+  45 000e 8A23     		movs	r3, #138
+  46 0010 5B00     		lsls	r3, r3, #1
+  47 0012 0022     		movs	r2, #0
+  48 0014 E250     		str	r2, [r4, r3]
+  62:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****         memset1(ctx->rijndael.ksch, '\0', 240);
+  49              		.loc 1 62 0
+  50 0016 F032     		adds	r2, r2, #240
+  51 0018 0021     		movs	r1, #0
+  52 001a 2000     		movs	r0, r4
+  53 001c FFF7FEFF 		bl	memset1
+ARM GAS  /tmp/ccUuuSOT.s 			page 3
+
+
+  54              	.LVL3:
+  63:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** }
+  55              		.loc 1 63 0
+  56              		@ sp needed
+  57              	.LVL4:
+  58 0020 10BD     		pop	{r4, pc}
+  59              		.cfi_endproc
+  60              	.LFE82:
+  62              		.section	.text.AES_CMAC_SetKey,"ax",%progbits
+  63              		.align	1
+  64              		.global	AES_CMAC_SetKey
+  65              		.syntax unified
+  66              		.code	16
+  67              		.thumb_func
+  68              		.fpu softvfp
+  70              	AES_CMAC_SetKey:
+  71              	.LFB83:
+  64:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****     
+  65:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** void AES_CMAC_SetKey(AES_CMAC_CTX *ctx, const uint8_t key[AES_CMAC_KEY_LENGTH])
+  66:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** {
+  72              		.loc 1 66 0
+  73              		.cfi_startproc
+  74              		@ args = 0, pretend = 0, frame = 0
+  75              		@ frame_needed = 0, uses_anonymous_args = 0
+  76              	.LVL5:
+  77 0000 10B5     		push	{r4, lr}
+  78              	.LCFI1:
+  79              		.cfi_def_cfa_offset 8
+  80              		.cfi_offset 4, -8
+  81              		.cfi_offset 14, -4
+  82 0002 0200     		movs	r2, r0
+  83 0004 0800     		movs	r0, r1
+  84              	.LVL6:
+  67:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****            //rijndael_set_key_enc_only(&ctx->rijndael, key, 128);
+  68:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****        aes_set_key( key, AES_CMAC_KEY_LENGTH, &ctx->rijndael);
+  85              		.loc 1 68 0
+  86 0006 1021     		movs	r1, #16
+  87              	.LVL7:
+  88 0008 FFF7FEFF 		bl	aes_set_key
+  89              	.LVL8:
+  69:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** }
+  90              		.loc 1 69 0
+  91              		@ sp needed
+  92 000c 10BD     		pop	{r4, pc}
+  93              		.cfi_endproc
+  94              	.LFE83:
+  96              		.section	.text.AES_CMAC_Update,"ax",%progbits
+  97              		.align	1
+  98              		.global	AES_CMAC_Update
+  99              		.syntax unified
+ 100              		.code	16
+ 101              		.thumb_func
+ 102              		.fpu softvfp
+ 104              	AES_CMAC_Update:
+ 105              	.LFB84:
+  70:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****     
+  71:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** void AES_CMAC_Update(AES_CMAC_CTX *ctx, const uint8_t *data, uint32_t len)
+ARM GAS  /tmp/ccUuuSOT.s 			page 4
+
+
+  72:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** {
+ 106              		.loc 1 72 0
+ 107              		.cfi_startproc
+ 108              		@ args = 0, pretend = 0, frame = 16
+ 109              		@ frame_needed = 0, uses_anonymous_args = 0
+ 110              	.LVL9:
+ 111 0000 F0B5     		push	{r4, r5, r6, r7, lr}
+ 112              	.LCFI2:
+ 113              		.cfi_def_cfa_offset 20
+ 114              		.cfi_offset 4, -20
+ 115              		.cfi_offset 5, -16
+ 116              		.cfi_offset 6, -12
+ 117              		.cfi_offset 7, -8
+ 118              		.cfi_offset 14, -4
+ 119 0002 C646     		mov	lr, r8
+ 120 0004 00B5     		push	{lr}
+ 121              	.LCFI3:
+ 122              		.cfi_def_cfa_offset 24
+ 123              		.cfi_offset 8, -24
+ 124 0006 84B0     		sub	sp, sp, #16
+ 125              	.LCFI4:
+ 126              		.cfi_def_cfa_offset 40
+ 127 0008 0400     		movs	r4, r0
+ 128 000a 0D00     		movs	r5, r1
+ 129 000c 1600     		movs	r6, r2
+  73:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             uint32_t mlen;
+  74:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****         uint8_t in[16];
+  75:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****     
+  76:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             if (ctx->M_n > 0) {
+ 130              		.loc 1 76 0
+ 131 000e 8A23     		movs	r3, #138
+ 132 0010 5B00     		lsls	r3, r3, #1
+ 133 0012 C058     		ldr	r0, [r0, r3]
+ 134              	.LVL10:
+ 135 0014 0028     		cmp	r0, #0
+ 136 0016 4AD0     		beq	.L9
+  77:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                   mlen = MIN(16 - ctx->M_n, len);
+ 137              		.loc 1 77 0
+ 138 0018 053B     		subs	r3, r3, #5
+ 139 001a FF3B     		subs	r3, r3, #255
+ 140 001c 1B1A     		subs	r3, r3, r0
+ 141 001e 9846     		mov	r8, r3
+ 142 0020 1F00     		movs	r7, r3
+ 143 0022 9342     		cmp	r3, r2
+ 144 0024 00D9     		bls	.L5
+ 145 0026 1700     		movs	r7, r2
+ 146              	.L5:
+ 147              	.LVL11:
+  78:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     memcpy1(ctx->M_last + ctx->M_n, data, mlen);
+ 148              		.loc 1 78 0
+ 149 0028 A31C     		adds	r3, r4, #2
+ 150 002a FF33     		adds	r3, r3, #255
+ 151 002c BAB2     		uxth	r2, r7
+ 152              	.LVL12:
+ 153 002e 1818     		adds	r0, r3, r0
+ 154 0030 2900     		movs	r1, r5
+ 155              	.LVL13:
+ARM GAS  /tmp/ccUuuSOT.s 			page 5
+
+
+ 156 0032 FFF7FEFF 		bl	memcpy1
+ 157              	.LVL14:
+  79:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     ctx->M_n += mlen;
+ 158              		.loc 1 79 0
+ 159 0036 8A22     		movs	r2, #138
+ 160 0038 5200     		lsls	r2, r2, #1
+ 161 003a A358     		ldr	r3, [r4, r2]
+ 162 003c FB18     		adds	r3, r7, r3
+ 163 003e A350     		str	r3, [r4, r2]
+  80:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     if (ctx->M_n < 16 || len == mlen)
+ 164              		.loc 1 80 0
+ 165 0040 0F2B     		cmp	r3, #15
+ 166 0042 41D9     		bls	.L3
+ 167              		.loc 1 80 0 is_stmt 0 discriminator 1
+ 168 0044 B045     		cmp	r8, r6
+ 169 0046 3FD2     		bcs	.L3
+ 170              	.LBB2:
+  81:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                             return;
+  82:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                    XOR(ctx->M_last, ctx->X);
+ 171              		.loc 1 82 0 is_stmt 1
+ 172 0048 0022     		movs	r2, #0
+ 173 004a 09E0     		b	.L7
+ 174              	.LVL15:
+ 175              	.L8:
+ 176              		.loc 1 82 0 is_stmt 0 discriminator 3
+ 177 004c A318     		adds	r3, r4, r2
+ 178 004e 1800     		movs	r0, r3
+ 179 0050 F130     		adds	r0, r0, #241
+ 180 0052 0178     		ldrb	r1, [r0]
+ 181 0054 0233     		adds	r3, r3, #2
+ 182 0056 FF33     		adds	r3, r3, #255
+ 183 0058 1B78     		ldrb	r3, [r3]
+ 184 005a 4B40     		eors	r3, r1
+ 185 005c 0370     		strb	r3, [r0]
+ 186 005e 0132     		adds	r2, r2, #1
+ 187              	.LVL16:
+ 188              	.L7:
+ 189              		.loc 1 82 0 discriminator 1
+ 190 0060 0F2A     		cmp	r2, #15
+ 191 0062 F3DD     		ble	.L8
+ 192              	.LBE2:
+  83:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     //rijndael_encrypt(&ctx->rijndael, ctx->X, ctx->X);
+  84:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             aes_encrypt( ctx->X, ctx->X, &ctx->rijndael);
+ 193              		.loc 1 84 0 is_stmt 1
+ 194 0064 2200     		movs	r2, r4
+ 195              	.LVL17:
+ 196 0066 2000     		movs	r0, r4
+ 197 0068 F130     		adds	r0, r0, #241
+ 198 006a 0100     		movs	r1, r0
+ 199 006c FFF7FEFF 		bl	aes_encrypt
+ 200              	.LVL18:
+  85:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     data += mlen;
+ 201              		.loc 1 85 0
+ 202 0070 ED19     		adds	r5, r5, r7
+ 203              	.LVL19:
+  86:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     len -= mlen;
+ 204              		.loc 1 86 0
+ARM GAS  /tmp/ccUuuSOT.s 			page 6
+
+
+ 205 0072 F61B     		subs	r6, r6, r7
+ 206              	.LVL20:
+ 207 0074 1BE0     		b	.L9
+ 208              	.LVL21:
+ 209              	.L10:
+ 210              	.LBB3:
+  87:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             }
+  88:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             while (len > 16) {      /* not last block */
+  89:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+  90:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     XOR(data, ctx->X);
+ 211              		.loc 1 90 0 discriminator 3
+ 212 0076 E218     		adds	r2, r4, r3
+ 213 0078 F132     		adds	r2, r2, #241
+ 214 007a 1178     		ldrb	r1, [r2]
+ 215 007c E85C     		ldrb	r0, [r5, r3]
+ 216 007e 4140     		eors	r1, r0
+ 217 0080 1170     		strb	r1, [r2]
+ 218 0082 0133     		adds	r3, r3, #1
+ 219              	.LVL22:
+ 220              	.L11:
+ 221              		.loc 1 90 0 is_stmt 0 discriminator 1
+ 222 0084 0F2B     		cmp	r3, #15
+ 223 0086 F6DD     		ble	.L10
+ 224              	.LBE3:
+  91:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     //rijndael_encrypt(&ctx->rijndael, ctx->X, ctx->X);
+  92:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+  93:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     memcpy1(in, &ctx->X[0], 16); //Bestela ez du ondo iten
+ 225              		.loc 1 93 0 is_stmt 1
+ 226 0088 1022     		movs	r2, #16
+ 227 008a 2700     		movs	r7, r4
+ 228 008c F137     		adds	r7, r7, #241
+ 229 008e 3900     		movs	r1, r7
+ 230 0090 6846     		mov	r0, sp
+ 231 0092 FFF7FEFF 		bl	memcpy1
+ 232              	.LVL23:
+  94:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             aes_encrypt( in, in, &ctx->rijndael);
+ 233              		.loc 1 94 0
+ 234 0096 2200     		movs	r2, r4
+ 235 0098 6946     		mov	r1, sp
+ 236 009a 6846     		mov	r0, sp
+ 237 009c FFF7FEFF 		bl	aes_encrypt
+ 238              	.LVL24:
+  95:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     memcpy1(&ctx->X[0], in, 16);
+ 239              		.loc 1 95 0
+ 240 00a0 1022     		movs	r2, #16
+ 241 00a2 6946     		mov	r1, sp
+ 242 00a4 3800     		movs	r0, r7
+ 243 00a6 FFF7FEFF 		bl	memcpy1
+ 244              	.LVL25:
+  96:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+  97:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     data += 16;
+ 245              		.loc 1 97 0
+ 246 00aa 1035     		adds	r5, r5, #16
+ 247              	.LVL26:
+  98:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     len -= 16;
+ 248              		.loc 1 98 0
+ 249 00ac 103E     		subs	r6, r6, #16
+ARM GAS  /tmp/ccUuuSOT.s 			page 7
+
+
+ 250              	.LVL27:
+ 251              	.L9:
+  88:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 252              		.loc 1 88 0
+ 253 00ae 102E     		cmp	r6, #16
+ 254 00b0 01D9     		bls	.L14
+ 255              	.LBB4:
+  90:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     //rijndael_encrypt(&ctx->rijndael, ctx->X, ctx->X);
+ 256              		.loc 1 90 0
+ 257 00b2 0023     		movs	r3, #0
+ 258 00b4 E6E7     		b	.L11
+ 259              	.L14:
+ 260              	.LBE4:
+  99:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             }
+ 100:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             /* potential last block, save it */
+ 101:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             memcpy1(ctx->M_last, data, len);
+ 261              		.loc 1 101 0
+ 262 00b6 A01C     		adds	r0, r4, #2
+ 263 00b8 FF30     		adds	r0, r0, #255
+ 264 00ba B2B2     		uxth	r2, r6
+ 265 00bc 2900     		movs	r1, r5
+ 266 00be FFF7FEFF 		bl	memcpy1
+ 267              	.LVL28:
+ 102:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             ctx->M_n = len;
+ 268              		.loc 1 102 0
+ 269 00c2 8A23     		movs	r3, #138
+ 270 00c4 5B00     		lsls	r3, r3, #1
+ 271 00c6 E650     		str	r6, [r4, r3]
+ 272              	.L3:
+ 103:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** }
+ 273              		.loc 1 103 0
+ 274 00c8 04B0     		add	sp, sp, #16
+ 275              		@ sp needed
+ 276              	.LVL29:
+ 277              	.LVL30:
+ 278              	.LVL31:
+ 279 00ca 04BC     		pop	{r2}
+ 280 00cc 9046     		mov	r8, r2
+ 281 00ce F0BD     		pop	{r4, r5, r6, r7, pc}
+ 282              		.cfi_endproc
+ 283              	.LFE84:
+ 285              		.section	.text.AES_CMAC_Final,"ax",%progbits
+ 286              		.align	1
+ 287              		.global	AES_CMAC_Final
+ 288              		.syntax unified
+ 289              		.code	16
+ 290              		.thumb_func
+ 291              		.fpu softvfp
+ 293              	AES_CMAC_Final:
+ 294              	.LFB85:
+ 104:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****    
+ 105:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** void AES_CMAC_Final(uint8_t digest[AES_CMAC_DIGEST_LENGTH], AES_CMAC_CTX *ctx)
+ 106:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** {
+ 295              		.loc 1 106 0
+ 296              		.cfi_startproc
+ 297              		@ args = 0, pretend = 0, frame = 32
+ 298              		@ frame_needed = 0, uses_anonymous_args = 0
+ARM GAS  /tmp/ccUuuSOT.s 			page 8
+
+
+ 299              	.LVL32:
+ 300 0000 70B5     		push	{r4, r5, r6, lr}
+ 301              	.LCFI5:
+ 302              		.cfi_def_cfa_offset 16
+ 303              		.cfi_offset 4, -16
+ 304              		.cfi_offset 5, -12
+ 305              		.cfi_offset 6, -8
+ 306              		.cfi_offset 14, -4
+ 307 0002 88B0     		sub	sp, sp, #32
+ 308              	.LCFI6:
+ 309              		.cfi_def_cfa_offset 48
+ 310 0004 0400     		movs	r4, r0
+ 311 0006 0D00     		movs	r5, r1
+ 107:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             uint8_t K[16];
+ 108:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****         uint8_t in[16];
+ 109:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             /* generate subkey K1 */
+ 110:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             memset1(K, '\0', 16);
+ 312              		.loc 1 110 0
+ 313 0008 04AE     		add	r6, sp, #16
+ 314 000a 1022     		movs	r2, #16
+ 315 000c 0021     		movs	r1, #0
+ 316              	.LVL33:
+ 317 000e 3000     		movs	r0, r6
+ 318              	.LVL34:
+ 319 0010 FFF7FEFF 		bl	memset1
+ 320              	.LVL35:
+ 111:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 112:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             //rijndael_encrypt(&ctx->rijndael, K, K);
+ 113:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 114:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             aes_encrypt( K, K, &ctx->rijndael);
+ 321              		.loc 1 114 0
+ 322 0014 2A00     		movs	r2, r5
+ 323 0016 3100     		movs	r1, r6
+ 324 0018 3000     		movs	r0, r6
+ 325 001a FFF7FEFF 		bl	aes_encrypt
+ 326              	.LVL36:
+ 115:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 116:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             if (K[0] & 0x80) {
+ 327              		.loc 1 116 0
+ 328 001e 0023     		movs	r3, #0
+ 329 0020 F356     		ldrsb	r3, [r6, r3]
+ 330 0022 002B     		cmp	r3, #0
+ 331 0024 15DB     		blt	.L36
+ 332              	.LBB5:
+ 117:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     LSHIFT(K, K);
+ 118:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                    K[15] ^= 0x87;
+ 119:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             } else
+ 120:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     LSHIFT(K, K);
+ 333              		.loc 1 120 0
+ 334 0026 0022     		movs	r2, #0
+ 335 0028 1EE0     		b	.L17
+ 336              	.LVL37:
+ 337              	.L18:
+ 338              	.LBE5:
+ 339              	.LBB6:
+ 117:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     LSHIFT(K, K);
+ 340              		.loc 1 117 0 discriminator 3
+ARM GAS  /tmp/ccUuuSOT.s 			page 9
+
+
+ 341 002a 04A9     		add	r1, sp, #16
+ 342 002c 885C     		ldrb	r0, [r1, r2]
+ 343 002e 4000     		lsls	r0, r0, #1
+ 344 0030 561C     		adds	r6, r2, #1
+ 345 0032 8B5D     		ldrb	r3, [r1, r6]
+ 346 0034 DB09     		lsrs	r3, r3, #7
+ 347 0036 0343     		orrs	r3, r0
+ 348 0038 8B54     		strb	r3, [r1, r2]
+ 349              	.LVL38:
+ 350 003a 3200     		movs	r2, r6
+ 351              	.LVL39:
+ 352              	.L16:
+ 117:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     LSHIFT(K, K);
+ 353              		.loc 1 117 0 is_stmt 0 discriminator 1
+ 354 003c 0E2A     		cmp	r2, #14
+ 355 003e F4DD     		ble	.L18
+ 117:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     LSHIFT(K, K);
+ 356              		.loc 1 117 0 discriminator 4
+ 357 0040 04A9     		add	r1, sp, #16
+ 358 0042 CB7B     		ldrb	r3, [r1, #15]
+ 359 0044 5B00     		lsls	r3, r3, #1
+ 360 0046 DBB2     		uxtb	r3, r3
+ 361              	.LBE6:
+ 118:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             } else
+ 362              		.loc 1 118 0 is_stmt 1 discriminator 4
+ 363 0048 7922     		movs	r2, #121
+ 364              	.LVL40:
+ 365 004a 5242     		rsbs	r2, r2, #0
+ 366 004c 5340     		eors	r3, r2
+ 367 004e CB73     		strb	r3, [r1, #15]
+ 368 0050 10E0     		b	.L19
+ 369              	.L36:
+ 370              	.LBB7:
+ 117:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     LSHIFT(K, K);
+ 371              		.loc 1 117 0
+ 372 0052 0022     		movs	r2, #0
+ 373 0054 F2E7     		b	.L16
+ 374              	.LVL41:
+ 375              	.L20:
+ 376              	.LBE7:
+ 377              	.LBB8:
+ 378              		.loc 1 120 0 discriminator 3
+ 379 0056 04A9     		add	r1, sp, #16
+ 380 0058 885C     		ldrb	r0, [r1, r2]
+ 381 005a 4000     		lsls	r0, r0, #1
+ 382 005c 561C     		adds	r6, r2, #1
+ 383 005e 8B5D     		ldrb	r3, [r1, r6]
+ 384 0060 DB09     		lsrs	r3, r3, #7
+ 385 0062 0343     		orrs	r3, r0
+ 386 0064 8B54     		strb	r3, [r1, r2]
+ 387              	.LVL42:
+ 388 0066 3200     		movs	r2, r6
+ 389              	.LVL43:
+ 390              	.L17:
+ 391              		.loc 1 120 0 is_stmt 0 discriminator 1
+ 392 0068 0E2A     		cmp	r2, #14
+ 393 006a F4DD     		ble	.L20
+ARM GAS  /tmp/ccUuuSOT.s 			page 10
+
+
+ 394              		.loc 1 120 0 discriminator 4
+ 395 006c 04AA     		add	r2, sp, #16
+ 396              	.LVL44:
+ 397 006e D37B     		ldrb	r3, [r2, #15]
+ 398 0070 5B00     		lsls	r3, r3, #1
+ 399 0072 D373     		strb	r3, [r2, #15]
+ 400              	.L19:
+ 401              	.LBE8:
+ 121:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 122:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 123:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****             if (ctx->M_n == 16) {
+ 402              		.loc 1 123 0 is_stmt 1
+ 403 0074 8A23     		movs	r3, #138
+ 404 0076 5B00     		lsls	r3, r3, #1
+ 405 0078 EB58     		ldr	r3, [r5, r3]
+ 406 007a 102B     		cmp	r3, #16
+ 407 007c 12D0     		beq	.L40
+ 124:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     /* last block was a complete block */
+ 125:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                     XOR(K, ctx->M_last);
+ 126:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 127:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****            } else {
+ 128:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                    /* generate subkey K2 */
+ 129:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                   if (K[0] & 0x80) {
+ 408              		.loc 1 129 0
+ 409 007e 04AB     		add	r3, sp, #16
+ 410 0080 1B78     		ldrb	r3, [r3]
+ 411 0082 5BB2     		sxtb	r3, r3
+ 412 0084 002B     		cmp	r3, #0
+ 413 0086 23DB     		blt	.L38
+ 414              	.LBB9:
+ 130:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                           LSHIFT(K, K);
+ 131:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                           K[15] ^= 0x87;
+ 132:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                   } else
+ 133:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                            LSHIFT(K, K);
+ 415              		.loc 1 133 0
+ 416 0088 0022     		movs	r2, #0
+ 417 008a 2CE0     		b	.L26
+ 418              	.LVL45:
+ 419              	.L23:
+ 420              	.LBE9:
+ 421              	.LBB10:
+ 125:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 422              		.loc 1 125 0 discriminator 3
+ 423 008c EA18     		adds	r2, r5, r3
+ 424 008e 0232     		adds	r2, r2, #2
+ 425 0090 FF32     		adds	r2, r2, #255
+ 426 0092 1178     		ldrb	r1, [r2]
+ 427 0094 04A8     		add	r0, sp, #16
+ 428 0096 C05C     		ldrb	r0, [r0, r3]
+ 429 0098 4140     		eors	r1, r0
+ 430 009a 1170     		strb	r1, [r2]
+ 431 009c 0133     		adds	r3, r3, #1
+ 432              	.LVL46:
+ 433              	.L21:
+ 125:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 434              		.loc 1 125 0 is_stmt 0 discriminator 1
+ 435 009e 0F2B     		cmp	r3, #15
+ARM GAS  /tmp/ccUuuSOT.s 			page 11
+
+
+ 436 00a0 F4DD     		ble	.L23
+ 437 00a2 48E0     		b	.L24
+ 438              	.LVL47:
+ 439              	.L40:
+ 125:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 440              		.loc 1 125 0
+ 441 00a4 0023     		movs	r3, #0
+ 442 00a6 FAE7     		b	.L21
+ 443              	.LVL48:
+ 444              	.L27:
+ 445              	.LBE10:
+ 446              	.LBB11:
+ 130:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                           LSHIFT(K, K);
+ 447              		.loc 1 130 0 is_stmt 1 discriminator 3
+ 448 00a8 04A9     		add	r1, sp, #16
+ 449 00aa 885C     		ldrb	r0, [r1, r2]
+ 450 00ac 4000     		lsls	r0, r0, #1
+ 451 00ae 561C     		adds	r6, r2, #1
+ 452 00b0 8B5D     		ldrb	r3, [r1, r6]
+ 453 00b2 DB09     		lsrs	r3, r3, #7
+ 454 00b4 0343     		orrs	r3, r0
+ 455 00b6 8B54     		strb	r3, [r1, r2]
+ 456              	.LVL49:
+ 457 00b8 3200     		movs	r2, r6
+ 458              	.LVL50:
+ 459              	.L25:
+ 130:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                           LSHIFT(K, K);
+ 460              		.loc 1 130 0 is_stmt 0 discriminator 1
+ 461 00ba 0E2A     		cmp	r2, #14
+ 462 00bc F4DD     		ble	.L27
+ 130:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                           LSHIFT(K, K);
+ 463              		.loc 1 130 0 discriminator 4
+ 464 00be 04A9     		add	r1, sp, #16
+ 465 00c0 CB7B     		ldrb	r3, [r1, #15]
+ 466 00c2 5B00     		lsls	r3, r3, #1
+ 467 00c4 DBB2     		uxtb	r3, r3
+ 468              	.LBE11:
+ 131:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                   } else
+ 469              		.loc 1 131 0 is_stmt 1 discriminator 4
+ 470 00c6 7922     		movs	r2, #121
+ 471              	.LVL51:
+ 472 00c8 5242     		rsbs	r2, r2, #0
+ 473 00ca 5340     		eors	r3, r2
+ 474 00cc CB73     		strb	r3, [r1, #15]
+ 475 00ce 10E0     		b	.L28
+ 476              	.L38:
+ 477              	.LBB12:
+ 130:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                           LSHIFT(K, K);
+ 478              		.loc 1 130 0
+ 479 00d0 0022     		movs	r2, #0
+ 480 00d2 F2E7     		b	.L25
+ 481              	.LVL52:
+ 482              	.L29:
+ 483              	.LBE12:
+ 484              	.LBB13:
+ 485              		.loc 1 133 0 discriminator 3
+ 486 00d4 04A9     		add	r1, sp, #16
+ARM GAS  /tmp/ccUuuSOT.s 			page 12
+
+
+ 487 00d6 885C     		ldrb	r0, [r1, r2]
+ 488 00d8 4000     		lsls	r0, r0, #1
+ 489 00da 561C     		adds	r6, r2, #1
+ 490 00dc 8B5D     		ldrb	r3, [r1, r6]
+ 491 00de DB09     		lsrs	r3, r3, #7
+ 492 00e0 0343     		orrs	r3, r0
+ 493 00e2 8B54     		strb	r3, [r1, r2]
+ 494              	.LVL53:
+ 495 00e4 3200     		movs	r2, r6
+ 496              	.LVL54:
+ 497              	.L26:
+ 498              		.loc 1 133 0 is_stmt 0 discriminator 1
+ 499 00e6 0E2A     		cmp	r2, #14
+ 500 00e8 F4DD     		ble	.L29
+ 501              		.loc 1 133 0 discriminator 4
+ 502 00ea 04AA     		add	r2, sp, #16
+ 503              	.LVL55:
+ 504 00ec D37B     		ldrb	r3, [r2, #15]
+ 505 00ee 5B00     		lsls	r3, r3, #1
+ 506 00f0 D373     		strb	r3, [r2, #15]
+ 507              	.L28:
+ 508              	.LBE13:
+ 134:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 135:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                    /* padding(M_last) */
+ 136:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                    ctx->M_last[ctx->M_n] = 0x80;
+ 509              		.loc 1 136 0 is_stmt 1
+ 510 00f2 8A23     		movs	r3, #138
+ 511 00f4 5B00     		lsls	r3, r3, #1
+ 512 00f6 EB58     		ldr	r3, [r5, r3]
+ 513 00f8 EB18     		adds	r3, r5, r3
+ 514 00fa 0233     		adds	r3, r3, #2
+ 515 00fc FF33     		adds	r3, r3, #255
+ 516 00fe 8022     		movs	r2, #128
+ 517 0100 1A70     		strb	r2, [r3]
+ 137:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                    while (++ctx->M_n < 16)
+ 518              		.loc 1 137 0
+ 519 0102 04E0     		b	.L30
+ 520              	.L31:
+ 138:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                          ctx->M_last[ctx->M_n] = 0;
+ 521              		.loc 1 138 0
+ 522 0104 EB18     		adds	r3, r5, r3
+ 523 0106 0233     		adds	r3, r3, #2
+ 524 0108 FF33     		adds	r3, r3, #255
+ 525 010a 0022     		movs	r2, #0
+ 526 010c 1A70     		strb	r2, [r3]
+ 527              	.L30:
+ 137:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                    while (++ctx->M_n < 16)
+ 528              		.loc 1 137 0
+ 529 010e 8A22     		movs	r2, #138
+ 530 0110 5200     		lsls	r2, r2, #1
+ 531 0112 AB58     		ldr	r3, [r5, r2]
+ 532 0114 0133     		adds	r3, r3, #1
+ 533 0116 AB50     		str	r3, [r5, r2]
+ 534 0118 0F2B     		cmp	r3, #15
+ 535 011a F3D9     		bls	.L31
+ 536              	.LBB14:
+ 139:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****    
+ARM GAS  /tmp/ccUuuSOT.s 			page 13
+
+
+ 140:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****                   XOR(K, ctx->M_last);
+ 537              		.loc 1 140 0
+ 538 011c 0023     		movs	r3, #0
+ 539 011e 08E0     		b	.L32
+ 540              	.LVL56:
+ 541              	.L33:
+ 542              		.loc 1 140 0 is_stmt 0 discriminator 3
+ 543 0120 EA18     		adds	r2, r5, r3
+ 544 0122 0232     		adds	r2, r2, #2
+ 545 0124 FF32     		adds	r2, r2, #255
+ 546 0126 1178     		ldrb	r1, [r2]
+ 547 0128 04A8     		add	r0, sp, #16
+ 548 012a C05C     		ldrb	r0, [r0, r3]
+ 549 012c 4140     		eors	r1, r0
+ 550 012e 1170     		strb	r1, [r2]
+ 551 0130 0133     		adds	r3, r3, #1
+ 552              	.LVL57:
+ 553              	.L32:
+ 554              		.loc 1 140 0 discriminator 1
+ 555 0132 0F2B     		cmp	r3, #15
+ 556 0134 F4DD     		ble	.L33
+ 557              	.LVL58:
+ 558              	.L24:
+ 559 0136 0022     		movs	r2, #0
+ 560 0138 09E0     		b	.L34
+ 561              	.LVL59:
+ 562              	.L35:
+ 563              	.LBE14:
+ 564              	.LBB15:
+ 141:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 142:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 143:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****            }
+ 144:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****            XOR(ctx->M_last, ctx->X);
+ 565              		.loc 1 144 0 is_stmt 1 discriminator 3
+ 566 013a AB18     		adds	r3, r5, r2
+ 567 013c 1800     		movs	r0, r3
+ 568 013e F130     		adds	r0, r0, #241
+ 569 0140 0178     		ldrb	r1, [r0]
+ 570 0142 0233     		adds	r3, r3, #2
+ 571 0144 FF33     		adds	r3, r3, #255
+ 572 0146 1B78     		ldrb	r3, [r3]
+ 573 0148 4B40     		eors	r3, r1
+ 574 014a 0370     		strb	r3, [r0]
+ 575 014c 0132     		adds	r2, r2, #1
+ 576              	.LVL60:
+ 577              	.L34:
+ 578              		.loc 1 144 0 is_stmt 0 discriminator 1
+ 579 014e 0F2A     		cmp	r2, #15
+ 580 0150 F3DD     		ble	.L35
+ 581              	.LBE15:
+ 145:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 146:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****            //rijndael_encrypt(&ctx->rijndael, ctx->X, digest);
+ 147:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 148:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****        memcpy1(in, &ctx->X[0], 16); //Bestela ez du ondo iten
+ 582              		.loc 1 148 0 is_stmt 1
+ 583 0152 2900     		movs	r1, r5
+ 584 0154 F131     		adds	r1, r1, #241
+ARM GAS  /tmp/ccUuuSOT.s 			page 14
+
+
+ 585 0156 1022     		movs	r2, #16
+ 586              	.LVL61:
+ 587 0158 6846     		mov	r0, sp
+ 588 015a FFF7FEFF 		bl	memcpy1
+ 589              	.LVL62:
+ 149:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****        aes_encrypt(in, digest, &ctx->rijndael);
+ 590              		.loc 1 149 0
+ 591 015e 2A00     		movs	r2, r5
+ 592 0160 2100     		movs	r1, r4
+ 593 0162 6846     		mov	r0, sp
+ 594 0164 FFF7FEFF 		bl	aes_encrypt
+ 595              	.LVL63:
+ 150:./Middlewares/Third_Party/Lora/Crypto/cmac.c ****            memset1(K, 0, sizeof K);
+ 596              		.loc 1 150 0
+ 597 0168 1022     		movs	r2, #16
+ 598 016a 0021     		movs	r1, #0
+ 599 016c 04A8     		add	r0, sp, #16
+ 600 016e FFF7FEFF 		bl	memset1
+ 601              	.LVL64:
+ 151:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** 
+ 152:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** }
+ 602              		.loc 1 152 0
+ 603 0172 08B0     		add	sp, sp, #32
+ 604              		@ sp needed
+ 605              	.LVL65:
+ 606              	.LVL66:
+ 607 0174 70BD     		pop	{r4, r5, r6, pc}
+ 608              		.cfi_endproc
+ 609              	.LFE85:
+ 611              		.text
+ 612              	.Letext0:
+ 613              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
+ 614              		.file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
+ 615              		.file 4 "./Middlewares/Third_Party/Lora/Crypto/aes.h"
+ 616              		.file 5 "./Middlewares/Third_Party/Lora/Crypto/cmac.h"
+ 617              		.file 6 "/usr/arm-none-eabi/include/sys/lock.h"
+ 618              		.file 7 "/usr/arm-none-eabi/include/sys/_types.h"
+ 619              		.file 8 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+ 620              		.file 9 "/usr/arm-none-eabi/include/sys/reent.h"
+ 621              		.file 10 "/usr/arm-none-eabi/include/math.h"
+ 622              		.file 11 "Middlewares/Third_Party/Lora/Utilities/utilities.h"
+ARM GAS  /tmp/ccUuuSOT.s 			page 15
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 cmac.c
+     /tmp/ccUuuSOT.s:16     .text.AES_CMAC_Init:0000000000000000 $t
+     /tmp/ccUuuSOT.s:23     .text.AES_CMAC_Init:0000000000000000 AES_CMAC_Init
+     /tmp/ccUuuSOT.s:63     .text.AES_CMAC_SetKey:0000000000000000 $t
+     /tmp/ccUuuSOT.s:70     .text.AES_CMAC_SetKey:0000000000000000 AES_CMAC_SetKey
+     /tmp/ccUuuSOT.s:97     .text.AES_CMAC_Update:0000000000000000 $t
+     /tmp/ccUuuSOT.s:104    .text.AES_CMAC_Update:0000000000000000 AES_CMAC_Update
+     /tmp/ccUuuSOT.s:286    .text.AES_CMAC_Final:0000000000000000 $t
+     /tmp/ccUuuSOT.s:293    .text.AES_CMAC_Final:0000000000000000 AES_CMAC_Final
+                     .debug_frame:0000000000000010 $d
+
+UNDEFINED SYMBOLS
+memset1
+aes_set_key
+memcpy1
+aes_encrypt

build/debug.d

@@ -0,0 +1,135 @@
+build/debug.d: Src/debug.c Inc/hw.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \
+ Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \
+ Inc/hw_spi.h Inc/hw_rtc.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Inc/hw_msp.h Inc/debug.h Inc/vcom.h
+
+Inc/hw.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:
+
+Inc/stm32l0xx_hw_conf.h:
+
+Inc/hw.h:
+
+Inc/hw_conf.h:
+
+Inc/hw_gpio.h:
+
+Inc/hw_spi.h:
+
+Inc/hw_rtc.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Inc/hw_msp.h:
+
+Inc/debug.h:
+
+Inc/vcom.h:

build/debug.lst

@@ -0,0 +1,326 @@
+ARM GAS  /tmp/ccWwZZVi.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"debug.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              		.section	.text.DBG_Init,"ax",%progbits
+  16              		.align	1
+  17              		.global	DBG_Init
+  18              		.syntax unified
+  19              		.code	16
+  20              		.thumb_func
+  21              		.fpu softvfp
+  23              	DBG_Init:
+  24              	.LFB96:
+  25              		.file 1 "./Src/debug.c"
+   1:./Src/debug.c **** 
+   2:./Src/debug.c **** /******************************************************************************
+   3:./Src/debug.c ****   * @file    debug.c
+   4:./Src/debug.c ****   * @author  MCD Application Team
+   5:./Src/debug.c ****   * @version V1.1.2
+   6:./Src/debug.c ****   * @date    08-September-2017
+   7:./Src/debug.c ****   * @brief   debug API
+   8:./Src/debug.c ****   ******************************************************************************
+   9:./Src/debug.c ****   * @attention
+  10:./Src/debug.c ****   *
+  11:./Src/debug.c ****   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics International N.V. 
+  12:./Src/debug.c ****   * All rights reserved.</center></h2>
+  13:./Src/debug.c ****   *
+  14:./Src/debug.c ****   * Redistribution and use in source and binary forms, with or without 
+  15:./Src/debug.c ****   * modification, are permitted, provided that the following conditions are met:
+  16:./Src/debug.c ****   *
+  17:./Src/debug.c ****   * 1. Redistribution of source code must retain the above copyright notice, 
+  18:./Src/debug.c ****   *    this list of conditions and the following disclaimer.
+  19:./Src/debug.c ****   * 2. Redistributions in binary form must reproduce the above copyright notice,
+  20:./Src/debug.c ****   *    this list of conditions and the following disclaimer in the documentation
+  21:./Src/debug.c ****   *    and/or other materials provided with the distribution.
+  22:./Src/debug.c ****   * 3. Neither the name of STMicroelectronics nor the names of other 
+  23:./Src/debug.c ****   *    contributors to this software may be used to endorse or promote products 
+  24:./Src/debug.c ****   *    derived from this software without specific written permission.
+  25:./Src/debug.c ****   * 4. This software, including modifications and/or derivative works of this 
+  26:./Src/debug.c ****   *    software, must execute solely and exclusively on microcontroller or
+  27:./Src/debug.c ****   *    microprocessor devices manufactured by or for STMicroelectronics.
+  28:./Src/debug.c ****   * 5. Redistribution and use of this software other than as permitted under 
+  29:./Src/debug.c ****   *    this license is void and will automatically terminate your rights under 
+  30:./Src/debug.c ****   *    this license. 
+  31:./Src/debug.c ****   *
+  32:./Src/debug.c ****   * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" 
+  33:./Src/debug.c ****   * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT 
+ARM GAS  /tmp/ccWwZZVi.s 			page 2
+
+
+  34:./Src/debug.c ****   * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A 
+  35:./Src/debug.c ****   * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
+  36:./Src/debug.c ****   * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT 
+  37:./Src/debug.c ****   * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+  38:./Src/debug.c ****   * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  39:./Src/debug.c ****   * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+  40:./Src/debug.c ****   * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 
+  41:./Src/debug.c ****   * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 
+  42:./Src/debug.c ****   * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+  43:./Src/debug.c ****   * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  44:./Src/debug.c ****   *
+  45:./Src/debug.c ****   ******************************************************************************
+  46:./Src/debug.c ****   */
+  47:./Src/debug.c **** 
+  48:./Src/debug.c **** /* Includes ------------------------------------------------------------------*/
+  49:./Src/debug.c **** #include "hw.h"
+  50:./Src/debug.c **** 
+  51:./Src/debug.c **** /**
+  52:./Src/debug.c ****   * @brief Initializes the debug
+  53:./Src/debug.c ****   * @param None
+  54:./Src/debug.c ****   * @retval None
+  55:./Src/debug.c ****   */
+  56:./Src/debug.c **** void DBG_Init( void )
+  57:./Src/debug.c **** {
+  26              		.loc 1 57 0
+  27              		.cfi_startproc
+  28              		@ args = 0, pretend = 0, frame = 24
+  29              		@ frame_needed = 0, uses_anonymous_args = 0
+  30 0000 30B5     		push	{r4, r5, lr}
+  31              	.LCFI0:
+  32              		.cfi_def_cfa_offset 12
+  33              		.cfi_offset 4, -12
+  34              		.cfi_offset 5, -8
+  35              		.cfi_offset 14, -4
+  36 0002 87B0     		sub	sp, sp, #28
+  37              	.LCFI1:
+  38              		.cfi_def_cfa_offset 40
+  58:./Src/debug.c **** #ifdef DEBUG
+  59:./Src/debug.c ****   GPIO_InitTypeDef  gpioinitstruct = {0};
+  60:./Src/debug.c ****   
+  61:./Src/debug.c ****   /* Enable the GPIO_B Clock */
+  62:./Src/debug.c ****   __HAL_RCC_GPIOB_CLK_ENABLE();
+  63:./Src/debug.c **** 
+  64:./Src/debug.c ****   /* Configure the GPIO pin */  
+  65:./Src/debug.c ****   gpioinitstruct.Mode   = GPIO_MODE_OUTPUT_PP;
+  66:./Src/debug.c ****   gpioinitstruct.Pull   = GPIO_PULLUP;
+  67:./Src/debug.c ****   gpioinitstruct.Speed  = GPIO_SPEED_HIGH;
+  68:./Src/debug.c ****   
+  69:./Src/debug.c ****   gpioinitstruct.Pin    = (GPIO_PIN_12 | GPIO_PIN_13| GPIO_PIN_14 | GPIO_PIN_15);
+  70:./Src/debug.c ****   HAL_GPIO_Init(GPIOB, &gpioinitstruct);
+  71:./Src/debug.c **** 
+  72:./Src/debug.c ****   /* Reset debug Pins */
+  73:./Src/debug.c ****   HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET);
+  74:./Src/debug.c ****   HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, GPIO_PIN_RESET);
+  75:./Src/debug.c ****   HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, GPIO_PIN_RESET);
+  76:./Src/debug.c ****   HAL_GPIO_WritePin(GPIOB, GPIO_PIN_15, GPIO_PIN_RESET);
+  77:./Src/debug.c **** #if 0
+ARM GAS  /tmp/ccWwZZVi.s 			page 3
+
+
+  78:./Src/debug.c ****   HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_1);  
+  79:./Src/debug.c **** #endif
+  80:./Src/debug.c **** 
+  81:./Src/debug.c ****   __HAL_RCC_DBGMCU_CLK_ENABLE( );
+  82:./Src/debug.c **** 
+  83:./Src/debug.c ****   HAL_DBGMCU_EnableDBGSleepMode( );
+  84:./Src/debug.c ****   HAL_DBGMCU_EnableDBGStopMode( );
+  85:./Src/debug.c ****   HAL_DBGMCU_EnableDBGStandbyMode( );
+  86:./Src/debug.c ****   
+  87:./Src/debug.c **** #else /* DEBUG */
+  88:./Src/debug.c ****   /* sw interface off*/
+  89:./Src/debug.c ****   GPIO_InitTypeDef GPIO_InitStructure ={0};
+  39              		.loc 1 89 0
+  40 0004 0C22     		movs	r2, #12
+  41 0006 0021     		movs	r1, #0
+  42 0008 03A8     		add	r0, sp, #12
+  43 000a FFF7FEFF 		bl	memset
+  44              	.LVL0:
+  90:./Src/debug.c ****   
+  91:./Src/debug.c ****   GPIO_InitStructure.Mode   = GPIO_MODE_ANALOG;
+  45              		.loc 1 91 0
+  46 000e 0323     		movs	r3, #3
+  47 0010 0293     		str	r3, [sp, #8]
+  92:./Src/debug.c ****   GPIO_InitStructure.Pull   = GPIO_NOPULL;
+  93:./Src/debug.c ****   GPIO_InitStructure.Pin    = (GPIO_PIN_13 | GPIO_PIN_14);
+  48              		.loc 1 93 0
+  49 0012 C023     		movs	r3, #192
+  50 0014 DB01     		lsls	r3, r3, #7
+  51 0016 0193     		str	r3, [sp, #4]
+  52              	.LBB2:
+  94:./Src/debug.c ****   __GPIOA_CLK_ENABLE() ;  
+  53              		.loc 1 94 0
+  54 0018 104C     		ldr	r4, .L2
+  55 001a E36A     		ldr	r3, [r4, #44]
+  56 001c 0125     		movs	r5, #1
+  57 001e 2B43     		orrs	r3, r5
+  58 0020 E362     		str	r3, [r4, #44]
+  59 0022 E36A     		ldr	r3, [r4, #44]
+  60 0024 2B40     		ands	r3, r5
+  61 0026 0093     		str	r3, [sp]
+  62 0028 009B     		ldr	r3, [sp]
+  63              	.LBE2:
+  95:./Src/debug.c ****   HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
+  64              		.loc 1 95 0
+  65 002a A020     		movs	r0, #160
+  66 002c 01A9     		add	r1, sp, #4
+  67 002e C005     		lsls	r0, r0, #23
+  68 0030 FFF7FEFF 		bl	HAL_GPIO_Init
+  69              	.LVL1:
+  96:./Src/debug.c ****   __GPIOA_CLK_DISABLE() ;
+  70              		.loc 1 96 0
+  71 0034 E36A     		ldr	r3, [r4, #44]
+  72 0036 AB43     		bics	r3, r5
+  73 0038 E362     		str	r3, [r4, #44]
+  97:./Src/debug.c ****   
+  98:./Src/debug.c ****   __HAL_RCC_DBGMCU_CLK_ENABLE( );
+  74              		.loc 1 98 0
+ARM GAS  /tmp/ccWwZZVi.s 			page 4
+
+
+  75 003a 626B     		ldr	r2, [r4, #52]
+  76 003c 8023     		movs	r3, #128
+  77 003e DB03     		lsls	r3, r3, #15
+  78 0040 1343     		orrs	r3, r2
+  79 0042 6363     		str	r3, [r4, #52]
+  99:./Src/debug.c ****   HAL_DBGMCU_DisableDBGSleepMode( );
+  80              		.loc 1 99 0
+  81 0044 FFF7FEFF 		bl	HAL_DBGMCU_DisableDBGSleepMode
+  82              	.LVL2:
+ 100:./Src/debug.c ****   HAL_DBGMCU_DisableDBGStopMode( );
+  83              		.loc 1 100 0
+  84 0048 FFF7FEFF 		bl	HAL_DBGMCU_DisableDBGStopMode
+  85              	.LVL3:
+ 101:./Src/debug.c ****   HAL_DBGMCU_DisableDBGStandbyMode( );
+  86              		.loc 1 101 0
+  87 004c FFF7FEFF 		bl	HAL_DBGMCU_DisableDBGStandbyMode
+  88              	.LVL4:
+ 102:./Src/debug.c ****   __HAL_RCC_DBGMCU_CLK_DISABLE( );
+  89              		.loc 1 102 0
+  90 0050 636B     		ldr	r3, [r4, #52]
+  91 0052 034A     		ldr	r2, .L2+4
+  92 0054 1340     		ands	r3, r2
+  93 0056 6363     		str	r3, [r4, #52]
+ 103:./Src/debug.c **** #endif
+ 104:./Src/debug.c **** }
+  94              		.loc 1 104 0
+  95 0058 07B0     		add	sp, sp, #28
+  96              		@ sp needed
+  97 005a 30BD     		pop	{r4, r5, pc}
+  98              	.L3:
+  99              		.align	2
+ 100              	.L2:
+ 101 005c 00100240 		.word	1073876992
+ 102 0060 FFFFBFFF 		.word	-4194305
+ 103              		.cfi_endproc
+ 104              	.LFE96:
+ 106              		.section	.text._Error_Handler,"ax",%progbits
+ 107              		.align	1
+ 108              		.global	_Error_Handler
+ 109              		.syntax unified
+ 110              		.code	16
+ 111              		.thumb_func
+ 112              		.fpu softvfp
+ 114              	_Error_Handler:
+ 115              	.LFB97:
+ 105:./Src/debug.c **** 
+ 106:./Src/debug.c **** #if 0
+ 107:./Src/debug.c **** /**
+ 108:./Src/debug.c ****   * @brief Error_Handler
+ 109:./Src/debug.c ****   * @param None
+ 110:./Src/debug.c ****   * @retval None
+ 111:./Src/debug.c ****   */
+ 112:./Src/debug.c **** void Error_Handler(void)
+ 113:./Src/debug.c **** {
+ 114:./Src/debug.c ****   DBG_PRINTF("Error_Handler\n\r");
+ 115:./Src/debug.c ****   while(1);
+ 116:./Src/debug.c **** }
+ARM GAS  /tmp/ccWwZZVi.s 			page 5
+
+
+ 117:./Src/debug.c **** #endif
+ 118:./Src/debug.c **** 
+ 119:./Src/debug.c **** void _Error_Handler(char * file, int line)
+ 120:./Src/debug.c **** {
+ 116              		.loc 1 120 0
+ 117              		.cfi_startproc
+ 118              		@ args = 0, pretend = 0, frame = 0
+ 119              		@ frame_needed = 0, uses_anonymous_args = 0
+ 120              	.LVL5:
+ 121 0000 10B5     		push	{r4, lr}
+ 122              	.LCFI2:
+ 123              		.cfi_def_cfa_offset 8
+ 124              		.cfi_offset 4, -8
+ 125              		.cfi_offset 14, -4
+ 121:./Src/debug.c ****   /* USER CODE BEGIN Error_Handler_Debug */
+ 122:./Src/debug.c ****   PRINTF("INIT ERROR, %s:%d", file, (uint16_t) line);
+ 126              		.loc 1 122 0
+ 127 0002 0A04     		lsls	r2, r1, #16
+ 128 0004 120C     		lsrs	r2, r2, #16
+ 129 0006 0100     		movs	r1, r0
+ 130              	.LVL6:
+ 131 0008 0148     		ldr	r0, .L5
+ 132              	.LVL7:
+ 133 000a FFF7FEFF 		bl	vcom_Send
+ 134              	.LVL8:
+ 123:./Src/debug.c ****   /* USER CODE END Error_Handler_Debug */
+ 124:./Src/debug.c **** }
+ 135              		.loc 1 124 0
+ 136              		@ sp needed
+ 137 000e 10BD     		pop	{r4, pc}
+ 138              	.L6:
+ 139              		.align	2
+ 140              	.L5:
+ 141 0010 00000000 		.word	.LC0
+ 142              		.cfi_endproc
+ 143              	.LFE97:
+ 145              		.section	.rodata._Error_Handler.str1.4,"aMS",%progbits,1
+ 146              		.align	2
+ 147              	.LC0:
+ 148 0000 494E4954 		.ascii	"INIT ERROR, %s:%d\000"
+ 148      20455252 
+ 148      4F522C20 
+ 148      25733A25 
+ 148      6400
+ 149              		.text
+ 150              	.Letext0:
+ 151              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
+ 152              		.file 3 "/usr/arm-none-eabi/include/sys/lock.h"
+ 153              		.file 4 "/usr/arm-none-eabi/include/sys/_types.h"
+ 154              		.file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+ 155              		.file 6 "/usr/arm-none-eabi/include/sys/reent.h"
+ 156              		.file 7 "/usr/arm-none-eabi/include/math.h"
+ 157              		.file 8 "/usr/arm-none-eabi/include/sys/_stdint.h"
+ 158              		.file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+ 159              		.file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
+ 160              		.file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h"
+ 161              		.file 12 "Inc/vcom.h"
+ARM GAS  /tmp/ccWwZZVi.s 			page 6
+
+
+ 162              		.file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h"
+ 163              		.file 14 "<built-in>"
+ARM GAS  /tmp/ccWwZZVi.s 			page 7
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 debug.c
+     /tmp/ccWwZZVi.s:16     .text.DBG_Init:0000000000000000 $t
+     /tmp/ccWwZZVi.s:23     .text.DBG_Init:0000000000000000 DBG_Init
+     /tmp/ccWwZZVi.s:101    .text.DBG_Init:000000000000005c $d
+     /tmp/ccWwZZVi.s:107    .text._Error_Handler:0000000000000000 $t
+     /tmp/ccWwZZVi.s:114    .text._Error_Handler:0000000000000000 _Error_Handler
+     /tmp/ccWwZZVi.s:141    .text._Error_Handler:0000000000000010 $d
+     /tmp/ccWwZZVi.s:146    .rodata._Error_Handler.str1.4:0000000000000000 $d
+                     .debug_frame:0000000000000010 $d
+
+UNDEFINED SYMBOLS
+memset
+HAL_GPIO_Init
+HAL_DBGMCU_DisableDBGSleepMode
+HAL_DBGMCU_DisableDBGStopMode
+HAL_DBGMCU_DisableDBGStandbyMode
+vcom_Send

build/delay.d

@@ -0,0 +1,141 @@
+build/delay.d: Middlewares/Third_Party/Lora/Utilities/delay.c Inc/hw.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \
+ Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \
+ Inc/hw_spi.h Inc/hw_rtc.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Inc/hw_msp.h Inc/debug.h Inc/vcom.h \
+ Middlewares/Third_Party/Lora/Utilities/timeServer.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h
+
+Inc/hw.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:
+
+Inc/stm32l0xx_hw_conf.h:
+
+Inc/hw.h:
+
+Inc/hw_conf.h:
+
+Inc/hw_gpio.h:
+
+Inc/hw_spi.h:
+
+Inc/hw_rtc.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Inc/hw_msp.h:
+
+Inc/debug.h:
+
+Inc/vcom.h:
+
+Middlewares/Third_Party/Lora/Utilities/timeServer.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:

build/delay.lst

@@ -0,0 +1,199 @@
+ARM GAS  /tmp/ccRLwJE7.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"delay.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              		.section	.text.DelayMs,"ax",%progbits
+  16              		.align	1
+  17              		.global	DelayMs
+  18              		.syntax unified
+  19              		.code	16
+  20              		.thumb_func
+  21              		.fpu softvfp
+  23              	DelayMs:
+  24              	.LFB96:
+  25              		.file 1 "./Middlewares/Third_Party/Lora/Utilities/delay.c"
+   1:./Middlewares/Third_Party/Lora/Utilities/delay.c **** /*
+   2:./Middlewares/Third_Party/Lora/Utilities/delay.c ****  / _____)             _              | |
+   3:./Middlewares/Third_Party/Lora/Utilities/delay.c **** ( (____  _____ ____ _| |_ _____  ____| |__
+   4:./Middlewares/Third_Party/Lora/Utilities/delay.c ****  \____ \| ___ |    (_   _) ___ |/ ___)  _ \
+   5:./Middlewares/Third_Party/Lora/Utilities/delay.c ****  _____) ) ____| | | || |_| ____( (___| | | |
+   6:./Middlewares/Third_Party/Lora/Utilities/delay.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_|
+   7:./Middlewares/Third_Party/Lora/Utilities/delay.c ****     (C)2013 Semtech
+   8:./Middlewares/Third_Party/Lora/Utilities/delay.c **** 
+   9:./Middlewares/Third_Party/Lora/Utilities/delay.c **** Description: Delay functions implementation
+  10:./Middlewares/Third_Party/Lora/Utilities/delay.c **** 
+  11:./Middlewares/Third_Party/Lora/Utilities/delay.c **** License: Revised BSD License, see LICENSE.TXT file include in the project
+  12:./Middlewares/Third_Party/Lora/Utilities/delay.c **** 
+  13:./Middlewares/Third_Party/Lora/Utilities/delay.c **** Maintainer: Miguel Luis and Gregory Cristian
+  14:./Middlewares/Third_Party/Lora/Utilities/delay.c **** */
+  15:./Middlewares/Third_Party/Lora/Utilities/delay.c **** /******************************************************************************
+  16:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * @file    delay.c
+  17:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * @author  MCD Application Team
+  18:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * @version V1.1.2
+  19:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * @date    08-September-2017
+  20:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * @brief   Delay function
+  21:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   ******************************************************************************
+  22:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * @attention
+  23:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *
+  24:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics International N.V. 
+  25:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * All rights reserved.</center></h2>
+  26:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *
+  27:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * Redistribution and use in source and binary forms, with or without 
+  28:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * modification, are permitted, provided that the following conditions are met:
+  29:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *
+  30:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * 1. Redistribution of source code must retain the above copyright notice, 
+  31:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *    this list of conditions and the following disclaimer.
+  32:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * 2. Redistributions in binary form must reproduce the above copyright notice,
+  33:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *    this list of conditions and the following disclaimer in the documentation
+ARM GAS  /tmp/ccRLwJE7.s 			page 2
+
+
+  34:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *    and/or other materials provided with the distribution.
+  35:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * 3. Neither the name of STMicroelectronics nor the names of other 
+  36:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *    contributors to this software may be used to endorse or promote products 
+  37:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *    derived from this software without specific written permission.
+  38:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * 4. This software, including modifications and/or derivative works of this 
+  39:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *    software, must execute solely and exclusively on microcontroller or
+  40:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *    microprocessor devices manufactured by or for STMicroelectronics.
+  41:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * 5. Redistribution and use of this software other than as permitted under 
+  42:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *    this license is void and will automatically terminate your rights under 
+  43:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *    this license. 
+  44:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *
+  45:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" 
+  46:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT 
+  47:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A 
+  48:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
+  49:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT 
+  50:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+  51:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  52:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+  53:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 
+  54:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 
+  55:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+  56:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  57:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   *
+  58:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   ******************************************************************************
+  59:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   */
+  60:./Middlewares/Third_Party/Lora/Utilities/delay.c **** 
+  61:./Middlewares/Third_Party/Lora/Utilities/delay.c **** /* Includes ------------------------------------------------------------------*/
+  62:./Middlewares/Third_Party/Lora/Utilities/delay.c **** #include "hw.h"
+  63:./Middlewares/Third_Party/Lora/Utilities/delay.c **** #include "timeServer.h"
+  64:./Middlewares/Third_Party/Lora/Utilities/delay.c **** 
+  65:./Middlewares/Third_Party/Lora/Utilities/delay.c **** void DelayMs( uint32_t ms )
+  66:./Middlewares/Third_Party/Lora/Utilities/delay.c **** {
+  26              		.loc 1 66 0
+  27              		.cfi_startproc
+  28              		@ args = 0, pretend = 0, frame = 0
+  29              		@ frame_needed = 0, uses_anonymous_args = 0
+  30              	.LVL0:
+  31 0000 10B5     		push	{r4, lr}
+  32              	.LCFI0:
+  33              		.cfi_def_cfa_offset 8
+  34              		.cfi_offset 4, -8
+  35              		.cfi_offset 14, -4
+  67:./Middlewares/Third_Party/Lora/Utilities/delay.c ****   HW_RTC_DelayMs( ms );
+  36              		.loc 1 67 0
+  37 0002 FFF7FEFF 		bl	HW_RTC_DelayMs
+  38              	.LVL1:
+  68:./Middlewares/Third_Party/Lora/Utilities/delay.c **** 
+  69:./Middlewares/Third_Party/Lora/Utilities/delay.c **** }
+  39              		.loc 1 69 0
+  40              		@ sp needed
+  41 0006 10BD     		pop	{r4, pc}
+  42              		.cfi_endproc
+  43              	.LFE96:
+  45              		.global	__aeabi_fmul
+  46              		.global	__aeabi_f2uiz
+  47              		.section	.text.Delay,"ax",%progbits
+ARM GAS  /tmp/ccRLwJE7.s 			page 3
+
+
+  48              		.align	1
+  49              		.global	Delay
+  50              		.syntax unified
+  51              		.code	16
+  52              		.thumb_func
+  53              		.fpu softvfp
+  55              	Delay:
+  56              	.LFB97:
+  70:./Middlewares/Third_Party/Lora/Utilities/delay.c **** 
+  71:./Middlewares/Third_Party/Lora/Utilities/delay.c **** void Delay( float s )
+  72:./Middlewares/Third_Party/Lora/Utilities/delay.c **** {
+  57              		.loc 1 72 0
+  58              		.cfi_startproc
+  59              		@ args = 0, pretend = 0, frame = 0
+  60              		@ frame_needed = 0, uses_anonymous_args = 0
+  61              	.LVL2:
+  62 0000 10B5     		push	{r4, lr}
+  63              	.LCFI1:
+  64              		.cfi_def_cfa_offset 8
+  65              		.cfi_offset 4, -8
+  66              		.cfi_offset 14, -4
+  73:./Middlewares/Third_Party/Lora/Utilities/delay.c ****     DelayMs( (uint32_t) (s * 1000.0f) );
+  67              		.loc 1 73 0
+  68 0002 0449     		ldr	r1, .L3
+  69 0004 FFF7FEFF 		bl	__aeabi_fmul
+  70              	.LVL3:
+  71 0008 FFF7FEFF 		bl	__aeabi_f2uiz
+  72              	.LVL4:
+  73              	.LBB4:
+  74              	.LBB5:
+  67:./Middlewares/Third_Party/Lora/Utilities/delay.c **** 
+  75              		.loc 1 67 0
+  76 000c FFF7FEFF 		bl	HW_RTC_DelayMs
+  77              	.LVL5:
+  78              	.LBE5:
+  79              	.LBE4:
+  74:./Middlewares/Third_Party/Lora/Utilities/delay.c **** }
+  80              		.loc 1 74 0
+  81              		@ sp needed
+  82 0010 10BD     		pop	{r4, pc}
+  83              	.L4:
+  84 0012 C046     		.align	2
+  85              	.L3:
+  86 0014 00007A44 		.word	1148846080
+  87              		.cfi_endproc
+  88              	.LFE97:
+  90              		.text
+  91              	.Letext0:
+  92              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
+  93              		.file 3 "/usr/arm-none-eabi/include/sys/lock.h"
+  94              		.file 4 "/usr/arm-none-eabi/include/sys/_types.h"
+  95              		.file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+  96              		.file 6 "/usr/arm-none-eabi/include/sys/reent.h"
+  97              		.file 7 "/usr/arm-none-eabi/include/math.h"
+  98              		.file 8 "/usr/arm-none-eabi/include/sys/_stdint.h"
+  99              		.file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+ 100              		.file 10 "Inc/hw_rtc.h"
+ARM GAS  /tmp/ccRLwJE7.s 			page 4
+
+
+ARM GAS  /tmp/ccRLwJE7.s 			page 5
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 delay.c
+     /tmp/ccRLwJE7.s:16     .text.DelayMs:0000000000000000 $t
+     /tmp/ccRLwJE7.s:23     .text.DelayMs:0000000000000000 DelayMs
+     /tmp/ccRLwJE7.s:48     .text.Delay:0000000000000000 $t
+     /tmp/ccRLwJE7.s:55     .text.Delay:0000000000000000 Delay
+     /tmp/ccRLwJE7.s:86     .text.Delay:0000000000000014 $d
+                     .debug_frame:0000000000000010 $d
+
+UNDEFINED SYMBOLS
+HW_RTC_DelayMs
+__aeabi_fmul
+__aeabi_f2uiz

build/hw_gpio.d

@@ -0,0 +1,135 @@
+build/hw_gpio.d: Src/hw_gpio.c Inc/hw.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \
+ Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \
+ Inc/hw_spi.h Inc/hw_rtc.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Inc/hw_msp.h Inc/debug.h Inc/vcom.h
+
+Inc/hw.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:
+
+Inc/stm32l0xx_hw_conf.h:
+
+Inc/hw.h:
+
+Inc/hw_conf.h:
+
+Inc/hw_gpio.h:
+
+Inc/hw_spi.h:
+
+Inc/hw_rtc.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Inc/hw_msp.h:
+
+Inc/debug.h:
+
+Inc/vcom.h:

build/hw_gpio.lst

@@ -0,0 +1,672 @@
+ARM GAS  /tmp/ccpOZGrp.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"hw_gpio.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              		.section	.text.HW_GPIO_Init,"ax",%progbits
+  16              		.align	1
+  17              		.global	HW_GPIO_Init
+  18              		.syntax unified
+  19              		.code	16
+  20              		.thumb_func
+  21              		.fpu softvfp
+  23              	HW_GPIO_Init:
+  24              	.LFB96:
+  25              		.file 1 "./Src/hw_gpio.c"
+   1:./Src/hw_gpio.c **** /*
+   2:./Src/hw_gpio.c ****  / _____)             _              | |
+   3:./Src/hw_gpio.c **** ( (____  _____ ____ _| |_ _____  ____| |__
+   4:./Src/hw_gpio.c ****  \____ \| ___ |    (_   _) ___ |/ ___)  _ \
+   5:./Src/hw_gpio.c ****  _____) ) ____| | | || |_| ____( (___| | | |
+   6:./Src/hw_gpio.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_|
+   7:./Src/hw_gpio.c ****     (C)2013 Semtech
+   8:./Src/hw_gpio.c **** 
+   9:./Src/hw_gpio.c **** Description: Bleeper board GPIO driver implementation
+  10:./Src/hw_gpio.c **** 
+  11:./Src/hw_gpio.c **** License: Revised BSD License, see LICENSE.TXT file include in the project
+  12:./Src/hw_gpio.c **** 
+  13:./Src/hw_gpio.c **** Maintainer: Miguel Luis and Gregory Cristian
+  14:./Src/hw_gpio.c **** */
+  15:./Src/hw_gpio.c ****  /******************************************************************************
+  16:./Src/hw_gpio.c ****   * @file    hw_gpio.c
+  17:./Src/hw_gpio.c ****   * @author  MCD Application Team
+  18:./Src/hw_gpio.c ****   * @version V1.1.2
+  19:./Src/hw_gpio.c ****   * @date    08-September-2017
+  20:./Src/hw_gpio.c ****   * @brief   driver for GPIO
+  21:./Src/hw_gpio.c ****   ******************************************************************************
+  22:./Src/hw_gpio.c ****   * @attention
+  23:./Src/hw_gpio.c ****   *
+  24:./Src/hw_gpio.c ****   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics International N.V. 
+  25:./Src/hw_gpio.c ****   * All rights reserved.</center></h2>
+  26:./Src/hw_gpio.c ****   *
+  27:./Src/hw_gpio.c ****   * Redistribution and use in source and binary forms, with or without 
+  28:./Src/hw_gpio.c ****   * modification, are permitted, provided that the following conditions are met:
+  29:./Src/hw_gpio.c ****   *
+  30:./Src/hw_gpio.c ****   * 1. Redistribution of source code must retain the above copyright notice, 
+  31:./Src/hw_gpio.c ****   *    this list of conditions and the following disclaimer.
+  32:./Src/hw_gpio.c ****   * 2. Redistributions in binary form must reproduce the above copyright notice,
+  33:./Src/hw_gpio.c ****   *    this list of conditions and the following disclaimer in the documentation
+ARM GAS  /tmp/ccpOZGrp.s 			page 2
+
+
+  34:./Src/hw_gpio.c ****   *    and/or other materials provided with the distribution.
+  35:./Src/hw_gpio.c ****   * 3. Neither the name of STMicroelectronics nor the names of other 
+  36:./Src/hw_gpio.c ****   *    contributors to this software may be used to endorse or promote products 
+  37:./Src/hw_gpio.c ****   *    derived from this software without specific written permission.
+  38:./Src/hw_gpio.c ****   * 4. This software, including modifications and/or derivative works of this 
+  39:./Src/hw_gpio.c ****   *    software, must execute solely and exclusively on microcontroller or
+  40:./Src/hw_gpio.c ****   *    microprocessor devices manufactured by or for STMicroelectronics.
+  41:./Src/hw_gpio.c ****   * 5. Redistribution and use of this software other than as permitted under 
+  42:./Src/hw_gpio.c ****   *    this license is void and will automatically terminate your rights under 
+  43:./Src/hw_gpio.c ****   *    this license. 
+  44:./Src/hw_gpio.c ****   *
+  45:./Src/hw_gpio.c ****   * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" 
+  46:./Src/hw_gpio.c ****   * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT 
+  47:./Src/hw_gpio.c ****   * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A 
+  48:./Src/hw_gpio.c ****   * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
+  49:./Src/hw_gpio.c ****   * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT 
+  50:./Src/hw_gpio.c ****   * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+  51:./Src/hw_gpio.c ****   * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  52:./Src/hw_gpio.c ****   * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+  53:./Src/hw_gpio.c ****   * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 
+  54:./Src/hw_gpio.c ****   * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 
+  55:./Src/hw_gpio.c ****   * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+  56:./Src/hw_gpio.c ****   * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  57:./Src/hw_gpio.c ****   *
+  58:./Src/hw_gpio.c ****   ******************************************************************************
+  59:./Src/hw_gpio.c ****   */
+  60:./Src/hw_gpio.c **** 
+  61:./Src/hw_gpio.c **** /* Includes ------------------------------------------------------------------*/
+  62:./Src/hw_gpio.c **** #include "hw.h"
+  63:./Src/hw_gpio.c **** 
+  64:./Src/hw_gpio.c **** /* Private typedef -----------------------------------------------------------*/
+  65:./Src/hw_gpio.c **** /* Private define ------------------------------------------------------------*/
+  66:./Src/hw_gpio.c **** /* Private macro -------------------------------------------------------------*/
+  67:./Src/hw_gpio.c **** /* Private variables ---------------------------------------------------------*/
+  68:./Src/hw_gpio.c **** static GpioIrqHandler *GpioIrq[16] = { NULL };
+  69:./Src/hw_gpio.c **** 
+  70:./Src/hw_gpio.c **** /* Private function prototypes -----------------------------------------------*/
+  71:./Src/hw_gpio.c **** 
+  72:./Src/hw_gpio.c **** static uint8_t HW_GPIO_GetBitPos(uint16_t GPIO_Pin);
+  73:./Src/hw_gpio.c **** 
+  74:./Src/hw_gpio.c **** /* Exported functions ---------------------------------------------------------*/
+  75:./Src/hw_gpio.c **** /*!
+  76:./Src/hw_gpio.c ****  * @brief Initializes the given GPIO object
+  77:./Src/hw_gpio.c ****  *
+  78:./Src/hw_gpio.c ****  * @param  GPIOx: where x can be (A..E and H)
+  79:./Src/hw_gpio.c ****  * @param  GPIO_Pin: specifies the port bit to be written.
+  80:./Src/hw_gpio.c ****  *                   This parameter can be one of GPIO_PIN_x where x can be (0..15).
+  81:./Src/hw_gpio.c ****  *                   All port bits are not necessarily available on all GPIOs.
+  82:./Src/hw_gpio.c ****  * @param [IN] initStruct  GPIO_InitTypeDef intit structure
+  83:./Src/hw_gpio.c ****  * @retval none
+  84:./Src/hw_gpio.c ****  */
+  85:./Src/hw_gpio.c **** void HW_GPIO_Init( GPIO_TypeDef* port, uint16_t GPIO_Pin, GPIO_InitTypeDef* initStruct)
+  86:./Src/hw_gpio.c **** {
+  26              		.loc 1 86 0
+  27              		.cfi_startproc
+  28              		@ args = 0, pretend = 0, frame = 24
+  29              		@ frame_needed = 0, uses_anonymous_args = 0
+ARM GAS  /tmp/ccpOZGrp.s 			page 3
+
+
+  30              	.LVL0:
+  31 0000 30B5     		push	{r4, r5, lr}
+  32              	.LCFI0:
+  33              		.cfi_def_cfa_offset 12
+  34              		.cfi_offset 4, -12
+  35              		.cfi_offset 5, -8
+  36              		.cfi_offset 14, -4
+  37 0002 87B0     		sub	sp, sp, #28
+  38              	.LCFI1:
+  39              		.cfi_def_cfa_offset 40
+  87:./Src/hw_gpio.c **** 
+  88:./Src/hw_gpio.c ****   RCC_GPIO_CLK_ENABLE(  (uint32_t) port);
+  40              		.loc 1 88 0
+  41 0004 224C     		ldr	r4, .L10
+  42 0006 A042     		cmp	r0, r4
+  43 0008 23D0     		beq	.L3
+  44 000a 0FD9     		bls	.L9
+  45 000c 214C     		ldr	r4, .L10+4
+  46 000e A042     		cmp	r0, r4
+  47 0010 29D0     		beq	.L6
+  48 0012 214C     		ldr	r4, .L10+8
+  49 0014 A042     		cmp	r0, r4
+  50 0016 30D1     		bne	.L2
+  51              	.LBB6:
+  52              		.loc 1 88 0 is_stmt 0 discriminator 5
+  53 0018 204C     		ldr	r4, .L10+12
+  54 001a E56A     		ldr	r5, [r4, #44]
+  55 001c 0823     		movs	r3, #8
+  56 001e 1D43     		orrs	r5, r3
+  57 0020 E562     		str	r5, [r4, #44]
+  58 0022 E46A     		ldr	r4, [r4, #44]
+  59 0024 2340     		ands	r3, r4
+  60 0026 0493     		str	r3, [sp, #16]
+  61 0028 049B     		ldr	r3, [sp, #16]
+  62              	.LBE6:
+  63 002a 0CE0     		b	.L8
+  64              	.L9:
+  65              		.loc 1 88 0
+  66 002c A024     		movs	r4, #160
+  67 002e E405     		lsls	r4, r4, #23
+  68 0030 A042     		cmp	r0, r4
+  69 0032 22D1     		bne	.L2
+  70              	.LBB7:
+  71              		.loc 1 88 0 discriminator 2
+  72 0034 194C     		ldr	r4, .L10+12
+  73 0036 E56A     		ldr	r5, [r4, #44]
+  74 0038 0123     		movs	r3, #1
+  75 003a 1D43     		orrs	r5, r3
+  76 003c E562     		str	r5, [r4, #44]
+  77 003e E46A     		ldr	r4, [r4, #44]
+  78 0040 2340     		ands	r3, r4
+  79 0042 0193     		str	r3, [sp, #4]
+  80 0044 019B     		ldr	r3, [sp, #4]
+  81              	.L8:
+  82              	.LBE7:
+  89:./Src/hw_gpio.c **** 
+  90:./Src/hw_gpio.c ****   initStruct->Pin = GPIO_Pin ;
+ARM GAS  /tmp/ccpOZGrp.s 			page 4
+
+
+  83              		.loc 1 90 0 is_stmt 1
+  84 0046 1160     		str	r1, [r2]
+  91:./Src/hw_gpio.c **** 
+  92:./Src/hw_gpio.c ****   HAL_GPIO_Init( port, initStruct );
+  85              		.loc 1 92 0
+  86 0048 1100     		movs	r1, r2
+  87              	.LVL1:
+  88 004a FFF7FEFF 		bl	HAL_GPIO_Init
+  89              	.LVL2:
+  93:./Src/hw_gpio.c **** }
+  90              		.loc 1 93 0
+  91 004e 07B0     		add	sp, sp, #28
+  92              		@ sp needed
+  93 0050 30BD     		pop	{r4, r5, pc}
+  94              	.LVL3:
+  95              	.L3:
+  96              	.LBB8:
+  88:./Src/hw_gpio.c **** 
+  97              		.loc 1 88 0 discriminator 3
+  98 0052 124C     		ldr	r4, .L10+12
+  99 0054 E56A     		ldr	r5, [r4, #44]
+ 100 0056 0223     		movs	r3, #2
+ 101 0058 1D43     		orrs	r5, r3
+ 102 005a E562     		str	r5, [r4, #44]
+ 103 005c E46A     		ldr	r4, [r4, #44]
+ 104 005e 2340     		ands	r3, r4
+ 105 0060 0293     		str	r3, [sp, #8]
+ 106 0062 029B     		ldr	r3, [sp, #8]
+ 107              	.LBE8:
+ 108 0064 EFE7     		b	.L8
+ 109              	.L6:
+ 110              	.LBB9:
+  88:./Src/hw_gpio.c **** 
+ 111              		.loc 1 88 0 is_stmt 0 discriminator 4
+ 112 0066 0D4C     		ldr	r4, .L10+12
+ 113 0068 E56A     		ldr	r5, [r4, #44]
+ 114 006a 0423     		movs	r3, #4
+ 115 006c 1D43     		orrs	r5, r3
+ 116 006e E562     		str	r5, [r4, #44]
+ 117 0070 E46A     		ldr	r4, [r4, #44]
+ 118 0072 2340     		ands	r3, r4
+ 119 0074 0393     		str	r3, [sp, #12]
+ 120 0076 039B     		ldr	r3, [sp, #12]
+ 121              	.LBE9:
+ 122 0078 E5E7     		b	.L8
+ 123              	.L2:
+ 124              	.LBB10:
+  88:./Src/hw_gpio.c **** 
+ 125              		.loc 1 88 0 discriminator 1
+ 126 007a 084C     		ldr	r4, .L10+12
+ 127 007c E56A     		ldr	r5, [r4, #44]
+ 128 007e 8023     		movs	r3, #128
+ 129 0080 1D43     		orrs	r5, r3
+ 130 0082 E562     		str	r5, [r4, #44]
+ 131 0084 E46A     		ldr	r4, [r4, #44]
+ 132 0086 2340     		ands	r3, r4
+ 133 0088 0593     		str	r3, [sp, #20]
+ARM GAS  /tmp/ccpOZGrp.s 			page 5
+
+
+ 134 008a 059B     		ldr	r3, [sp, #20]
+ 135 008c DBE7     		b	.L8
+ 136              	.L11:
+ 137 008e C046     		.align	2
+ 138              	.L10:
+ 139 0090 00040050 		.word	1342178304
+ 140 0094 00080050 		.word	1342179328
+ 141 0098 000C0050 		.word	1342180352
+ 142 009c 00100240 		.word	1073876992
+ 143              	.LBE10:
+ 144              		.cfi_endproc
+ 145              	.LFE96:
+ 147              		.section	.text.HW_GPIO_SetIrq,"ax",%progbits
+ 148              		.align	1
+ 149              		.global	HW_GPIO_SetIrq
+ 150              		.syntax unified
+ 151              		.code	16
+ 152              		.thumb_func
+ 153              		.fpu softvfp
+ 155              	HW_GPIO_SetIrq:
+ 156              	.LFB97:
+  94:./Src/hw_gpio.c **** 
+  95:./Src/hw_gpio.c **** /*!
+  96:./Src/hw_gpio.c ****  * @brief Records the interrupt handler for the GPIO  object
+  97:./Src/hw_gpio.c ****  *
+  98:./Src/hw_gpio.c ****  * @param  GPIOx: where x can be (A..E and H) 
+  99:./Src/hw_gpio.c ****  * @param  GPIO_Pin: specifies the port bit to be written.
+ 100:./Src/hw_gpio.c ****  *                   This parameter can be one of GPIO_PIN_x where x can be (0..15).
+ 101:./Src/hw_gpio.c ****  *                   All port bits are not necessarily available on all GPIOs.
+ 102:./Src/hw_gpio.c ****  * @param [IN] prio       NVIC priority (0 is highest)
+ 103:./Src/hw_gpio.c ****  * @param [IN] irqHandler  points to the  function to execute
+ 104:./Src/hw_gpio.c ****  * @retval none
+ 105:./Src/hw_gpio.c ****  */
+ 106:./Src/hw_gpio.c **** void HW_GPIO_SetIrq( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, uint32_t prio,  GpioIrqHandler *irqHan
+ 107:./Src/hw_gpio.c **** {
+ 157              		.loc 1 107 0 is_stmt 1
+ 158              		.cfi_startproc
+ 159              		@ args = 0, pretend = 0, frame = 0
+ 160              		@ frame_needed = 0, uses_anonymous_args = 0
+ 161              	.LVL4:
+ 162 0000 70B5     		push	{r4, r5, r6, lr}
+ 163              	.LCFI2:
+ 164              		.cfi_def_cfa_offset 16
+ 165              		.cfi_offset 4, -16
+ 166              		.cfi_offset 5, -12
+ 167              		.cfi_offset 6, -8
+ 168              		.cfi_offset 14, -4
+ 169 0002 1400     		movs	r4, r2
+ 170              	.LVL5:
+ 171              	.LBB11:
+ 172              	.LBB12:
+ 108:./Src/hw_gpio.c ****   IRQn_Type IRQnb;
+ 109:./Src/hw_gpio.c ****   
+ 110:./Src/hw_gpio.c ****   uint32_t BitPos = HW_GPIO_GetBitPos( GPIO_Pin ) ;
+ 111:./Src/hw_gpio.c ****   
+ 112:./Src/hw_gpio.c ****   if ( irqHandler != NULL)
+ 113:./Src/hw_gpio.c ****   {
+ARM GAS  /tmp/ccpOZGrp.s 			page 6
+
+
+ 114:./Src/hw_gpio.c ****     GpioIrq[ BitPos ] = irqHandler;
+ 115:./Src/hw_gpio.c **** 
+ 116:./Src/hw_gpio.c ****     IRQnb = MSP_GetIRQn( GPIO_Pin );
+ 117:./Src/hw_gpio.c **** 
+ 118:./Src/hw_gpio.c ****     HAL_NVIC_SetPriority( IRQnb , prio, 0);
+ 119:./Src/hw_gpio.c ****     
+ 120:./Src/hw_gpio.c ****     HAL_NVIC_EnableIRQ( IRQnb );
+ 121:./Src/hw_gpio.c ****   }
+ 122:./Src/hw_gpio.c **** }
+ 123:./Src/hw_gpio.c **** 
+ 124:./Src/hw_gpio.c **** /*!
+ 125:./Src/hw_gpio.c ****  * @brief Execute the interrupt from the object
+ 126:./Src/hw_gpio.c ****  *
+ 127:./Src/hw_gpio.c ****  * @param  GPIO_Pin: specifies the port bit to be written.
+ 128:./Src/hw_gpio.c ****  *                   This parameter can be one of GPIO_PIN_x where x can be (0..15).
+ 129:./Src/hw_gpio.c ****  *                   All port bits are not necessarily available on all GPIOs.
+ 130:./Src/hw_gpio.c ****  * @retval none
+ 131:./Src/hw_gpio.c ****  */
+ 132:./Src/hw_gpio.c **** void HW_GPIO_IrqHandler( uint16_t GPIO_Pin )
+ 133:./Src/hw_gpio.c **** {
+ 134:./Src/hw_gpio.c ****   uint32_t BitPos = HW_GPIO_GetBitPos( GPIO_Pin );
+ 135:./Src/hw_gpio.c ****   
+ 136:./Src/hw_gpio.c ****   if ( GpioIrq[ BitPos ]  != NULL)
+ 137:./Src/hw_gpio.c ****   {
+ 138:./Src/hw_gpio.c ****     GpioIrq[ BitPos ] ( );
+ 139:./Src/hw_gpio.c ****   }
+ 140:./Src/hw_gpio.c **** }
+ 141:./Src/hw_gpio.c **** 
+ 142:./Src/hw_gpio.c **** /*!
+ 143:./Src/hw_gpio.c ****  * @brief Writes the given value to the GPIO output
+ 144:./Src/hw_gpio.c ****  *
+ 145:./Src/hw_gpio.c ****  * @param  GPIO_Pin: specifies the port bit to be written.
+ 146:./Src/hw_gpio.c ****  *                   This parameter can be one of GPIO_PIN_x where x can be (0..15).
+ 147:./Src/hw_gpio.c ****  *                   All port bits are not necessarily available on all GPIOs.
+ 148:./Src/hw_gpio.c ****  * @param [IN] value New GPIO output value
+ 149:./Src/hw_gpio.c ****  * @retval none
+ 150:./Src/hw_gpio.c ****  */
+ 151:./Src/hw_gpio.c **** void HW_GPIO_Write( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin,  uint32_t value )
+ 152:./Src/hw_gpio.c **** {
+ 153:./Src/hw_gpio.c ****   HAL_GPIO_WritePin( GPIOx, GPIO_Pin , (GPIO_PinState) value );
+ 154:./Src/hw_gpio.c **** }
+ 155:./Src/hw_gpio.c **** 
+ 156:./Src/hw_gpio.c **** /*!
+ 157:./Src/hw_gpio.c ****  * @brief Reads the current GPIO input value
+ 158:./Src/hw_gpio.c ****  *
+ 159:./Src/hw_gpio.c ****  * @param  GPIOx: where x can be (A..E and H) 
+ 160:./Src/hw_gpio.c ****  * @param  GPIO_Pin: specifies the port bit to be written.
+ 161:./Src/hw_gpio.c ****  *                   This parameter can be one of GPIO_PIN_x where x can be (0..15).
+ 162:./Src/hw_gpio.c ****  *                   All port bits are not necessarily available on all GPIOs.
+ 163:./Src/hw_gpio.c ****  * @retval value   Current GPIO input value
+ 164:./Src/hw_gpio.c ****  */
+ 165:./Src/hw_gpio.c **** uint32_t HW_GPIO_Read( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin )
+ 166:./Src/hw_gpio.c **** {
+ 167:./Src/hw_gpio.c ****   return HAL_GPIO_ReadPin( GPIOx, GPIO_Pin);
+ 168:./Src/hw_gpio.c **** }
+ 169:./Src/hw_gpio.c **** 
+ 170:./Src/hw_gpio.c **** /* Private functions ---------------------------------------------------------*/
+ARM GAS  /tmp/ccpOZGrp.s 			page 7
+
+
+ 171:./Src/hw_gpio.c **** 
+ 172:./Src/hw_gpio.c **** /*!
+ 173:./Src/hw_gpio.c ****  * @brief Get the position of the bit set in the GPIO_Pin
+ 174:./Src/hw_gpio.c ****  * @param  GPIO_Pin: specifies the port bit to be written.
+ 175:./Src/hw_gpio.c ****  *                   This parameter can be one of GPIO_PIN_x where x can be (0..15).
+ 176:./Src/hw_gpio.c ****  *                   All port bits are not necessarily available on all GPIOs.
+ 177:./Src/hw_gpio.c ****  * @retval the position of the bit
+ 178:./Src/hw_gpio.c ****  */
+ 179:./Src/hw_gpio.c **** static uint8_t HW_GPIO_GetBitPos(uint16_t GPIO_Pin)
+ 180:./Src/hw_gpio.c **** {
+ 181:./Src/hw_gpio.c ****   uint8_t PinPos=0;
+ 182:./Src/hw_gpio.c ****   
+ 183:./Src/hw_gpio.c ****   if ( ( GPIO_Pin & 0xFF00 ) != 0) { PinPos |= 0x8; }
+ 173              		.loc 1 183 0
+ 174 0004 FF22     		movs	r2, #255
+ 175              	.LVL6:
+ 176 0006 0800     		movs	r0, r1
+ 177              	.LVL7:
+ 178 0008 9043     		bics	r0, r2
+ 179 000a 021E     		subs	r2, r0, #0
+ 180 000c 00D0     		beq	.L13
+ 181 000e 0822     		movs	r2, #8
+ 182              	.L13:
+ 183              	.LVL8:
+ 184:./Src/hw_gpio.c ****   if ( ( GPIO_Pin & 0xF0F0 ) != 0) { PinPos |= 0x4; }
+ 184              		.loc 1 184 0
+ 185 0010 0F48     		ldr	r0, .L19
+ 186 0012 0142     		tst	r1, r0
+ 187 0014 01D0     		beq	.L14
+ 188 0016 0420     		movs	r0, #4
+ 189 0018 0243     		orrs	r2, r0
+ 190              	.LVL9:
+ 191              	.L14:
+ 185:./Src/hw_gpio.c ****   if ( ( GPIO_Pin & 0xCCCC ) != 0) { PinPos |= 0x2; }
+ 192              		.loc 1 185 0
+ 193 001a 0E48     		ldr	r0, .L19+4
+ 194 001c 0142     		tst	r1, r0
+ 195 001e 01D0     		beq	.L15
+ 196 0020 0220     		movs	r0, #2
+ 197 0022 0243     		orrs	r2, r0
+ 198              	.LVL10:
+ 199              	.L15:
+ 186:./Src/hw_gpio.c ****   if ( ( GPIO_Pin & 0xAAAA ) != 0) { PinPos |= 0x1; }
+ 200              		.loc 1 186 0
+ 201 0024 0C48     		ldr	r0, .L19+8
+ 202 0026 0142     		tst	r1, r0
+ 203 0028 01D0     		beq	.L16
+ 204 002a 0120     		movs	r0, #1
+ 205 002c 0243     		orrs	r2, r0
+ 206              	.LVL11:
+ 207              	.L16:
+ 208              	.LBE12:
+ 209              	.LBE11:
+ 112:./Src/hw_gpio.c ****   {
+ 210              		.loc 1 112 0
+ 211 002e 002B     		cmp	r3, #0
+ 212 0030 0DD0     		beq	.L12
+ARM GAS  /tmp/ccpOZGrp.s 			page 8
+
+
+ 114:./Src/hw_gpio.c **** 
+ 213              		.loc 1 114 0
+ 214 0032 9200     		lsls	r2, r2, #2
+ 215              	.LVL12:
+ 216 0034 0948     		ldr	r0, .L19+12
+ 217 0036 1350     		str	r3, [r2, r0]
+ 116:./Src/hw_gpio.c **** 
+ 218              		.loc 1 116 0
+ 219 0038 0800     		movs	r0, r1
+ 220 003a FFF7FEFF 		bl	MSP_GetIRQn
+ 221              	.LVL13:
+ 222 003e 0500     		movs	r5, r0
+ 223              	.LVL14:
+ 118:./Src/hw_gpio.c ****     
+ 224              		.loc 1 118 0
+ 225 0040 0022     		movs	r2, #0
+ 226 0042 2100     		movs	r1, r4
+ 227 0044 FFF7FEFF 		bl	HAL_NVIC_SetPriority
+ 228              	.LVL15:
+ 120:./Src/hw_gpio.c ****   }
+ 229              		.loc 1 120 0
+ 230 0048 2800     		movs	r0, r5
+ 231 004a FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
+ 232              	.LVL16:
+ 233              	.L12:
+ 122:./Src/hw_gpio.c **** 
+ 234              		.loc 1 122 0
+ 235              		@ sp needed
+ 236              	.LVL17:
+ 237 004e 70BD     		pop	{r4, r5, r6, pc}
+ 238              	.L20:
+ 239              		.align	2
+ 240              	.L19:
+ 241 0050 F0F0FFFF 		.word	-3856
+ 242 0054 CCCCFFFF 		.word	-13108
+ 243 0058 AAAAFFFF 		.word	-21846
+ 244 005c 00000000 		.word	.LANCHOR0
+ 245              		.cfi_endproc
+ 246              	.LFE97:
+ 248              		.section	.text.HW_GPIO_IrqHandler,"ax",%progbits
+ 249              		.align	1
+ 250              		.global	HW_GPIO_IrqHandler
+ 251              		.syntax unified
+ 252              		.code	16
+ 253              		.thumb_func
+ 254              		.fpu softvfp
+ 256              	HW_GPIO_IrqHandler:
+ 257              	.LFB98:
+ 133:./Src/hw_gpio.c ****   uint32_t BitPos = HW_GPIO_GetBitPos( GPIO_Pin );
+ 258              		.loc 1 133 0
+ 259              		.cfi_startproc
+ 260              		@ args = 0, pretend = 0, frame = 0
+ 261              		@ frame_needed = 0, uses_anonymous_args = 0
+ 262              	.LVL18:
+ 263 0000 10B5     		push	{r4, lr}
+ 264              	.LCFI3:
+ 265              		.cfi_def_cfa_offset 8
+ARM GAS  /tmp/ccpOZGrp.s 			page 9
+
+
+ 266              		.cfi_offset 4, -8
+ 267              		.cfi_offset 14, -4
+ 268              	.LVL19:
+ 269              	.LBB13:
+ 270              	.LBB14:
+ 183:./Src/hw_gpio.c ****   if ( ( GPIO_Pin & 0xF0F0 ) != 0) { PinPos |= 0x4; }
+ 271              		.loc 1 183 0
+ 272 0002 FF23     		movs	r3, #255
+ 273 0004 0200     		movs	r2, r0
+ 274 0006 9A43     		bics	r2, r3
+ 275 0008 131E     		subs	r3, r2, #0
+ 276 000a 00D0     		beq	.L22
+ 277 000c 0823     		movs	r3, #8
+ 278              	.L22:
+ 279              	.LVL20:
+ 184:./Src/hw_gpio.c ****   if ( ( GPIO_Pin & 0xCCCC ) != 0) { PinPos |= 0x2; }
+ 280              		.loc 1 184 0
+ 281 000e 0B4A     		ldr	r2, .L28
+ 282 0010 1042     		tst	r0, r2
+ 283 0012 01D0     		beq	.L23
+ 284 0014 0422     		movs	r2, #4
+ 285 0016 1343     		orrs	r3, r2
+ 286              	.LVL21:
+ 287              	.L23:
+ 185:./Src/hw_gpio.c ****   if ( ( GPIO_Pin & 0xAAAA ) != 0) { PinPos |= 0x1; }
+ 288              		.loc 1 185 0
+ 289 0018 094A     		ldr	r2, .L28+4
+ 290 001a 1042     		tst	r0, r2
+ 291 001c 01D0     		beq	.L24
+ 292 001e 0222     		movs	r2, #2
+ 293 0020 1343     		orrs	r3, r2
+ 294              	.LVL22:
+ 295              	.L24:
+ 296              		.loc 1 186 0
+ 297 0022 084A     		ldr	r2, .L28+8
+ 298 0024 1042     		tst	r0, r2
+ 299 0026 01D0     		beq	.L25
+ 300 0028 0122     		movs	r2, #1
+ 301 002a 1343     		orrs	r3, r2
+ 302              	.LVL23:
+ 303              	.L25:
+ 304              	.LBE14:
+ 305              	.LBE13:
+ 136:./Src/hw_gpio.c ****   {
+ 306              		.loc 1 136 0
+ 307 002c 9B00     		lsls	r3, r3, #2
+ 308              	.LVL24:
+ 309 002e 064A     		ldr	r2, .L28+12
+ 310 0030 9B58     		ldr	r3, [r3, r2]
+ 311 0032 002B     		cmp	r3, #0
+ 312 0034 00D0     		beq	.L21
+ 138:./Src/hw_gpio.c ****   }
+ 313              		.loc 1 138 0
+ 314 0036 9847     		blx	r3
+ 315              	.LVL25:
+ 316              	.L21:
+ 140:./Src/hw_gpio.c **** 
+ARM GAS  /tmp/ccpOZGrp.s 			page 10
+
+
+ 317              		.loc 1 140 0
+ 318              		@ sp needed
+ 319 0038 10BD     		pop	{r4, pc}
+ 320              	.L29:
+ 321 003a C046     		.align	2
+ 322              	.L28:
+ 323 003c F0F0FFFF 		.word	-3856
+ 324 0040 CCCCFFFF 		.word	-13108
+ 325 0044 AAAAFFFF 		.word	-21846
+ 326 0048 00000000 		.word	.LANCHOR0
+ 327              		.cfi_endproc
+ 328              	.LFE98:
+ 330              		.section	.text.HW_GPIO_Write,"ax",%progbits
+ 331              		.align	1
+ 332              		.global	HW_GPIO_Write
+ 333              		.syntax unified
+ 334              		.code	16
+ 335              		.thumb_func
+ 336              		.fpu softvfp
+ 338              	HW_GPIO_Write:
+ 339              	.LFB99:
+ 152:./Src/hw_gpio.c ****   HAL_GPIO_WritePin( GPIOx, GPIO_Pin , (GPIO_PinState) value );
+ 340              		.loc 1 152 0
+ 341              		.cfi_startproc
+ 342              		@ args = 0, pretend = 0, frame = 0
+ 343              		@ frame_needed = 0, uses_anonymous_args = 0
+ 344              	.LVL26:
+ 345 0000 10B5     		push	{r4, lr}
+ 346              	.LCFI4:
+ 347              		.cfi_def_cfa_offset 8
+ 348              		.cfi_offset 4, -8
+ 349              		.cfi_offset 14, -4
+ 153:./Src/hw_gpio.c **** }
+ 350              		.loc 1 153 0
+ 351 0002 D2B2     		uxtb	r2, r2
+ 352              	.LVL27:
+ 353 0004 FFF7FEFF 		bl	HAL_GPIO_WritePin
+ 354              	.LVL28:
+ 154:./Src/hw_gpio.c **** 
+ 355              		.loc 1 154 0
+ 356              		@ sp needed
+ 357 0008 10BD     		pop	{r4, pc}
+ 358              		.cfi_endproc
+ 359              	.LFE99:
+ 361              		.section	.text.HW_GPIO_Read,"ax",%progbits
+ 362              		.align	1
+ 363              		.global	HW_GPIO_Read
+ 364              		.syntax unified
+ 365              		.code	16
+ 366              		.thumb_func
+ 367              		.fpu softvfp
+ 369              	HW_GPIO_Read:
+ 370              	.LFB100:
+ 166:./Src/hw_gpio.c ****   return HAL_GPIO_ReadPin( GPIOx, GPIO_Pin);
+ 371              		.loc 1 166 0
+ 372              		.cfi_startproc
+ 373              		@ args = 0, pretend = 0, frame = 0
+ARM GAS  /tmp/ccpOZGrp.s 			page 11
+
+
+ 374              		@ frame_needed = 0, uses_anonymous_args = 0
+ 375              	.LVL29:
+ 376 0000 10B5     		push	{r4, lr}
+ 377              	.LCFI5:
+ 378              		.cfi_def_cfa_offset 8
+ 379              		.cfi_offset 4, -8
+ 380              		.cfi_offset 14, -4
+ 167:./Src/hw_gpio.c **** }
+ 381              		.loc 1 167 0
+ 382 0002 FFF7FEFF 		bl	HAL_GPIO_ReadPin
+ 383              	.LVL30:
+ 168:./Src/hw_gpio.c **** 
+ 384              		.loc 1 168 0
+ 385              		@ sp needed
+ 386 0006 10BD     		pop	{r4, pc}
+ 387              		.cfi_endproc
+ 388              	.LFE100:
+ 390              		.section	.bss.GpioIrq,"aw",%nobits
+ 391              		.align	2
+ 392              		.set	.LANCHOR0,. + 0
+ 395              	GpioIrq:
+ 396 0000 00000000 		.space	64
+ 396      00000000 
+ 396      00000000 
+ 396      00000000 
+ 396      00000000 
+ 397              		.text
+ 398              	.Letext0:
+ 399              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
+ 400              		.file 3 "/usr/arm-none-eabi/include/sys/lock.h"
+ 401              		.file 4 "/usr/arm-none-eabi/include/sys/_types.h"
+ 402              		.file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+ 403              		.file 6 "/usr/arm-none-eabi/include/sys/reent.h"
+ 404              		.file 7 "/usr/arm-none-eabi/include/math.h"
+ 405              		.file 8 "/usr/arm-none-eabi/include/sys/_stdint.h"
+ 406              		.file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
+ 407              		.file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+ 408              		.file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h"
+ 409              		.file 12 "Inc/hw_gpio.h"
+ 410              		.file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h"
+ARM GAS  /tmp/ccpOZGrp.s 			page 12
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 hw_gpio.c
+     /tmp/ccpOZGrp.s:16     .text.HW_GPIO_Init:0000000000000000 $t
+     /tmp/ccpOZGrp.s:23     .text.HW_GPIO_Init:0000000000000000 HW_GPIO_Init
+     /tmp/ccpOZGrp.s:139    .text.HW_GPIO_Init:0000000000000090 $d
+     /tmp/ccpOZGrp.s:148    .text.HW_GPIO_SetIrq:0000000000000000 $t
+     /tmp/ccpOZGrp.s:155    .text.HW_GPIO_SetIrq:0000000000000000 HW_GPIO_SetIrq
+     /tmp/ccpOZGrp.s:241    .text.HW_GPIO_SetIrq:0000000000000050 $d
+     /tmp/ccpOZGrp.s:249    .text.HW_GPIO_IrqHandler:0000000000000000 $t
+     /tmp/ccpOZGrp.s:256    .text.HW_GPIO_IrqHandler:0000000000000000 HW_GPIO_IrqHandler
+     /tmp/ccpOZGrp.s:323    .text.HW_GPIO_IrqHandler:000000000000003c $d
+     /tmp/ccpOZGrp.s:331    .text.HW_GPIO_Write:0000000000000000 $t
+     /tmp/ccpOZGrp.s:338    .text.HW_GPIO_Write:0000000000000000 HW_GPIO_Write
+     /tmp/ccpOZGrp.s:362    .text.HW_GPIO_Read:0000000000000000 $t
+     /tmp/ccpOZGrp.s:369    .text.HW_GPIO_Read:0000000000000000 HW_GPIO_Read
+     /tmp/ccpOZGrp.s:391    .bss.GpioIrq:0000000000000000 $d
+     /tmp/ccpOZGrp.s:395    .bss.GpioIrq:0000000000000000 GpioIrq
+                     .debug_frame:0000000000000010 $d
+
+UNDEFINED SYMBOLS
+HAL_GPIO_Init
+MSP_GetIRQn
+HAL_NVIC_SetPriority
+HAL_NVIC_EnableIRQ
+HAL_GPIO_WritePin
+HAL_GPIO_ReadPin

build/hw_i2c.d

@@ -0,0 +1,141 @@
+build/hw_i2c.d: Src/hw_i2c.c Inc/hw.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \
+ Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \
+ Inc/hw_spi.h Inc/hw_rtc.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Inc/hw_msp.h Inc/debug.h Inc/vcom.h Inc/hw_i2c.h Inc/main.h Inc/debug.h
+
+Inc/hw.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:
+
+Inc/stm32l0xx_hw_conf.h:
+
+Inc/hw.h:
+
+Inc/hw_conf.h:
+
+Inc/hw_gpio.h:
+
+Inc/hw_spi.h:
+
+Inc/hw_rtc.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Inc/hw_msp.h:
+
+Inc/debug.h:
+
+Inc/vcom.h:
+
+Inc/hw_i2c.h:
+
+Inc/main.h:
+
+Inc/debug.h:

build/hw_i2c.lst

@@ -0,0 +1,486 @@
+ARM GAS  /tmp/ccdg55Po.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"hw_i2c.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              		.section	.text.MX_I2C1_Init,"ax",%progbits
+  16              		.align	1
+  17              		.global	MX_I2C1_Init
+  18              		.syntax unified
+  19              		.code	16
+  20              		.thumb_func
+  21              		.fpu softvfp
+  23              	MX_I2C1_Init:
+  24              	.LFB97:
+  25              		.file 1 "./Src/hw_i2c.c"
+   1:./Src/hw_i2c.c **** /**
+   2:./Src/hw_i2c.c ****   ******************************************************************************
+   3:./Src/hw_i2c.c ****   * File Name          : I2C.c
+   4:./Src/hw_i2c.c ****   * Description        : This file provides code for the configuration
+   5:./Src/hw_i2c.c ****   *                      of the I2C instances.
+   6:./Src/hw_i2c.c ****   ******************************************************************************
+   7:./Src/hw_i2c.c ****   ** This notice applies to any and all portions of this file
+   8:./Src/hw_i2c.c ****   * that are not between comment pairs USER CODE BEGIN and
+   9:./Src/hw_i2c.c ****   * USER CODE END. Other portions of this file, whether 
+  10:./Src/hw_i2c.c ****   * inserted by the user or by software development tools
+  11:./Src/hw_i2c.c ****   * are owned by their respective copyright owners.
+  12:./Src/hw_i2c.c ****   *
+  13:./Src/hw_i2c.c ****   * COPYRIGHT(c) 2017 STMicroelectronics
+  14:./Src/hw_i2c.c ****   *
+  15:./Src/hw_i2c.c ****   * Redistribution and use in source and binary forms, with or without modification,
+  16:./Src/hw_i2c.c ****   * are permitted provided that the following conditions are met:
+  17:./Src/hw_i2c.c ****   *   1. Redistributions of source code must retain the above copyright notice,
+  18:./Src/hw_i2c.c ****   *      this list of conditions and the following disclaimer.
+  19:./Src/hw_i2c.c ****   *   2. Redistributions in binary form must reproduce the above copyright notice,
+  20:./Src/hw_i2c.c ****   *      this list of conditions and the following disclaimer in the documentation
+  21:./Src/hw_i2c.c ****   *      and/or other materials provided with the distribution.
+  22:./Src/hw_i2c.c ****   *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  23:./Src/hw_i2c.c ****   *      may be used to endorse or promote products derived from this software
+  24:./Src/hw_i2c.c ****   *      without specific prior written permission.
+  25:./Src/hw_i2c.c ****   *
+  26:./Src/hw_i2c.c ****   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  27:./Src/hw_i2c.c ****   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  28:./Src/hw_i2c.c ****   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  29:./Src/hw_i2c.c ****   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  30:./Src/hw_i2c.c ****   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  31:./Src/hw_i2c.c ****   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  32:./Src/hw_i2c.c ****   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  33:./Src/hw_i2c.c ****   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ARM GAS  /tmp/ccdg55Po.s 			page 2
+
+
+  34:./Src/hw_i2c.c ****   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  35:./Src/hw_i2c.c ****   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  36:./Src/hw_i2c.c ****   *
+  37:./Src/hw_i2c.c ****   ******************************************************************************
+  38:./Src/hw_i2c.c ****   */
+  39:./Src/hw_i2c.c **** 
+  40:./Src/hw_i2c.c **** /* Includes ------------------------------------------------------------------*/
+  41:./Src/hw_i2c.c **** #include "hw.h"
+  42:./Src/hw_i2c.c **** #include "hw_i2c.h"
+  43:./Src/hw_i2c.c **** #include "debug.h"
+  44:./Src/hw_i2c.c **** 
+  45:./Src/hw_i2c.c **** static inline uint32_t setupTiming(void)
+  46:./Src/hw_i2c.c **** {
+  47:./Src/hw_i2c.c **** 	const uint32_t presc = 15;
+  48:./Src/hw_i2c.c **** 
+  49:./Src/hw_i2c.c **** 	// delays
+  50:./Src/hw_i2c.c **** 	const uint32_t sdadel = 2;
+  51:./Src/hw_i2c.c **** 	const uint32_t scldel = 2;
+  52:./Src/hw_i2c.c **** 
+  53:./Src/hw_i2c.c **** 	const uint32_t scll = 6;
+  54:./Src/hw_i2c.c **** 	const uint32_t sclh = 7;
+  55:./Src/hw_i2c.c **** 
+  56:./Src/hw_i2c.c **** 	return presc << I2C_TIMINGR_PRESC_Pos |
+  57:./Src/hw_i2c.c **** 			scldel << I2C_TIMINGR_SCLDEL_Pos |
+  58:./Src/hw_i2c.c **** 			sdadel << I2C_TIMINGR_SDADEL_Pos |
+  59:./Src/hw_i2c.c **** 			sclh << I2C_TIMINGR_SCLH_Pos |
+  60:./Src/hw_i2c.c **** 			scll << I2C_TIMINGR_SCLL_Pos;
+  61:./Src/hw_i2c.c **** }
+  62:./Src/hw_i2c.c **** 
+  63:./Src/hw_i2c.c **** I2C_HandleTypeDef hi2c1;
+  64:./Src/hw_i2c.c **** 
+  65:./Src/hw_i2c.c **** /* I2C1 init function */
+  66:./Src/hw_i2c.c **** void MX_I2C1_Init(void)
+  67:./Src/hw_i2c.c **** {
+  26              		.loc 1 67 0
+  27              		.cfi_startproc
+  28              		@ args = 0, pretend = 0, frame = 0
+  29              		@ frame_needed = 0, uses_anonymous_args = 0
+  30 0000 10B5     		push	{r4, lr}
+  31              	.LCFI0:
+  32              		.cfi_def_cfa_offset 8
+  33              		.cfi_offset 4, -8
+  34              		.cfi_offset 14, -4
+  68:./Src/hw_i2c.c **** 	hi2c1.Instance = I2C1;
+  35              		.loc 1 68 0
+  36 0002 1748     		ldr	r0, .L8
+  37 0004 174B     		ldr	r3, .L8+4
+  38 0006 0360     		str	r3, [r0]
+  39              	.LVL0:
+  69:./Src/hw_i2c.c **** 	hi2c1.Init.Timing = setupTiming(); //0x00000708;
+  40              		.loc 1 69 0
+  41 0008 174B     		ldr	r3, .L8+8
+  42 000a 4360     		str	r3, [r0, #4]
+  70:./Src/hw_i2c.c **** 	hi2c1.Init.OwnAddress1 = 0;
+  43              		.loc 1 70 0
+  44 000c 0023     		movs	r3, #0
+  45 000e 8360     		str	r3, [r0, #8]
+ARM GAS  /tmp/ccdg55Po.s 			page 3
+
+
+  71:./Src/hw_i2c.c **** 	hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+  46              		.loc 1 71 0
+  47 0010 0122     		movs	r2, #1
+  48 0012 C260     		str	r2, [r0, #12]
+  72:./Src/hw_i2c.c **** 	hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+  49              		.loc 1 72 0
+  50 0014 0361     		str	r3, [r0, #16]
+  73:./Src/hw_i2c.c **** 	hi2c1.Init.OwnAddress2 = 0;
+  51              		.loc 1 73 0
+  52 0016 4361     		str	r3, [r0, #20]
+  74:./Src/hw_i2c.c **** 	hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
+  53              		.loc 1 74 0
+  54 0018 8361     		str	r3, [r0, #24]
+  75:./Src/hw_i2c.c **** 	hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+  55              		.loc 1 75 0
+  56 001a C361     		str	r3, [r0, #28]
+  76:./Src/hw_i2c.c **** 	hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+  57              		.loc 1 76 0
+  58 001c 0362     		str	r3, [r0, #32]
+  77:./Src/hw_i2c.c **** 	if (HAL_I2C_Init(&hi2c1) != HAL_OK)
+  59              		.loc 1 77 0
+  60 001e FFF7FEFF 		bl	HAL_I2C_Init
+  61              	.LVL1:
+  62 0022 0028     		cmp	r0, #0
+  63 0024 0CD1     		bne	.L5
+  64              	.L2:
+  78:./Src/hw_i2c.c **** 	{
+  79:./Src/hw_i2c.c **** 		_Error_Handler(__FILE__, __LINE__);
+  80:./Src/hw_i2c.c **** 	}
+  81:./Src/hw_i2c.c **** 
+  82:./Src/hw_i2c.c **** 	/**Configure Analogue filter
+  83:./Src/hw_i2c.c **** 	*/
+  84:./Src/hw_i2c.c **** 	if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
+  65              		.loc 1 84 0
+  66 0026 0021     		movs	r1, #0
+  67 0028 0D48     		ldr	r0, .L8
+  68 002a FFF7FEFF 		bl	HAL_I2CEx_ConfigAnalogFilter
+  69              	.LVL2:
+  70 002e 0028     		cmp	r0, #0
+  71 0030 0BD1     		bne	.L6
+  72              	.L3:
+  85:./Src/hw_i2c.c **** 	{
+  86:./Src/hw_i2c.c **** 		_Error_Handler(__FILE__, __LINE__);
+  87:./Src/hw_i2c.c **** 	}
+  88:./Src/hw_i2c.c **** 
+  89:./Src/hw_i2c.c **** 	/**Configure Digital filter
+  90:./Src/hw_i2c.c **** 	*/
+  91:./Src/hw_i2c.c **** 	if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
+  73              		.loc 1 91 0
+  74 0032 0021     		movs	r1, #0
+  75 0034 0A48     		ldr	r0, .L8
+  76 0036 FFF7FEFF 		bl	HAL_I2CEx_ConfigDigitalFilter
+  77              	.LVL3:
+  78 003a 0028     		cmp	r0, #0
+  79 003c 0AD1     		bne	.L7
+  80              	.L1:
+  92:./Src/hw_i2c.c **** 	{
+ARM GAS  /tmp/ccdg55Po.s 			page 4
+
+
+  93:./Src/hw_i2c.c **** 		_Error_Handler(__FILE__, __LINE__);
+  94:./Src/hw_i2c.c **** 	}
+  95:./Src/hw_i2c.c **** 
+  96:./Src/hw_i2c.c **** }
+  81              		.loc 1 96 0
+  82              		@ sp needed
+  83 003e 10BD     		pop	{r4, pc}
+  84              	.L5:
+  79:./Src/hw_i2c.c **** 	}
+  85              		.loc 1 79 0
+  86 0040 4F21     		movs	r1, #79
+  87 0042 0A48     		ldr	r0, .L8+12
+  88 0044 FFF7FEFF 		bl	_Error_Handler
+  89              	.LVL4:
+  90 0048 EDE7     		b	.L2
+  91              	.L6:
+  86:./Src/hw_i2c.c **** 	}
+  92              		.loc 1 86 0
+  93 004a 5621     		movs	r1, #86
+  94 004c 0748     		ldr	r0, .L8+12
+  95 004e FFF7FEFF 		bl	_Error_Handler
+  96              	.LVL5:
+  97 0052 EEE7     		b	.L3
+  98              	.L7:
+  93:./Src/hw_i2c.c **** 	}
+  99              		.loc 1 93 0
+ 100 0054 5D21     		movs	r1, #93
+ 101 0056 0548     		ldr	r0, .L8+12
+ 102 0058 FFF7FEFF 		bl	_Error_Handler
+ 103              	.LVL6:
+ 104              		.loc 1 96 0
+ 105 005c EFE7     		b	.L1
+ 106              	.L9:
+ 107 005e C046     		.align	2
+ 108              	.L8:
+ 109 0060 00000000 		.word	.LANCHOR0
+ 110 0064 00540040 		.word	1073763328
+ 111 0068 060722F0 		.word	-266205434
+ 112 006c 00000000 		.word	.LC1
+ 113              		.cfi_endproc
+ 114              	.LFE97:
+ 116              		.section	.text.HAL_I2C_MspInit,"ax",%progbits
+ 117              		.align	1
+ 118              		.global	HAL_I2C_MspInit
+ 119              		.syntax unified
+ 120              		.code	16
+ 121              		.thumb_func
+ 122              		.fpu softvfp
+ 124              	HAL_I2C_MspInit:
+ 125              	.LFB98:
+  97:./Src/hw_i2c.c **** 
+  98:./Src/hw_i2c.c **** void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
+  99:./Src/hw_i2c.c **** {
+ 126              		.loc 1 99 0
+ 127              		.cfi_startproc
+ 128              		@ args = 0, pretend = 0, frame = 24
+ 129              		@ frame_needed = 0, uses_anonymous_args = 0
+ARM GAS  /tmp/ccdg55Po.s 			page 5
+
+
+ 130              	.LVL7:
+ 131 0000 00B5     		push	{lr}
+ 132              	.LCFI1:
+ 133              		.cfi_def_cfa_offset 4
+ 134              		.cfi_offset 14, -4
+ 135 0002 87B0     		sub	sp, sp, #28
+ 136              	.LCFI2:
+ 137              		.cfi_def_cfa_offset 32
+ 100:./Src/hw_i2c.c **** 
+ 101:./Src/hw_i2c.c **** 	GPIO_InitTypeDef GPIO_InitStruct;
+ 102:./Src/hw_i2c.c **** 	if(i2cHandle->Instance==I2C1)
+ 138              		.loc 1 102 0
+ 139 0004 0268     		ldr	r2, [r0]
+ 140 0006 0D4B     		ldr	r3, .L13
+ 141 0008 9A42     		cmp	r2, r3
+ 142 000a 01D0     		beq	.L12
+ 143              	.LVL8:
+ 144              	.L10:
+ 103:./Src/hw_i2c.c **** 	{
+ 104:./Src/hw_i2c.c **** 		/* USER CODE BEGIN I2C1_MspInit 0 */
+ 105:./Src/hw_i2c.c **** 
+ 106:./Src/hw_i2c.c **** 		/* USER CODE END I2C1_MspInit 0 */
+ 107:./Src/hw_i2c.c **** 
+ 108:./Src/hw_i2c.c **** 		/**I2C1 GPIO Configuration
+ 109:./Src/hw_i2c.c **** 		PB8     ------> I2C1_SCL
+ 110:./Src/hw_i2c.c **** 		PB9     ------> I2C1_SDA
+ 111:./Src/hw_i2c.c **** 		*/
+ 112:./Src/hw_i2c.c **** 		GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
+ 113:./Src/hw_i2c.c **** 		GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+ 114:./Src/hw_i2c.c **** 		GPIO_InitStruct.Pull = GPIO_PULLUP;
+ 115:./Src/hw_i2c.c **** 		GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 116:./Src/hw_i2c.c **** 		GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
+ 117:./Src/hw_i2c.c **** 		HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 118:./Src/hw_i2c.c **** 
+ 119:./Src/hw_i2c.c **** 		/* I2C1 clock enable */
+ 120:./Src/hw_i2c.c **** 		__HAL_RCC_I2C1_CLK_ENABLE();
+ 121:./Src/hw_i2c.c **** 		/* USER CODE BEGIN I2C1_MspInit 1 */
+ 122:./Src/hw_i2c.c **** 
+ 123:./Src/hw_i2c.c **** 		/* USER CODE END I2C1_MspInit 1 */
+ 124:./Src/hw_i2c.c **** 	}
+ 125:./Src/hw_i2c.c **** }
+ 145              		.loc 1 125 0
+ 146 000c 07B0     		add	sp, sp, #28
+ 147              		@ sp needed
+ 148 000e 00BD     		pop	{pc}
+ 149              	.LVL9:
+ 150              	.L12:
+ 112:./Src/hw_i2c.c **** 		GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+ 151              		.loc 1 112 0
+ 152 0010 C023     		movs	r3, #192
+ 153 0012 9B00     		lsls	r3, r3, #2
+ 154 0014 0193     		str	r3, [sp, #4]
+ 113:./Src/hw_i2c.c **** 		GPIO_InitStruct.Pull = GPIO_PULLUP;
+ 155              		.loc 1 113 0
+ 156 0016 1223     		movs	r3, #18
+ 157 0018 0293     		str	r3, [sp, #8]
+ 114:./Src/hw_i2c.c **** 		GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ARM GAS  /tmp/ccdg55Po.s 			page 6
+
+
+ 158              		.loc 1 114 0
+ 159 001a 113B     		subs	r3, r3, #17
+ 160 001c 0393     		str	r3, [sp, #12]
+ 115:./Src/hw_i2c.c **** 		GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
+ 161              		.loc 1 115 0
+ 162 001e 0233     		adds	r3, r3, #2
+ 163 0020 0493     		str	r3, [sp, #16]
+ 116:./Src/hw_i2c.c **** 		HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 164              		.loc 1 116 0
+ 165 0022 0133     		adds	r3, r3, #1
+ 166 0024 0593     		str	r3, [sp, #20]
+ 117:./Src/hw_i2c.c **** 
+ 167              		.loc 1 117 0
+ 168 0026 01A9     		add	r1, sp, #4
+ 169 0028 0548     		ldr	r0, .L13+4
+ 170              	.LVL10:
+ 171 002a FFF7FEFF 		bl	HAL_GPIO_Init
+ 172              	.LVL11:
+ 120:./Src/hw_i2c.c **** 		/* USER CODE BEGIN I2C1_MspInit 1 */
+ 173              		.loc 1 120 0
+ 174 002e 054A     		ldr	r2, .L13+8
+ 175 0030 916B     		ldr	r1, [r2, #56]
+ 176 0032 8023     		movs	r3, #128
+ 177 0034 9B03     		lsls	r3, r3, #14
+ 178 0036 0B43     		orrs	r3, r1
+ 179 0038 9363     		str	r3, [r2, #56]
+ 180              		.loc 1 125 0
+ 181 003a E7E7     		b	.L10
+ 182              	.L14:
+ 183              		.align	2
+ 184              	.L13:
+ 185 003c 00540040 		.word	1073763328
+ 186 0040 00040050 		.word	1342178304
+ 187 0044 00100240 		.word	1073876992
+ 188              		.cfi_endproc
+ 189              	.LFE98:
+ 191              		.section	.text.HAL_I2C_MspDeInit,"ax",%progbits
+ 192              		.align	1
+ 193              		.global	HAL_I2C_MspDeInit
+ 194              		.syntax unified
+ 195              		.code	16
+ 196              		.thumb_func
+ 197              		.fpu softvfp
+ 199              	HAL_I2C_MspDeInit:
+ 200              	.LFB99:
+ 126:./Src/hw_i2c.c **** 
+ 127:./Src/hw_i2c.c **** void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
+ 128:./Src/hw_i2c.c **** {
+ 201              		.loc 1 128 0
+ 202              		.cfi_startproc
+ 203              		@ args = 0, pretend = 0, frame = 0
+ 204              		@ frame_needed = 0, uses_anonymous_args = 0
+ 205              	.LVL12:
+ 206 0000 10B5     		push	{r4, lr}
+ 207              	.LCFI3:
+ 208              		.cfi_def_cfa_offset 8
+ 209              		.cfi_offset 4, -8
+ARM GAS  /tmp/ccdg55Po.s 			page 7
+
+
+ 210              		.cfi_offset 14, -4
+ 129:./Src/hw_i2c.c **** 
+ 130:./Src/hw_i2c.c **** 	if(i2cHandle->Instance==I2C1)
+ 211              		.loc 1 130 0
+ 212 0002 0268     		ldr	r2, [r0]
+ 213 0004 074B     		ldr	r3, .L18
+ 214 0006 9A42     		cmp	r2, r3
+ 215 0008 00D0     		beq	.L17
+ 216              	.LVL13:
+ 217              	.L15:
+ 131:./Src/hw_i2c.c **** 	{
+ 132:./Src/hw_i2c.c **** 		/* USER CODE BEGIN I2C1_MspDeInit 0 */
+ 133:./Src/hw_i2c.c **** 
+ 134:./Src/hw_i2c.c **** 		/* USER CODE END I2C1_MspDeInit 0 */
+ 135:./Src/hw_i2c.c **** 		/* Peripheral clock disable */
+ 136:./Src/hw_i2c.c **** 		__HAL_RCC_I2C1_CLK_DISABLE();
+ 137:./Src/hw_i2c.c **** 
+ 138:./Src/hw_i2c.c **** 		/**I2C1 GPIO Configuration
+ 139:./Src/hw_i2c.c **** 		PB8     ------> I2C1_SCL
+ 140:./Src/hw_i2c.c **** 		PB9     ------> I2C1_SDA
+ 141:./Src/hw_i2c.c **** 		*/
+ 142:./Src/hw_i2c.c **** 		HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8|GPIO_PIN_9);
+ 143:./Src/hw_i2c.c **** 
+ 144:./Src/hw_i2c.c **** 		/* USER CODE BEGIN I2C1_MspDeInit 1 */
+ 145:./Src/hw_i2c.c **** 
+ 146:./Src/hw_i2c.c **** 		/* USER CODE END I2C1_MspDeInit 1 */
+ 147:./Src/hw_i2c.c **** 	}
+ 148:./Src/hw_i2c.c **** }
+ 218              		.loc 1 148 0
+ 219              		@ sp needed
+ 220 000a 10BD     		pop	{r4, pc}
+ 221              	.LVL14:
+ 222              	.L17:
+ 136:./Src/hw_i2c.c **** 
+ 223              		.loc 1 136 0
+ 224 000c 064A     		ldr	r2, .L18+4
+ 225 000e 936B     		ldr	r3, [r2, #56]
+ 226 0010 0649     		ldr	r1, .L18+8
+ 227 0012 0B40     		ands	r3, r1
+ 228 0014 9363     		str	r3, [r2, #56]
+ 142:./Src/hw_i2c.c **** 
+ 229              		.loc 1 142 0
+ 230 0016 C021     		movs	r1, #192
+ 231 0018 8900     		lsls	r1, r1, #2
+ 232 001a 0548     		ldr	r0, .L18+12
+ 233              	.LVL15:
+ 234 001c FFF7FEFF 		bl	HAL_GPIO_DeInit
+ 235              	.LVL16:
+ 236              		.loc 1 148 0
+ 237 0020 F3E7     		b	.L15
+ 238              	.L19:
+ 239 0022 C046     		.align	2
+ 240              	.L18:
+ 241 0024 00540040 		.word	1073763328
+ 242 0028 00100240 		.word	1073876992
+ 243 002c FFFFDFFF 		.word	-2097153
+ 244 0030 00040050 		.word	1342178304
+ARM GAS  /tmp/ccdg55Po.s 			page 8
+
+
+ 245              		.cfi_endproc
+ 246              	.LFE99:
+ 248              		.global	hi2c1
+ 249              		.section	.bss.hi2c1,"aw",%nobits
+ 250              		.align	2
+ 251              		.set	.LANCHOR0,. + 0
+ 254              	hi2c1:
+ 255 0000 00000000 		.space	76
+ 255      00000000 
+ 255      00000000 
+ 255      00000000 
+ 255      00000000 
+ 256              		.section	.rodata.MX_I2C1_Init.str1.4,"aMS",%progbits,1
+ 257              		.align	2
+ 258              	.LC1:
+ 259 0000 2E2F5372 		.ascii	"./Src/hw_i2c.c\000"
+ 259      632F6877 
+ 259      5F693263 
+ 259      2E6300
+ 260              		.text
+ 261              	.Letext0:
+ 262              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
+ 263              		.file 3 "/usr/arm-none-eabi/include/sys/lock.h"
+ 264              		.file 4 "/usr/arm-none-eabi/include/sys/_types.h"
+ 265              		.file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+ 266              		.file 6 "/usr/arm-none-eabi/include/sys/reent.h"
+ 267              		.file 7 "/usr/arm-none-eabi/include/math.h"
+ 268              		.file 8 "/usr/arm-none-eabi/include/sys/_stdint.h"
+ 269              		.file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+ 270              		.file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
+ 271              		.file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h"
+ 272              		.file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h"
+ 273              		.file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h"
+ 274              		.file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h"
+ 275              		.file 15 "Inc/hw_i2c.h"
+ 276              		.file 16 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h"
+ 277              		.file 17 "Inc/debug.h"
+ARM GAS  /tmp/ccdg55Po.s 			page 9
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 hw_i2c.c
+     /tmp/ccdg55Po.s:16     .text.MX_I2C1_Init:0000000000000000 $t
+     /tmp/ccdg55Po.s:23     .text.MX_I2C1_Init:0000000000000000 MX_I2C1_Init
+     /tmp/ccdg55Po.s:109    .text.MX_I2C1_Init:0000000000000060 $d
+     /tmp/ccdg55Po.s:117    .text.HAL_I2C_MspInit:0000000000000000 $t
+     /tmp/ccdg55Po.s:124    .text.HAL_I2C_MspInit:0000000000000000 HAL_I2C_MspInit
+     /tmp/ccdg55Po.s:185    .text.HAL_I2C_MspInit:000000000000003c $d
+     /tmp/ccdg55Po.s:192    .text.HAL_I2C_MspDeInit:0000000000000000 $t
+     /tmp/ccdg55Po.s:199    .text.HAL_I2C_MspDeInit:0000000000000000 HAL_I2C_MspDeInit
+     /tmp/ccdg55Po.s:241    .text.HAL_I2C_MspDeInit:0000000000000024 $d
+     /tmp/ccdg55Po.s:254    .bss.hi2c1:0000000000000000 hi2c1
+     /tmp/ccdg55Po.s:250    .bss.hi2c1:0000000000000000 $d
+     /tmp/ccdg55Po.s:257    .rodata.MX_I2C1_Init.str1.4:0000000000000000 $d
+                     .debug_frame:0000000000000010 $d
+
+UNDEFINED SYMBOLS
+HAL_I2C_Init
+HAL_I2CEx_ConfigAnalogFilter
+HAL_I2CEx_ConfigDigitalFilter
+_Error_Handler
+HAL_GPIO_Init
+HAL_GPIO_DeInit

build/hw_rtc.d

@@ -0,0 +1,138 @@
+build/hw_rtc.d: Src/hw_rtc.c Inc/hw.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \
+ Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \
+ Inc/hw_spi.h Inc/hw_rtc.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Inc/hw_msp.h Inc/debug.h Inc/vcom.h \
+ Middlewares/Third_Party/Lora/Utilities/low_power.h
+
+Inc/hw.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:
+
+Inc/stm32l0xx_hw_conf.h:
+
+Inc/hw.h:
+
+Inc/hw_conf.h:
+
+Inc/hw_gpio.h:
+
+Inc/hw_spi.h:
+
+Inc/hw_rtc.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Inc/hw_msp.h:
+
+Inc/debug.h:
+
+Inc/vcom.h:
+
+Middlewares/Third_Party/Lora/Utilities/low_power.h:

build/hw_spi.d

@@ -0,0 +1,135 @@
+build/hw_spi.d: Src/hw_spi.c Inc/hw.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \
+ Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \
+ Inc/hw_spi.h Inc/hw_rtc.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Inc/hw_msp.h Inc/debug.h Inc/vcom.h
+
+Inc/hw.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:
+
+Inc/stm32l0xx_hw_conf.h:
+
+Inc/hw.h:
+
+Inc/hw_conf.h:
+
+Inc/hw_gpio.h:
+
+Inc/hw_spi.h:
+
+Inc/hw_rtc.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Inc/hw_msp.h:
+
+Inc/debug.h:
+
+Inc/vcom.h:

build/hw_spi.lst

@@ -0,0 +1,824 @@
+ARM GAS  /tmp/cchlfLgp.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"hw_spi.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              		.section	.text.HW_SPI_IoInit,"ax",%progbits
+  16              		.align	1
+  17              		.global	HW_SPI_IoInit
+  18              		.syntax unified
+  19              		.code	16
+  20              		.thumb_func
+  21              		.fpu softvfp
+  23              	HW_SPI_IoInit:
+  24              	.LFB98:
+  25              		.file 1 "./Src/hw_spi.c"
+   1:./Src/hw_spi.c **** /*
+   2:./Src/hw_spi.c ****  / _____)             _              | |
+   3:./Src/hw_spi.c **** ( (____  _____ ____ _| |_ _____  ____| |__
+   4:./Src/hw_spi.c ****  \____ \| ___ |    (_   _) ___ |/ ___)  _ \
+   5:./Src/hw_spi.c ****  _____) ) ____| | | || |_| ____( (___| | | |
+   6:./Src/hw_spi.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_|
+   7:./Src/hw_spi.c ****     (C)2013 Semtech
+   8:./Src/hw_spi.c **** 
+   9:./Src/hw_spi.c **** Description: Bleeper board SPI driver implementation
+  10:./Src/hw_spi.c **** 
+  11:./Src/hw_spi.c **** License: Revised BSD License, see LICENSE.TXT file include in the project
+  12:./Src/hw_spi.c **** 
+  13:./Src/hw_spi.c **** Maintainer: Miguel Luis and Gregory Cristian
+  14:./Src/hw_spi.c **** */
+  15:./Src/hw_spi.c ****  /*******************************************************************************
+  16:./Src/hw_spi.c ****   * @file    hw_spi.c
+  17:./Src/hw_spi.c ****   * @author  MCD Application Team
+  18:./Src/hw_spi.c ****   * @version V1.1.2
+  19:./Src/hw_spi.c ****   * @date    08-September-2017
+  20:./Src/hw_spi.c ****   * @brief   manages the SPI interface
+  21:./Src/hw_spi.c ****   ******************************************************************************
+  22:./Src/hw_spi.c ****   * @attention
+  23:./Src/hw_spi.c ****   *
+  24:./Src/hw_spi.c ****   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics International N.V. 
+  25:./Src/hw_spi.c ****   * All rights reserved.</center></h2>
+  26:./Src/hw_spi.c ****   *
+  27:./Src/hw_spi.c ****   * Redistribution and use in source and binary forms, with or without 
+  28:./Src/hw_spi.c ****   * modification, are permitted, provided that the following conditions are met:
+  29:./Src/hw_spi.c ****   *
+  30:./Src/hw_spi.c ****   * 1. Redistribution of source code must retain the above copyright notice, 
+  31:./Src/hw_spi.c ****   *    this list of conditions and the following disclaimer.
+  32:./Src/hw_spi.c ****   * 2. Redistributions in binary form must reproduce the above copyright notice,
+  33:./Src/hw_spi.c ****   *    this list of conditions and the following disclaimer in the documentation
+ARM GAS  /tmp/cchlfLgp.s 			page 2
+
+
+  34:./Src/hw_spi.c ****   *    and/or other materials provided with the distribution.
+  35:./Src/hw_spi.c ****   * 3. Neither the name of STMicroelectronics nor the names of other 
+  36:./Src/hw_spi.c ****   *    contributors to this software may be used to endorse or promote products 
+  37:./Src/hw_spi.c ****   *    derived from this software without specific written permission.
+  38:./Src/hw_spi.c ****   * 4. This software, including modifications and/or derivative works of this 
+  39:./Src/hw_spi.c ****   *    software, must execute solely and exclusively on microcontroller or
+  40:./Src/hw_spi.c ****   *    microprocessor devices manufactured by or for STMicroelectronics.
+  41:./Src/hw_spi.c ****   * 5. Redistribution and use of this software other than as permitted under 
+  42:./Src/hw_spi.c ****   *    this license is void and will automatically terminate your rights under 
+  43:./Src/hw_spi.c ****   *    this license. 
+  44:./Src/hw_spi.c ****   *
+  45:./Src/hw_spi.c ****   * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" 
+  46:./Src/hw_spi.c ****   * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT 
+  47:./Src/hw_spi.c ****   * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A 
+  48:./Src/hw_spi.c ****   * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
+  49:./Src/hw_spi.c ****   * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT 
+  50:./Src/hw_spi.c ****   * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+  51:./Src/hw_spi.c ****   * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  52:./Src/hw_spi.c ****   * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+  53:./Src/hw_spi.c ****   * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 
+  54:./Src/hw_spi.c ****   * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 
+  55:./Src/hw_spi.c ****   * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+  56:./Src/hw_spi.c ****   * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  57:./Src/hw_spi.c ****   *
+  58:./Src/hw_spi.c ****   ******************************************************************************
+  59:./Src/hw_spi.c ****   */
+  60:./Src/hw_spi.c **** 
+  61:./Src/hw_spi.c **** /* Includes ------------------------------------------------------------------*/
+  62:./Src/hw_spi.c **** #include "hw.h"
+  63:./Src/hw_spi.c **** #include "utilities.h"
+  64:./Src/hw_spi.c **** 
+  65:./Src/hw_spi.c **** 
+  66:./Src/hw_spi.c **** /* Private typedef -----------------------------------------------------------*/
+  67:./Src/hw_spi.c **** /* Private define ------------------------------------------------------------*/
+  68:./Src/hw_spi.c **** /* Private macro -------------------------------------------------------------*/
+  69:./Src/hw_spi.c **** /* Private variables ---------------------------------------------------------*/
+  70:./Src/hw_spi.c **** static SPI_HandleTypeDef hspi;
+  71:./Src/hw_spi.c **** /* Private function prototypes -----------------------------------------------*/
+  72:./Src/hw_spi.c **** 
+  73:./Src/hw_spi.c **** /*!
+  74:./Src/hw_spi.c ****  * @brief Calculates Spi Divisor based on Spi Frequency and Mcu Frequency
+  75:./Src/hw_spi.c ****  *
+  76:./Src/hw_spi.c ****  * @param [IN] Spi Frequency
+  77:./Src/hw_spi.c ****  * @retval Spi divisor
+  78:./Src/hw_spi.c ****  */
+  79:./Src/hw_spi.c **** static uint32_t SpiFrequency( uint32_t hz );
+  80:./Src/hw_spi.c **** 
+  81:./Src/hw_spi.c **** /* Exported functions ---------------------------------------------------------*/
+  82:./Src/hw_spi.c **** 
+  83:./Src/hw_spi.c **** /*!
+  84:./Src/hw_spi.c ****  * @brief Initializes the SPI object and MCU peripheral
+  85:./Src/hw_spi.c ****  *
+  86:./Src/hw_spi.c ****  * @param [IN] none
+  87:./Src/hw_spi.c ****  */
+  88:./Src/hw_spi.c **** void HW_SPI_Init( void )
+  89:./Src/hw_spi.c **** {
+  90:./Src/hw_spi.c ****   
+ARM GAS  /tmp/cchlfLgp.s 			page 3
+
+
+  91:./Src/hw_spi.c ****   /*##-1- Configure the SPI peripheral */
+  92:./Src/hw_spi.c ****   /* Set the SPI parameters */
+  93:./Src/hw_spi.c **** 
+  94:./Src/hw_spi.c ****   hspi.Instance = SPI1;
+  95:./Src/hw_spi.c **** 
+  96:./Src/hw_spi.c ****   hspi.Init.BaudRatePrescaler = SpiFrequency( 10000000 );
+  97:./Src/hw_spi.c ****   hspi.Init.Direction      = SPI_DIRECTION_2LINES;
+  98:./Src/hw_spi.c ****   hspi.Init.Mode           = SPI_MODE_MASTER;
+  99:./Src/hw_spi.c ****   hspi.Init.CLKPolarity    = SPI_POLARITY_LOW;
+ 100:./Src/hw_spi.c ****   hspi.Init.CLKPhase       = SPI_PHASE_1EDGE;
+ 101:./Src/hw_spi.c ****   hspi.Init.DataSize       = SPI_DATASIZE_8BIT;
+ 102:./Src/hw_spi.c ****   hspi.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;  
+ 103:./Src/hw_spi.c ****   hspi.Init.FirstBit       = SPI_FIRSTBIT_MSB;
+ 104:./Src/hw_spi.c ****   hspi.Init.NSS            = SPI_NSS_SOFT;
+ 105:./Src/hw_spi.c ****   hspi.Init.TIMode         = SPI_TIMODE_DISABLE;
+ 106:./Src/hw_spi.c **** 
+ 107:./Src/hw_spi.c **** 
+ 108:./Src/hw_spi.c ****   SPI_CLK_ENABLE(); 
+ 109:./Src/hw_spi.c **** 
+ 110:./Src/hw_spi.c **** 
+ 111:./Src/hw_spi.c ****   if(HAL_SPI_Init( &hspi) != HAL_OK)
+ 112:./Src/hw_spi.c ****   {
+ 113:./Src/hw_spi.c ****     /* Initialization Error */
+ 114:./Src/hw_spi.c ****      Error_Handler();
+ 115:./Src/hw_spi.c ****   }
+ 116:./Src/hw_spi.c **** 
+ 117:./Src/hw_spi.c ****   /*##-2- Configure the SPI GPIOs */
+ 118:./Src/hw_spi.c ****   HW_SPI_IoInit(  );
+ 119:./Src/hw_spi.c **** }
+ 120:./Src/hw_spi.c **** 
+ 121:./Src/hw_spi.c **** /*!
+ 122:./Src/hw_spi.c ****  * @brief De-initializes the SPI object and MCU peripheral
+ 123:./Src/hw_spi.c ****  *
+ 124:./Src/hw_spi.c ****  * @param [IN] none
+ 125:./Src/hw_spi.c ****  */
+ 126:./Src/hw_spi.c **** void HW_SPI_DeInit( void )
+ 127:./Src/hw_spi.c **** {
+ 128:./Src/hw_spi.c **** 
+ 129:./Src/hw_spi.c ****   HAL_SPI_DeInit( &hspi);
+ 130:./Src/hw_spi.c **** 
+ 131:./Src/hw_spi.c ****     /*##-1- Reset peripherals ####*/
+ 132:./Src/hw_spi.c ****   __HAL_RCC_SPI1_FORCE_RESET();
+ 133:./Src/hw_spi.c ****   __HAL_RCC_SPI1_RELEASE_RESET();
+ 134:./Src/hw_spi.c ****   /*##-2- Configure the SPI GPIOs */
+ 135:./Src/hw_spi.c ****   HW_SPI_IoDeInit( );
+ 136:./Src/hw_spi.c **** }
+ 137:./Src/hw_spi.c **** 
+ 138:./Src/hw_spi.c **** void HW_SPI_IoInit( void )
+ 139:./Src/hw_spi.c **** {
+  26              		.loc 1 139 0
+  27              		.cfi_startproc
+  28              		@ args = 0, pretend = 0, frame = 24
+  29              		@ frame_needed = 0, uses_anonymous_args = 0
+  30 0000 10B5     		push	{r4, lr}
+  31              	.LCFI0:
+  32              		.cfi_def_cfa_offset 8
+  33              		.cfi_offset 4, -8
+ARM GAS  /tmp/cchlfLgp.s 			page 4
+
+
+  34              		.cfi_offset 14, -4
+  35 0002 86B0     		sub	sp, sp, #24
+  36              	.LCFI1:
+  37              		.cfi_def_cfa_offset 32
+ 140:./Src/hw_spi.c ****   GPIO_InitTypeDef initStruct={0};
+  38              		.loc 1 140 0
+  39 0004 1422     		movs	r2, #20
+  40 0006 0021     		movs	r1, #0
+  41 0008 01A8     		add	r0, sp, #4
+  42 000a FFF7FEFF 		bl	memset
+  43              	.LVL0:
+ 141:./Src/hw_spi.c ****   
+ 142:./Src/hw_spi.c **** 
+ 143:./Src/hw_spi.c ****   initStruct.Mode =GPIO_MODE_AF_PP;
+  44              		.loc 1 143 0
+  45 000e 0223     		movs	r3, #2
+  46 0010 0293     		str	r3, [sp, #8]
+ 144:./Src/hw_spi.c ****   initStruct.Pull = GPIO_PULLDOWN;
+  47              		.loc 1 144 0
+  48 0012 0393     		str	r3, [sp, #12]
+ 145:./Src/hw_spi.c ****   initStruct.Speed = GPIO_SPEED_HIGH;
+  49              		.loc 1 145 0
+  50 0014 0133     		adds	r3, r3, #1
+  51 0016 0493     		str	r3, [sp, #16]
+ 146:./Src/hw_spi.c ****   initStruct.Alternate= SPI1_AF ;
+ 147:./Src/hw_spi.c **** 
+ 148:./Src/hw_spi.c ****   HW_GPIO_Init( RADIO_SCLK_PORT, RADIO_SCLK_PIN, &initStruct);
+  52              		.loc 1 148 0
+  53 0018 A024     		movs	r4, #160
+  54 001a E405     		lsls	r4, r4, #23
+  55 001c 01AA     		add	r2, sp, #4
+  56 001e 2021     		movs	r1, #32
+  57 0020 2000     		movs	r0, r4
+  58 0022 FFF7FEFF 		bl	HW_GPIO_Init
+  59              	.LVL1:
+ 149:./Src/hw_spi.c ****   HW_GPIO_Init( RADIO_MISO_PORT, RADIO_MISO_PIN, &initStruct);
+  60              		.loc 1 149 0
+  61 0026 01AA     		add	r2, sp, #4
+  62 0028 4021     		movs	r1, #64
+  63 002a 2000     		movs	r0, r4
+  64 002c FFF7FEFF 		bl	HW_GPIO_Init
+  65              	.LVL2:
+ 150:./Src/hw_spi.c ****   HW_GPIO_Init( RADIO_MOSI_PORT, RADIO_MOSI_PIN, &initStruct);
+  66              		.loc 1 150 0
+  67 0030 01AA     		add	r2, sp, #4
+  68 0032 8021     		movs	r1, #128
+  69 0034 2000     		movs	r0, r4
+  70 0036 FFF7FEFF 		bl	HW_GPIO_Init
+  71              	.LVL3:
+ 151:./Src/hw_spi.c **** 
+ 152:./Src/hw_spi.c ****   initStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  72              		.loc 1 152 0
+  73 003a 0123     		movs	r3, #1
+  74 003c 0293     		str	r3, [sp, #8]
+ 153:./Src/hw_spi.c ****   initStruct.Pull = GPIO_PULLUP;
+  75              		.loc 1 153 0
+  76 003e 0393     		str	r3, [sp, #12]
+ARM GAS  /tmp/cchlfLgp.s 			page 5
+
+
+ 154:./Src/hw_spi.c **** 
+ 155:./Src/hw_spi.c ****   HW_GPIO_Init(  RADIO_NSS_PORT, RADIO_NSS_PIN, &initStruct );
+  77              		.loc 1 155 0
+  78 0040 064C     		ldr	r4, .L2
+  79 0042 01AA     		add	r2, sp, #4
+  80 0044 4021     		movs	r1, #64
+  81 0046 2000     		movs	r0, r4
+  82 0048 FFF7FEFF 		bl	HW_GPIO_Init
+  83              	.LVL4:
+ 156:./Src/hw_spi.c **** 
+ 157:./Src/hw_spi.c ****   HW_GPIO_Write ( RADIO_NSS_PORT, RADIO_NSS_PIN, 1 );
+  84              		.loc 1 157 0
+  85 004c 0122     		movs	r2, #1
+  86 004e 4021     		movs	r1, #64
+  87 0050 2000     		movs	r0, r4
+  88 0052 FFF7FEFF 		bl	HW_GPIO_Write
+  89              	.LVL5:
+ 158:./Src/hw_spi.c **** }
+  90              		.loc 1 158 0
+  91 0056 06B0     		add	sp, sp, #24
+  92              		@ sp needed
+  93 0058 10BD     		pop	{r4, pc}
+  94              	.L3:
+  95 005a C046     		.align	2
+  96              	.L2:
+  97 005c 00040050 		.word	1342178304
+  98              		.cfi_endproc
+  99              	.LFE98:
+ 101              		.section	.text.HW_SPI_Init,"ax",%progbits
+ 102              		.align	1
+ 103              		.global	HW_SPI_Init
+ 104              		.syntax unified
+ 105              		.code	16
+ 106              		.thumb_func
+ 107              		.fpu softvfp
+ 109              	HW_SPI_Init:
+ 110              	.LFB96:
+  89:./Src/hw_spi.c ****   
+ 111              		.loc 1 89 0
+ 112              		.cfi_startproc
+ 113              		@ args = 0, pretend = 0, frame = 0
+ 114              		@ frame_needed = 0, uses_anonymous_args = 0
+ 115 0000 10B5     		push	{r4, lr}
+ 116              	.LCFI2:
+ 117              		.cfi_def_cfa_offset 8
+ 118              		.cfi_offset 4, -8
+ 119              		.cfi_offset 14, -4
+  94:./Src/hw_spi.c **** 
+ 120              		.loc 1 94 0
+ 121 0002 1F4B     		ldr	r3, .L17
+ 122 0004 1F4A     		ldr	r2, .L17+4
+ 123 0006 1A60     		str	r2, [r3]
+ 124              	.LVL6:
+ 125              	.LBB4:
+ 126              	.LBB5:
+ 159:./Src/hw_spi.c **** 
+ 160:./Src/hw_spi.c **** void HW_SPI_IoDeInit( void )
+ARM GAS  /tmp/cchlfLgp.s 			page 6
+
+
+ 161:./Src/hw_spi.c **** {
+ 162:./Src/hw_spi.c ****   GPIO_InitTypeDef initStruct={0};
+ 163:./Src/hw_spi.c ****     
+ 164:./Src/hw_spi.c ****   initStruct.Mode =GPIO_MODE_OUTPUT_PP;
+ 165:./Src/hw_spi.c **** 
+ 166:./Src/hw_spi.c ****   initStruct.Pull =GPIO_PULLDOWN  ;
+ 167:./Src/hw_spi.c ****   HW_GPIO_Init ( RADIO_MOSI_PORT, RADIO_MOSI_PIN, &initStruct ); 
+ 168:./Src/hw_spi.c ****   HW_GPIO_Write( RADIO_MOSI_PORT, RADIO_MOSI_PIN, 0 );
+ 169:./Src/hw_spi.c ****   
+ 170:./Src/hw_spi.c ****   initStruct.Pull =GPIO_PULLDOWN; 
+ 171:./Src/hw_spi.c ****   HW_GPIO_Init ( RADIO_MISO_PORT, RADIO_MISO_PIN, &initStruct ); 
+ 172:./Src/hw_spi.c ****   HW_GPIO_Write( RADIO_MISO_PORT, RADIO_MISO_PIN, 0 );
+ 173:./Src/hw_spi.c ****   
+ 174:./Src/hw_spi.c ****   initStruct.Pull =GPIO_PULLDOWN  ; 
+ 175:./Src/hw_spi.c ****   HW_GPIO_Init ( RADIO_SCLK_PORT, RADIO_SCLK_PIN, &initStruct ); 
+ 176:./Src/hw_spi.c ****   HW_GPIO_Write(  RADIO_SCLK_PORT, RADIO_SCLK_PIN, 0 );
+ 177:./Src/hw_spi.c **** 
+ 178:./Src/hw_spi.c ****   initStruct.Pull = GPIO_PULLUP;
+ 179:./Src/hw_spi.c ****   HW_GPIO_Init ( RADIO_NSS_PORT, RADIO_NSS_PIN , &initStruct ); 
+ 180:./Src/hw_spi.c ****   HW_GPIO_Write( RADIO_NSS_PORT, RADIO_NSS_PIN , 1 );
+ 181:./Src/hw_spi.c **** }
+ 182:./Src/hw_spi.c **** 
+ 183:./Src/hw_spi.c **** /*!
+ 184:./Src/hw_spi.c ****  * @brief Sends outData and receives inData
+ 185:./Src/hw_spi.c ****  *
+ 186:./Src/hw_spi.c ****  * @param [IN] outData Byte to be sent
+ 187:./Src/hw_spi.c ****  * @retval inData      Received byte.
+ 188:./Src/hw_spi.c ****  */
+ 189:./Src/hw_spi.c **** uint16_t HW_SPI_InOut( uint16_t txData )
+ 190:./Src/hw_spi.c **** {
+ 191:./Src/hw_spi.c ****   uint16_t rxData ;
+ 192:./Src/hw_spi.c **** 
+ 193:./Src/hw_spi.c ****   HAL_SPI_TransmitReceive( &hspi, ( uint8_t * ) &txData, ( uint8_t* ) &rxData, 1, HAL_MAX_DELAY);	
+ 194:./Src/hw_spi.c **** 
+ 195:./Src/hw_spi.c ****   return rxData;
+ 196:./Src/hw_spi.c **** }
+ 197:./Src/hw_spi.c **** 
+ 198:./Src/hw_spi.c **** /* Private functions ---------------------------------------------------------*/
+ 199:./Src/hw_spi.c **** 
+ 200:./Src/hw_spi.c **** static uint32_t SpiFrequency( uint32_t hz )
+ 201:./Src/hw_spi.c **** {
+ 202:./Src/hw_spi.c ****   uint32_t divisor = 0;
+ 203:./Src/hw_spi.c ****   uint32_t SysClkTmp = SystemCoreClock;
+ 127              		.loc 1 203 0
+ 128 0008 1F4B     		ldr	r3, .L17+8
+ 129 000a 1A68     		ldr	r2, [r3]
+ 130              	.LVL7:
+ 202:./Src/hw_spi.c ****   uint32_t SysClkTmp = SystemCoreClock;
+ 131              		.loc 1 202 0
+ 132 000c 0023     		movs	r3, #0
+ 133              	.LVL8:
+ 134              	.L5:
+ 204:./Src/hw_spi.c ****   uint32_t baudRate;
+ 205:./Src/hw_spi.c ****   
+ 206:./Src/hw_spi.c ****   while( SysClkTmp > hz)
+ 135              		.loc 1 206 0
+ 136 000e 1F49     		ldr	r1, .L17+12
+ARM GAS  /tmp/cchlfLgp.s 			page 7
+
+
+ 137 0010 8A42     		cmp	r2, r1
+ 138 0012 03D9     		bls	.L6
+ 207:./Src/hw_spi.c ****   {
+ 208:./Src/hw_spi.c ****     divisor++;
+ 139              		.loc 1 208 0
+ 140 0014 0133     		adds	r3, r3, #1
+ 141              	.LVL9:
+ 209:./Src/hw_spi.c ****     SysClkTmp= ( SysClkTmp >> 1);
+ 142              		.loc 1 209 0
+ 143 0016 5208     		lsrs	r2, r2, #1
+ 144              	.LVL10:
+ 210:./Src/hw_spi.c ****     
+ 211:./Src/hw_spi.c ****     if (divisor >= 7)
+ 145              		.loc 1 211 0
+ 146 0018 062B     		cmp	r3, #6
+ 147 001a F8D9     		bls	.L5
+ 148              	.L6:
+ 212:./Src/hw_spi.c ****       break;
+ 213:./Src/hw_spi.c ****   }
+ 214:./Src/hw_spi.c ****   
+ 215:./Src/hw_spi.c ****   baudRate =((( divisor & 0x4 ) == 0 )? 0x0 : SPI_CR1_BR_2  )| 
+ 149              		.loc 1 215 0
+ 150 001c 5A07     		lsls	r2, r3, #29
+ 151 001e 24D4     		bmi	.L12
+ 152              	.LVL11:
+ 153 0020 0022     		movs	r2, #0
+ 154              	.L8:
+ 216:./Src/hw_spi.c ****             ((( divisor & 0x2 ) == 0 )? 0x0 : SPI_CR1_BR_1  )| 
+ 155              		.loc 1 216 0
+ 156 0022 9907     		lsls	r1, r3, #30
+ 157 0024 23D4     		bmi	.L13
+ 158 0026 0021     		movs	r1, #0
+ 159              	.L9:
+ 215:./Src/hw_spi.c ****             ((( divisor & 0x2 ) == 0 )? 0x0 : SPI_CR1_BR_1  )| 
+ 160              		.loc 1 215 0
+ 161 0028 0A43     		orrs	r2, r1
+ 217:./Src/hw_spi.c ****             ((( divisor & 0x1 ) == 0 )? 0x0 : SPI_CR1_BR_0  );
+ 162              		.loc 1 217 0
+ 163 002a DB07     		lsls	r3, r3, #31
+ 164 002c 21D5     		bpl	.L15
+ 165              	.LVL12:
+ 166 002e 0823     		movs	r3, #8
+ 167              	.L10:
+ 215:./Src/hw_spi.c ****             ((( divisor & 0x2 ) == 0 )? 0x0 : SPI_CR1_BR_1  )| 
+ 168              		.loc 1 215 0
+ 169 0030 1343     		orrs	r3, r2
+ 170              	.LVL13:
+ 171              	.LBE5:
+ 172              	.LBE4:
+  96:./Src/hw_spi.c ****   hspi.Init.Direction      = SPI_DIRECTION_2LINES;
+ 173              		.loc 1 96 0
+ 174 0032 1348     		ldr	r0, .L17
+ 175 0034 C361     		str	r3, [r0, #28]
+  97:./Src/hw_spi.c ****   hspi.Init.Mode           = SPI_MODE_MASTER;
+ 176              		.loc 1 97 0
+ 177 0036 0023     		movs	r3, #0
+ 178 0038 8360     		str	r3, [r0, #8]
+ARM GAS  /tmp/cchlfLgp.s 			page 8
+
+
+  98:./Src/hw_spi.c ****   hspi.Init.CLKPolarity    = SPI_POLARITY_LOW;
+ 179              		.loc 1 98 0
+ 180 003a 8222     		movs	r2, #130
+ 181 003c 5200     		lsls	r2, r2, #1
+ 182 003e 4260     		str	r2, [r0, #4]
+  99:./Src/hw_spi.c ****   hspi.Init.CLKPhase       = SPI_PHASE_1EDGE;
+ 183              		.loc 1 99 0
+ 184 0040 0361     		str	r3, [r0, #16]
+ 100:./Src/hw_spi.c ****   hspi.Init.DataSize       = SPI_DATASIZE_8BIT;
+ 185              		.loc 1 100 0
+ 186 0042 4361     		str	r3, [r0, #20]
+ 101:./Src/hw_spi.c ****   hspi.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;  
+ 187              		.loc 1 101 0
+ 188 0044 C360     		str	r3, [r0, #12]
+ 102:./Src/hw_spi.c ****   hspi.Init.FirstBit       = SPI_FIRSTBIT_MSB;
+ 189              		.loc 1 102 0
+ 190 0046 8362     		str	r3, [r0, #40]
+ 103:./Src/hw_spi.c ****   hspi.Init.NSS            = SPI_NSS_SOFT;
+ 191              		.loc 1 103 0
+ 192 0048 0362     		str	r3, [r0, #32]
+ 104:./Src/hw_spi.c ****   hspi.Init.TIMode         = SPI_TIMODE_DISABLE;
+ 193              		.loc 1 104 0
+ 194 004a FC32     		adds	r2, r2, #252
+ 195 004c 8261     		str	r2, [r0, #24]
+ 105:./Src/hw_spi.c **** 
+ 196              		.loc 1 105 0
+ 197 004e 4362     		str	r3, [r0, #36]
+ 108:./Src/hw_spi.c **** 
+ 198              		.loc 1 108 0
+ 199 0050 0F4A     		ldr	r2, .L17+16
+ 200 0052 516B     		ldr	r1, [r2, #52]
+ 201 0054 8023     		movs	r3, #128
+ 202 0056 5B01     		lsls	r3, r3, #5
+ 203 0058 0B43     		orrs	r3, r1
+ 204 005a 5363     		str	r3, [r2, #52]
+ 111:./Src/hw_spi.c ****   {
+ 205              		.loc 1 111 0
+ 206 005c FFF7FEFF 		bl	HAL_SPI_Init
+ 207              	.LVL14:
+ 208 0060 0028     		cmp	r0, #0
+ 209 0062 08D1     		bne	.L16
+ 210              	.L11:
+ 118:./Src/hw_spi.c **** }
+ 211              		.loc 1 118 0
+ 212 0064 FFF7FEFF 		bl	HW_SPI_IoInit
+ 213              	.LVL15:
+ 119:./Src/hw_spi.c **** 
+ 214              		.loc 1 119 0
+ 215              		@ sp needed
+ 216 0068 10BD     		pop	{r4, pc}
+ 217              	.LVL16:
+ 218              	.L12:
+ 219              	.LBB7:
+ 220              	.LBB6:
+ 215:./Src/hw_spi.c ****             ((( divisor & 0x2 ) == 0 )? 0x0 : SPI_CR1_BR_1  )| 
+ 221              		.loc 1 215 0
+ 222 006a 2022     		movs	r2, #32
+ARM GAS  /tmp/cchlfLgp.s 			page 9
+
+
+ 223 006c D9E7     		b	.L8
+ 224              	.L13:
+ 216:./Src/hw_spi.c ****             ((( divisor & 0x1 ) == 0 )? 0x0 : SPI_CR1_BR_0  );
+ 225              		.loc 1 216 0
+ 226 006e 1021     		movs	r1, #16
+ 227 0070 DAE7     		b	.L9
+ 228              	.LVL17:
+ 229              	.L15:
+ 230              		.loc 1 217 0
+ 231 0072 0023     		movs	r3, #0
+ 232 0074 DCE7     		b	.L10
+ 233              	.LVL18:
+ 234              	.L16:
+ 235              	.LBE6:
+ 236              	.LBE7:
+ 114:./Src/hw_spi.c ****   }
+ 237              		.loc 1 114 0
+ 238 0076 7221     		movs	r1, #114
+ 239 0078 0648     		ldr	r0, .L17+20
+ 240 007a FFF7FEFF 		bl	_Error_Handler
+ 241              	.LVL19:
+ 242 007e F1E7     		b	.L11
+ 243              	.L18:
+ 244              		.align	2
+ 245              	.L17:
+ 246 0080 00000000 		.word	.LANCHOR0
+ 247 0084 00300140 		.word	1073819648
+ 248 0088 00000000 		.word	SystemCoreClock
+ 249 008c 80969800 		.word	10000000
+ 250 0090 00100240 		.word	1073876992
+ 251 0094 00000000 		.word	.LC2
+ 252              		.cfi_endproc
+ 253              	.LFE96:
+ 255              		.section	.text.HW_SPI_IoDeInit,"ax",%progbits
+ 256              		.align	1
+ 257              		.global	HW_SPI_IoDeInit
+ 258              		.syntax unified
+ 259              		.code	16
+ 260              		.thumb_func
+ 261              		.fpu softvfp
+ 263              	HW_SPI_IoDeInit:
+ 264              	.LFB99:
+ 161:./Src/hw_spi.c ****   GPIO_InitTypeDef initStruct={0};
+ 265              		.loc 1 161 0
+ 266              		.cfi_startproc
+ 267              		@ args = 0, pretend = 0, frame = 24
+ 268              		@ frame_needed = 0, uses_anonymous_args = 0
+ 269 0000 70B5     		push	{r4, r5, r6, lr}
+ 270              	.LCFI3:
+ 271              		.cfi_def_cfa_offset 16
+ 272              		.cfi_offset 4, -16
+ 273              		.cfi_offset 5, -12
+ 274              		.cfi_offset 6, -8
+ 275              		.cfi_offset 14, -4
+ 276 0002 86B0     		sub	sp, sp, #24
+ 277              	.LCFI4:
+ 278              		.cfi_def_cfa_offset 40
+ARM GAS  /tmp/cchlfLgp.s 			page 10
+
+
+ 162:./Src/hw_spi.c ****     
+ 279              		.loc 1 162 0
+ 280 0004 1422     		movs	r2, #20
+ 281 0006 0021     		movs	r1, #0
+ 282 0008 01A8     		add	r0, sp, #4
+ 283 000a FFF7FEFF 		bl	memset
+ 284              	.LVL20:
+ 164:./Src/hw_spi.c **** 
+ 285              		.loc 1 164 0
+ 286 000e 0126     		movs	r6, #1
+ 287 0010 0296     		str	r6, [sp, #8]
+ 166:./Src/hw_spi.c ****   HW_GPIO_Init ( RADIO_MOSI_PORT, RADIO_MOSI_PIN, &initStruct ); 
+ 288              		.loc 1 166 0
+ 289 0012 0225     		movs	r5, #2
+ 290 0014 0395     		str	r5, [sp, #12]
+ 167:./Src/hw_spi.c ****   HW_GPIO_Write( RADIO_MOSI_PORT, RADIO_MOSI_PIN, 0 );
+ 291              		.loc 1 167 0
+ 292 0016 A024     		movs	r4, #160
+ 293 0018 E405     		lsls	r4, r4, #23
+ 294 001a 01AA     		add	r2, sp, #4
+ 295 001c 8021     		movs	r1, #128
+ 296 001e 2000     		movs	r0, r4
+ 297 0020 FFF7FEFF 		bl	HW_GPIO_Init
+ 298              	.LVL21:
+ 168:./Src/hw_spi.c ****   
+ 299              		.loc 1 168 0
+ 300 0024 0022     		movs	r2, #0
+ 301 0026 8021     		movs	r1, #128
+ 302 0028 2000     		movs	r0, r4
+ 303 002a FFF7FEFF 		bl	HW_GPIO_Write
+ 304              	.LVL22:
+ 170:./Src/hw_spi.c ****   HW_GPIO_Init ( RADIO_MISO_PORT, RADIO_MISO_PIN, &initStruct ); 
+ 305              		.loc 1 170 0
+ 306 002e 0395     		str	r5, [sp, #12]
+ 171:./Src/hw_spi.c ****   HW_GPIO_Write( RADIO_MISO_PORT, RADIO_MISO_PIN, 0 );
+ 307              		.loc 1 171 0
+ 308 0030 01AA     		add	r2, sp, #4
+ 309 0032 4021     		movs	r1, #64
+ 310 0034 2000     		movs	r0, r4
+ 311 0036 FFF7FEFF 		bl	HW_GPIO_Init
+ 312              	.LVL23:
+ 172:./Src/hw_spi.c ****   
+ 313              		.loc 1 172 0
+ 314 003a 0022     		movs	r2, #0
+ 315 003c 4021     		movs	r1, #64
+ 316 003e 2000     		movs	r0, r4
+ 317 0040 FFF7FEFF 		bl	HW_GPIO_Write
+ 318              	.LVL24:
+ 174:./Src/hw_spi.c ****   HW_GPIO_Init ( RADIO_SCLK_PORT, RADIO_SCLK_PIN, &initStruct ); 
+ 319              		.loc 1 174 0
+ 320 0044 0395     		str	r5, [sp, #12]
+ 175:./Src/hw_spi.c ****   HW_GPIO_Write(  RADIO_SCLK_PORT, RADIO_SCLK_PIN, 0 );
+ 321              		.loc 1 175 0
+ 322 0046 01AA     		add	r2, sp, #4
+ 323 0048 2021     		movs	r1, #32
+ 324 004a 2000     		movs	r0, r4
+ 325 004c FFF7FEFF 		bl	HW_GPIO_Init
+ARM GAS  /tmp/cchlfLgp.s 			page 11
+
+
+ 326              	.LVL25:
+ 176:./Src/hw_spi.c **** 
+ 327              		.loc 1 176 0
+ 328 0050 0022     		movs	r2, #0
+ 329 0052 2021     		movs	r1, #32
+ 330 0054 2000     		movs	r0, r4
+ 331 0056 FFF7FEFF 		bl	HW_GPIO_Write
+ 332              	.LVL26:
+ 178:./Src/hw_spi.c ****   HW_GPIO_Init ( RADIO_NSS_PORT, RADIO_NSS_PIN , &initStruct ); 
+ 333              		.loc 1 178 0
+ 334 005a 0396     		str	r6, [sp, #12]
+ 179:./Src/hw_spi.c ****   HW_GPIO_Write( RADIO_NSS_PORT, RADIO_NSS_PIN , 1 );
+ 335              		.loc 1 179 0
+ 336 005c 064C     		ldr	r4, .L20
+ 337 005e 01AA     		add	r2, sp, #4
+ 338 0060 4021     		movs	r1, #64
+ 339 0062 2000     		movs	r0, r4
+ 340 0064 FFF7FEFF 		bl	HW_GPIO_Init
+ 341              	.LVL27:
+ 180:./Src/hw_spi.c **** }
+ 342              		.loc 1 180 0
+ 343 0068 0122     		movs	r2, #1
+ 344 006a 4021     		movs	r1, #64
+ 345 006c 2000     		movs	r0, r4
+ 346 006e FFF7FEFF 		bl	HW_GPIO_Write
+ 347              	.LVL28:
+ 181:./Src/hw_spi.c **** 
+ 348              		.loc 1 181 0
+ 349 0072 06B0     		add	sp, sp, #24
+ 350              		@ sp needed
+ 351 0074 70BD     		pop	{r4, r5, r6, pc}
+ 352              	.L21:
+ 353 0076 C046     		.align	2
+ 354              	.L20:
+ 355 0078 00040050 		.word	1342178304
+ 356              		.cfi_endproc
+ 357              	.LFE99:
+ 359              		.section	.text.HW_SPI_DeInit,"ax",%progbits
+ 360              		.align	1
+ 361              		.global	HW_SPI_DeInit
+ 362              		.syntax unified
+ 363              		.code	16
+ 364              		.thumb_func
+ 365              		.fpu softvfp
+ 367              	HW_SPI_DeInit:
+ 368              	.LFB97:
+ 127:./Src/hw_spi.c **** 
+ 369              		.loc 1 127 0
+ 370              		.cfi_startproc
+ 371              		@ args = 0, pretend = 0, frame = 0
+ 372              		@ frame_needed = 0, uses_anonymous_args = 0
+ 373 0000 10B5     		push	{r4, lr}
+ 374              	.LCFI5:
+ 375              		.cfi_def_cfa_offset 8
+ 376              		.cfi_offset 4, -8
+ 377              		.cfi_offset 14, -4
+ 129:./Src/hw_spi.c **** 
+ARM GAS  /tmp/cchlfLgp.s 			page 12
+
+
+ 378              		.loc 1 129 0
+ 379 0002 0848     		ldr	r0, .L23
+ 380 0004 FFF7FEFF 		bl	HAL_SPI_DeInit
+ 381              	.LVL29:
+ 132:./Src/hw_spi.c ****   __HAL_RCC_SPI1_RELEASE_RESET();
+ 382              		.loc 1 132 0
+ 383 0008 074B     		ldr	r3, .L23+4
+ 384 000a 596A     		ldr	r1, [r3, #36]
+ 385 000c 8022     		movs	r2, #128
+ 386 000e 5201     		lsls	r2, r2, #5
+ 387 0010 0A43     		orrs	r2, r1
+ 388 0012 5A62     		str	r2, [r3, #36]
+ 133:./Src/hw_spi.c ****   /*##-2- Configure the SPI GPIOs */
+ 389              		.loc 1 133 0
+ 390 0014 5A6A     		ldr	r2, [r3, #36]
+ 391 0016 0549     		ldr	r1, .L23+8
+ 392 0018 0A40     		ands	r2, r1
+ 393 001a 5A62     		str	r2, [r3, #36]
+ 135:./Src/hw_spi.c **** }
+ 394              		.loc 1 135 0
+ 395 001c FFF7FEFF 		bl	HW_SPI_IoDeInit
+ 396              	.LVL30:
+ 136:./Src/hw_spi.c **** 
+ 397              		.loc 1 136 0
+ 398              		@ sp needed
+ 399 0020 10BD     		pop	{r4, pc}
+ 400              	.L24:
+ 401 0022 C046     		.align	2
+ 402              	.L23:
+ 403 0024 00000000 		.word	.LANCHOR0
+ 404 0028 00100240 		.word	1073876992
+ 405 002c FFEFFFFF 		.word	-4097
+ 406              		.cfi_endproc
+ 407              	.LFE97:
+ 409              		.section	.text.HW_SPI_InOut,"ax",%progbits
+ 410              		.align	1
+ 411              		.global	HW_SPI_InOut
+ 412              		.syntax unified
+ 413              		.code	16
+ 414              		.thumb_func
+ 415              		.fpu softvfp
+ 417              	HW_SPI_InOut:
+ 418              	.LFB100:
+ 190:./Src/hw_spi.c ****   uint16_t rxData ;
+ 419              		.loc 1 190 0
+ 420              		.cfi_startproc
+ 421              		@ args = 0, pretend = 0, frame = 16
+ 422              		@ frame_needed = 0, uses_anonymous_args = 0
+ 423              	.LVL31:
+ 424 0000 10B5     		push	{r4, lr}
+ 425              	.LCFI6:
+ 426              		.cfi_def_cfa_offset 8
+ 427              		.cfi_offset 4, -8
+ 428              		.cfi_offset 14, -4
+ 429 0002 86B0     		sub	sp, sp, #24
+ 430              	.LCFI7:
+ 431              		.cfi_def_cfa_offset 32
+ARM GAS  /tmp/cchlfLgp.s 			page 13
+
+
+ 432 0004 0E21     		movs	r1, #14
+ 433 0006 6944     		add	r1, r1, sp
+ 434 0008 0880     		strh	r0, [r1]
+ 193:./Src/hw_spi.c **** 
+ 435              		.loc 1 193 0
+ 436 000a 1624     		movs	r4, #22
+ 437 000c 6C44     		add	r4, r4, sp
+ 438 000e 0123     		movs	r3, #1
+ 439 0010 5B42     		rsbs	r3, r3, #0
+ 440 0012 0093     		str	r3, [sp]
+ 441 0014 0233     		adds	r3, r3, #2
+ 442 0016 2200     		movs	r2, r4
+ 443 0018 0248     		ldr	r0, .L26
+ 444              	.LVL32:
+ 445 001a FFF7FEFF 		bl	HAL_SPI_TransmitReceive
+ 446              	.LVL33:
+ 195:./Src/hw_spi.c **** }
+ 447              		.loc 1 195 0
+ 448 001e 2088     		ldrh	r0, [r4]
+ 196:./Src/hw_spi.c **** 
+ 449              		.loc 1 196 0
+ 450 0020 06B0     		add	sp, sp, #24
+ 451              		@ sp needed
+ 452 0022 10BD     		pop	{r4, pc}
+ 453              	.L27:
+ 454              		.align	2
+ 455              	.L26:
+ 456 0024 00000000 		.word	.LANCHOR0
+ 457              		.cfi_endproc
+ 458              	.LFE100:
+ 460              		.section	.bss.hspi,"aw",%nobits
+ 461              		.align	2
+ 462              		.set	.LANCHOR0,. + 0
+ 465              	hspi:
+ 466 0000 00000000 		.space	88
+ 466      00000000 
+ 466      00000000 
+ 466      00000000 
+ 466      00000000 
+ 467              		.section	.rodata.HW_SPI_Init.str1.4,"aMS",%progbits,1
+ 468              		.align	2
+ 469              	.LC2:
+ 470 0000 2E2F5372 		.ascii	"./Src/hw_spi.c\000"
+ 470      632F6877 
+ 470      5F737069 
+ 470      2E6300
+ 471              		.text
+ 472              	.Letext0:
+ 473              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
+ 474              		.file 3 "/usr/arm-none-eabi/include/sys/lock.h"
+ 475              		.file 4 "/usr/arm-none-eabi/include/sys/_types.h"
+ 476              		.file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+ 477              		.file 6 "/usr/arm-none-eabi/include/sys/reent.h"
+ 478              		.file 7 "/usr/arm-none-eabi/include/math.h"
+ 479              		.file 8 "/usr/arm-none-eabi/include/sys/_stdint.h"
+ 480              		.file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+ 481              		.file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
+ARM GAS  /tmp/cchlfLgp.s 			page 14
+
+
+ 482              		.file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h"
+ 483              		.file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h"
+ 484              		.file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h"
+ 485              		.file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h"
+ 486              		.file 15 "Inc/hw_gpio.h"
+ 487              		.file 16 "Inc/debug.h"
+ 488              		.file 17 "<built-in>"
+ARM GAS  /tmp/cchlfLgp.s 			page 15
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 hw_spi.c
+     /tmp/cchlfLgp.s:16     .text.HW_SPI_IoInit:0000000000000000 $t
+     /tmp/cchlfLgp.s:23     .text.HW_SPI_IoInit:0000000000000000 HW_SPI_IoInit
+     /tmp/cchlfLgp.s:97     .text.HW_SPI_IoInit:000000000000005c $d
+     /tmp/cchlfLgp.s:102    .text.HW_SPI_Init:0000000000000000 $t
+     /tmp/cchlfLgp.s:109    .text.HW_SPI_Init:0000000000000000 HW_SPI_Init
+     /tmp/cchlfLgp.s:246    .text.HW_SPI_Init:0000000000000080 $d
+     /tmp/cchlfLgp.s:256    .text.HW_SPI_IoDeInit:0000000000000000 $t
+     /tmp/cchlfLgp.s:263    .text.HW_SPI_IoDeInit:0000000000000000 HW_SPI_IoDeInit
+     /tmp/cchlfLgp.s:355    .text.HW_SPI_IoDeInit:0000000000000078 $d
+     /tmp/cchlfLgp.s:360    .text.HW_SPI_DeInit:0000000000000000 $t
+     /tmp/cchlfLgp.s:367    .text.HW_SPI_DeInit:0000000000000000 HW_SPI_DeInit
+     /tmp/cchlfLgp.s:403    .text.HW_SPI_DeInit:0000000000000024 $d
+     /tmp/cchlfLgp.s:410    .text.HW_SPI_InOut:0000000000000000 $t
+     /tmp/cchlfLgp.s:417    .text.HW_SPI_InOut:0000000000000000 HW_SPI_InOut
+     /tmp/cchlfLgp.s:456    .text.HW_SPI_InOut:0000000000000024 $d
+     /tmp/cchlfLgp.s:461    .bss.hspi:0000000000000000 $d
+     /tmp/cchlfLgp.s:465    .bss.hspi:0000000000000000 hspi
+     /tmp/cchlfLgp.s:468    .rodata.HW_SPI_Init.str1.4:0000000000000000 $d
+                     .debug_frame:0000000000000010 $d
+
+UNDEFINED SYMBOLS
+memset
+HW_GPIO_Init
+HW_GPIO_Write
+HAL_SPI_Init
+_Error_Handler
+SystemCoreClock
+HAL_SPI_DeInit
+HAL_SPI_TransmitReceive

build/lora.d

@@ -0,0 +1,155 @@
+build/lora.d: Middlewares/Third_Party/Lora/Core/lora.c Inc/hw.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \
+ Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \
+ Inc/hw_spi.h Inc/hw_rtc.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Inc/hw_msp.h Inc/debug.h Inc/vcom.h \
+ Middlewares/Third_Party/Lora/Utilities/timeServer.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h \
+ Middlewares/Third_Party/Lora/Mac/LoRaMac.h \
+ Middlewares/Third_Party/Lora/Core/lora.h Inc/Commissioning.h \
+ Middlewares/Third_Party/Lora/Mac/region/Region.h \
+ Middlewares/Third_Party/Lora/Mac/LoRaMacTest.h
+
+Inc/hw.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:
+
+Inc/stm32l0xx_hw_conf.h:
+
+Inc/hw.h:
+
+Inc/hw_conf.h:
+
+Inc/hw_gpio.h:
+
+Inc/hw_spi.h:
+
+Inc/hw_rtc.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Inc/hw_msp.h:
+
+Inc/debug.h:
+
+Inc/vcom.h:
+
+Middlewares/Third_Party/Lora/Utilities/timeServer.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Middlewares/Third_Party/Lora/Mac/LoRaMac.h:
+
+Middlewares/Third_Party/Lora/Core/lora.h:
+
+Inc/Commissioning.h:
+
+Middlewares/Third_Party/Lora/Mac/region/Region.h:
+
+Middlewares/Third_Party/Lora/Mac/LoRaMacTest.h:

build/low_power.d

@@ -0,0 +1,138 @@
+build/low_power.d: Middlewares/Third_Party/Lora/Utilities/low_power.c \
+ Inc/hw.h Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \
+ Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \
+ Inc/hw_spi.h Inc/hw_rtc.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Inc/hw_msp.h Inc/debug.h Inc/vcom.h \
+ Middlewares/Third_Party/Lora/Utilities/low_power.h
+
+Inc/hw.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:
+
+Inc/stm32l0xx_hw_conf.h:
+
+Inc/hw.h:
+
+Inc/hw_conf.h:
+
+Inc/hw_gpio.h:
+
+Inc/hw_spi.h:
+
+Inc/hw_rtc.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Inc/hw_msp.h:
+
+Inc/debug.h:
+
+Inc/vcom.h:
+
+Middlewares/Third_Party/Lora/Utilities/low_power.h:

build/low_power.lst

@@ -0,0 +1,657 @@
+ARM GAS  /tmp/ccBl10G9.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"low_power.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              		.section	.text.LowPower_Disable,"ax",%progbits
+  16              		.align	1
+  17              		.global	LowPower_Disable
+  18              		.syntax unified
+  19              		.code	16
+  20              		.thumb_func
+  21              		.fpu softvfp
+  23              	LowPower_Disable:
+  24              	.LFB96:
+  25              		.file 1 "./Middlewares/Third_Party/Lora/Utilities/low_power.c"
+   1:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  /*******************************************************************************
+   2:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * @file    low_power.c
+   3:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * @author  MCD Application Team
+   4:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * @version V1.1.2
+   5:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * @date    08-September-2017
+   6:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * @brief   driver for low power
+   7:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   ******************************************************************************
+   8:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * @attention
+   9:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *
+  10:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics International N.V. 
+  11:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * All rights reserved.</center></h2>
+  12:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *
+  13:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * Redistribution and use in source and binary forms, with or without 
+  14:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * modification, are permitted, provided that the following conditions are met:
+  15:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *
+  16:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * 1. Redistribution of source code must retain the above copyright notice, 
+  17:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *    this list of conditions and the following disclaimer.
+  18:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * 2. Redistributions in binary form must reproduce the above copyright notice,
+  19:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *    this list of conditions and the following disclaimer in the documentation
+  20:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *    and/or other materials provided with the distribution.
+  21:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * 3. Neither the name of STMicroelectronics nor the names of other 
+  22:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *    contributors to this software may be used to endorse or promote products 
+  23:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *    derived from this software without specific written permission.
+  24:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * 4. This software, including modifications and/or derivative works of this 
+  25:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *    software, must execute solely and exclusively on microcontroller or
+  26:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *    microprocessor devices manufactured by or for STMicroelectronics.
+  27:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * 5. Redistribution and use of this software other than as permitted under 
+  28:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *    this license is void and will automatically terminate your rights under 
+  29:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *    this license. 
+  30:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *
+  31:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" 
+  32:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT 
+  33:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A 
+ARM GAS  /tmp/ccBl10G9.s 			page 2
+
+
+  34:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
+  35:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT 
+  36:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+  37:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  38:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+  39:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 
+  40:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 
+  41:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+  42:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  43:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   *
+  44:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   ******************************************************************************
+  45:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   */
+  46:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   
+  47:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Includes ------------------------------------------------------------------*/
+  48:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** #include "hw.h"
+  49:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** #include "low_power.h"
+  50:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+  51:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Private typedef -----------------------------------------------------------*/
+  52:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Private define ------------------------------------------------------------*/
+  53:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Private macro -------------------------------------------------------------*/
+  54:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Private variables ---------------------------------------------------------*/
+  55:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+  56:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /**
+  57:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  * \brief Flag to indicate if MCU can go to low power mode
+  58:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  *        When 0, MCU is authorized to go in low power mode
+  59:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  */
+  60:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** static uint32_t LowPower_State = 0;
+  61:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+  62:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Private function prototypes -----------------------------------------------*/
+  63:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+  64:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+  65:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+  66:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Exported functions ---------------------------------------------------------*/
+  67:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+  68:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /**
+  69:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  * \brief API to set flag allowing power mode
+  70:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  *
+  71:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  * \param [IN] enum e_LOW_POWER_State_Id_t  
+  72:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  */
+  73:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** void LowPower_Disable( e_LOW_POWER_State_Id_t state )
+  74:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** {
+  26              		.loc 1 74 0
+  27              		.cfi_startproc
+  28              		@ args = 0, pretend = 0, frame = 0
+  29              		@ frame_needed = 0, uses_anonymous_args = 0
+  30              		@ link register save eliminated.
+  31              	.LVL0:
+  32              	.LBB14:
+  33              	.LBB15:
+  34              		.file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
+   1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
+   2:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @file     cmsis_gcc.h
+   3:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @brief    CMSIS Cortex-M Core Function/Instruction Header File
+   4:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @version  V4.30
+   5:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @date     20. October 2015
+   6:Drivers/CMSIS/Include/cmsis_gcc.h ****  ******************************************************************************/
+   7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Copyright (c) 2009 - 2015 ARM LIMITED
+ARM GAS  /tmp/ccBl10G9.s 			page 3
+
+
+   8:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+   9:Drivers/CMSIS/Include/cmsis_gcc.h ****    All rights reserved.
+  10:Drivers/CMSIS/Include/cmsis_gcc.h ****    Redistribution and use in source and binary forms, with or without
+  11:Drivers/CMSIS/Include/cmsis_gcc.h ****    modification, are permitted provided that the following conditions are met:
+  12:Drivers/CMSIS/Include/cmsis_gcc.h ****    - Redistributions of source code must retain the above copyright
+  13:Drivers/CMSIS/Include/cmsis_gcc.h ****      notice, this list of conditions and the following disclaimer.
+  14:Drivers/CMSIS/Include/cmsis_gcc.h ****    - Redistributions in binary form must reproduce the above copyright
+  15:Drivers/CMSIS/Include/cmsis_gcc.h ****      notice, this list of conditions and the following disclaimer in the
+  16:Drivers/CMSIS/Include/cmsis_gcc.h ****      documentation and/or other materials provided with the distribution.
+  17:Drivers/CMSIS/Include/cmsis_gcc.h ****    - Neither the name of ARM nor the names of its contributors may be used
+  18:Drivers/CMSIS/Include/cmsis_gcc.h ****      to endorse or promote products derived from this software without
+  19:Drivers/CMSIS/Include/cmsis_gcc.h ****      specific prior written permission.
+  20:Drivers/CMSIS/Include/cmsis_gcc.h ****    *
+  21:Drivers/CMSIS/Include/cmsis_gcc.h ****    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  22:Drivers/CMSIS/Include/cmsis_gcc.h ****    AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  23:Drivers/CMSIS/Include/cmsis_gcc.h ****    IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  24:Drivers/CMSIS/Include/cmsis_gcc.h ****    ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+  25:Drivers/CMSIS/Include/cmsis_gcc.h ****    LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  26:Drivers/CMSIS/Include/cmsis_gcc.h ****    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  27:Drivers/CMSIS/Include/cmsis_gcc.h ****    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  28:Drivers/CMSIS/Include/cmsis_gcc.h ****    INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  29:Drivers/CMSIS/Include/cmsis_gcc.h ****    CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  30:Drivers/CMSIS/Include/cmsis_gcc.h ****    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  31:Drivers/CMSIS/Include/cmsis_gcc.h ****    POSSIBILITY OF SUCH DAMAGE.
+  32:Drivers/CMSIS/Include/cmsis_gcc.h ****    ---------------------------------------------------------------------------*/
+  33:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  34:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
+  36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
+  37:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  38:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
+  39:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined ( __GNUC__ )
+  40:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
+  41:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
+  42:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
+  43:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
+  44:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+  45:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  46:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  47:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ###########################  Core Function Access  ########################### */
+  48:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup  CMSIS_Core_FunctionInterface
+  49:Drivers/CMSIS/Include/cmsis_gcc.h ****     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  50:Drivers/CMSIS/Include/cmsis_gcc.h ****   @{
+  51:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+  52:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  53:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+  54:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Enable IRQ Interrupts
+  55:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+  56:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
+  57:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+  58:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
+  59:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+  60:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsie i" : : : "memory");
+  61:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+  62:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  63:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  64:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ARM GAS  /tmp/ccBl10G9.s 			page 4
+
+
+  65:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Disable IRQ Interrupts
+  66:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+  67:Drivers/CMSIS/Include/cmsis_gcc.h ****   Can only be executed in Privileged modes.
+  68:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+  69:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
+  70:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+  71:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsid i" : : : "memory");
+  72:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+  73:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  74:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  75:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+  76:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Control Register
+  77:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the Control Register.
+  78:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Control Register value
+  79:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+  80:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
+  81:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+  82:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
+  83:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  84:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, control" : "=r" (result) );
+  85:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
+  86:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+  87:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  88:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  89:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+  90:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Control Register
+  91:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Writes the given value to the Control Register.
+  92:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
+  93:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+  94:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
+  95:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+  96:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+  97:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+  98:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+  99:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 100:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ 101:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get IPSR Register
+ 102:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the IPSR Register.
+ 103:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               IPSR Register value
+ 104:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+ 105:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
+ 106:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 107:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
+ 108:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 109:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+ 110:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
+ 111:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 112:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 113:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 114:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ 115:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get APSR Register
+ 116:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the APSR Register.
+ 117:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               APSR Register value
+ 118:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
+ 120:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 121:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
+ARM GAS  /tmp/ccBl10G9.s 			page 5
+
+
+ 122:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 123:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+ 124:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
+ 125:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 126:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 127:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 128:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ 129:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get xPSR Register
+ 130:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the xPSR Register.
+ 131:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 132:Drivers/CMSIS/Include/cmsis_gcc.h ****     \return               xPSR Register value
+ 133:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+ 134:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
+ 135:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 136:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
+ 137:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 138:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+ 139:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
+ 140:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 141:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 142:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 143:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ 144:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Process Stack Pointer
+ 145:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Process Stack Pointer (PSP).
+ 146:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               PSP Register value
+ 147:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+ 148:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
+ 149:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 150:Drivers/CMSIS/Include/cmsis_gcc.h ****   register uint32_t result;
+ 151:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 152:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psp\n"  : "=r" (result) );
+ 153:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
+ 154:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 155:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 156:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 157:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ 158:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Process Stack Pointer
+ 159:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Process Stack Pointer (PSP).
+ 160:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    topOfProcStack  Process Stack Pointer value to set
+ 161:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+ 162:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+ 163:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 164:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
+ 165:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 166:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 167:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 168:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ 169:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer
+ 170:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Main Stack Pointer (MSP).
+ 171:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               MSP Register value
+ 172:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+ 173:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
+ 174:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 175:Drivers/CMSIS/Include/cmsis_gcc.h ****   register uint32_t result;
+ 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 177:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
+ 178:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
+ARM GAS  /tmp/ccBl10G9.s 			page 6
+
+
+ 179:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 181:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 182:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ 183:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Main Stack Pointer
+ 184:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Main Stack Pointer (MSP).
+ 185:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 186:Drivers/CMSIS/Include/cmsis_gcc.h ****     \param [in]    topOfMainStack  Main Stack Pointer value to set
+ 187:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+ 188:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+ 189:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 190:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
+ 191:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 192:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 193:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 194:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ 195:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Priority Mask
+ 196:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current state of the priority mask bit from the Priority Mask Register.
+ 197:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Priority Mask value
+ 198:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+ 199:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
+ 200:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 201:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
+ 202:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 203:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  35              		.loc 2 203 0
+  36              		.syntax divided
+  37              	@ 203 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+  38 0000 EFF31083 		MRS r3, primask
+  39              	@ 0 "" 2
+  40              		.thumb
+  41              		.syntax unified
+  42              	.LBE15:
+  43              	.LBE14:
+  44              	.LBB16:
+  45              	.LBB17:
+  71:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+  46              		.loc 2 71 0
+  47              		.syntax divided
+  48              	@ 71 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+  49 0004 72B6     		cpsid i
+  50              	@ 0 "" 2
+  51              		.thumb
+  52              		.syntax unified
+  53              	.LBE17:
+  54              	.LBE16:
+  75:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   BACKUP_PRIMASK();
+  76:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   
+  77:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   DISABLE_IRQ( );
+  78:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   
+  79:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   LowPower_State |= state;
+  55              		.loc 1 79 0
+  56 0006 034A     		ldr	r2, .L2
+  57 0008 1168     		ldr	r1, [r2]
+  58 000a 0843     		orrs	r0, r1
+  59              	.LVL1:
+  60 000c 1060     		str	r0, [r2]
+ARM GAS  /tmp/ccBl10G9.s 			page 7
+
+
+  61              	.LBB18:
+  62              	.LBB19:
+ 204:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
+ 205:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 206:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 207:Drivers/CMSIS/Include/cmsis_gcc.h **** 
+ 208:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ 209:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Priority Mask
+ 210:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Priority Mask Register.
+ 211:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    priMask  Priority Mask
+ 212:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
+ 213:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+ 214:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 215:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+  63              		.loc 2 215 0
+  64              		.syntax divided
+  65              	@ 215 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+  66 000e 83F31088 		MSR primask, r3
+  67              	@ 0 "" 2
+  68              		.thumb
+  69              		.syntax unified
+  70              	.LBE19:
+  71              	.LBE18:
+  80:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+  81:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   RESTORE_PRIMASK( );
+  82:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** }
+  72              		.loc 1 82 0
+  73              		@ sp needed
+  74 0012 7047     		bx	lr
+  75              	.L3:
+  76              		.align	2
+  77              	.L2:
+  78 0014 00000000 		.word	.LANCHOR0
+  79              		.cfi_endproc
+  80              	.LFE96:
+  82              		.section	.text.LowPower_Enable,"ax",%progbits
+  83              		.align	1
+  84              		.global	LowPower_Enable
+  85              		.syntax unified
+  86              		.code	16
+  87              		.thumb_func
+  88              		.fpu softvfp
+  90              	LowPower_Enable:
+  91              	.LFB97:
+  83:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+  84:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /**
+  85:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  * \brief API to reset flag allowing power mode
+  86:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  *
+  87:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  * \param [IN] enum e_LOW_POWER_State_Id_t 
+  88:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  */
+  89:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** void LowPower_Enable( e_LOW_POWER_State_Id_t state )
+  90:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** {
+  92              		.loc 1 90 0
+  93              		.cfi_startproc
+  94              		@ args = 0, pretend = 0, frame = 0
+  95              		@ frame_needed = 0, uses_anonymous_args = 0
+  96              		@ link register save eliminated.
+ARM GAS  /tmp/ccBl10G9.s 			page 8
+
+
+  97              	.LVL2:
+  98              	.LBB20:
+  99              	.LBB21:
+ 203:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
+ 100              		.loc 2 203 0
+ 101              		.syntax divided
+ 102              	@ 203 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 103 0000 EFF31083 		MRS r3, primask
+ 104              	@ 0 "" 2
+ 105              		.thumb
+ 106              		.syntax unified
+ 107              	.LBE21:
+ 108              	.LBE20:
+ 109              	.LBB22:
+ 110              	.LBB23:
+  71:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 111              		.loc 2 71 0
+ 112              		.syntax divided
+ 113              	@ 71 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 114 0004 72B6     		cpsid i
+ 115              	@ 0 "" 2
+ 116              		.thumb
+ 117              		.syntax unified
+ 118              	.LBE23:
+ 119              	.LBE22:
+  91:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   BACKUP_PRIMASK();
+  92:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   
+  93:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   DISABLE_IRQ( );
+  94:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   
+  95:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   LowPower_State &= ~state;
+ 120              		.loc 1 95 0
+ 121 0006 0349     		ldr	r1, .L5
+ 122 0008 0A68     		ldr	r2, [r1]
+ 123 000a 8243     		bics	r2, r0
+ 124 000c 0A60     		str	r2, [r1]
+ 125              	.LBB24:
+ 126              	.LBB25:
+ 127              		.loc 2 215 0
+ 128              		.syntax divided
+ 129              	@ 215 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 130 000e 83F31088 		MSR primask, r3
+ 131              	@ 0 "" 2
+ 132              		.thumb
+ 133              		.syntax unified
+ 134              	.LBE25:
+ 135              	.LBE24:
+  96:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   
+  97:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   RESTORE_PRIMASK( );
+  98:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** }
+ 136              		.loc 1 98 0
+ 137              		@ sp needed
+ 138 0012 7047     		bx	lr
+ 139              	.L6:
+ 140              		.align	2
+ 141              	.L5:
+ 142 0014 00000000 		.word	.LANCHOR0
+ 143              		.cfi_endproc
+ARM GAS  /tmp/ccBl10G9.s 			page 9
+
+
+ 144              	.LFE97:
+ 146              		.section	.text.LowPower_GetState,"ax",%progbits
+ 147              		.align	1
+ 148              		.global	LowPower_GetState
+ 149              		.syntax unified
+ 150              		.code	16
+ 151              		.thumb_func
+ 152              		.fpu softvfp
+ 154              	LowPower_GetState:
+ 155              	.LFB98:
+  99:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+ 100:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /**
+ 101:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  * \brief API to get flag allowing power mode
+ 102:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  * \note When flag is 0, low power mode is allowed
+ 103:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  * \param [IN] state
+ 104:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  * \retval flag state 
+ 105:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  */
+ 106:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** uint32_t LowPower_GetState( void )
+ 107:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** {
+ 156              		.loc 1 107 0
+ 157              		.cfi_startproc
+ 158              		@ args = 0, pretend = 0, frame = 0
+ 159              		@ frame_needed = 0, uses_anonymous_args = 0
+ 160              		@ link register save eliminated.
+ 108:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   return LowPower_State;
+ 161              		.loc 1 108 0
+ 162 0000 014B     		ldr	r3, .L8
+ 163 0002 1868     		ldr	r0, [r3]
+ 109:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** }
+ 164              		.loc 1 109 0
+ 165              		@ sp needed
+ 166 0004 7047     		bx	lr
+ 167              	.L9:
+ 168 0006 C046     		.align	2
+ 169              	.L8:
+ 170 0008 00000000 		.word	.LANCHOR0
+ 171              		.cfi_endproc
+ 172              	.LFE98:
+ 174              		.section	.text.LowPower_Handler,"ax",%progbits
+ 175              		.align	1
+ 176              		.global	LowPower_Handler
+ 177              		.syntax unified
+ 178              		.code	16
+ 179              		.thumb_func
+ 180              		.fpu softvfp
+ 182              	LowPower_Handler:
+ 183              	.LFB99:
+ 110:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+ 111:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /**
+ 112:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  * @brief  Handle Low Power
+ 113:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  * @param  None
+ 114:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  * @retval None
+ 115:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****  */
+ 116:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+ 117:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** void LowPower_Handler( void )
+ 118:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** {
+ 184              		.loc 1 118 0
+ARM GAS  /tmp/ccBl10G9.s 			page 10
+
+
+ 185              		.cfi_startproc
+ 186              		@ args = 0, pretend = 0, frame = 0
+ 187              		@ frame_needed = 0, uses_anonymous_args = 0
+ 188 0000 10B5     		push	{r4, lr}
+ 189              	.LCFI0:
+ 190              		.cfi_def_cfa_offset 8
+ 191              		.cfi_offset 4, -8
+ 192              		.cfi_offset 14, -4
+ 119:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   DBG_GPIO_RST(GPIOB, GPIO_PIN_15);
+ 120:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   
+ 121:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   DBG_GPIO_RST(GPIOB, GPIO_PIN_14);
+ 122:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   
+ 123:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   if ( LowPower_State == 0 )
+ 193              		.loc 1 123 0
+ 194 0002 074B     		ldr	r3, .L14
+ 195 0004 1B68     		ldr	r3, [r3]
+ 196 0006 002B     		cmp	r3, #0
+ 197 0008 02D0     		beq	.L13
+ 124:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   {    
+ 125:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     
+ 126:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     DBG_PRINTF_CRITICAL("dz\n\r");
+ 127:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     
+ 128:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     HW_EnterStopMode( );
+ 129:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     
+ 130:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     /* mcu dependent. to be implemented by user*/
+ 131:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     HW_ExitStopMode();
+ 132:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     
+ 133:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     DBG_GPIO_SET(GPIOB, GPIO_PIN_15);
+ 134:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     
+ 135:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     HW_RTC_setMcuWakeUpTime( );
+ 136:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   }
+ 137:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   else
+ 138:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   {
+ 139:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     DBG_PRINTF_CRITICAL("z\n\r");
+ 140:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     
+ 141:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     HW_EnterSleepMode( );
+ 198              		.loc 1 141 0
+ 199 000a FFF7FEFF 		bl	HW_EnterSleepMode
+ 200              	.LVL3:
+ 201              	.L10:
+ 142:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** 
+ 143:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     DBG_GPIO_SET(GPIOB, GPIO_PIN_14);
+ 144:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   }
+ 145:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   
+ 146:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** }
+ 202              		.loc 1 146 0
+ 203              		@ sp needed
+ 204 000e 10BD     		pop	{r4, pc}
+ 205              	.L13:
+ 128:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     
+ 206              		.loc 1 128 0
+ 207 0010 FFF7FEFF 		bl	HW_EnterStopMode
+ 208              	.LVL4:
+ 131:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****     
+ 209              		.loc 1 131 0
+ 210 0014 FFF7FEFF 		bl	HW_ExitStopMode
+ 211              	.LVL5:
+ARM GAS  /tmp/ccBl10G9.s 			page 11
+
+
+ 135:./Middlewares/Third_Party/Lora/Utilities/low_power.c ****   }
+ 212              		.loc 1 135 0
+ 213 0018 FFF7FEFF 		bl	HW_RTC_setMcuWakeUpTime
+ 214              	.LVL6:
+ 215 001c F7E7     		b	.L10
+ 216              	.L15:
+ 217 001e C046     		.align	2
+ 218              	.L14:
+ 219 0020 00000000 		.word	.LANCHOR0
+ 220              		.cfi_endproc
+ 221              	.LFE99:
+ 223              		.section	.bss.LowPower_State,"aw",%nobits
+ 224              		.align	2
+ 225              		.set	.LANCHOR0,. + 0
+ 228              	LowPower_State:
+ 229 0000 00000000 		.space	4
+ 230              		.text
+ 231              	.Letext0:
+ 232              		.file 3 "/usr/arm-none-eabi/include/machine/_default_types.h"
+ 233              		.file 4 "/usr/arm-none-eabi/include/sys/lock.h"
+ 234              		.file 5 "/usr/arm-none-eabi/include/sys/_types.h"
+ 235              		.file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+ 236              		.file 7 "/usr/arm-none-eabi/include/sys/reent.h"
+ 237              		.file 8 "/usr/arm-none-eabi/include/math.h"
+ 238              		.file 9 "/usr/arm-none-eabi/include/sys/_stdint.h"
+ 239              		.file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+ 240              		.file 11 "Inc/hw_msp.h"
+ 241              		.file 12 "Inc/hw_rtc.h"
+ARM GAS  /tmp/ccBl10G9.s 			page 12
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 low_power.c
+     /tmp/ccBl10G9.s:16     .text.LowPower_Disable:0000000000000000 $t
+     /tmp/ccBl10G9.s:23     .text.LowPower_Disable:0000000000000000 LowPower_Disable
+     /tmp/ccBl10G9.s:78     .text.LowPower_Disable:0000000000000014 $d
+     /tmp/ccBl10G9.s:83     .text.LowPower_Enable:0000000000000000 $t
+     /tmp/ccBl10G9.s:90     .text.LowPower_Enable:0000000000000000 LowPower_Enable
+     /tmp/ccBl10G9.s:142    .text.LowPower_Enable:0000000000000014 $d
+     /tmp/ccBl10G9.s:147    .text.LowPower_GetState:0000000000000000 $t
+     /tmp/ccBl10G9.s:154    .text.LowPower_GetState:0000000000000000 LowPower_GetState
+     /tmp/ccBl10G9.s:170    .text.LowPower_GetState:0000000000000008 $d
+     /tmp/ccBl10G9.s:175    .text.LowPower_Handler:0000000000000000 $t
+     /tmp/ccBl10G9.s:182    .text.LowPower_Handler:0000000000000000 LowPower_Handler
+     /tmp/ccBl10G9.s:219    .text.LowPower_Handler:0000000000000020 $d
+     /tmp/ccBl10G9.s:224    .bss.LowPower_State:0000000000000000 $d
+     /tmp/ccBl10G9.s:228    .bss.LowPower_State:0000000000000000 LowPower_State
+                     .debug_frame:0000000000000010 $d
+
+UNDEFINED SYMBOLS
+HW_EnterSleepMode
+HW_EnterStopMode
+HW_ExitStopMode
+HW_RTC_setMcuWakeUpTime

build/main.d

@@ -0,0 +1,171 @@
+build/main.d: Src/main.c Inc/hw_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h Inc/main.h \
+ Inc/debug.h Inc/hw_conf.h Inc/vcom.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h Inc/hw.h \
+ Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_gpio.h Inc/hw_spi.h Inc/hw_rtc.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \
+ Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \
+ Inc/hw_msp.h Middlewares/Third_Party/Lora/Utilities/low_power.h \
+ Middlewares/Third_Party/Lora/Core/lora.h Inc/Commissioning.h \
+ Middlewares/Third_Party/Lora/Mac/LoRaMac.h \
+ Middlewares/Third_Party/Lora/Mac/region/Region.h \
+ Middlewares/Third_Party/Lora/Utilities/timeServer.h \
+ Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/vcom.h \
+ Src/voc_sensor.h Src/../Drivers/BME680/bme680.h \
+ Src/../Drivers/BME680/bme680_defs.h
+
+Inc/hw_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:
+
+Inc/main.h:
+
+Inc/debug.h:
+
+Inc/hw_conf.h:
+
+Inc/vcom.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h:
+
+Inc/hw.h:
+
+Inc/stm32l0xx_hw_conf.h:
+
+Inc/hw.h:
+
+Inc/hw_gpio.h:
+
+Inc/hw_spi.h:
+
+Inc/hw_rtc.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/hw_conf.h:
+
+Drivers/CMSIS/Include/arm_math.h:
+
+Drivers/CMSIS/Include/core_cm0.h:
+
+Inc/hw_msp.h:
+
+Middlewares/Third_Party/Lora/Utilities/low_power.h:
+
+Middlewares/Third_Party/Lora/Core/lora.h:
+
+Inc/Commissioning.h:
+
+Middlewares/Third_Party/Lora/Mac/LoRaMac.h:
+
+Middlewares/Third_Party/Lora/Mac/region/Region.h:
+
+Middlewares/Third_Party/Lora/Utilities/timeServer.h:
+
+Middlewares/Third_Party/Lora/Utilities/utilities.h:
+
+Inc/vcom.h:
+
+Src/voc_sensor.h:
+
+Src/../Drivers/BME680/bme680.h:
+
+Src/../Drivers/BME680/bme680_defs.h:

build/main.lst

@@ -0,0 +1,571 @@
+ARM GAS  /tmp/cc3y5xFn.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"main.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              		.section	.text.HW_GetBatteryLevel,"ax",%progbits
+  16              		.align	1
+  17              		.global	HW_GetBatteryLevel
+  18              		.syntax unified
+  19              		.code	16
+  20              		.thumb_func
+  21              		.fpu softvfp
+  23              	HW_GetBatteryLevel:
+  24              	.LFB230:
+  25              		.file 1 "./Src/main.c"
+   1:./Src/main.c  **** /*
+   2:./Src/main.c  **** / _____)             _              | |
+   3:./Src/main.c  **** ( (____  _____ ____ _| |_ _____  ____| |__
+   4:./Src/main.c  **** \____ \| ___ |    (_   _) ___ |/ ___)  _ \
+   5:./Src/main.c  **** _____) ) ____| | | || |_| ____( (___| | | |
+   6:./Src/main.c  **** (______/|_____)_|_|_| \__)_____)\____)_| |_|
+   7:./Src/main.c  ****    (C)2013 Semtech
+   8:./Src/main.c  **** 
+   9:./Src/main.c  **** Description: Generic lora driver implementation
+  10:./Src/main.c  **** 
+  11:./Src/main.c  **** License: Revised BSD License, see LICENSE.TXT file include in the project
+  12:./Src/main.c  **** 
+  13:./Src/main.c  **** Maintainer: Miguel Luis, Gregory Cristian and Wael Guibene
+  14:./Src/main.c  **** */
+  15:./Src/main.c  **** /******************************************************************************
+  16:./Src/main.c  ****   * @file    main.c
+  17:./Src/main.c  ****   * @author  MCD Application Team
+  18:./Src/main.c  ****   * @version V1.1.2
+  19:./Src/main.c  ****   * @date    08-September-2017
+  20:./Src/main.c  ****   * @brief   this is the main!
+  21:./Src/main.c  ****   ******************************************************************************
+  22:./Src/main.c  ****   * @attention
+  23:./Src/main.c  ****   *
+  24:./Src/main.c  ****   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics International N.V. 
+  25:./Src/main.c  ****   * All rights reserved.</center></h2>
+  26:./Src/main.c  ****   *
+  27:./Src/main.c  ****   * Redistribution and use in source and binary forms, with or without 
+  28:./Src/main.c  ****   * modification, are permitted, provided that the following conditions are met:
+  29:./Src/main.c  ****   *
+  30:./Src/main.c  ****   * 1. Redistribution of source code must retain the above copyright notice, 
+  31:./Src/main.c  ****   *    this list of conditions and the following disclaimer.
+  32:./Src/main.c  ****   * 2. Redistributions in binary form must reproduce the above copyright notice,
+  33:./Src/main.c  ****   *    this list of conditions and the following disclaimer in the documentation
+ARM GAS  /tmp/cc3y5xFn.s 			page 2
+
+
+  34:./Src/main.c  ****   *    and/or other materials provided with the distribution.
+  35:./Src/main.c  ****   * 3. Neither the name of STMicroelectronics nor the names of other 
+  36:./Src/main.c  ****   *    contributors to this software may be used to endorse or promote products 
+  37:./Src/main.c  ****   *    derived from this software without specific written permission.
+  38:./Src/main.c  ****   * 4. This software, including modifications and/or derivative works of this 
+  39:./Src/main.c  ****   *    software, must execute solely and exclusively on microcontroller or
+  40:./Src/main.c  ****   *    microprocessor devices manufactured by or for STMicroelectronics.
+  41:./Src/main.c  ****   * 5. Redistribution and use of this software other than as permitted under 
+  42:./Src/main.c  ****   *    this license is void and will automatically terminate your rights under 
+  43:./Src/main.c  ****   *    this license. 
+  44:./Src/main.c  ****   *
+  45:./Src/main.c  ****   * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" 
+  46:./Src/main.c  ****   * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT 
+  47:./Src/main.c  ****   * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A 
+  48:./Src/main.c  ****   * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
+  49:./Src/main.c  ****   * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT 
+  50:./Src/main.c  ****   * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+  51:./Src/main.c  ****   * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  52:./Src/main.c  ****   * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+  53:./Src/main.c  ****   * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 
+  54:./Src/main.c  ****   * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 
+  55:./Src/main.c  ****   * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+  56:./Src/main.c  ****   * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  57:./Src/main.c  ****   *
+  58:./Src/main.c  ****   ******************************************************************************
+  59:./Src/main.c  ****   */
+  60:./Src/main.c  **** 
+  61:./Src/main.c  **** /* Includes ------------------------------------------------------------------*/
+  62:./Src/main.c  **** #include <hw_i2c.h>
+  63:./Src/main.c  **** #include <stm32l0xx_ll_i2c.h>
+  64:./Src/main.c  **** #include "stm32l0xx_ll_i2c.h"
+  65:./Src/main.c  **** #include "hw.h"
+  66:./Src/main.c  **** #include "low_power.h"
+  67:./Src/main.c  **** #include "lora.h"
+  68:./Src/main.c  **** //#include "bsp.h"
+  69:./Src/main.c  **** #include "timeServer.h"
+  70:./Src/main.c  **** #include "vcom.h"
+  71:./Src/main.c  **** #include "voc_sensor.h"
+  72:./Src/main.c  **** 
+  73:./Src/main.c  **** /* Private typedef -----------------------------------------------------------*/
+  74:./Src/main.c  **** /* Private define ------------------------------------------------------------*/
+  75:./Src/main.c  **** 
+  76:./Src/main.c  **** #define LPP_APP_PORT 99
+  77:./Src/main.c  **** 
+  78:./Src/main.c  **** /*!
+  79:./Src/main.c  ****  * Defines the application data transmission duty cycle. 5s, value in [ms].
+  80:./Src/main.c  ****  */
+  81:./Src/main.c  **** #define APP_TX_DUTYCYCLE                            10000
+  82:./Src/main.c  **** /*!
+  83:./Src/main.c  ****  * LoRaWAN Adaptive Data Rate
+  84:./Src/main.c  ****  * @note Please note that when ADR is enabled the end-device should be static
+  85:./Src/main.c  ****  */
+  86:./Src/main.c  **** #define LORAWAN_ADR_ON                              1
+  87:./Src/main.c  **** /*!
+  88:./Src/main.c  ****  * LoRaWAN confirmed messages
+  89:./Src/main.c  ****  */
+  90:./Src/main.c  **** #define LORAWAN_CONFIRMED_MSG                    DISABLE
+ARM GAS  /tmp/cc3y5xFn.s 			page 3
+
+
+  91:./Src/main.c  **** /*!
+  92:./Src/main.c  ****  * LoRaWAN application port
+  93:./Src/main.c  ****  * @note do not use 224. It is reserved for certification
+  94:./Src/main.c  ****  */
+  95:./Src/main.c  **** #define LORAWAN_APP_PORT                            42
+  96:./Src/main.c  **** //2
+  97:./Src/main.c  **** /*!
+  98:./Src/main.c  ****  * Number of trials for the join request.
+  99:./Src/main.c  ****  */
+ 100:./Src/main.c  **** #define JOINREQ_NBTRIALS                            3
+ 101:./Src/main.c  **** 
+ 102:./Src/main.c  **** /* Private macro -------------------------------------------------------------*/
+ 103:./Src/main.c  **** /* Private function prototypes -----------------------------------------------*/
+ 104:./Src/main.c  **** 
+ 105:./Src/main.c  **** /* call back when LoRa will transmit a frame*/
+ 106:./Src/main.c  **** static void LoraTxData(lora_AppData_t *AppData, FunctionalState *IsTxConfirmed);
+ 107:./Src/main.c  **** 
+ 108:./Src/main.c  **** /* call back when LoRa has received a frame*/
+ 109:./Src/main.c  **** static void LoraRxData(lora_AppData_t *AppData);
+ 110:./Src/main.c  **** 
+ 111:./Src/main.c  **** uint8_t HW_GetBatteryLevel(void) {
+  26              		.loc 1 111 0
+  27              		.cfi_startproc
+  28              		@ args = 0, pretend = 0, frame = 0
+  29              		@ frame_needed = 0, uses_anonymous_args = 0
+  30              		@ link register save eliminated.
+ 112:./Src/main.c  **** 	return 254;
+ 113:./Src/main.c  **** }
+  31              		.loc 1 113 0
+  32 0000 FE20     		movs	r0, #254
+  33              		@ sp needed
+  34 0002 7047     		bx	lr
+  35              		.cfi_endproc
+  36              	.LFE230:
+  38              		.section	.text.main,"ax",%progbits
+  39              		.align	1
+  40              		.global	main
+  41              		.syntax unified
+  42              		.code	16
+  43              		.thumb_func
+  44              		.fpu softvfp
+  46              	main:
+  47              	.LFB231:
+ 114:./Src/main.c  **** 
+ 115:./Src/main.c  **** /* Private variables ---------------------------------------------------------*/
+ 116:./Src/main.c  **** /* load call backs*/
+ 117:./Src/main.c  **** static LoRaMainCallback_t LoRaMainCallbacks = {HW_GetBatteryLevel,
+ 118:./Src/main.c  ****                                                HW_GetUniqueId,
+ 119:./Src/main.c  ****                                                HW_GetRandomSeed,
+ 120:./Src/main.c  ****                                                LoraTxData,
+ 121:./Src/main.c  ****                                                LoraRxData};
+ 122:./Src/main.c  **** 
+ 123:./Src/main.c  **** 
+ 124:./Src/main.c  **** #ifdef USE_B_L072Z_LRWAN1
+ 125:./Src/main.c  **** /*!
+ 126:./Src/main.c  ****  * Timer to handle the application Tx Led to toggle
+ 127:./Src/main.c  ****  */
+ARM GAS  /tmp/cc3y5xFn.s 			page 4
+
+
+ 128:./Src/main.c  **** static TimerEvent_t TxLedTimer;
+ 129:./Src/main.c  **** static void OnTimerLedEvent( void );
+ 130:./Src/main.c  **** #endif
+ 131:./Src/main.c  **** /* !
+ 132:./Src/main.c  ****  *Initialises the Lora Parameters
+ 133:./Src/main.c  ****  */
+ 134:./Src/main.c  **** static LoRaParam_t LoRaParamInit = {TX_ON_TIMER,
+ 135:./Src/main.c  ****                                     APP_TX_DUTYCYCLE,
+ 136:./Src/main.c  ****                                     CLASS_A,
+ 137:./Src/main.c  ****                                     LORAWAN_ADR_ON,
+ 138:./Src/main.c  ****                                     DR_0,
+ 139:./Src/main.c  ****                                     LORAWAN_PUBLIC_NETWORK,
+ 140:./Src/main.c  ****                                     JOINREQ_NBTRIALS};
+ 141:./Src/main.c  **** 
+ 142:./Src/main.c  **** /* Private functions ---------------------------------------------------------*/
+ 143:./Src/main.c  **** 
+ 144:./Src/main.c  **** #if 0
+ 145:./Src/main.c  **** typedef enum {
+ 146:./Src/main.c  **** 	i2cSpeed_std,
+ 147:./Src/main.c  **** 	i2cSpeed_fast,
+ 148:./Src/main.c  **** 	i2cSpeed_fastPlus,
+ 149:./Src/main.c  **** 	i2cSpeed_count,
+ 150:./Src/main.c  **** } i2cSpeed_t;
+ 151:./Src/main.c  **** 
+ 152:./Src/main.c  **** void i2cInit(I2C_TypeDef *i2c, i2cSpeed_t spd);
+ 153:./Src/main.c  **** 
+ 154:./Src/main.c  **** #define I2C_7BIT_ADDR (0 << 31)
+ 155:./Src/main.c  **** #define I2C_10BIT_ADDR (1 << 31)
+ 156:./Src/main.c  **** 
+ 157:./Src/main.c  **** // Returns number of bytes written
+ 158:./Src/main.c  **** uint32_t i2cWrite(I2C_TypeDef *i2c, uint32_t addr, uint8_t *txBuffer,
+ 159:./Src/main.c  **** 				  uint32_t len);
+ 160:./Src/main.c  **** 
+ 161:./Src/main.c  **** // Returns number of bytes read
+ 162:./Src/main.c  **** uint32_t i2cRead(I2C_TypeDef *i2c, uint8_t addr, uint8_t *rxBuffer,
+ 163:./Src/main.c  **** 				 uint32_t numBytes);
+ 164:./Src/main.c  **** 
+ 165:./Src/main.c  **** #define I2C_READ 0
+ 166:./Src/main.c  **** #define I2C_WRITE 1
+ 167:./Src/main.c  **** 
+ 168:./Src/main.c  **** static uint32_t setupTiming(i2cSpeed_t spd, uint32_t clockFreq) {
+ 169:./Src/main.c  **** 	(void) spd;
+ 170:./Src/main.c  **** 	(void) clockFreq;
+ 171:./Src/main.c  **** 	uint32_t presc = 0;
+ 172:./Src/main.c  **** 	uint32_t sdadel = 2;
+ 173:./Src/main.c  **** 	uint32_t scldel = 2;
+ 174:./Src/main.c  **** 	uint32_t scll = 6;
+ 175:./Src/main.c  **** 	uint32_t sclh = 7;
+ 176:./Src/main.c  **** 
+ 177:./Src/main.c  **** 	return  presc << 28 |
+ 178:./Src/main.c  **** 			scldel << 20 |
+ 179:./Src/main.c  **** 			sdadel << 16 |
+ 180:./Src/main.c  **** 			sclh << 8 |
+ 181:./Src/main.c  **** 			scll;
+ 182:./Src/main.c  **** }
+ 183:./Src/main.c  **** 
+ 184:./Src/main.c  **** void i2cInit(I2C_TypeDef *i2c, i2cSpeed_t spd) {
+ARM GAS  /tmp/cc3y5xFn.s 			page 5
+
+
+ 185:./Src/main.c  **** 	// Setup timing register
+ 186:./Src/main.c  **** 	i2c->TIMINGR = setupTiming(spd, SystemCoreClock);
+ 187:./Src/main.c  **** 
+ 188:./Src/main.c  **** 	// Reset state
+ 189:./Src/main.c  **** 	i2c->CR1 &= ~I2C_CR1_PE;
+ 190:./Src/main.c  **** }
+ 191:./Src/main.c  **** 
+ 192:./Src/main.c  **** static uint32_t i2cSetup(uint32_t addr, uint8_t direction) {
+ 193:./Src/main.c  **** 	uint32_t ret = 0;
+ 194:./Src/main.c  **** 	if (addr & I2C_10BIT_ADDR) {
+ 195:./Src/main.c  **** 		ret = (addr & 0x000003FF) | I2C_CR2_ADD10;
+ 196:./Src/main.c  **** 	} else {
+ 197:./Src/main.c  **** 		// 7 Bit Address
+ 198:./Src/main.c  **** 		ret = (addr & 0x0000007F) << 1;
+ 199:./Src/main.c  **** 	}
+ 200:./Src/main.c  **** 
+ 201:./Src/main.c  **** 	if (direction == I2C_READ) {
+ 202:./Src/main.c  **** 		ret |= I2C_CR2_RD_WRN;
+ 203:./Src/main.c  **** 		if (addr & I2C_10BIT_ADDR) {
+ 204:./Src/main.c  **** 			ret |= I2C_CR2_HEAD10R;
+ 205:./Src/main.c  **** 		}
+ 206:./Src/main.c  **** 	}
+ 207:./Src/main.c  **** 
+ 208:./Src/main.c  **** 	return ret;
+ 209:./Src/main.c  **** }
+ 210:./Src/main.c  **** 
+ 211:./Src/main.c  **** // Will return the number of data bytes written to the device
+ 212:./Src/main.c  **** uint32_t i2cWrite(I2C_TypeDef *i2c, uint32_t addr, uint8_t *txBuffer,
+ 213:./Src/main.c  **** 				  uint32_t len) {
+ 214:./Src/main.c  **** 
+ 215:./Src/main.c  **** 	uint32_t numTxBytes = 0;
+ 216:./Src/main.c  **** 
+ 217:./Src/main.c  **** 	i2c->CR1 &= ~I2C_CR1_PE;
+ 218:./Src/main.c  **** 	i2c->CR2 = 0;
+ 219:./Src/main.c  **** 
+ 220:./Src/main.c  **** 	i2c->CR2 = i2cSetup(addr, I2C_WRITE);
+ 221:./Src/main.c  **** 
+ 222:./Src/main.c  **** 	if (len > 0xFF) {
+ 223:./Src/main.c  **** 		i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD;
+ 224:./Src/main.c  **** 	} else {
+ 225:./Src/main.c  **** 		i2c->CR2 |= ((len & 0xFF) << 16) | I2C_CR2_AUTOEND;
+ 226:./Src/main.c  **** 	}
+ 227:./Src/main.c  **** 	i2c->CR1 |= I2C_CR1_PE;
+ 228:./Src/main.c  **** 	i2c->CR2 |= I2C_CR2_START;
+ 229:./Src/main.c  **** 	while(i2c->CR2 & I2C_CR2_START);
+ 230:./Src/main.c  **** 	uint8_t done = 0;
+ 231:./Src/main.c  **** 	uint32_t i = 0;
+ 232:./Src/main.c  **** 	while (!done && i < 0x0000001F) {
+ 233:./Src/main.c  **** 		i++;
+ 234:./Src/main.c  **** 		if (i2c->ISR & I2C_ISR_NACKF) {
+ 235:./Src/main.c  **** 			// Was not acknowledged, disable device and exit
+ 236:./Src/main.c  **** 			done = 1;
+ 237:./Src/main.c  **** 		}
+ 238:./Src/main.c  **** 
+ 239:./Src/main.c  **** 		if (i2c->ISR & I2C_ISR_TXIS) {
+ 240:./Src/main.c  **** 			// Device acknowledged and we must send the next byte
+ 241:./Src/main.c  **** 			if (numTxBytes < len){
+ARM GAS  /tmp/cc3y5xFn.s 			page 6
+
+
+ 242:./Src/main.c  **** 				i2c->TXDR = txBuffer[numTxBytes++];
+ 243:./Src/main.c  **** 			}
+ 244:./Src/main.c  **** 
+ 245:./Src/main.c  **** 			i = 0;
+ 246:./Src/main.c  **** 
+ 247:./Src/main.c  **** 		}
+ 248:./Src/main.c  **** 
+ 249:./Src/main.c  **** 		if (i2c->ISR & I2C_ISR_TC) {
+ 250:./Src/main.c  **** 			done = 1;
+ 251:./Src/main.c  **** 		}
+ 252:./Src/main.c  **** 
+ 253:./Src/main.c  **** 		if (i2c->ISR & I2C_ISR_TCR) {
+ 254:./Src/main.c  **** 			i = 0;
+ 255:./Src/main.c  **** 			if ((len - numTxBytes) > 0xFF) {
+ 256:./Src/main.c  **** 				i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD;
+ 257:./Src/main.c  **** 			} else {
+ 258:./Src/main.c  **** 				i2c->CR2 &= ~(0x00FF0000 | I2C_CR2_RELOAD);
+ 259:./Src/main.c  **** 				i2c->CR2 |= ((len - numTxBytes) & 0xFF) << 16 |
+ 260:./Src/main.c  **** 							I2C_CR2_AUTOEND;
+ 261:./Src/main.c  **** 			}
+ 262:./Src/main.c  **** 		}
+ 263:./Src/main.c  **** 
+ 264:./Src/main.c  **** 	}
+ 265:./Src/main.c  **** 	i2c->CR1 &= ~I2C_CR1_PE;
+ 266:./Src/main.c  **** 	return numTxBytes;
+ 267:./Src/main.c  **** }
+ 268:./Src/main.c  **** 
+ 269:./Src/main.c  **** uint32_t i2cRead(I2C_TypeDef *i2c, uint8_t addr, uint8_t *rxBuffer,
+ 270:./Src/main.c  **** 				 uint32_t numBytes) {
+ 271:./Src/main.c  **** 
+ 272:./Src/main.c  **** 	uint32_t numRxBytes = 0;
+ 273:./Src/main.c  **** 
+ 274:./Src/main.c  **** 	i2c->CR1 &= ~I2C_CR1_PE;
+ 275:./Src/main.c  **** 	i2c->CR2 = 0;
+ 276:./Src/main.c  **** 
+ 277:./Src/main.c  **** 	i2c->CR2 = i2cSetup(addr, I2C_READ);
+ 278:./Src/main.c  **** 
+ 279:./Src/main.c  **** 	if (numBytes > 0xFF) {
+ 280:./Src/main.c  **** 		i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD;
+ 281:./Src/main.c  **** 	} else {
+ 282:./Src/main.c  **** 		i2c->CR2 |= ((numBytes & 0xFF) << 16) | I2C_CR2_AUTOEND;
+ 283:./Src/main.c  **** 	}
+ 284:./Src/main.c  **** 	i2c->CR1 |= I2C_CR1_PE;
+ 285:./Src/main.c  **** 	i2c->CR2 |= I2C_CR2_START;
+ 286:./Src/main.c  **** 
+ 287:./Src/main.c  **** 	while(i2c->CR2 & I2C_CR2_START);
+ 288:./Src/main.c  **** 	uint8_t done = 0;
+ 289:./Src/main.c  **** 	uint32_t i = 0;
+ 290:./Src/main.c  **** 	while (!done && i < 0x0000001F) {
+ 291:./Src/main.c  **** 		i++;
+ 292:./Src/main.c  **** 
+ 293:./Src/main.c  **** 		if (i2c->ISR & I2C_ISR_RXNE) {
+ 294:./Src/main.c  **** 			// Device acknowledged and we must send the next byte
+ 295:./Src/main.c  **** 			if (numRxBytes < numBytes){
+ 296:./Src/main.c  **** 				rxBuffer[numRxBytes++] = i2c->RXDR;
+ 297:./Src/main.c  **** 			}
+ 298:./Src/main.c  **** 
+ARM GAS  /tmp/cc3y5xFn.s 			page 7
+
+
+ 299:./Src/main.c  **** 			i = 0;
+ 300:./Src/main.c  **** 		}
+ 301:./Src/main.c  **** 
+ 302:./Src/main.c  **** 		if (i2c->ISR & I2C_ISR_TC) {
+ 303:./Src/main.c  **** 			done = 1;
+ 304:./Src/main.c  **** 		}
+ 305:./Src/main.c  **** 
+ 306:./Src/main.c  **** 		if (i2c->ISR & I2C_ISR_TCR) {
+ 307:./Src/main.c  **** 			i = 0;
+ 308:./Src/main.c  **** 			if ((numBytes - numRxBytes) > 0xFF) {
+ 309:./Src/main.c  **** 				i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD;
+ 310:./Src/main.c  **** 			} else {
+ 311:./Src/main.c  **** 				i2c->CR2 &= ~(0x00FF0000 | I2C_CR2_RELOAD);
+ 312:./Src/main.c  **** 				i2c->CR2 |= ((numBytes - numRxBytes) & 0xFF) << 16 |
+ 313:./Src/main.c  **** 							I2C_CR2_AUTOEND;
+ 314:./Src/main.c  **** 			}
+ 315:./Src/main.c  **** 		}
+ 316:./Src/main.c  **** 
+ 317:./Src/main.c  **** 	}
+ 318:./Src/main.c  **** 	i2c->CR1 &= ~I2C_CR1_PE;
+ 319:./Src/main.c  **** 	return numRxBytes;
+ 320:./Src/main.c  **** }
+ 321:./Src/main.c  **** #endif
+ 322:./Src/main.c  **** 
+ 323:./Src/main.c  **** 
+ 324:./Src/main.c  **** /**
+ 325:./Src/main.c  ****   * @brief  Main program
+ 326:./Src/main.c  ****   * @param  None
+ 327:./Src/main.c  ****   * @retval None
+ 328:./Src/main.c  ****   */
+ 329:./Src/main.c  **** int main(void)
+ 330:./Src/main.c  **** {
+  48              		.loc 1 330 0
+  49              		.cfi_startproc
+  50              		@ Volatile: function does not return.
+  51              		@ args = 0, pretend = 0, frame = 32
+  52              		@ frame_needed = 0, uses_anonymous_args = 0
+  53 0000 10B5     		push	{r4, lr}
+  54              	.LCFI0:
+  55              		.cfi_def_cfa_offset 8
+  56              		.cfi_offset 4, -8
+  57              		.cfi_offset 14, -4
+  58 0002 88B0     		sub	sp, sp, #32
+  59              	.LCFI1:
+  60              		.cfi_def_cfa_offset 40
+ 331:./Src/main.c  **** 	/* STM32 HAL library initialization*/
+ 332:./Src/main.c  **** 	HAL_Init();
+  61              		.loc 1 332 0
+  62 0004 FFF7FEFF 		bl	HAL_Init
+  63              	.LVL0:
+ 333:./Src/main.c  **** 
+ 334:./Src/main.c  **** 	/* Configure the system clock*/
+ 335:./Src/main.c  **** 	SystemClock_Config();
+  64              		.loc 1 335 0
+  65 0008 FFF7FEFF 		bl	SystemClock_Config
+  66              	.LVL1:
+ 336:./Src/main.c  **** 
+ARM GAS  /tmp/cc3y5xFn.s 			page 8
+
+
+ 337:./Src/main.c  **** 	/* Configure the debug mode*/
+ 338:./Src/main.c  **** 	DBG_Init();
+  67              		.loc 1 338 0
+  68 000c FFF7FEFF 		bl	DBG_Init
+  69              	.LVL2:
+  70              	.LBB2:
+ 339:./Src/main.c  **** 
+ 340:./Src/main.c  **** 	__HAL_RCC_GPIOA_CLK_ENABLE();
+  71              		.loc 1 340 0
+  72 0010 154B     		ldr	r3, .L4
+  73 0012 DA6A     		ldr	r2, [r3, #44]
+  74 0014 0124     		movs	r4, #1
+  75 0016 2243     		orrs	r2, r4
+  76 0018 DA62     		str	r2, [r3, #44]
+  77 001a DA6A     		ldr	r2, [r3, #44]
+  78 001c 2240     		ands	r2, r4
+  79 001e 0192     		str	r2, [sp, #4]
+  80 0020 019A     		ldr	r2, [sp, #4]
+  81              	.LBE2:
+  82              	.LBB3:
+ 341:./Src/main.c  **** 	__HAL_RCC_GPIOC_CLK_ENABLE();
+  83              		.loc 1 341 0
+  84 0022 D96A     		ldr	r1, [r3, #44]
+  85 0024 0422     		movs	r2, #4
+  86 0026 1143     		orrs	r1, r2
+  87 0028 D962     		str	r1, [r3, #44]
+  88 002a DB6A     		ldr	r3, [r3, #44]
+  89 002c 1A40     		ands	r2, r3
+  90 002e 0292     		str	r2, [sp, #8]
+  91 0030 029B     		ldr	r3, [sp, #8]
+  92              	.LBE3:
+ 342:./Src/main.c  **** 
+ 343:./Src/main.c  **** 	/* Configure the hardware*/
+ 344:./Src/main.c  **** 	HW_Init();
+  93              		.loc 1 344 0
+  94 0032 FFF7FEFF 		bl	HW_Init
+  95              	.LVL3:
+ 345:./Src/main.c  **** 	MX_I2C1_Init();
+  96              		.loc 1 345 0
+  97 0036 FFF7FEFF 		bl	MX_I2C1_Init
+  98              	.LVL4:
+ 346:./Src/main.c  **** 
+ 347:./Src/main.c  **** 	// BLINKY
+ 348:./Src/main.c  **** 	GPIO_InitTypeDef initStruct = { 0 };
+  99              		.loc 1 348 0
+ 100 003a 1422     		movs	r2, #20
+ 101 003c 0021     		movs	r1, #0
+ 102 003e 03A8     		add	r0, sp, #12
+ 103 0040 FFF7FEFF 		bl	memset
+ 104              	.LVL5:
+ 349:./Src/main.c  **** 	initStruct.Mode =GPIO_MODE_OUTPUT_PP;
+ 105              		.loc 1 349 0
+ 106 0044 0494     		str	r4, [sp, #16]
+ 350:./Src/main.c  **** 	initStruct.Pull = GPIO_NOPULL;
+ 351:./Src/main.c  **** 	initStruct.Speed = GPIO_SPEED_HIGH;
+ 107              		.loc 1 351 0
+ 108 0046 0323     		movs	r3, #3
+ARM GAS  /tmp/cc3y5xFn.s 			page 9
+
+
+ 109 0048 0693     		str	r3, [sp, #24]
+ 352:./Src/main.c  **** 	HW_GPIO_Init(GPIOC, GPIO_PIN_7, &initStruct);
+ 110              		.loc 1 352 0
+ 111 004a 03AA     		add	r2, sp, #12
+ 112 004c 8021     		movs	r1, #128
+ 113 004e 0748     		ldr	r0, .L4+4
+ 114 0050 FFF7FEFF 		bl	HW_GPIO_Init
+ 115              	.LVL6:
+ 353:./Src/main.c  **** 
+ 354:./Src/main.c  **** 	/* USER CODE BEGIN 1 */
+ 355:./Src/main.c  **** 	/* USER CODE END 1 */
+ 356:./Src/main.c  **** 	voc_init();
+ 116              		.loc 1 356 0
+ 117 0054 FFF7FEFF 		bl	voc_init
+ 118              	.LVL7:
+ 119              	.L3:
+ 357:./Src/main.c  **** 
+ 358:./Src/main.c  **** 	while(1) {
+ 359:./Src/main.c  **** 		GPIOC->ODR ^= 1<<7;
+ 120              		.loc 1 359 0 discriminator 1
+ 121 0058 044A     		ldr	r2, .L4+4
+ 122 005a 5369     		ldr	r3, [r2, #20]
+ 123 005c 8021     		movs	r1, #128
+ 124 005e 4B40     		eors	r3, r1
+ 125 0060 5361     		str	r3, [r2, #20]
+ 360:./Src/main.c  **** 		voc_measure();
+ 126              		.loc 1 360 0 discriminator 1
+ 127 0062 FFF7FEFF 		bl	voc_measure
+ 128              	.LVL8:
+ 129 0066 F7E7     		b	.L3
+ 130              	.L5:
+ 131              		.align	2
+ 132              	.L4:
+ 133 0068 00100240 		.word	1073876992
+ 134 006c 00080050 		.word	1342179328
+ 135              		.cfi_endproc
+ 136              	.LFE231:
+ 138              		.text
+ 139              	.Letext0:
+ 140              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
+ 141              		.file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
+ 142              		.file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+ 143              		.file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
+ 144              		.file 6 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h"
+ 145              		.file 7 "/usr/arm-none-eabi/include/sys/lock.h"
+ 146              		.file 8 "/usr/arm-none-eabi/include/sys/_types.h"
+ 147              		.file 9 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+ 148              		.file 10 "/usr/arm-none-eabi/include/sys/reent.h"
+ 149              		.file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h"
+ 150              		.file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h"
+ 151              		.file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h"
+ 152              		.file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h"
+ 153              		.file 15 "Inc/hw_i2c.h"
+ 154              		.file 16 "/usr/arm-none-eabi/include/math.h"
+ 155              		.file 17 "Middlewares/Third_Party/Lora/Mac/LoRaMac.h"
+ 156              		.file 18 "Middlewares/Third_Party/Lora/Core/lora.h"
+ 157              		.file 19 "./Src/../Drivers/BME680/bme680_defs.h"
+ARM GAS  /tmp/cc3y5xFn.s 			page 10
+
+
+ 158              		.file 20 "./Src/voc_sensor.h"
+ 159              		.file 21 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h"
+ 160              		.file 22 "Inc/hw_msp.h"
+ 161              		.file 23 "Inc/debug.h"
+ 162              		.file 24 "Inc/hw_gpio.h"
+ 163              		.file 25 "<built-in>"
+ARM GAS  /tmp/cc3y5xFn.s 			page 11
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 main.c
+     /tmp/cc3y5xFn.s:16     .text.HW_GetBatteryLevel:0000000000000000 $t
+     /tmp/cc3y5xFn.s:23     .text.HW_GetBatteryLevel:0000000000000000 HW_GetBatteryLevel
+     /tmp/cc3y5xFn.s:39     .text.main:0000000000000000 $t
+     /tmp/cc3y5xFn.s:46     .text.main:0000000000000000 main
+     /tmp/cc3y5xFn.s:133    .text.main:0000000000000068 $d
+                     .debug_frame:0000000000000010 $d
+
+UNDEFINED SYMBOLS
+HAL_Init
+SystemClock_Config
+DBG_Init
+HW_Init
+MX_I2C1_Init
+memset
+HW_GPIO_Init
+voc_init
+voc_measure

build/startup_stm32l073xx.d

@@ -0,0 +1 @@
+build/startup_stm32l073xx.d: startup/startup_stm32l073xx.s

build/stm32l0xx_hal.d

@@ -0,0 +1,102 @@
+build/stm32l0xx_hal.d: Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_adc.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_adc.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_adc_ex.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_adc_ex.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_adc_ex.lst

@@ -0,0 +1,924 @@
+ARM GAS  /tmp/ccS1GlwB.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_adc_ex.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              		.section	.text.HAL_ADCEx_Calibration_Start,"ax",%progbits
+  16              		.align	1
+  17              		.global	HAL_ADCEx_Calibration_Start
+  18              		.syntax unified
+  19              		.code	16
+  20              		.thumb_func
+  21              		.fpu softvfp
+  23              	HAL_ADCEx_Calibration_Start:
+  24              	.LFB39:
+  25              		.file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c"
+   1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /**
+   2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   ******************************************************************************
+   3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @file    stm32l0xx_hal_adc_ex.c
+   4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @author  MCD Application Team
+   5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @brief   This file provides firmware functions to manage the following 
+   6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *          functionalities of the Analog to Digital Convertor (ADC)
+   7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *          peripheral:
+   8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *           + Operation functions
+   9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *             ++ Calibration
+  10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *               +++ ADC automatic self-calibration
+  11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *               +++ Calibration factors get or set
+  12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *          Other functions (generic functions) are available in file 
+  13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *          "stm32l0xx_hal_adc.c".
+  14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *
+  15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   @verbatim
+  16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   [..] 
+  17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   (@) Sections "ADC peripheral features" and "How to use this driver" are
+  18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****       available in file of generic functions "stm32l0xx_hal_adc.c".
+  19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   [..]
+  20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   @endverbatim
+  21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   ******************************************************************************
+  22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @attention
+  23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *
+  24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *
+  26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * Redistribution and use in source and binary forms, with or without modification,
+  27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * are permitted provided that the following conditions are met:
+  28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *   1. Redistributions of source code must retain the above copyright notice,
+  29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *      this list of conditions and the following disclaimer.
+  30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *   2. Redistributions in binary form must reproduce the above copyright notice,
+  31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *      this list of conditions and the following disclaimer in the documentation
+  32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *      and/or other materials provided with the distribution.
+  33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *   3. Neither the name of STMicroelectronics nor the names of its contributors
+ARM GAS  /tmp/ccS1GlwB.s 			page 2
+
+
+  34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *      may be used to endorse or promote products derived from this software
+  35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *      without specific prior written permission.
+  36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *
+  37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *
+  48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   ******************************************************************************
+  49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   */
+  50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+  51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Includes ------------------------------------------------------------------*/
+  52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** #include "stm32l0xx_hal.h"
+  53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+  54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** @addtogroup STM32L0xx_HAL_Driver
+  55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @{
+  56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   */
+  57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+  58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** @defgroup ADCEx ADCEx
+  59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @brief ADC Extended HAL module driver
+  60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @{
+  61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   */
+  62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+  63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** #ifdef HAL_ADC_MODULE_ENABLED
+  64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+  65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Private typedef -----------------------------------------------------------*/
+  66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Private define ------------------------------------------------------------*/
+  67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+  68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
+  69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @{
+  70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   */
+  71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+  72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Fixed timeout values for ADC calibration, enable settling time, disable  */
+  73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* settling time.                                                           */
+  74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Values defined to be higher than worst cases: low clock frequency,       */
+  75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* maximum prescaler.                                                       */
+  76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Unit: ms                                                                 */
+  77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   #define ADC_CALIBRATION_TIMEOUT      10U      
+  78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+  79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Delay for VREFINT stabilization time. */
+  80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Internal reference startup time max value is 3ms  (refer to device datasheet, parameter TVREFINT
+  81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Unit: ms */
+  82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** #define SYSCFG_BUF_VREFINT_ENABLE_TIMEOUT       ((uint32_t) 3U)
+  83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+  84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Delay for TEMPSENSOR stabilization time. */
+  85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Temperature sensor startup time max value is 10us  (refer to device datasheet, parameter tSTART)
+  86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Unit: ms */
+  87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** #define SYSCFG_BUF_TEMPSENSOR_ENABLE_TIMEOUT    ((uint32_t) 1U)
+  88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+  89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Private macro -------------------------------------------------------------*/
+  90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Private variables ---------------------------------------------------------*/
+ARM GAS  /tmp/ccS1GlwB.s 			page 3
+
+
+  91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Private function prototypes -----------------------------------------------*/
+  92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Exported functions --------------------------------------------------------*/
+  93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+  94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
+  95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @{
+  96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   */
+  97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+  98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
+  99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @brief    Extended IO operation functions
+ 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *
+ 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** @verbatim
+ 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****  ===============================================================================
+ 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****                       ##### IO operation functions #####
+ 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****  ===============================================================================
+ 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     [..]  This section provides functions allowing to:
+ 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****       (+) Perform the ADC calibration.
+ 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** @endverbatim
+ 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @{
+ 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   */
+ 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+ 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /**
+ 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @brief  Perform an ADC automatic self-calibration
+ 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *         Calibration prerequisite: ADC must be disabled (execute this
+ 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *         function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
+ 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @note   Calibration factor can be read after calibration, using function
+ 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *         HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]).
+ 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @param  hadc       ADC handle
+ 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @param  SingleDiff: Selection of single-ended or differential input
+ 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *          This parameter can be only of the following values:
+ 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *            @arg ADC_SINGLE_ENDED: Channel in mode input single ended
+ 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @retval HAL status
+ 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   */
+ 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
+ 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** {
+  26              		.loc 1 124 0
+  27              		.cfi_startproc
+  28              		@ args = 0, pretend = 0, frame = 0
+  29              		@ frame_needed = 0, uses_anonymous_args = 0
+  30              	.LVL0:
+  31 0000 70B5     		push	{r4, r5, r6, lr}
+  32              	.LCFI0:
+  33              		.cfi_def_cfa_offset 16
+  34              		.cfi_offset 4, -16
+  35              		.cfi_offset 5, -12
+  36              		.cfi_offset 6, -8
+  37              		.cfi_offset 14, -4
+  38 0002 0400     		movs	r4, r0
+  39              	.LVL1:
+ 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   uint32_t tickstart = 0U;
+ 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   uint32_t backup_setting_adc_dma_transfer = 0U; /* Note: Variable not declared as volatile because
+ 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Check the parameters */
+ 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+ 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+ 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Process locked */
+ 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   __HAL_LOCK(hadc);
+ARM GAS  /tmp/ccS1GlwB.s 			page 4
+
+
+  40              		.loc 1 133 0
+  41 0004 5423     		movs	r3, #84
+  42 0006 C35C     		ldrb	r3, [r0, r3]
+  43 0008 012B     		cmp	r3, #1
+  44 000a 49D0     		beq	.L7
+  45              		.loc 1 133 0 is_stmt 0 discriminator 2
+  46 000c 5423     		movs	r3, #84
+  47 000e 0122     		movs	r2, #1
+  48 0010 C254     		strb	r2, [r0, r3]
+ 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Calibration prerequisite: ADC must be disabled. */
+ 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   if (ADC_IS_ENABLE(hadc) == RESET)
+  49              		.loc 1 136 0 is_stmt 1 discriminator 2
+  50 0012 0368     		ldr	r3, [r0]
+  51 0014 9968     		ldr	r1, [r3, #8]
+  52              	.LVL2:
+  53 0016 0232     		adds	r2, r2, #2
+  54 0018 0A40     		ands	r2, r1
+  55 001a 012A     		cmp	r2, #1
+  56 001c 08D1     		bne	.L3
+  57              		.loc 1 136 0 is_stmt 0 discriminator 1
+  58 001e 1A68     		ldr	r2, [r3]
+  59 0020 D207     		lsls	r2, r2, #31
+  60 0022 05D5     		bpl	.L3
+ 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   {
+ 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /* Set ADC state */
+ 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     ADC_STATE_CLR_SET(hadc->State, 
+ 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****                       HAL_ADC_STATE_REG_BUSY,
+ 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****                       HAL_ADC_STATE_BUSY_INTERNAL);
+ 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     
+ 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /* Disable ADC DMA transfer request during calibration */
+ 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /* Note: Specificity of this STM32 serie: Calibration factor is           */
+ 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /*       available in data register and also transfered by DMA.           */
+ 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /*       To not insert ADC calibration factor among ADC conversion data   */
+ 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /*       in array variable, DMA transfer must be disabled during          */
+ 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /*       calibration.                                                     */
+ 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_D
+ 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG);
+ 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     
+ 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /* Start ADC calibration */
+ 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     hadc->Instance->CR |= ADC_CR_ADCAL;
+ 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     
+ 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     tickstart = HAL_GetTick();  
+ 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     
+ 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /* Wait for calibration completion */
+ 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL))
+ 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     {
+ 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****       if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
+ 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****       {
+ 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****         /* Update ADC state machine to error */
+ 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****         ADC_STATE_CLR_SET(hadc->State,
+ 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****                           HAL_ADC_STATE_BUSY_INTERNAL,
+ 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****                           HAL_ADC_STATE_ERROR_INTERNAL);
+ 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****         
+ 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****         /* Process unlocked */
+ 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****         __HAL_UNLOCK(hadc);
+ 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****         
+ARM GAS  /tmp/ccS1GlwB.s 			page 5
+
+
+ 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****         return HAL_ERROR;
+ 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****       }
+ 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     }
+ 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     
+ 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /* Restore ADC DMA transfer request after calibration */
+ 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer);
+ 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     
+ 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /* Set ADC state */
+ 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     ADC_STATE_CLR_SET(hadc->State,
+ 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****                       HAL_ADC_STATE_BUSY_INTERNAL,
+ 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****                       HAL_ADC_STATE_READY);
+ 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   }
+ 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   else
+ 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   {
+ 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /* Update ADC state machine to error */
+ 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
+  61              		.loc 1 185 0 is_stmt 1
+  62 0024 836D     		ldr	r3, [r0, #88]
+  63 0026 2022     		movs	r2, #32
+  64 0028 1343     		orrs	r3, r2
+  65 002a 8365     		str	r3, [r0, #88]
+  66              	.LVL3:
+ 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     
+ 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     tmp_hal_status = HAL_ERROR;
+  67              		.loc 1 187 0
+  68 002c 0120     		movs	r0, #1
+  69              	.LVL4:
+  70 002e 33E0     		b	.L4
+  71              	.LVL5:
+  72              	.L3:
+ 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****                       HAL_ADC_STATE_REG_BUSY,
+  73              		.loc 1 139 0
+  74 0030 A26D     		ldr	r2, [r4, #88]
+  75 0032 1C49     		ldr	r1, .L9
+  76 0034 0A40     		ands	r2, r1
+  77 0036 0631     		adds	r1, r1, #6
+  78 0038 FF31     		adds	r1, r1, #255
+  79 003a 0A43     		orrs	r2, r1
+  80 003c A265     		str	r2, [r4, #88]
+ 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG);
+  81              		.loc 1 149 0
+  82 003e DE68     		ldr	r6, [r3, #12]
+  83 0040 0131     		adds	r1, r1, #1
+  84 0042 0E40     		ands	r6, r1
+  85              	.LVL6:
+ 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     
+  86              		.loc 1 150 0
+  87 0044 DA68     		ldr	r2, [r3, #12]
+  88 0046 8A43     		bics	r2, r1
+  89 0048 DA60     		str	r2, [r3, #12]
+ 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     
+  90              		.loc 1 153 0
+  91 004a 2268     		ldr	r2, [r4]
+  92 004c 9168     		ldr	r1, [r2, #8]
+  93 004e 8023     		movs	r3, #128
+  94 0050 1B06     		lsls	r3, r3, #24
+  95 0052 0B43     		orrs	r3, r1
+ARM GAS  /tmp/ccS1GlwB.s 			page 6
+
+
+  96 0054 9360     		str	r3, [r2, #8]
+ 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     
+  97              		.loc 1 155 0
+  98 0056 FFF7FEFF 		bl	HAL_GetTick
+  99              	.LVL7:
+ 100 005a 0500     		movs	r5, r0
+ 101              	.LVL8:
+ 102              	.L5:
+ 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     {
+ 103              		.loc 1 158 0
+ 104 005c 2368     		ldr	r3, [r4]
+ 105 005e 9A68     		ldr	r2, [r3, #8]
+ 106 0060 002A     		cmp	r2, #0
+ 107 0062 0FDA     		bge	.L8
+ 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****       {
+ 108              		.loc 1 160 0
+ 109 0064 FFF7FEFF 		bl	HAL_GetTick
+ 110              	.LVL9:
+ 111 0068 401B     		subs	r0, r0, r5
+ 112 006a 0A28     		cmp	r0, #10
+ 113 006c F6D9     		bls	.L5
+ 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****                           HAL_ADC_STATE_BUSY_INTERNAL,
+ 114              		.loc 1 163 0
+ 115 006e A36D     		ldr	r3, [r4, #88]
+ 116 0070 1222     		movs	r2, #18
+ 117 0072 9343     		bics	r3, r2
+ 118 0074 023A     		subs	r2, r2, #2
+ 119 0076 1343     		orrs	r3, r2
+ 120 0078 A365     		str	r3, [r4, #88]
+ 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****         
+ 121              		.loc 1 168 0
+ 122 007a 5423     		movs	r3, #84
+ 123 007c 0022     		movs	r2, #0
+ 124 007e E254     		strb	r2, [r4, r3]
+ 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****       }
+ 125              		.loc 1 170 0
+ 126 0080 0120     		movs	r0, #1
+ 127 0082 0CE0     		b	.L2
+ 128              	.L8:
+ 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     
+ 129              		.loc 1 175 0
+ 130 0084 DA68     		ldr	r2, [r3, #12]
+ 131 0086 1643     		orrs	r6, r2
+ 132              	.LVL10:
+ 133 0088 DE60     		str	r6, [r3, #12]
+ 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****                       HAL_ADC_STATE_BUSY_INTERNAL,
+ 134              		.loc 1 178 0
+ 135 008a A36D     		ldr	r3, [r4, #88]
+ 136 008c 0322     		movs	r2, #3
+ 137 008e 9343     		bics	r3, r2
+ 138 0090 023A     		subs	r2, r2, #2
+ 139 0092 1343     		orrs	r3, r2
+ 140 0094 A365     		str	r3, [r4, #88]
+ 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   uint32_t tickstart = 0U;
+ 141              		.loc 1 125 0
+ 142 0096 0020     		movs	r0, #0
+ 143              	.LVL11:
+ARM GAS  /tmp/ccS1GlwB.s 			page 7
+
+
+ 144              	.L4:
+ 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   }
+ 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Process unlocked */
+ 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   __HAL_UNLOCK(hadc);
+ 145              		.loc 1 191 0
+ 146 0098 5423     		movs	r3, #84
+ 147 009a 0022     		movs	r2, #0
+ 148 009c E254     		strb	r2, [r4, r3]
+ 149              	.LVL12:
+ 150              	.L2:
+ 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Return function status */
+ 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   return tmp_hal_status;
+ 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** }
+ 151              		.loc 1 195 0
+ 152              		@ sp needed
+ 153              	.LVL13:
+ 154 009e 70BD     		pop	{r4, r5, r6, pc}
+ 155              	.LVL14:
+ 156              	.L7:
+ 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 157              		.loc 1 133 0
+ 158 00a0 0220     		movs	r0, #2
+ 159              	.LVL15:
+ 160 00a2 FCE7     		b	.L2
+ 161              	.L10:
+ 162              		.align	2
+ 163              	.L9:
+ 164 00a4 FDFEFFFF 		.word	-259
+ 165              		.cfi_endproc
+ 166              	.LFE39:
+ 168              		.section	.text.HAL_ADCEx_Calibration_GetValue,"ax",%progbits
+ 169              		.align	1
+ 170              		.global	HAL_ADCEx_Calibration_GetValue
+ 171              		.syntax unified
+ 172              		.code	16
+ 173              		.thumb_func
+ 174              		.fpu softvfp
+ 176              	HAL_ADCEx_Calibration_GetValue:
+ 177              	.LFB40:
+ 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+ 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /**
+ 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @brief  Get the calibration factor.
+ 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @param  hadc: ADC handle.
+ 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @param  SingleDiff: This parameter can be only:
+ 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *           @arg ADC_SINGLE_ENDED: Channel in mode input single ended.
+ 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @retval Calibration value.
+ 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   */
+ 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
+ 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** {
+ 178              		.loc 1 205 0
+ 179              		.cfi_startproc
+ 180              		@ args = 0, pretend = 0, frame = 0
+ 181              		@ frame_needed = 0, uses_anonymous_args = 0
+ 182              		@ link register save eliminated.
+ 183              	.LVL16:
+ARM GAS  /tmp/ccS1GlwB.s 			page 8
+
+
+ 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Check the parameters */
+ 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+ 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 
+ 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Return the ADC calibration value */ 
+ 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   return ((hadc->Instance->CALFACT) & 0x0000007FU);
+ 184              		.loc 1 211 0
+ 185 0000 0268     		ldr	r2, [r0]
+ 186 0002 B423     		movs	r3, #180
+ 187 0004 D358     		ldr	r3, [r2, r3]
+ 188 0006 7F20     		movs	r0, #127
+ 189              	.LVL17:
+ 190 0008 1840     		ands	r0, r3
+ 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** }
+ 191              		.loc 1 212 0
+ 192              		@ sp needed
+ 193 000a 7047     		bx	lr
+ 194              		.cfi_endproc
+ 195              	.LFE40:
+ 197              		.section	.text.HAL_ADCEx_Calibration_SetValue,"ax",%progbits
+ 198              		.align	1
+ 199              		.global	HAL_ADCEx_Calibration_SetValue
+ 200              		.syntax unified
+ 201              		.code	16
+ 202              		.thumb_func
+ 203              		.fpu softvfp
+ 205              	HAL_ADCEx_Calibration_SetValue:
+ 206              	.LFB41:
+ 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+ 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /**
+ 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @brief  Set the calibration factor to overwrite automatic conversion result.
+ 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *         ADC must be enabled and no conversion is ongoing.
+ 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @param  hadc: ADC handle
+ 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @param  SingleDiff: This parameter can be only:
+ 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *           @arg ADC_SINGLE_ENDED: Channel in mode input single ended.
+ 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @param  CalibrationFactor: Calibration factor (coded on 7 bits maximum)
+ 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @retval HAL state
+ 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   */
+ 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint
+ 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** {
+ 207              		.loc 1 224 0
+ 208              		.cfi_startproc
+ 209              		@ args = 0, pretend = 0, frame = 0
+ 210              		@ frame_needed = 0, uses_anonymous_args = 0
+ 211              	.LVL18:
+ 212 0000 30B5     		push	{r4, r5, lr}
+ 213              	.LCFI1:
+ 214              		.cfi_def_cfa_offset 12
+ 215              		.cfi_offset 4, -12
+ 216              		.cfi_offset 5, -8
+ 217              		.cfi_offset 14, -4
+ 218              	.LVL19:
+ 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Check the parameters */
+ 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+ 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 
+ARM GAS  /tmp/ccS1GlwB.s 			page 9
+
+
+ 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   assert_param(IS_ADC_CALFACT(CalibrationFactor)); 
+ 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Process locked */
+ 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   __HAL_LOCK(hadc);
+ 219              		.loc 1 233 0
+ 220 0002 5423     		movs	r3, #84
+ 221 0004 C35C     		ldrb	r3, [r0, r3]
+ 222 0006 012B     		cmp	r3, #1
+ 223 0008 27D0     		beq	.L16
+ 224              		.loc 1 233 0 is_stmt 0 discriminator 2
+ 225 000a 5423     		movs	r3, #84
+ 226 000c 0121     		movs	r1, #1
+ 227              	.LVL20:
+ 228 000e C154     		strb	r1, [r0, r3]
+ 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Verification of hardware constraints before modifying the calibration    */
+ 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* factors register: ADC must be enabled, no conversion on going.           */
+ 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   if ( (ADC_IS_ENABLE(hadc) != RESET)                            &&
+ 229              		.loc 1 237 0 is_stmt 1 discriminator 2
+ 230 0010 0168     		ldr	r1, [r0]
+ 231 0012 8C68     		ldr	r4, [r1, #8]
+ 232 0014 513B     		subs	r3, r3, #81
+ 233 0016 2340     		ands	r3, r4
+ 234 0018 012B     		cmp	r3, #1
+ 235 001a 0DD0     		beq	.L17
+ 236              	.L14:
+ 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****        (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)  )
+ 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   {
+ 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /* Set the selected ADC calibration value */ 
+ 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     hadc->Instance->CALFACT &= ~ADC_CALFACT_CALFACT;
+ 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     hadc->Instance->CALFACT |= CalibrationFactor;
+ 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   }
+ 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   else
+ 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   {
+ 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /* Update ADC state machine to error */
+ 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
+ 237              		.loc 1 247 0
+ 238 001c 836D     		ldr	r3, [r0, #88]
+ 239 001e 1022     		movs	r2, #16
+ 240              	.LVL21:
+ 241 0020 1343     		orrs	r3, r2
+ 242 0022 8365     		str	r3, [r0, #88]
+ 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /* Update ADC state machine to error */
+ 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
+ 243              		.loc 1 249 0
+ 244 0024 C36D     		ldr	r3, [r0, #92]
+ 245 0026 0F3A     		subs	r2, r2, #15
+ 246 0028 1343     		orrs	r3, r2
+ 247 002a C365     		str	r3, [r0, #92]
+ 248              	.LVL22:
+ 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     
+ 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     /* Update ADC state machine to error */
+ 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     tmp_hal_status = HAL_ERROR;
+ 249              		.loc 1 252 0
+ 250 002c 0123     		movs	r3, #1
+ 251              	.LVL23:
+ 252              	.L15:
+ARM GAS  /tmp/ccS1GlwB.s 			page 10
+
+
+ 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   }
+ 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Process unlocked */
+ 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   __HAL_UNLOCK(hadc);
+ 253              		.loc 1 256 0
+ 254 002e 5422     		movs	r2, #84
+ 255 0030 0021     		movs	r1, #0
+ 256 0032 8154     		strb	r1, [r0, r2]
+ 257              	.LVL24:
+ 258              	.L13:
+ 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Return function status */
+ 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   return tmp_hal_status;
+ 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** }
+ 259              		.loc 1 260 0
+ 260 0034 1800     		movs	r0, r3
+ 261              	.LVL25:
+ 262              		@ sp needed
+ 263 0036 30BD     		pop	{r4, r5, pc}
+ 264              	.LVL26:
+ 265              	.L17:
+ 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****        (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)  )
+ 266              		.loc 1 237 0 discriminator 1
+ 267 0038 0B68     		ldr	r3, [r1]
+ 268 003a DB07     		lsls	r3, r3, #31
+ 269 003c EED5     		bpl	.L14
+ 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   {
+ 270              		.loc 1 238 0
+ 271 003e 8B68     		ldr	r3, [r1, #8]
+ 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****        (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)  )
+ 272              		.loc 1 237 0
+ 273 0040 5B07     		lsls	r3, r3, #29
+ 274 0042 EBD4     		bmi	.L14
+ 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     hadc->Instance->CALFACT |= CalibrationFactor;
+ 275              		.loc 1 241 0
+ 276 0044 B423     		movs	r3, #180
+ 277 0046 CC58     		ldr	r4, [r1, r3]
+ 278 0048 7F25     		movs	r5, #127
+ 279 004a AC43     		bics	r4, r5
+ 280 004c CC50     		str	r4, [r1, r3]
+ 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   }
+ 281              		.loc 1 242 0
+ 282 004e 0468     		ldr	r4, [r0]
+ 283 0050 E158     		ldr	r1, [r4, r3]
+ 284 0052 0A43     		orrs	r2, r1
+ 285              	.LVL27:
+ 286 0054 E250     		str	r2, [r4, r3]
+ 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 287              		.loc 1 225 0
+ 288 0056 0023     		movs	r3, #0
+ 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   }
+ 289              		.loc 1 242 0
+ 290 0058 E9E7     		b	.L15
+ 291              	.LVL28:
+ 292              	.L16:
+ 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 293              		.loc 1 233 0
+ARM GAS  /tmp/ccS1GlwB.s 			page 11
+
+
+ 294 005a 0223     		movs	r3, #2
+ 295 005c EAE7     		b	.L13
+ 296              		.cfi_endproc
+ 297              	.LFE41:
+ 299              		.section	.text.HAL_ADCEx_EnableVREFINT,"ax",%progbits
+ 300              		.align	1
+ 301              		.global	HAL_ADCEx_EnableVREFINT
+ 302              		.syntax unified
+ 303              		.code	16
+ 304              		.thumb_func
+ 305              		.fpu softvfp
+ 307              	HAL_ADCEx_EnableVREFINT:
+ 308              	.LFB42:
+ 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+ 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /**
+ 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @brief  Enables the buffer of Vrefint for the ADC, required when device is in mode low-power (l
+ 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *         This function must be called before function HAL_ADC_Init() 
+ 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *         (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first)
+ 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   *         For more details on procedure and buffer current consumption, refer to device reference
+ 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @note   This is functional only if the LOCK is not set.
+ 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @retval None
+ 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */
+ 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_EnableVREFINT(void)
+ 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** {
+ 309              		.loc 1 271 0
+ 310              		.cfi_startproc
+ 311              		@ args = 0, pretend = 0, frame = 0
+ 312              		@ frame_needed = 0, uses_anonymous_args = 0
+ 313 0000 10B5     		push	{r4, lr}
+ 314              	.LCFI2:
+ 315              		.cfi_def_cfa_offset 8
+ 316              		.cfi_offset 4, -8
+ 317              		.cfi_offset 14, -4
+ 318              	.LVL29:
+ 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   uint32_t tickstart = 0U;
+ 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Enable the Buffer for the ADC by setting ENBUF_SENSOR_ADC bit in the CFGR3 register */
+ 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC);
+ 319              		.loc 1 275 0
+ 320 0002 0B4A     		ldr	r2, .L24
+ 321 0004 116A     		ldr	r1, [r2, #32]
+ 322 0006 8023     		movs	r3, #128
+ 323 0008 5B00     		lsls	r3, r3, #1
+ 324 000a 0B43     		orrs	r3, r1
+ 325 000c 1362     		str	r3, [r2, #32]
+ 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Wait for Vrefint buffer effectively enabled */
+ 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Get tick count */
+ 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   tickstart = HAL_GetTick();
+ 326              		.loc 1 279 0
+ 327 000e FFF7FEFF 		bl	HAL_GetTick
+ 328              	.LVL30:
+ 329 0012 0400     		movs	r4, r0
+ 330              	.LVL31:
+ 331              	.L19:
+ 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   while(HAL_IS_BIT_CLR(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF))
+ARM GAS  /tmp/ccS1GlwB.s 			page 12
+
+
+ 332              		.loc 1 281 0
+ 333 0014 064B     		ldr	r3, .L24
+ 334 0016 1B6A     		ldr	r3, [r3, #32]
+ 335 0018 5B00     		lsls	r3, r3, #1
+ 336 001a 06D4     		bmi	.L23
+ 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   {
+ 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     if((HAL_GetTick() - tickstart) > SYSCFG_BUF_VREFINT_ENABLE_TIMEOUT)
+ 337              		.loc 1 283 0
+ 338 001c FFF7FEFF 		bl	HAL_GetTick
+ 339              	.LVL32:
+ 340 0020 001B     		subs	r0, r0, r4
+ 341 0022 0328     		cmp	r0, #3
+ 342 0024 F6D9     		bls	.L19
+ 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     { 
+ 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****       return HAL_ERROR;
+ 343              		.loc 1 285 0
+ 344 0026 0120     		movs	r0, #1
+ 345 0028 00E0     		b	.L20
+ 346              	.L23:
+ 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     }
+ 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   }
+ 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   return HAL_OK;
+ 347              		.loc 1 289 0
+ 348 002a 0020     		movs	r0, #0
+ 349              	.L20:
+ 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** }
+ 350              		.loc 1 290 0
+ 351              		@ sp needed
+ 352              	.LVL33:
+ 353 002c 10BD     		pop	{r4, pc}
+ 354              	.L25:
+ 355 002e C046     		.align	2
+ 356              	.L24:
+ 357 0030 00000140 		.word	1073807360
+ 358              		.cfi_endproc
+ 359              	.LFE42:
+ 361              		.section	.text.HAL_ADCEx_DisableVREFINT,"ax",%progbits
+ 362              		.align	1
+ 363              		.global	HAL_ADCEx_DisableVREFINT
+ 364              		.syntax unified
+ 365              		.code	16
+ 366              		.thumb_func
+ 367              		.fpu softvfp
+ 369              	HAL_ADCEx_DisableVREFINT:
+ 370              	.LFB43:
+ 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+ 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /**
+ 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @brief Disables the Buffer Vrefint for the ADC.
+ 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @note This is functional only if the LOCK is not set.
+ 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @retval None
+ 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   */
+ 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** void HAL_ADCEx_DisableVREFINT(void)
+ 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** {
+ 371              		.loc 1 298 0
+ 372              		.cfi_startproc
+ 373              		@ args = 0, pretend = 0, frame = 0
+ARM GAS  /tmp/ccS1GlwB.s 			page 13
+
+
+ 374              		@ frame_needed = 0, uses_anonymous_args = 0
+ 375              		@ link register save eliminated.
+ 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Disable the Vrefint by resetting ENBUF_SENSOR_ADC bit in the CFGR3 register */
+ 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC);
+ 376              		.loc 1 300 0
+ 377 0000 024A     		ldr	r2, .L27
+ 378 0002 136A     		ldr	r3, [r2, #32]
+ 379 0004 0249     		ldr	r1, .L27+4
+ 380 0006 0B40     		ands	r3, r1
+ 381 0008 1362     		str	r3, [r2, #32]
+ 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** }
+ 382              		.loc 1 301 0
+ 383              		@ sp needed
+ 384 000a 7047     		bx	lr
+ 385              	.L28:
+ 386              		.align	2
+ 387              	.L27:
+ 388 000c 00000140 		.word	1073807360
+ 389 0010 FFFEFFFF 		.word	-257
+ 390              		.cfi_endproc
+ 391              	.LFE43:
+ 393              		.section	.text.HAL_ADCEx_EnableVREFINTTempSensor,"ax",%progbits
+ 394              		.align	1
+ 395              		.global	HAL_ADCEx_EnableVREFINTTempSensor
+ 396              		.syntax unified
+ 397              		.code	16
+ 398              		.thumb_func
+ 399              		.fpu softvfp
+ 401              	HAL_ADCEx_EnableVREFINTTempSensor:
+ 402              	.LFB44:
+ 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+ 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /**
+ 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @brief  Enables the buffer of temperature sensor for the ADC, required when device is in mode low
+ 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** *         This function must be called before function HAL_ADC_Init()
+ 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** *         (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first)
+ 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** *         For more details on procedure and buffer current consumption, refer to device reference m
+ 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @note   This is functional only if the LOCK is not set.
+ 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @retval None
+ 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */
+ 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_EnableVREFINTTempSensor(void)
+ 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** {
+ 403              		.loc 1 312 0
+ 404              		.cfi_startproc
+ 405              		@ args = 0, pretend = 0, frame = 0
+ 406              		@ frame_needed = 0, uses_anonymous_args = 0
+ 407 0000 10B5     		push	{r4, lr}
+ 408              	.LCFI3:
+ 409              		.cfi_def_cfa_offset 8
+ 410              		.cfi_offset 4, -8
+ 411              		.cfi_offset 14, -4
+ 412              	.LVL34:
+ 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   uint32_t tickstart = 0U;
+ 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Enable the Buffer for the ADC by setting ENBUF_SENSOR_ADC bit in the CFGR3 register */
+ 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC);
+ 413              		.loc 1 316 0
+ 414 0002 0B4A     		ldr	r2, .L35
+ARM GAS  /tmp/ccS1GlwB.s 			page 14
+
+
+ 415 0004 116A     		ldr	r1, [r2, #32]
+ 416 0006 8023     		movs	r3, #128
+ 417 0008 9B00     		lsls	r3, r3, #2
+ 418 000a 0B43     		orrs	r3, r1
+ 419 000c 1362     		str	r3, [r2, #32]
+ 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Wait for Vrefint buffer effectively enabled */
+ 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Get tick count */
+ 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   tickstart = HAL_GetTick();
+ 420              		.loc 1 320 0
+ 421 000e FFF7FEFF 		bl	HAL_GetTick
+ 422              	.LVL35:
+ 423 0012 0400     		movs	r4, r0
+ 424              	.LVL36:
+ 425              	.L30:
+ 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   while(HAL_IS_BIT_CLR(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF))
+ 426              		.loc 1 322 0
+ 427 0014 064B     		ldr	r3, .L35
+ 428 0016 1B6A     		ldr	r3, [r3, #32]
+ 429 0018 5B00     		lsls	r3, r3, #1
+ 430 001a 06D4     		bmi	.L34
+ 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   {
+ 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     if((HAL_GetTick() - tickstart) > SYSCFG_BUF_TEMPSENSOR_ENABLE_TIMEOUT)
+ 431              		.loc 1 324 0
+ 432 001c FFF7FEFF 		bl	HAL_GetTick
+ 433              	.LVL37:
+ 434 0020 001B     		subs	r0, r0, r4
+ 435 0022 0128     		cmp	r0, #1
+ 436 0024 F6D9     		bls	.L30
+ 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     { 
+ 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****       return HAL_ERROR;
+ 437              		.loc 1 326 0
+ 438 0026 0120     		movs	r0, #1
+ 439 0028 00E0     		b	.L31
+ 440              	.L34:
+ 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****     }
+ 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   }
+ 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   
+ 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   return HAL_OK;
+ 441              		.loc 1 330 0
+ 442 002a 0020     		movs	r0, #0
+ 443              	.L31:
+ 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** }
+ 444              		.loc 1 331 0
+ 445              		@ sp needed
+ 446              	.LVL38:
+ 447 002c 10BD     		pop	{r4, pc}
+ 448              	.L36:
+ 449 002e C046     		.align	2
+ 450              	.L35:
+ 451 0030 00000140 		.word	1073807360
+ 452              		.cfi_endproc
+ 453              	.LFE44:
+ 455              		.section	.text.HAL_ADCEx_DisableVREFINTTempSensor,"ax",%progbits
+ 456              		.align	1
+ 457              		.global	HAL_ADCEx_DisableVREFINTTempSensor
+ARM GAS  /tmp/ccS1GlwB.s 			page 15
+
+
+ 458              		.syntax unified
+ 459              		.code	16
+ 460              		.thumb_func
+ 461              		.fpu softvfp
+ 463              	HAL_ADCEx_DisableVREFINTTempSensor:
+ 464              	.LFB45:
+ 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** 
+ 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /**
+ 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @brief Disables the VREFINT and Sensor for the ADC.
+ 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @note This is functional only if the LOCK is not set.
+ 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   * @retval None
+ 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   */
+ 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** void HAL_ADCEx_DisableVREFINTTempSensor(void)
+ 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** {
+ 465              		.loc 1 339 0
+ 466              		.cfi_startproc
+ 467              		@ args = 0, pretend = 0, frame = 0
+ 468              		@ frame_needed = 0, uses_anonymous_args = 0
+ 469              		@ link register save eliminated.
+ 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   /* Disable the Vrefint by resetting ENBUF_SENSOR_ADC bit in the CFGR3 register */
+ 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c ****   CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC);
+ 470              		.loc 1 341 0
+ 471 0000 024A     		ldr	r2, .L38
+ 472 0002 136A     		ldr	r3, [r2, #32]
+ 473 0004 0249     		ldr	r1, .L38+4
+ 474 0006 0B40     		ands	r3, r1
+ 475 0008 1362     		str	r3, [r2, #32]
+ 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** }
+ 476              		.loc 1 342 0
+ 477              		@ sp needed
+ 478 000a 7047     		bx	lr
+ 479              	.L39:
+ 480              		.align	2
+ 481              	.L38:
+ 482 000c 00000140 		.word	1073807360
+ 483 0010 FFFDFFFF 		.word	-513
+ 484              		.cfi_endproc
+ 485              	.LFE45:
+ 487              		.text
+ 488              	.Letext0:
+ 489              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
+ 490              		.file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
+ 491              		.file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+ 492              		.file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
+ 493              		.file 6 "/usr/arm-none-eabi/include/sys/lock.h"
+ 494              		.file 7 "/usr/arm-none-eabi/include/sys/_types.h"
+ 495              		.file 8 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+ 496              		.file 9 "/usr/arm-none-eabi/include/sys/reent.h"
+ 497              		.file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h"
+ 498              		.file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h"
+ 499              		.file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h"
+ 500              		.file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h"
+ 501              		.file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h"
+ARM GAS  /tmp/ccS1GlwB.s 			page 16
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_adc_ex.c
+     /tmp/ccS1GlwB.s:16     .text.HAL_ADCEx_Calibration_Start:0000000000000000 $t
+     /tmp/ccS1GlwB.s:23     .text.HAL_ADCEx_Calibration_Start:0000000000000000 HAL_ADCEx_Calibration_Start
+     /tmp/ccS1GlwB.s:164    .text.HAL_ADCEx_Calibration_Start:00000000000000a4 $d
+     /tmp/ccS1GlwB.s:169    .text.HAL_ADCEx_Calibration_GetValue:0000000000000000 $t
+     /tmp/ccS1GlwB.s:176    .text.HAL_ADCEx_Calibration_GetValue:0000000000000000 HAL_ADCEx_Calibration_GetValue
+     /tmp/ccS1GlwB.s:198    .text.HAL_ADCEx_Calibration_SetValue:0000000000000000 $t
+     /tmp/ccS1GlwB.s:205    .text.HAL_ADCEx_Calibration_SetValue:0000000000000000 HAL_ADCEx_Calibration_SetValue
+     /tmp/ccS1GlwB.s:300    .text.HAL_ADCEx_EnableVREFINT:0000000000000000 $t
+     /tmp/ccS1GlwB.s:307    .text.HAL_ADCEx_EnableVREFINT:0000000000000000 HAL_ADCEx_EnableVREFINT
+     /tmp/ccS1GlwB.s:357    .text.HAL_ADCEx_EnableVREFINT:0000000000000030 $d
+     /tmp/ccS1GlwB.s:362    .text.HAL_ADCEx_DisableVREFINT:0000000000000000 $t
+     /tmp/ccS1GlwB.s:369    .text.HAL_ADCEx_DisableVREFINT:0000000000000000 HAL_ADCEx_DisableVREFINT
+     /tmp/ccS1GlwB.s:388    .text.HAL_ADCEx_DisableVREFINT:000000000000000c $d
+     /tmp/ccS1GlwB.s:394    .text.HAL_ADCEx_EnableVREFINTTempSensor:0000000000000000 $t
+     /tmp/ccS1GlwB.s:401    .text.HAL_ADCEx_EnableVREFINTTempSensor:0000000000000000 HAL_ADCEx_EnableVREFINTTempSensor
+     /tmp/ccS1GlwB.s:451    .text.HAL_ADCEx_EnableVREFINTTempSensor:0000000000000030 $d
+     /tmp/ccS1GlwB.s:456    .text.HAL_ADCEx_DisableVREFINTTempSensor:0000000000000000 $t
+     /tmp/ccS1GlwB.s:463    .text.HAL_ADCEx_DisableVREFINTTempSensor:0000000000000000 HAL_ADCEx_DisableVREFINTTempSensor
+     /tmp/ccS1GlwB.s:482    .text.HAL_ADCEx_DisableVREFINTTempSensor:000000000000000c $d
+                     .debug_frame:0000000000000010 $d
+
+UNDEFINED SYMBOLS
+HAL_GetTick

build/stm32l0xx_hal_comp.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_comp.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_comp.lst

@@ -0,0 +1,32 @@
+ARM GAS  /tmp/ccN7bVXM.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_comp.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              	.Letext0:
+  16              		.file 1 "/usr/arm-none-eabi/include/machine/_default_types.h"
+  17              		.file 2 "/usr/arm-none-eabi/include/sys/_stdint.h"
+  18              		.file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+  19              		.file 4 "/usr/arm-none-eabi/include/sys/lock.h"
+  20              		.file 5 "/usr/arm-none-eabi/include/sys/_types.h"
+  21              		.file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+  22              		.file 7 "/usr/arm-none-eabi/include/sys/reent.h"
+ARM GAS  /tmp/ccN7bVXM.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_comp.c
+
+NO UNDEFINED SYMBOLS

build/stm32l0xx_hal_comp_ex.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_comp_ex.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp_ex.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_comp_ex.lst

@@ -0,0 +1,32 @@
+ARM GAS  /tmp/cc5ogqer.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_comp_ex.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              	.Letext0:
+  16              		.file 1 "/usr/arm-none-eabi/include/machine/_default_types.h"
+  17              		.file 2 "/usr/arm-none-eabi/include/sys/_stdint.h"
+  18              		.file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+  19              		.file 4 "/usr/arm-none-eabi/include/sys/lock.h"
+  20              		.file 5 "/usr/arm-none-eabi/include/sys/_types.h"
+  21              		.file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+  22              		.file 7 "/usr/arm-none-eabi/include/sys/reent.h"
+ARM GAS  /tmp/cc5ogqer.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_comp_ex.c
+
+NO UNDEFINED SYMBOLS

build/stm32l0xx_hal_cortex.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_cortex.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_crc.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_crc.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_crc.lst

@@ -0,0 +1,32 @@
+ARM GAS  /tmp/ccv3vQQT.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_crc.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              	.Letext0:
+  16              		.file 1 "/usr/arm-none-eabi/include/machine/_default_types.h"
+  17              		.file 2 "/usr/arm-none-eabi/include/sys/_stdint.h"
+  18              		.file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+  19              		.file 4 "/usr/arm-none-eabi/include/sys/lock.h"
+  20              		.file 5 "/usr/arm-none-eabi/include/sys/_types.h"
+  21              		.file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+  22              		.file 7 "/usr/arm-none-eabi/include/sys/reent.h"
+ARM GAS  /tmp/ccv3vQQT.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_crc.c
+
+NO UNDEFINED SYMBOLS

build/stm32l0xx_hal_crc_ex.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_crc_ex.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_crc_ex.lst

@@ -0,0 +1,32 @@
+ARM GAS  /tmp/ccbyCQhg.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_crc_ex.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              	.Letext0:
+  16              		.file 1 "/usr/arm-none-eabi/include/machine/_default_types.h"
+  17              		.file 2 "/usr/arm-none-eabi/include/sys/_stdint.h"
+  18              		.file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+  19              		.file 4 "/usr/arm-none-eabi/include/sys/lock.h"
+  20              		.file 5 "/usr/arm-none-eabi/include/sys/_types.h"
+  21              		.file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+  22              		.file 7 "/usr/arm-none-eabi/include/sys/reent.h"
+ARM GAS  /tmp/ccbyCQhg.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_crc_ex.c
+
+NO UNDEFINED SYMBOLS

build/stm32l0xx_hal_cryp.d

@@ -0,0 +1,2 @@
+build/stm32l0xx_hal_cryp.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp.c

build/stm32l0xx_hal_cryp.lst

@@ -0,0 +1,25 @@
+ARM GAS  /tmp/ccrP1Afq.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_cryp.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              	.Letext0:
+ARM GAS  /tmp/ccrP1Afq.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_cryp.c
+
+NO UNDEFINED SYMBOLS

build/stm32l0xx_hal_cryp_ex.d

@@ -0,0 +1,2 @@
+build/stm32l0xx_hal_cryp_ex.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp_ex.c

build/stm32l0xx_hal_cryp_ex.lst

@@ -0,0 +1,25 @@
+ARM GAS  /tmp/ccnSeeEM.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_cryp_ex.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              	.Letext0:
+ARM GAS  /tmp/ccnSeeEM.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_cryp_ex.c
+
+NO UNDEFINED SYMBOLS

build/stm32l0xx_hal_dac.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_dac.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_dac.lst

@@ -0,0 +1,32 @@
+ARM GAS  /tmp/ccDfPbDO.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_dac.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              	.Letext0:
+  16              		.file 1 "/usr/arm-none-eabi/include/machine/_default_types.h"
+  17              		.file 2 "/usr/arm-none-eabi/include/sys/_stdint.h"
+  18              		.file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+  19              		.file 4 "/usr/arm-none-eabi/include/sys/lock.h"
+  20              		.file 5 "/usr/arm-none-eabi/include/sys/_types.h"
+  21              		.file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+  22              		.file 7 "/usr/arm-none-eabi/include/sys/reent.h"
+ARM GAS  /tmp/ccDfPbDO.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_dac.c
+
+NO UNDEFINED SYMBOLS

build/stm32l0xx_hal_dac_ex.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_dac_ex.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_dac_ex.lst

@@ -0,0 +1,32 @@
+ARM GAS  /tmp/cccMEG5F.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_dac_ex.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              	.Letext0:
+  16              		.file 1 "/usr/arm-none-eabi/include/machine/_default_types.h"
+  17              		.file 2 "/usr/arm-none-eabi/include/sys/_stdint.h"
+  18              		.file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+  19              		.file 4 "/usr/arm-none-eabi/include/sys/lock.h"
+  20              		.file 5 "/usr/arm-none-eabi/include/sys/_types.h"
+  21              		.file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+  22              		.file 7 "/usr/arm-none-eabi/include/sys/reent.h"
+ARM GAS  /tmp/cccMEG5F.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_dac_ex.c
+
+NO UNDEFINED SYMBOLS

build/stm32l0xx_hal_dma.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_dma.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_firewall.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_firewall.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_firewall.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_firewall.lst

@@ -0,0 +1,32 @@
+ARM GAS  /tmp/ccviRKHs.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_firewall.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              	.Letext0:
+  16              		.file 1 "/usr/arm-none-eabi/include/machine/_default_types.h"
+  17              		.file 2 "/usr/arm-none-eabi/include/sys/_stdint.h"
+  18              		.file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+  19              		.file 4 "/usr/arm-none-eabi/include/sys/lock.h"
+  20              		.file 5 "/usr/arm-none-eabi/include/sys/_types.h"
+  21              		.file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+  22              		.file 7 "/usr/arm-none-eabi/include/sys/reent.h"
+ARM GAS  /tmp/ccviRKHs.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_firewall.c
+
+NO UNDEFINED SYMBOLS

build/stm32l0xx_hal_flash.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_flash.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_flash_ex.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_flash_ex.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_flash_ramfunc.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_flash_ramfunc.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_gpio.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_gpio.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_i2c.d

@@ -0,0 +1,105 @@
+build/stm32l0xx_hal_i2c.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c Inc/vcom.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Inc/vcom.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_i2c_ex.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_i2c_ex.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_i2c_ex.lst

@@ -0,0 +1,868 @@
+ARM GAS  /tmp/ccHVO7A6.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_i2c_ex.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              		.section	.text.HAL_I2CEx_ConfigAnalogFilter,"ax",%progbits
+  16              		.align	1
+  17              		.global	HAL_I2CEx_ConfigAnalogFilter
+  18              		.syntax unified
+  19              		.code	16
+  20              		.thumb_func
+  21              		.fpu softvfp
+  23              	HAL_I2CEx_ConfigAnalogFilter:
+  24              	.LFB39:
+  25              		.file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c"
+   1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /**
+   2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   ******************************************************************************
+   3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @file    stm32l0xx_hal_i2c_ex.c
+   4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @author  MCD Application Team
+   5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @brief   I2C Extended HAL module driver.
+   6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *          This file provides firmware functions to manage the following
+   7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *          functionalities of I2C Extended peripheral:
+   8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *           + Extended features functions
+   9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *
+  10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   @verbatim
+  11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   ==============================================================================
+  12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****                ##### I2C peripheral Extended features  #####
+  13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   ==============================================================================
+  14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+  15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   [..] Comparing to other previous devices, the I2C interface for STM32L0xx
+  16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****        devices contains the following additional features
+  17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+  18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****        (+) Possibility to disable or enable Analog Noise Filter
+  19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****        (+) Use of a configured Digital Noise Filter
+  20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****        (+) Disable or enable wakeup from Stop mode(s)
+  21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****        (+) Disable or enable Fast Mode Plus
+  22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+  23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****                      ##### How to use this driver #####
+  24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   ==============================================================================
+  25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   [..] This driver provides functions to configure Noise Filter and Wake Up Feature
+  26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     (#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter()
+  27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     (#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter()
+  28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     (#) Configure the enable or disable of I2C Wake Up Mode using the functions :
+  29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****           (++) HAL_I2CEx_EnableWakeUp()
+  30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****           (++) HAL_I2CEx_DisableWakeUp()
+  31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     (#) Configure the enable or disable of fast mode plus driving capability using the functions :
+  32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****           (++) HAL_I2CEx_EnableFastModePlus()
+  33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****           (++) HAL_I2CEx_DisableFastModePlus()
+ARM GAS  /tmp/ccHVO7A6.s 			page 2
+
+
+  34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   @endverbatim
+  35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   ******************************************************************************
+  36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @attention
+  37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *
+  38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *
+  40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * Redistribution and use in source and binary forms, with or without modification,
+  41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * are permitted provided that the following conditions are met:
+  42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *   1. Redistributions of source code must retain the above copyright notice,
+  43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *      this list of conditions and the following disclaimer.
+  44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *   2. Redistributions in binary form must reproduce the above copyright notice,
+  45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *      this list of conditions and the following disclaimer in the documentation
+  46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *      and/or other materials provided with the distribution.
+  47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *      may be used to endorse or promote products derived from this software
+  49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *      without specific prior written permission.
+  50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *
+  51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *
+  62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   ******************************************************************************
+  63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   */
+  64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+  65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /* Includes ------------------------------------------------------------------*/
+  66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** #include "stm32l0xx_hal.h"
+  67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+  68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /** @addtogroup STM32L0xx_HAL_Driver
+  69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @{
+  70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   */
+  71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+  72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /** @defgroup I2CEx I2CEx
+  73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @brief I2C Extended HAL module driver
+  74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @{
+  75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   */
+  76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+  77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** #ifdef HAL_I2C_MODULE_ENABLED
+  78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+  79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /* Private typedef -----------------------------------------------------------*/
+  80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /* Private define ------------------------------------------------------------*/
+  81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /* Private macro -------------------------------------------------------------*/
+  82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /* Private variables ---------------------------------------------------------*/
+  83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /* Private function prototypes -----------------------------------------------*/
+  84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /* Private functions ---------------------------------------------------------*/
+  85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+  86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions
+  87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @{
+  88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   */
+  89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+  90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group1 Extended features functions
+ARM GAS  /tmp/ccHVO7A6.s 			page 3
+
+
+  91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @brief    Extended features functions
+  92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****  *
+  93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** @verbatim
+  94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****  ===============================================================================
+  95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****                       ##### Extended features functions #####
+  96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****  ===============================================================================
+  97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     [..] This section provides functions allowing to:
+  98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****       (+) Configure Noise Filters
+  99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****       (+) Configure Wake Up Feature
+ 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****       (+) Configure Fast Mode Plus
+ 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** @endverbatim
+ 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @{
+ 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   */
+ 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /**
+ 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @brief  Configure I2C Analog noise filter.
+ 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *                the configuration information for the specified I2Cx peripheral.
+ 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @param  AnalogFilter New state of the Analog filter.
+ 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @retval HAL status
+ 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   */
+ 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
+ 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** {
+  26              		.loc 1 114 0
+  27              		.cfi_startproc
+  28              		@ args = 0, pretend = 0, frame = 0
+  29              		@ frame_needed = 0, uses_anonymous_args = 0
+  30              	.LVL0:
+  31 0000 F0B5     		push	{r4, r5, r6, r7, lr}
+  32              	.LCFI0:
+  33              		.cfi_def_cfa_offset 20
+  34              		.cfi_offset 4, -20
+  35              		.cfi_offset 5, -16
+  36              		.cfi_offset 6, -12
+  37              		.cfi_offset 7, -8
+  38              		.cfi_offset 14, -4
+ 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   /* Check the parameters */
+ 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
+ 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
+ 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   if (hi2c->State == HAL_I2C_STATE_READY)
+  39              		.loc 1 119 0
+  40 0002 4123     		movs	r3, #65
+  41 0004 C35C     		ldrb	r3, [r0, r3]
+  42 0006 202B     		cmp	r3, #32
+  43 0008 20D1     		bne	.L3
+ 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   {
+ 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Process Locked */
+ 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_LOCK(hi2c);
+  44              		.loc 1 122 0
+  45 000a 2033     		adds	r3, r3, #32
+  46 000c C35C     		ldrb	r3, [r0, r3]
+  47 000e 012B     		cmp	r3, #1
+  48 0010 1ED0     		beq	.L4
+  49              		.loc 1 122 0 is_stmt 0 discriminator 2
+  50 0012 4024     		movs	r4, #64
+ARM GAS  /tmp/ccHVO7A6.s 			page 4
+
+
+  51 0014 0122     		movs	r2, #1
+  52 0016 0255     		strb	r2, [r0, r4]
+ 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->State = HAL_I2C_STATE_BUSY;
+  53              		.loc 1 124 0 is_stmt 1 discriminator 2
+  54 0018 4125     		movs	r5, #65
+  55 001a 2423     		movs	r3, #36
+  56 001c 4355     		strb	r3, [r0, r5]
+ 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Disable the selected I2C peripheral */
+ 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_I2C_DISABLE(hi2c);
+  57              		.loc 1 127 0 discriminator 2
+  58 001e 0668     		ldr	r6, [r0]
+  59 0020 3368     		ldr	r3, [r6]
+  60 0022 9343     		bics	r3, r2
+  61 0024 3360     		str	r3, [r6]
+ 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Reset I2Cx ANOFF bit */
+ 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
+  62              		.loc 1 130 0 discriminator 2
+  63 0026 0668     		ldr	r6, [r0]
+  64 0028 3368     		ldr	r3, [r6]
+  65 002a 0A4F     		ldr	r7, .L5
+  66 002c 3B40     		ands	r3, r7
+  67 002e 3360     		str	r3, [r6]
+ 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Set analog filter bit*/
+ 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->Instance->CR1 |= AnalogFilter;
+  68              		.loc 1 133 0 discriminator 2
+  69 0030 0668     		ldr	r6, [r0]
+  70 0032 3368     		ldr	r3, [r6]
+  71 0034 1943     		orrs	r1, r3
+  72              	.LVL1:
+  73 0036 3160     		str	r1, [r6]
+ 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_I2C_ENABLE(hi2c);
+  74              		.loc 1 135 0 discriminator 2
+  75 0038 0168     		ldr	r1, [r0]
+  76 003a 0B68     		ldr	r3, [r1]
+  77 003c 1343     		orrs	r3, r2
+  78 003e 0B60     		str	r3, [r1]
+ 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->State = HAL_I2C_STATE_READY;
+  79              		.loc 1 137 0 discriminator 2
+  80 0040 2023     		movs	r3, #32
+  81 0042 4355     		strb	r3, [r0, r5]
+ 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Process Unlocked */
+ 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_UNLOCK(hi2c);
+  82              		.loc 1 140 0 discriminator 2
+  83 0044 0023     		movs	r3, #0
+  84 0046 0355     		strb	r3, [r0, r4]
+ 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     return HAL_OK;
+  85              		.loc 1 142 0 discriminator 2
+  86 0048 0020     		movs	r0, #0
+  87              	.LVL2:
+ARM GAS  /tmp/ccHVO7A6.s 			page 5
+
+
+  88 004a 00E0     		b	.L2
+  89              	.LVL3:
+  90              	.L3:
+ 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   }
+ 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   else
+ 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   {
+ 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     return HAL_BUSY;
+  91              		.loc 1 146 0
+  92 004c 0220     		movs	r0, #2
+  93              	.LVL4:
+  94              	.L2:
+ 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   }
+ 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** }
+  95              		.loc 1 148 0
+  96              		@ sp needed
+  97 004e F0BD     		pop	{r4, r5, r6, r7, pc}
+  98              	.LVL5:
+  99              	.L4:
+ 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 100              		.loc 1 122 0
+ 101 0050 0220     		movs	r0, #2
+ 102              	.LVL6:
+ 103 0052 FCE7     		b	.L2
+ 104              	.L6:
+ 105              		.align	2
+ 106              	.L5:
+ 107 0054 FFEFFFFF 		.word	-4097
+ 108              		.cfi_endproc
+ 109              	.LFE39:
+ 111              		.section	.text.HAL_I2CEx_ConfigDigitalFilter,"ax",%progbits
+ 112              		.align	1
+ 113              		.global	HAL_I2CEx_ConfigDigitalFilter
+ 114              		.syntax unified
+ 115              		.code	16
+ 116              		.thumb_func
+ 117              		.fpu softvfp
+ 119              	HAL_I2CEx_ConfigDigitalFilter:
+ 120              	.LFB40:
+ 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /**
+ 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @brief  Configure I2C Digital noise filter.
+ 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *                the configuration information for the specified I2Cx peripheral.
+ 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @param  DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x
+ 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @retval HAL status
+ 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   */
+ 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
+ 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** {
+ 121              		.loc 1 158 0
+ 122              		.cfi_startproc
+ 123              		@ args = 0, pretend = 0, frame = 0
+ 124              		@ frame_needed = 0, uses_anonymous_args = 0
+ 125              	.LVL7:
+ 126 0000 F0B5     		push	{r4, r5, r6, r7, lr}
+ 127              	.LCFI1:
+ 128              		.cfi_def_cfa_offset 20
+ 129              		.cfi_offset 4, -20
+ARM GAS  /tmp/ccHVO7A6.s 			page 6
+
+
+ 130              		.cfi_offset 5, -16
+ 131              		.cfi_offset 6, -12
+ 132              		.cfi_offset 7, -8
+ 133              		.cfi_offset 14, -4
+ 134              	.LVL8:
+ 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   uint32_t tmpreg = 0U;
+ 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   /* Check the parameters */
+ 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
+ 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
+ 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   if (hi2c->State == HAL_I2C_STATE_READY)
+ 135              		.loc 1 165 0
+ 136 0002 4123     		movs	r3, #65
+ 137 0004 C35C     		ldrb	r3, [r0, r3]
+ 138 0006 202B     		cmp	r3, #32
+ 139 0008 1ED1     		bne	.L9
+ 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   {
+ 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Process Locked */
+ 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_LOCK(hi2c);
+ 140              		.loc 1 168 0
+ 141 000a 2033     		adds	r3, r3, #32
+ 142 000c C35C     		ldrb	r3, [r0, r3]
+ 143 000e 012B     		cmp	r3, #1
+ 144 0010 1CD0     		beq	.L10
+ 145              		.loc 1 168 0 is_stmt 0 discriminator 2
+ 146 0012 4024     		movs	r4, #64
+ 147 0014 0122     		movs	r2, #1
+ 148 0016 0255     		strb	r2, [r0, r4]
+ 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->State = HAL_I2C_STATE_BUSY;
+ 149              		.loc 1 170 0 is_stmt 1 discriminator 2
+ 150 0018 4125     		movs	r5, #65
+ 151 001a 2423     		movs	r3, #36
+ 152 001c 4355     		strb	r3, [r0, r5]
+ 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Disable the selected I2C peripheral */
+ 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_I2C_DISABLE(hi2c);
+ 153              		.loc 1 173 0 discriminator 2
+ 154 001e 0668     		ldr	r6, [r0]
+ 155 0020 3368     		ldr	r3, [r6]
+ 156 0022 9343     		bics	r3, r2
+ 157 0024 3360     		str	r3, [r6]
+ 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Get the old register value */
+ 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     tmpreg = hi2c->Instance->CR1;
+ 158              		.loc 1 176 0 discriminator 2
+ 159 0026 0668     		ldr	r6, [r0]
+ 160 0028 3368     		ldr	r3, [r6]
+ 161              	.LVL9:
+ 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Reset I2Cx DNF bits [11:8] */
+ 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     tmpreg &= ~(I2C_CR1_DNF);
+ 162              		.loc 1 179 0 discriminator 2
+ 163 002a 094F     		ldr	r7, .L11
+ 164 002c 3B40     		ands	r3, r7
+ 165              	.LVL10:
+ARM GAS  /tmp/ccHVO7A6.s 			page 7
+
+
+ 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Set I2Cx DNF coefficient */
+ 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     tmpreg |= DigitalFilter << 8U;
+ 166              		.loc 1 182 0 discriminator 2
+ 167 002e 0902     		lsls	r1, r1, #8
+ 168              	.LVL11:
+ 169 0030 1943     		orrs	r1, r3
+ 170              	.LVL12:
+ 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Store the new register value */
+ 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->Instance->CR1 = tmpreg;
+ 171              		.loc 1 185 0 discriminator 2
+ 172 0032 3160     		str	r1, [r6]
+ 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_I2C_ENABLE(hi2c);
+ 173              		.loc 1 187 0 discriminator 2
+ 174 0034 0168     		ldr	r1, [r0]
+ 175              	.LVL13:
+ 176 0036 0B68     		ldr	r3, [r1]
+ 177 0038 1343     		orrs	r3, r2
+ 178 003a 0B60     		str	r3, [r1]
+ 179              	.LVL14:
+ 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->State = HAL_I2C_STATE_READY;
+ 180              		.loc 1 189 0 discriminator 2
+ 181 003c 2023     		movs	r3, #32
+ 182 003e 4355     		strb	r3, [r0, r5]
+ 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Process Unlocked */
+ 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_UNLOCK(hi2c);
+ 183              		.loc 1 192 0 discriminator 2
+ 184 0040 0023     		movs	r3, #0
+ 185 0042 0355     		strb	r3, [r0, r4]
+ 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     return HAL_OK;
+ 186              		.loc 1 194 0 discriminator 2
+ 187 0044 0020     		movs	r0, #0
+ 188              	.LVL15:
+ 189 0046 00E0     		b	.L8
+ 190              	.LVL16:
+ 191              	.L9:
+ 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   }
+ 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   else
+ 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   {
+ 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     return HAL_BUSY;
+ 192              		.loc 1 198 0
+ 193 0048 0220     		movs	r0, #2
+ 194              	.LVL17:
+ 195              	.L8:
+ 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   }
+ 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** }
+ 196              		.loc 1 200 0
+ 197              		@ sp needed
+ 198 004a F0BD     		pop	{r4, r5, r6, r7, pc}
+ 199              	.LVL18:
+ 200              	.L10:
+ 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ARM GAS  /tmp/ccHVO7A6.s 			page 8
+
+
+ 201              		.loc 1 168 0
+ 202 004c 0220     		movs	r0, #2
+ 203              	.LVL19:
+ 204 004e FCE7     		b	.L8
+ 205              	.L12:
+ 206              		.align	2
+ 207              	.L11:
+ 208 0050 FFF0FFFF 		.word	-3841
+ 209              		.cfi_endproc
+ 210              	.LFE40:
+ 212              		.section	.text.HAL_I2CEx_EnableWakeUp,"ax",%progbits
+ 213              		.align	1
+ 214              		.global	HAL_I2CEx_EnableWakeUp
+ 215              		.syntax unified
+ 216              		.code	16
+ 217              		.thumb_func
+ 218              		.fpu softvfp
+ 220              	HAL_I2CEx_EnableWakeUp:
+ 221              	.LFB41:
+ 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /**
+ 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @brief  Enable I2C wakeup from Stop mode(s).
+ 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *                the configuration information for the specified I2Cx peripheral.
+ 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @retval HAL status
+ 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   */
+ 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c)
+ 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** {
+ 222              		.loc 1 209 0
+ 223              		.cfi_startproc
+ 224              		@ args = 0, pretend = 0, frame = 0
+ 225              		@ frame_needed = 0, uses_anonymous_args = 0
+ 226              	.LVL20:
+ 227 0000 70B5     		push	{r4, r5, r6, lr}
+ 228              	.LCFI2:
+ 229              		.cfi_def_cfa_offset 16
+ 230              		.cfi_offset 4, -16
+ 231              		.cfi_offset 5, -12
+ 232              		.cfi_offset 6, -8
+ 233              		.cfi_offset 14, -4
+ 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   /* Check the parameters */
+ 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
+ 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   if (hi2c->State == HAL_I2C_STATE_READY)
+ 234              		.loc 1 213 0
+ 235 0002 4123     		movs	r3, #65
+ 236 0004 C35C     		ldrb	r3, [r0, r3]
+ 237 0006 202B     		cmp	r3, #32
+ 238 0008 1DD1     		bne	.L15
+ 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   {
+ 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Process Locked */
+ 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_LOCK(hi2c);
+ 239              		.loc 1 216 0
+ 240 000a 2033     		adds	r3, r3, #32
+ 241 000c C35C     		ldrb	r3, [r0, r3]
+ 242 000e 012B     		cmp	r3, #1
+ 243 0010 1BD0     		beq	.L16
+ARM GAS  /tmp/ccHVO7A6.s 			page 9
+
+
+ 244              		.loc 1 216 0 is_stmt 0 discriminator 2
+ 245 0012 4021     		movs	r1, #64
+ 246 0014 0122     		movs	r2, #1
+ 247 0016 4254     		strb	r2, [r0, r1]
+ 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->State = HAL_I2C_STATE_BUSY;
+ 248              		.loc 1 218 0 is_stmt 1 discriminator 2
+ 249 0018 4124     		movs	r4, #65
+ 250 001a 2423     		movs	r3, #36
+ 251 001c 0355     		strb	r3, [r0, r4]
+ 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Disable the selected I2C peripheral */
+ 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_I2C_DISABLE(hi2c);
+ 252              		.loc 1 221 0 discriminator 2
+ 253 001e 0568     		ldr	r5, [r0]
+ 254 0020 2B68     		ldr	r3, [r5]
+ 255 0022 9343     		bics	r3, r2
+ 256 0024 2B60     		str	r3, [r5]
+ 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Enable wakeup from stop mode */
+ 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->Instance->CR1 |= I2C_CR1_WUPEN;
+ 257              		.loc 1 224 0 discriminator 2
+ 258 0026 0568     		ldr	r5, [r0]
+ 259 0028 2E68     		ldr	r6, [r5]
+ 260 002a 8023     		movs	r3, #128
+ 261 002c DB02     		lsls	r3, r3, #11
+ 262 002e 3343     		orrs	r3, r6
+ 263 0030 2B60     		str	r3, [r5]
+ 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_I2C_ENABLE(hi2c);
+ 264              		.loc 1 226 0 discriminator 2
+ 265 0032 0568     		ldr	r5, [r0]
+ 266 0034 2B68     		ldr	r3, [r5]
+ 267 0036 1343     		orrs	r3, r2
+ 268 0038 2B60     		str	r3, [r5]
+ 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->State = HAL_I2C_STATE_READY;
+ 269              		.loc 1 228 0 discriminator 2
+ 270 003a 2023     		movs	r3, #32
+ 271 003c 0355     		strb	r3, [r0, r4]
+ 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Process Unlocked */
+ 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_UNLOCK(hi2c);
+ 272              		.loc 1 231 0 discriminator 2
+ 273 003e 0023     		movs	r3, #0
+ 274 0040 4354     		strb	r3, [r0, r1]
+ 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     return HAL_OK;
+ 275              		.loc 1 233 0 discriminator 2
+ 276 0042 0020     		movs	r0, #0
+ 277              	.LVL21:
+ 278 0044 00E0     		b	.L14
+ 279              	.LVL22:
+ 280              	.L15:
+ 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   }
+ 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   else
+ 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   {
+ARM GAS  /tmp/ccHVO7A6.s 			page 10
+
+
+ 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     return HAL_BUSY;
+ 281              		.loc 1 237 0
+ 282 0046 0220     		movs	r0, #2
+ 283              	.LVL23:
+ 284              	.L14:
+ 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   }
+ 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** }
+ 285              		.loc 1 239 0
+ 286              		@ sp needed
+ 287 0048 70BD     		pop	{r4, r5, r6, pc}
+ 288              	.LVL24:
+ 289              	.L16:
+ 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 290              		.loc 1 216 0
+ 291 004a 0220     		movs	r0, #2
+ 292              	.LVL25:
+ 293 004c FCE7     		b	.L14
+ 294              		.cfi_endproc
+ 295              	.LFE41:
+ 297              		.section	.text.HAL_I2CEx_DisableWakeUp,"ax",%progbits
+ 298              		.align	1
+ 299              		.global	HAL_I2CEx_DisableWakeUp
+ 300              		.syntax unified
+ 301              		.code	16
+ 302              		.thumb_func
+ 303              		.fpu softvfp
+ 305              	HAL_I2CEx_DisableWakeUp:
+ 306              	.LFB42:
+ 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /**
+ 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @brief  Disable I2C wakeup from Stop mode(s).
+ 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *                the configuration information for the specified I2Cx peripheral.
+ 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @retval HAL status
+ 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   */
+ 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c)
+ 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** {
+ 307              		.loc 1 248 0
+ 308              		.cfi_startproc
+ 309              		@ args = 0, pretend = 0, frame = 0
+ 310              		@ frame_needed = 0, uses_anonymous_args = 0
+ 311              	.LVL26:
+ 312 0000 70B5     		push	{r4, r5, r6, lr}
+ 313              	.LCFI3:
+ 314              		.cfi_def_cfa_offset 16
+ 315              		.cfi_offset 4, -16
+ 316              		.cfi_offset 5, -12
+ 317              		.cfi_offset 6, -8
+ 318              		.cfi_offset 14, -4
+ 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   /* Check the parameters */
+ 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
+ 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   if (hi2c->State == HAL_I2C_STATE_READY)
+ 319              		.loc 1 252 0
+ 320 0002 4123     		movs	r3, #65
+ 321 0004 C35C     		ldrb	r3, [r0, r3]
+ 322 0006 202B     		cmp	r3, #32
+ARM GAS  /tmp/ccHVO7A6.s 			page 11
+
+
+ 323 0008 1CD1     		bne	.L19
+ 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   {
+ 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Process Locked */
+ 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_LOCK(hi2c);
+ 324              		.loc 1 255 0
+ 325 000a 2033     		adds	r3, r3, #32
+ 326 000c C35C     		ldrb	r3, [r0, r3]
+ 327 000e 012B     		cmp	r3, #1
+ 328 0010 1AD0     		beq	.L20
+ 329              		.loc 1 255 0 is_stmt 0 discriminator 2
+ 330 0012 4021     		movs	r1, #64
+ 331 0014 0122     		movs	r2, #1
+ 332 0016 4254     		strb	r2, [r0, r1]
+ 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->State = HAL_I2C_STATE_BUSY;
+ 333              		.loc 1 257 0 is_stmt 1 discriminator 2
+ 334 0018 4124     		movs	r4, #65
+ 335 001a 2423     		movs	r3, #36
+ 336 001c 0355     		strb	r3, [r0, r4]
+ 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Disable the selected I2C peripheral */
+ 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_I2C_DISABLE(hi2c);
+ 337              		.loc 1 260 0 discriminator 2
+ 338 001e 0568     		ldr	r5, [r0]
+ 339 0020 2B68     		ldr	r3, [r5]
+ 340 0022 9343     		bics	r3, r2
+ 341 0024 2B60     		str	r3, [r5]
+ 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Enable wakeup from stop mode */
+ 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN);
+ 342              		.loc 1 263 0 discriminator 2
+ 343 0026 0568     		ldr	r5, [r0]
+ 344 0028 2B68     		ldr	r3, [r5]
+ 345 002a 084E     		ldr	r6, .L21
+ 346 002c 3340     		ands	r3, r6
+ 347 002e 2B60     		str	r3, [r5]
+ 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_I2C_ENABLE(hi2c);
+ 348              		.loc 1 265 0 discriminator 2
+ 349 0030 0568     		ldr	r5, [r0]
+ 350 0032 2B68     		ldr	r3, [r5]
+ 351 0034 1343     		orrs	r3, r2
+ 352 0036 2B60     		str	r3, [r5]
+ 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     hi2c->State = HAL_I2C_STATE_READY;
+ 353              		.loc 1 267 0 discriminator 2
+ 354 0038 2023     		movs	r3, #32
+ 355 003a 0355     		strb	r3, [r0, r4]
+ 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     /* Process Unlocked */
+ 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     __HAL_UNLOCK(hi2c);
+ 356              		.loc 1 270 0 discriminator 2
+ 357 003c 0023     		movs	r3, #0
+ 358 003e 4354     		strb	r3, [r0, r1]
+ 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     return HAL_OK;
+ 359              		.loc 1 272 0 discriminator 2
+ARM GAS  /tmp/ccHVO7A6.s 			page 12
+
+
+ 360 0040 0020     		movs	r0, #0
+ 361              	.LVL27:
+ 362 0042 00E0     		b	.L18
+ 363              	.LVL28:
+ 364              	.L19:
+ 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   }
+ 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   else
+ 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   {
+ 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****     return HAL_BUSY;
+ 365              		.loc 1 276 0
+ 366 0044 0220     		movs	r0, #2
+ 367              	.LVL29:
+ 368              	.L18:
+ 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   }
+ 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** }
+ 369              		.loc 1 278 0
+ 370              		@ sp needed
+ 371 0046 70BD     		pop	{r4, r5, r6, pc}
+ 372              	.LVL30:
+ 373              	.L20:
+ 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 374              		.loc 1 255 0
+ 375 0048 0220     		movs	r0, #2
+ 376              	.LVL31:
+ 377 004a FCE7     		b	.L18
+ 378              	.L22:
+ 379              		.align	2
+ 380              	.L21:
+ 381 004c FFFFFBFF 		.word	-262145
+ 382              		.cfi_endproc
+ 383              	.LFE42:
+ 385              		.section	.text.HAL_I2CEx_EnableFastModePlus,"ax",%progbits
+ 386              		.align	1
+ 387              		.global	HAL_I2CEx_EnableFastModePlus
+ 388              		.syntax unified
+ 389              		.code	16
+ 390              		.thumb_func
+ 391              		.fpu softvfp
+ 393              	HAL_I2CEx_EnableFastModePlus:
+ 394              	.LFB43:
+ 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /**
+ 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @brief Enable the I2C fast mode plus driving capability.
+ 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @param ConfigFastModePlus Selects the pin.
+ 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *   This parameter can be one of the @ref I2CEx_FastModePlus values
+ 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @note  For I2C1, fast mode plus driving capability can be enabled on all selected
+ 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *        I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
+ 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *        on each one of the following pins PB6, PB7, PB8 and PB9.
+ 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @note  For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
+ 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *        can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
+ 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @note  For all I2C2 pins fast mode plus driving capability can be enabled
+ 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *        only by using I2C_FASTMODEPLUS_I2C2 parameter.
+ 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @note  For all I2C3 pins fast mode plus driving capability can be enabled
+ 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *        only by using I2C_FASTMODEPLUS_I2C3 parameter.
+ 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @retval None
+ 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   */
+ 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus)
+ARM GAS  /tmp/ccHVO7A6.s 			page 13
+
+
+ 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** {
+ 395              		.loc 1 296 0
+ 396              		.cfi_startproc
+ 397              		@ args = 0, pretend = 0, frame = 0
+ 398              		@ frame_needed = 0, uses_anonymous_args = 0
+ 399              		@ link register save eliminated.
+ 400              	.LVL32:
+ 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   /* Check the parameter */
+ 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
+ 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   /* Enable SYSCFG clock */
+ 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 401              		.loc 1 301 0
+ 402 0000 044A     		ldr	r2, .L24
+ 403 0002 536B     		ldr	r3, [r2, #52]
+ 404 0004 0121     		movs	r1, #1
+ 405 0006 0B43     		orrs	r3, r1
+ 406 0008 5363     		str	r3, [r2, #52]
+ 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   /* Enable fast mode plus driving capability for selected pin */
+ 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   SET_BIT(SYSCFG->CFGR2, (uint32_t)ConfigFastModePlus);
+ 407              		.loc 1 304 0
+ 408 000a 034A     		ldr	r2, .L24+4
+ 409 000c 5368     		ldr	r3, [r2, #4]
+ 410 000e 1843     		orrs	r0, r3
+ 411              	.LVL33:
+ 412 0010 5060     		str	r0, [r2, #4]
+ 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** }
+ 413              		.loc 1 305 0
+ 414              		@ sp needed
+ 415 0012 7047     		bx	lr
+ 416              	.L25:
+ 417              		.align	2
+ 418              	.L24:
+ 419 0014 00100240 		.word	1073876992
+ 420 0018 00000140 		.word	1073807360
+ 421              		.cfi_endproc
+ 422              	.LFE43:
+ 424              		.section	.text.HAL_I2CEx_DisableFastModePlus,"ax",%progbits
+ 425              		.align	1
+ 426              		.global	HAL_I2CEx_DisableFastModePlus
+ 427              		.syntax unified
+ 428              		.code	16
+ 429              		.thumb_func
+ 430              		.fpu softvfp
+ 432              	HAL_I2CEx_DisableFastModePlus:
+ 433              	.LFB44:
+ 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** /**
+ 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @brief Disable the I2C fast mode plus driving capability.
+ 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @param ConfigFastModePlus Selects the pin.
+ 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *   This parameter can be one of the @ref I2CEx_FastModePlus values
+ 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @note  For I2C1, fast mode plus driving capability can be disabled on all selected
+ 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *        I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
+ 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *        on each one of the following pins PB6, PB7, PB8 and PB9.
+ 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @note  For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
+ 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *        can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
+ARM GAS  /tmp/ccHVO7A6.s 			page 14
+
+
+ 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @note  For all I2C2 pins fast mode plus driving capability can be disabled
+ 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *        only by using I2C_FASTMODEPLUS_I2C2 parameter.
+ 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @note  For all I2C3 pins fast mode plus driving capability can be disabled
+ 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   *        only by using I2C_FASTMODEPLUS_I2C3 parameter.
+ 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   * @retval None
+ 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   */
+ 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
+ 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** {
+ 434              		.loc 1 323 0
+ 435              		.cfi_startproc
+ 436              		@ args = 0, pretend = 0, frame = 0
+ 437              		@ frame_needed = 0, uses_anonymous_args = 0
+ 438              		@ link register save eliminated.
+ 439              	.LVL34:
+ 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   /* Check the parameter */
+ 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
+ 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   /* Enable SYSCFG clock */
+ 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 440              		.loc 1 328 0
+ 441 0000 044A     		ldr	r2, .L27
+ 442 0002 536B     		ldr	r3, [r2, #52]
+ 443 0004 0121     		movs	r1, #1
+ 444 0006 0B43     		orrs	r3, r1
+ 445 0008 5363     		str	r3, [r2, #52]
+ 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** 
+ 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   /* Disable fast mode plus driving capability for selected pin */
+ 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c ****   CLEAR_BIT(SYSCFG->CFGR2, (uint32_t)ConfigFastModePlus);
+ 446              		.loc 1 331 0
+ 447 000a 034A     		ldr	r2, .L27+4
+ 448 000c 5368     		ldr	r3, [r2, #4]
+ 449 000e 8343     		bics	r3, r0
+ 450 0010 5360     		str	r3, [r2, #4]
+ 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c **** }
+ 451              		.loc 1 332 0
+ 452              		@ sp needed
+ 453 0012 7047     		bx	lr
+ 454              	.L28:
+ 455              		.align	2
+ 456              	.L27:
+ 457 0014 00100240 		.word	1073876992
+ 458 0018 00000140 		.word	1073807360
+ 459              		.cfi_endproc
+ 460              	.LFE44:
+ 462              		.text
+ 463              	.Letext0:
+ 464              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
+ 465              		.file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
+ 466              		.file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+ 467              		.file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
+ 468              		.file 6 "/usr/arm-none-eabi/include/sys/lock.h"
+ 469              		.file 7 "/usr/arm-none-eabi/include/sys/_types.h"
+ 470              		.file 8 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+ 471              		.file 9 "/usr/arm-none-eabi/include/sys/reent.h"
+ 472              		.file 10 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h"
+ 473              		.file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h"
+ 474              		.file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h"
+ARM GAS  /tmp/ccHVO7A6.s 			page 15
+
+
+ARM GAS  /tmp/ccHVO7A6.s 			page 16
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_i2c_ex.c
+     /tmp/ccHVO7A6.s:16     .text.HAL_I2CEx_ConfigAnalogFilter:0000000000000000 $t
+     /tmp/ccHVO7A6.s:23     .text.HAL_I2CEx_ConfigAnalogFilter:0000000000000000 HAL_I2CEx_ConfigAnalogFilter
+     /tmp/ccHVO7A6.s:107    .text.HAL_I2CEx_ConfigAnalogFilter:0000000000000054 $d
+     /tmp/ccHVO7A6.s:112    .text.HAL_I2CEx_ConfigDigitalFilter:0000000000000000 $t
+     /tmp/ccHVO7A6.s:119    .text.HAL_I2CEx_ConfigDigitalFilter:0000000000000000 HAL_I2CEx_ConfigDigitalFilter
+     /tmp/ccHVO7A6.s:208    .text.HAL_I2CEx_ConfigDigitalFilter:0000000000000050 $d
+     /tmp/ccHVO7A6.s:213    .text.HAL_I2CEx_EnableWakeUp:0000000000000000 $t
+     /tmp/ccHVO7A6.s:220    .text.HAL_I2CEx_EnableWakeUp:0000000000000000 HAL_I2CEx_EnableWakeUp
+     /tmp/ccHVO7A6.s:298    .text.HAL_I2CEx_DisableWakeUp:0000000000000000 $t
+     /tmp/ccHVO7A6.s:305    .text.HAL_I2CEx_DisableWakeUp:0000000000000000 HAL_I2CEx_DisableWakeUp
+     /tmp/ccHVO7A6.s:381    .text.HAL_I2CEx_DisableWakeUp:000000000000004c $d
+     /tmp/ccHVO7A6.s:386    .text.HAL_I2CEx_EnableFastModePlus:0000000000000000 $t
+     /tmp/ccHVO7A6.s:393    .text.HAL_I2CEx_EnableFastModePlus:0000000000000000 HAL_I2CEx_EnableFastModePlus
+     /tmp/ccHVO7A6.s:419    .text.HAL_I2CEx_EnableFastModePlus:0000000000000014 $d
+     /tmp/ccHVO7A6.s:425    .text.HAL_I2CEx_DisableFastModePlus:0000000000000000 $t
+     /tmp/ccHVO7A6.s:432    .text.HAL_I2CEx_DisableFastModePlus:0000000000000000 HAL_I2CEx_DisableFastModePlus
+     /tmp/ccHVO7A6.s:457    .text.HAL_I2CEx_DisableFastModePlus:0000000000000014 $d
+                     .debug_frame:0000000000000010 $d
+
+NO UNDEFINED SYMBOLS

build/stm32l0xx_hal_i2s.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_i2s.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2s.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_i2s.lst

@@ -0,0 +1,32 @@
+ARM GAS  /tmp/ccv2GA5P.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_i2s.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              	.Letext0:
+  16              		.file 1 "/usr/arm-none-eabi/include/machine/_default_types.h"
+  17              		.file 2 "/usr/arm-none-eabi/include/sys/_stdint.h"
+  18              		.file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+  19              		.file 4 "/usr/arm-none-eabi/include/sys/lock.h"
+  20              		.file 5 "/usr/arm-none-eabi/include/sys/_types.h"
+  21              		.file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+  22              		.file 7 "/usr/arm-none-eabi/include/sys/reent.h"
+ARM GAS  /tmp/ccv2GA5P.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_i2s.c
+
+NO UNDEFINED SYMBOLS

build/stm32l0xx_hal_irda.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_irda.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_irda.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_irda.lst

@@ -0,0 +1,32 @@
+ARM GAS  /tmp/ccXPAaVX.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_irda.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              	.Letext0:
+  16              		.file 1 "/usr/arm-none-eabi/include/machine/_default_types.h"
+  17              		.file 2 "/usr/arm-none-eabi/include/sys/_stdint.h"
+  18              		.file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+  19              		.file 4 "/usr/arm-none-eabi/include/sys/lock.h"
+  20              		.file 5 "/usr/arm-none-eabi/include/sys/_types.h"
+  21              		.file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+  22              		.file 7 "/usr/arm-none-eabi/include/sys/reent.h"
+ARM GAS  /tmp/ccXPAaVX.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_irda.c
+
+NO UNDEFINED SYMBOLS

build/stm32l0xx_hal_iwdg.d

@@ -0,0 +1,103 @@
+build/stm32l0xx_hal_iwdg.d: \
+ Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \
+ Inc/stm32l0xx_hal_conf.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \
+ Drivers/CMSIS/Include/core_cm0plus.h \
+ Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/core_cmFunc.h \
+ Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \
+ Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h:
+
+Inc/stm32l0xx_hal_conf.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h:
+
+Drivers/CMSIS/Include/core_cm0plus.h:
+
+Drivers/CMSIS/Include/core_cmInstr.h:
+
+Drivers/CMSIS/Include/cmsis_gcc.h:
+
+Drivers/CMSIS/Include/core_cmFunc.h:
+
+Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h:
+
+Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h:

build/stm32l0xx_hal_iwdg.lst

@@ -0,0 +1,457 @@
+ARM GAS  /tmp/ccx6pHMx.s 			page 1
+
+
+   1              		.cpu cortex-m0plus
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32l0xx_hal_iwdg.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              		.section	.text.HAL_IWDG_Init,"ax",%progbits
+  16              		.align	1
+  17              		.global	HAL_IWDG_Init
+  18              		.syntax unified
+  19              		.code	16
+  20              		.thumb_func
+  21              		.fpu softvfp
+  23              	HAL_IWDG_Init:
+  24              	.LFB39:
+  25              		.file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c"
+   1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /**
+   2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   ******************************************************************************
+   3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @file    stm32l0xx_hal_iwdg.c
+   4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @author  MCD Application Team
+   5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @brief   IWDG HAL module driver.
+   6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *          This file provides firmware functions to manage the following 
+   7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *          functionalities of the Independent Watchdog (IWDG) peripheral:
+   8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *           + Initialization and Start functions
+   9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *           + IO operation functions
+  10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *
+  11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   @verbatim
+  12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   ==============================================================================
+  13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****                     ##### IWDG Generic features #####
+  14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   ==============================================================================
+  15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   [..]
+  16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     (+) The IWDG can be started by either software or hardware (configurable
+  17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         through option byte).
+  18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+  19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
+  20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         if the main clock fails.
+  21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+  22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     (+) Once the IWDG is started, the LSI is forced ON and both can not be 
+  23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         disabled. The counter starts counting down from the reset value (0xFFF).
+  24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         When it reaches the end of count value (0x000) a reset signal is 
+  25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         generated (IWDG reset).
+  26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+  27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register, 
+  28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         the IWDG_RLR value is reloaded in the counter and the watchdog reset is
+  29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         prevented.
+  30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+  31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     (+) The IWDG is implemented in the VDD voltage domain that is still functional
+  32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
+  33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
+ARM GAS  /tmp/ccx6pHMx.s 			page 2
+
+
+  34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         reset occurs.
+  35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+  36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     (+) Debug mode : When the microcontroller enters debug mode (core halted),
+  37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         the IWDG counter either continues to work normally or stops, depending 
+  38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         on DBG_IWDG_STOP configuration bit in DBG module, accessible through
+  39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros
+  40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+  41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     [..] Min-max timeout value @32KHz (LSI): ~0.512ms / ~32.0s
+  42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****          The IWDG timeout may vary due to LSI frequency dispersion. STM32L0xx
+  43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****          devices provide the capability to measure the LSI frequency (LSI clock
+  44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****          connected internally to TIM5 CH4 input capture). The measured value
+  45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****          can be used to have an IWDG timeout with an acceptable accuracy.
+  46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+  47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****                      ##### How to use this driver #####
+  48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   ==============================================================================
+  49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   [..]
+  50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     (#) Use IWDG using HAL_IWDG_Init() function to :
+  51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****       (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI 
+  52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****            clock is forced ON and IWDG counter starts downcounting.
+  53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****       (++) Enable write access to configuration register: IWDG_PR, IWDG_RLR & 
+  54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****            IWDG_WINR.
+  55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****       (++) Configure the IWDG prescaler and counter reload value. This reload 
+  56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****            value will be loaded in the IWDG counter each time the watchdog is 
+  57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****            reloaded, then the IWDG will start counting down from this value.
+  58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****       (++) Wait for status flags to be reset
+  59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****       (++) Depending on window parameter:
+  60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         (+++) If Window Init parameter is same as Window register value, 
+  61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****              nothing more is done but reload counter value in order to exit 
+  62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****              function withy exact time base.
+  63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         (+++) Else modify Window register. This will automatically reload
+  64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****              watchdog counter.
+  65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+  66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     (#) Then the application program must refresh the IWDG counter at regular
+  67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         intervals during normal operation to prevent an MCU reset, using
+  68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****         HAL_IWDG_Refresh() function.
+  69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+  70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****      *** IWDG HAL driver macros list ***
+  71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****      ====================================
+  72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****      [..]
+  73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****        Below the list of most used macros in IWDG HAL driver:
+  74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****       (+) __HAL_IWDG_START: Enable the IWDG peripheral
+  75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****       (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
+  76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****           the reload register
+  77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+  78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   @endverbatim
+  79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   ******************************************************************************
+  80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @attention
+  81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *
+  82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *
+  84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * Redistribution and use in source and binary forms, with or without modification,
+  85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * are permitted provided that the following conditions are met:
+  86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *   1. Redistributions of source code must retain the above copyright notice,
+  87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *      this list of conditions and the following disclaimer.
+  88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *   2. Redistributions in binary form must reproduce the above copyright notice,
+  89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *      this list of conditions and the following disclaimer in the documentation
+  90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *      and/or other materials provided with the distribution.
+ARM GAS  /tmp/ccx6pHMx.s 			page 3
+
+
+  91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *      may be used to endorse or promote products derived from this software
+  93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *      without specific prior written permission.
+  94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *
+  95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *
+ 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   ******************************************************************************
+ 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   */
+ 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /* Includes ------------------------------------------------------------------*/
+ 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** #include "stm32l0xx_hal.h"
+ 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /** @addtogroup STM32L0xx_HAL_Driver
+ 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @{
+ 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   */
+ 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** #ifdef HAL_IWDG_MODULE_ENABLED
+ 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /** @addtogroup IWDG
+ 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @brief IWDG HAL module driver.
+ 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @{
+ 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   */
+ 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /* Private typedef -----------------------------------------------------------*/
+ 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /* Private define ------------------------------------------------------------*/
+ 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /** @defgroup IWDG_Private_Defines IWDG Private Defines
+ 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @{
+ 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   */
+ 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /* Status register need 5 RC LSI divided by prescaler clock to be updated. With 
+ 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****    higher prescaler (256), and according to LSI variation, we need to wait at 
+ 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****    least 6 cycles so 48 ms. */
+ 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** #define HAL_IWDG_DEFAULT_TIMEOUT            48U
+ 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /**
+ 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @}
+ 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   */
+ 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /* Private macro -------------------------------------------------------------*/
+ 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /* Private variables ---------------------------------------------------------*/
+ 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /* Private function prototypes -----------------------------------------------*/
+ 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /* Exported functions --------------------------------------------------------*/
+ 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /** @addtogroup IWDG_Exported_Functions
+ 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @{
+ 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   */
+ 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /** @addtogroup IWDG_Exported_Functions_Group1
+ 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****  *  @brief    Initialization and Start functions.
+ 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****  *
+ 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** @verbatim
+ARM GAS  /tmp/ccx6pHMx.s 			page 4
+
+
+ 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****  ===============================================================================
+ 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****           ##### Initialization and Start functions #####
+ 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****  ===============================================================================
+ 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****  [..]  This section provides functions allowing to:
+ 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****       (+) Initialize the IWDG according to the specified parameters in the 
+ 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****           IWDG_InitTypeDef of associated handle.
+ 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****       (+) Manage Window option.
+ 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****       (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog 
+ 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****           is reloaded in order to exit function with correct time base.
+ 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** @endverbatim
+ 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @{
+ 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   */
+ 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /**
+ 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @brief  Initialize the IWDG according to the specified parameters in the 
+ 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *         IWDG_InitTypeDef and start watchdog. Before exiting function, 
+ 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *         watchdog is refreshed in order to have correct time base.
+ 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
+ 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *                the configuration information for the specified IWDG module.
+ 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @retval HAL status
+ 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   */
+ 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
+ 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** {
+  26              		.loc 1 171 0
+  27              		.cfi_startproc
+  28              		@ args = 0, pretend = 0, frame = 0
+  29              		@ frame_needed = 0, uses_anonymous_args = 0
+  30              	.LVL0:
+  31 0000 70B5     		push	{r4, r5, r6, lr}
+  32              	.LCFI0:
+  33              		.cfi_def_cfa_offset 16
+  34              		.cfi_offset 4, -16
+  35              		.cfi_offset 5, -12
+  36              		.cfi_offset 6, -8
+  37              		.cfi_offset 14, -4
+  38 0002 041E     		subs	r4, r0, #0
+ 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   uint32_t tickstart;
+ 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   /* Check the IWDG handle allocation */
+ 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   if(hiwdg == NULL)
+  39              		.loc 1 175 0
+  40 0004 24D0     		beq	.L6
+ 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   {
+ 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     return HAL_ERROR;
+ 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   }
+ 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   /* Check the parameters */
+ 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
+ 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
+ 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
+ 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
+ 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   /* Enable IWDG. LSI is turned on automaticaly */
+ 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   __HAL_IWDG_START(hiwdg);
+  41              		.loc 1 187 0
+  42 0006 0368     		ldr	r3, [r0]
+ARM GAS  /tmp/ccx6pHMx.s 			page 5
+
+
+  43 0008 124A     		ldr	r2, .L9
+  44 000a 1A60     		str	r2, [r3]
+ 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
+ 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   0x5555 in KR */
+ 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   IWDG_ENABLE_WRITE_ACCESS(hiwdg);
+  45              		.loc 1 191 0
+  46 000c 0368     		ldr	r3, [r0]
+  47 000e 124A     		ldr	r2, .L9+4
+  48 0010 1A60     		str	r2, [r3]
+ 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   /* Write to IWDG registers the Prescaler & Reload values to work with */
+ 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   hiwdg->Instance->PR = hiwdg->Init.Prescaler;
+  49              		.loc 1 194 0
+  50 0012 0368     		ldr	r3, [r0]
+  51 0014 4268     		ldr	r2, [r0, #4]
+  52 0016 5A60     		str	r2, [r3, #4]
+ 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   hiwdg->Instance->RLR = hiwdg->Init.Reload;
+  53              		.loc 1 195 0
+  54 0018 0368     		ldr	r3, [r0]
+  55 001a 8268     		ldr	r2, [r0, #8]
+  56 001c 9A60     		str	r2, [r3, #8]
+ 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   /* Check pending flag, if previous update not done, return timeout */
+ 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   tickstart = HAL_GetTick();
+  57              		.loc 1 198 0
+  58 001e FFF7FEFF 		bl	HAL_GetTick
+  59              	.LVL1:
+  60 0022 0500     		movs	r5, r0
+  61              	.LVL2:
+  62              	.L3:
+ 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****    /* Wait for register to be updated */
+ 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   while(hiwdg->Instance->SR != RESET)
+  63              		.loc 1 201 0
+  64 0024 2368     		ldr	r3, [r4]
+  65 0026 DA68     		ldr	r2, [r3, #12]
+  66 0028 002A     		cmp	r2, #0
+  67 002a 06D0     		beq	.L8
+ 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   {
+ 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     if((HAL_GetTick() - tickstart ) > HAL_IWDG_DEFAULT_TIMEOUT)
+  68              		.loc 1 203 0
+  69 002c FFF7FEFF 		bl	HAL_GetTick
+  70              	.LVL3:
+  71 0030 401B     		subs	r0, r0, r5
+  72 0032 3028     		cmp	r0, #48
+  73 0034 F6D9     		bls	.L3
+ 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     {
+ 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****       return HAL_TIMEOUT;
+  74              		.loc 1 205 0
+  75 0036 0320     		movs	r0, #3
+  76 0038 0BE0     		b	.L2
+  77              	.L8:
+ 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     }
+ 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   }
+ 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   /* If window parameter is different than current value, modify window 
+ARM GAS  /tmp/ccx6pHMx.s 			page 6
+
+
+ 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   register */
+ 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   if(hiwdg->Instance->WINR != hiwdg->Init.Window)
+  78              		.loc 1 211 0
+  79 003a 1969     		ldr	r1, [r3, #16]
+  80 003c E268     		ldr	r2, [r4, #12]
+  81 003e 9142     		cmp	r1, r2
+  82 0040 02D0     		beq	.L5
+ 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   {
+ 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     /* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
+ 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     even if window feature is disabled, Watchdog will be reloaded by writing 
+ 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     windows register */
+ 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     hiwdg->Instance->WINR = hiwdg->Init.Window;
+  83              		.loc 1 216 0
+  84 0042 1A61     		str	r2, [r3, #16]
+ 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   }
+ 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   else
+ 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   {
+ 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     /* Reload IWDG counter with value defined in the reload register */
+ 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****     __HAL_IWDG_RELOAD_COUNTER(hiwdg);
+ 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   }
+ 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   /* Return function status */
+ 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   return HAL_OK;
+  85              		.loc 1 225 0
+  86 0044 0020     		movs	r0, #0
+  87 0046 04E0     		b	.L2
+  88              	.L5:
+ 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   }
+  89              		.loc 1 221 0
+  90 0048 044A     		ldr	r2, .L9+8
+  91 004a 1A60     		str	r2, [r3]
+  92              		.loc 1 225 0
+  93 004c 0020     		movs	r0, #0
+  94 004e 00E0     		b	.L2
+  95              	.LVL4:
+  96              	.L6:
+ 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   }
+  97              		.loc 1 177 0
+  98 0050 0120     		movs	r0, #1
+  99              	.LVL5:
+ 100              	.L2:
+ 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** }
+ 101              		.loc 1 226 0
+ 102              		@ sp needed
+ 103              	.LVL6:
+ 104 0052 70BD     		pop	{r4, r5, r6, pc}
+ 105              	.L10:
+ 106              		.align	2
+ 107              	.L9:
+ 108 0054 CCCC0000 		.word	52428
+ 109 0058 55550000 		.word	21845
+ 110 005c AAAA0000 		.word	43690
+ 111              		.cfi_endproc
+ 112              	.LFE39:
+ 114              		.section	.text.HAL_IWDG_Refresh,"ax",%progbits
+ 115              		.align	1
+ 116              		.global	HAL_IWDG_Refresh
+ARM GAS  /tmp/ccx6pHMx.s 			page 7
+
+
+ 117              		.syntax unified
+ 118              		.code	16
+ 119              		.thumb_func
+ 120              		.fpu softvfp
+ 122              	HAL_IWDG_Refresh:
+ 123              	.LFB40:
+ 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /**
+ 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @}
+ 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   */
+ 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /** @addtogroup IWDG_Exported_Functions_Group2
+ 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****  *  @brief   IO operation functions
+ 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****  *
+ 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** @verbatim
+ 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****  ===============================================================================
+ 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****                       ##### IO operation functions #####
+ 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****  ===============================================================================
+ 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****  [..]  This section provides functions allowing to:
+ 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****       (+) Refresh the IWDG.
+ 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** @endverbatim
+ 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @{
+ 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   */
+ 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** /**
+ 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @brief  Refresh the IWDG.
+ 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
+ 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   *                the configuration information for the specified IWDG module.
+ 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   * @retval HAL status
+ 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   */
+ 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
+ 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** {
+ 124              		.loc 1 255 0
+ 125              		.cfi_startproc
+ 126              		@ args = 0, pretend = 0, frame = 0
+ 127              		@ frame_needed = 0, uses_anonymous_args = 0
+ 128              		@ link register save eliminated.
+ 129              	.LVL7:
+ 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   /* Reload IWDG counter with value defined in the reload register */
+ 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   __HAL_IWDG_RELOAD_COUNTER(hiwdg);
+ 130              		.loc 1 257 0
+ 131 0000 0368     		ldr	r3, [r0]
+ 132 0002 024A     		ldr	r2, .L12
+ 133 0004 1A60     		str	r2, [r3]
+ 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** 
+ 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   /* Return function status */
+ 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c ****   return HAL_OK;
+ 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c **** }
+ 134              		.loc 1 261 0
+ 135 0006 0020     		movs	r0, #0
+ 136              	.LVL8:
+ 137              		@ sp needed
+ 138 0008 7047     		bx	lr
+ 139              	.L13:
+ARM GAS  /tmp/ccx6pHMx.s 			page 8
+
+
+ 140 000a C046     		.align	2
+ 141              	.L12:
+ 142 000c AAAA0000 		.word	43690
+ 143              		.cfi_endproc
+ 144              	.LFE40:
+ 146              		.text
+ 147              	.Letext0:
+ 148              		.file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
+ 149              		.file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
+ 150              		.file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
+ 151              		.file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
+ 152              		.file 6 "/usr/arm-none-eabi/include/sys/lock.h"
+ 153              		.file 7 "/usr/arm-none-eabi/include/sys/_types.h"
+ 154              		.file 8 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
+ 155              		.file 9 "/usr/arm-none-eabi/include/sys/reent.h"
+ 156              		.file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h"
+ 157              		.file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h"
+ 158              		.file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h"
+ 159              		.file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h"
+ARM GAS  /tmp/ccx6pHMx.s 			page 9
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32l0xx_hal_iwdg.c
+     /tmp/ccx6pHMx.s:16     .text.HAL_IWDG_Init:0000000000000000 $t
+     /tmp/ccx6pHMx.s:23     .text.HAL_IWDG_Init:0000000000000000 HAL_IWDG_Init
+     /tmp/ccx6pHMx.s:108    .text.HAL_IWDG_Init:0000000000000054 $d
+     /tmp/ccx6pHMx.s:115    .text.HAL_IWDG_Refresh:0000000000000000 $t
+     /tmp/ccx6pHMx.s:122    .text.HAL_IWDG_Refresh:0000000000000000 HAL_IWDG_Refresh
+     /tmp/ccx6pHMx.s:142    .text.HAL_IWDG_Refresh:000000000000000c $d
+                     .debug_frame:0000000000000010 $d
+
+UNDEFINED SYMBOLS
+HAL_GetTick