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ARM GAS /tmp/cchlfLgp.s page 1
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1 .cpu cortex-m0plus
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2 .eabi_attribute 20, 1
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3 .eabi_attribute 21, 1
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4 .eabi_attribute 23, 3
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5 .eabi_attribute 24, 1
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6 .eabi_attribute 25, 1
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7 .eabi_attribute 26, 1
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8 .eabi_attribute 30, 1
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9 .eabi_attribute 34, 0
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10 .eabi_attribute 18, 4
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11 .file "hw_spi.c"
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12 .text
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13 .Ltext0:
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14 .cfi_sections .debug_frame
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15 .section .text.HW_SPI_IoInit,"ax",%progbits
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16 .align 1
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17 .global HW_SPI_IoInit
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18 .syntax unified
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19 .code 16
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20 .thumb_func
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21 .fpu softvfp
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23 HW_SPI_IoInit:
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24 .LFB98:
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25 .file 1 "./Src/hw_spi.c"
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1:./Src/hw_spi.c **** /*
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2:./Src/hw_spi.c **** / _____) _ | |
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3:./Src/hw_spi.c **** ( (____ _____ ____ _| |_ _____ ____| |__
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4:./Src/hw_spi.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \
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5:./Src/hw_spi.c **** _____) ) ____| | | || |_| ____( (___| | | |
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6:./Src/hw_spi.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_|
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7:./Src/hw_spi.c **** (C)2013 Semtech
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8:./Src/hw_spi.c ****
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9:./Src/hw_spi.c **** Description: Bleeper board SPI driver implementation
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10:./Src/hw_spi.c ****
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11:./Src/hw_spi.c **** License: Revised BSD License, see LICENSE.TXT file include in the project
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12:./Src/hw_spi.c ****
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13:./Src/hw_spi.c **** Maintainer: Miguel Luis and Gregory Cristian
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14:./Src/hw_spi.c **** */
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15:./Src/hw_spi.c **** /*******************************************************************************
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16:./Src/hw_spi.c **** * @file hw_spi.c
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17:./Src/hw_spi.c **** * @author MCD Application Team
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18:./Src/hw_spi.c **** * @version V1.1.2
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19:./Src/hw_spi.c **** * @date 08-September-2017
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20:./Src/hw_spi.c **** * @brief manages the SPI interface
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21:./Src/hw_spi.c **** ******************************************************************************
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22:./Src/hw_spi.c **** * @attention
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23:./Src/hw_spi.c **** *
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24:./Src/hw_spi.c **** * <h2><center>© Copyright (c) 2017 STMicroelectronics International N.V.
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25:./Src/hw_spi.c **** * All rights reserved.</center></h2>
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26:./Src/hw_spi.c **** *
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27:./Src/hw_spi.c **** * Redistribution and use in source and binary forms, with or without
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28:./Src/hw_spi.c **** * modification, are permitted, provided that the following conditions are met:
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29:./Src/hw_spi.c **** *
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30:./Src/hw_spi.c **** * 1. Redistribution of source code must retain the above copyright notice,
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31:./Src/hw_spi.c **** * this list of conditions and the following disclaimer.
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32:./Src/hw_spi.c **** * 2. Redistributions in binary form must reproduce the above copyright notice,
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33:./Src/hw_spi.c **** * this list of conditions and the following disclaimer in the documentation
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ARM GAS /tmp/cchlfLgp.s page 2
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34:./Src/hw_spi.c **** * and/or other materials provided with the distribution.
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35:./Src/hw_spi.c **** * 3. Neither the name of STMicroelectronics nor the names of other
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36:./Src/hw_spi.c **** * contributors to this software may be used to endorse or promote products
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37:./Src/hw_spi.c **** * derived from this software without specific written permission.
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38:./Src/hw_spi.c **** * 4. This software, including modifications and/or derivative works of this
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39:./Src/hw_spi.c **** * software, must execute solely and exclusively on microcontroller or
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40:./Src/hw_spi.c **** * microprocessor devices manufactured by or for STMicroelectronics.
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41:./Src/hw_spi.c **** * 5. Redistribution and use of this software other than as permitted under
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42:./Src/hw_spi.c **** * this license is void and will automatically terminate your rights under
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43:./Src/hw_spi.c **** * this license.
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44:./Src/hw_spi.c **** *
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45:./Src/hw_spi.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
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46:./Src/hw_spi.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
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47:./Src/hw_spi.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
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48:./Src/hw_spi.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
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49:./Src/hw_spi.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
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50:./Src/hw_spi.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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51:./Src/hw_spi.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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52:./Src/hw_spi.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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53:./Src/hw_spi.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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54:./Src/hw_spi.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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55:./Src/hw_spi.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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56:./Src/hw_spi.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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57:./Src/hw_spi.c **** *
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58:./Src/hw_spi.c **** ******************************************************************************
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59:./Src/hw_spi.c **** */
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60:./Src/hw_spi.c ****
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61:./Src/hw_spi.c **** /* Includes ------------------------------------------------------------------*/
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62:./Src/hw_spi.c **** #include "hw.h"
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63:./Src/hw_spi.c **** #include "utilities.h"
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64:./Src/hw_spi.c ****
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65:./Src/hw_spi.c ****
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66:./Src/hw_spi.c **** /* Private typedef -----------------------------------------------------------*/
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67:./Src/hw_spi.c **** /* Private define ------------------------------------------------------------*/
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68:./Src/hw_spi.c **** /* Private macro -------------------------------------------------------------*/
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69:./Src/hw_spi.c **** /* Private variables ---------------------------------------------------------*/
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70:./Src/hw_spi.c **** static SPI_HandleTypeDef hspi;
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71:./Src/hw_spi.c **** /* Private function prototypes -----------------------------------------------*/
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72:./Src/hw_spi.c ****
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73:./Src/hw_spi.c **** /*!
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74:./Src/hw_spi.c **** * @brief Calculates Spi Divisor based on Spi Frequency and Mcu Frequency
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75:./Src/hw_spi.c **** *
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76:./Src/hw_spi.c **** * @param [IN] Spi Frequency
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77:./Src/hw_spi.c **** * @retval Spi divisor
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78:./Src/hw_spi.c **** */
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79:./Src/hw_spi.c **** static uint32_t SpiFrequency( uint32_t hz );
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80:./Src/hw_spi.c ****
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81:./Src/hw_spi.c **** /* Exported functions ---------------------------------------------------------*/
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82:./Src/hw_spi.c ****
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83:./Src/hw_spi.c **** /*!
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84:./Src/hw_spi.c **** * @brief Initializes the SPI object and MCU peripheral
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85:./Src/hw_spi.c **** *
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86:./Src/hw_spi.c **** * @param [IN] none
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87:./Src/hw_spi.c **** */
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88:./Src/hw_spi.c **** void HW_SPI_Init( void )
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89:./Src/hw_spi.c **** {
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90:./Src/hw_spi.c ****
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ARM GAS /tmp/cchlfLgp.s page 3
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91:./Src/hw_spi.c **** /*##-1- Configure the SPI peripheral */
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92:./Src/hw_spi.c **** /* Set the SPI parameters */
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93:./Src/hw_spi.c ****
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94:./Src/hw_spi.c **** hspi.Instance = SPI1;
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95:./Src/hw_spi.c ****
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96:./Src/hw_spi.c **** hspi.Init.BaudRatePrescaler = SpiFrequency( 10000000 );
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97:./Src/hw_spi.c **** hspi.Init.Direction = SPI_DIRECTION_2LINES;
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98:./Src/hw_spi.c **** hspi.Init.Mode = SPI_MODE_MASTER;
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99:./Src/hw_spi.c **** hspi.Init.CLKPolarity = SPI_POLARITY_LOW;
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100:./Src/hw_spi.c **** hspi.Init.CLKPhase = SPI_PHASE_1EDGE;
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101:./Src/hw_spi.c **** hspi.Init.DataSize = SPI_DATASIZE_8BIT;
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102:./Src/hw_spi.c **** hspi.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
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103:./Src/hw_spi.c **** hspi.Init.FirstBit = SPI_FIRSTBIT_MSB;
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104:./Src/hw_spi.c **** hspi.Init.NSS = SPI_NSS_SOFT;
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105:./Src/hw_spi.c **** hspi.Init.TIMode = SPI_TIMODE_DISABLE;
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106:./Src/hw_spi.c ****
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107:./Src/hw_spi.c ****
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108:./Src/hw_spi.c **** SPI_CLK_ENABLE();
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109:./Src/hw_spi.c ****
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110:./Src/hw_spi.c ****
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111:./Src/hw_spi.c **** if(HAL_SPI_Init( &hspi) != HAL_OK)
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112:./Src/hw_spi.c **** {
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113:./Src/hw_spi.c **** /* Initialization Error */
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114:./Src/hw_spi.c **** Error_Handler();
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115:./Src/hw_spi.c **** }
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116:./Src/hw_spi.c ****
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117:./Src/hw_spi.c **** /*##-2- Configure the SPI GPIOs */
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118:./Src/hw_spi.c **** HW_SPI_IoInit( );
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119:./Src/hw_spi.c **** }
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120:./Src/hw_spi.c ****
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121:./Src/hw_spi.c **** /*!
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122:./Src/hw_spi.c **** * @brief De-initializes the SPI object and MCU peripheral
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123:./Src/hw_spi.c **** *
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124:./Src/hw_spi.c **** * @param [IN] none
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125:./Src/hw_spi.c **** */
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126:./Src/hw_spi.c **** void HW_SPI_DeInit( void )
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127:./Src/hw_spi.c **** {
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128:./Src/hw_spi.c ****
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129:./Src/hw_spi.c **** HAL_SPI_DeInit( &hspi);
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130:./Src/hw_spi.c ****
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131:./Src/hw_spi.c **** /*##-1- Reset peripherals ####*/
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132:./Src/hw_spi.c **** __HAL_RCC_SPI1_FORCE_RESET();
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133:./Src/hw_spi.c **** __HAL_RCC_SPI1_RELEASE_RESET();
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134:./Src/hw_spi.c **** /*##-2- Configure the SPI GPIOs */
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135:./Src/hw_spi.c **** HW_SPI_IoDeInit( );
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136:./Src/hw_spi.c **** }
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137:./Src/hw_spi.c ****
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138:./Src/hw_spi.c **** void HW_SPI_IoInit( void )
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139:./Src/hw_spi.c **** {
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26 .loc 1 139 0
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27 .cfi_startproc
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28 @ args = 0, pretend = 0, frame = 24
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29 @ frame_needed = 0, uses_anonymous_args = 0
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30 0000 10B5 push {r4, lr}
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31 .LCFI0:
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32 .cfi_def_cfa_offset 8
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33 .cfi_offset 4, -8
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ARM GAS /tmp/cchlfLgp.s page 4
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34 .cfi_offset 14, -4
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35 0002 86B0 sub sp, sp, #24
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36 .LCFI1:
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37 .cfi_def_cfa_offset 32
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140:./Src/hw_spi.c **** GPIO_InitTypeDef initStruct={0};
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38 .loc 1 140 0
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39 0004 1422 movs r2, #20
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40 0006 0021 movs r1, #0
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41 0008 01A8 add r0, sp, #4
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42 000a FFF7FEFF bl memset
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43 .LVL0:
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141:./Src/hw_spi.c ****
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142:./Src/hw_spi.c ****
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143:./Src/hw_spi.c **** initStruct.Mode =GPIO_MODE_AF_PP;
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44 .loc 1 143 0
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45 000e 0223 movs r3, #2
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46 0010 0293 str r3, [sp, #8]
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144:./Src/hw_spi.c **** initStruct.Pull = GPIO_PULLDOWN;
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47 .loc 1 144 0
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48 0012 0393 str r3, [sp, #12]
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145:./Src/hw_spi.c **** initStruct.Speed = GPIO_SPEED_HIGH;
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49 .loc 1 145 0
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50 0014 0133 adds r3, r3, #1
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51 0016 0493 str r3, [sp, #16]
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146:./Src/hw_spi.c **** initStruct.Alternate= SPI1_AF ;
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147:./Src/hw_spi.c ****
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148:./Src/hw_spi.c **** HW_GPIO_Init( RADIO_SCLK_PORT, RADIO_SCLK_PIN, &initStruct);
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52 .loc 1 148 0
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53 0018 A024 movs r4, #160
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54 001a E405 lsls r4, r4, #23
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55 001c 01AA add r2, sp, #4
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56 001e 2021 movs r1, #32
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57 0020 2000 movs r0, r4
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58 0022 FFF7FEFF bl HW_GPIO_Init
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59 .LVL1:
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149:./Src/hw_spi.c **** HW_GPIO_Init( RADIO_MISO_PORT, RADIO_MISO_PIN, &initStruct);
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60 .loc 1 149 0
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61 0026 01AA add r2, sp, #4
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62 0028 4021 movs r1, #64
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63 002a 2000 movs r0, r4
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64 002c FFF7FEFF bl HW_GPIO_Init
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65 .LVL2:
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150:./Src/hw_spi.c **** HW_GPIO_Init( RADIO_MOSI_PORT, RADIO_MOSI_PIN, &initStruct);
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66 .loc 1 150 0
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67 0030 01AA add r2, sp, #4
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68 0032 8021 movs r1, #128
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69 0034 2000 movs r0, r4
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70 0036 FFF7FEFF bl HW_GPIO_Init
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71 .LVL3:
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151:./Src/hw_spi.c ****
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152:./Src/hw_spi.c **** initStruct.Mode = GPIO_MODE_OUTPUT_PP;
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72 .loc 1 152 0
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73 003a 0123 movs r3, #1
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74 003c 0293 str r3, [sp, #8]
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153:./Src/hw_spi.c **** initStruct.Pull = GPIO_PULLUP;
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75 .loc 1 153 0
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76 003e 0393 str r3, [sp, #12]
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ARM GAS /tmp/cchlfLgp.s page 5
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154:./Src/hw_spi.c ****
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155:./Src/hw_spi.c **** HW_GPIO_Init( RADIO_NSS_PORT, RADIO_NSS_PIN, &initStruct );
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77 .loc 1 155 0
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78 0040 064C ldr r4, .L2
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79 0042 01AA add r2, sp, #4
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80 0044 4021 movs r1, #64
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81 0046 2000 movs r0, r4
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82 0048 FFF7FEFF bl HW_GPIO_Init
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83 .LVL4:
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156:./Src/hw_spi.c ****
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157:./Src/hw_spi.c **** HW_GPIO_Write ( RADIO_NSS_PORT, RADIO_NSS_PIN, 1 );
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84 .loc 1 157 0
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85 004c 0122 movs r2, #1
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86 004e 4021 movs r1, #64
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87 0050 2000 movs r0, r4
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88 0052 FFF7FEFF bl HW_GPIO_Write
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89 .LVL5:
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158:./Src/hw_spi.c **** }
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90 .loc 1 158 0
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91 0056 06B0 add sp, sp, #24
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92 @ sp needed
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93 0058 10BD pop {r4, pc}
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94 .L3:
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95 005a C046 .align 2
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96 .L2:
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97 005c 00040050 .word 1342178304
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98 .cfi_endproc
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99 .LFE98:
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101 .section .text.HW_SPI_Init,"ax",%progbits
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102 .align 1
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103 .global HW_SPI_Init
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104 .syntax unified
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105 .code 16
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106 .thumb_func
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107 .fpu softvfp
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109 HW_SPI_Init:
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110 .LFB96:
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89:./Src/hw_spi.c ****
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111 .loc 1 89 0
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112 .cfi_startproc
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113 @ args = 0, pretend = 0, frame = 0
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114 @ frame_needed = 0, uses_anonymous_args = 0
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115 0000 10B5 push {r4, lr}
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116 .LCFI2:
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117 .cfi_def_cfa_offset 8
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118 .cfi_offset 4, -8
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119 .cfi_offset 14, -4
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94:./Src/hw_spi.c ****
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120 .loc 1 94 0
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121 0002 1F4B ldr r3, .L17
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122 0004 1F4A ldr r2, .L17+4
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123 0006 1A60 str r2, [r3]
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124 .LVL6:
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125 .LBB4:
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126 .LBB5:
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159:./Src/hw_spi.c ****
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160:./Src/hw_spi.c **** void HW_SPI_IoDeInit( void )
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ARM GAS /tmp/cchlfLgp.s page 6
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161:./Src/hw_spi.c **** {
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162:./Src/hw_spi.c **** GPIO_InitTypeDef initStruct={0};
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163:./Src/hw_spi.c ****
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164:./Src/hw_spi.c **** initStruct.Mode =GPIO_MODE_OUTPUT_PP;
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165:./Src/hw_spi.c ****
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166:./Src/hw_spi.c **** initStruct.Pull =GPIO_PULLDOWN ;
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167:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_MOSI_PORT, RADIO_MOSI_PIN, &initStruct );
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168:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_MOSI_PORT, RADIO_MOSI_PIN, 0 );
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169:./Src/hw_spi.c ****
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170:./Src/hw_spi.c **** initStruct.Pull =GPIO_PULLDOWN;
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171:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_MISO_PORT, RADIO_MISO_PIN, &initStruct );
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172:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_MISO_PORT, RADIO_MISO_PIN, 0 );
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173:./Src/hw_spi.c ****
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174:./Src/hw_spi.c **** initStruct.Pull =GPIO_PULLDOWN ;
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|
175:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_SCLK_PORT, RADIO_SCLK_PIN, &initStruct );
|
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|
176:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_SCLK_PORT, RADIO_SCLK_PIN, 0 );
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|
|
177:./Src/hw_spi.c ****
|
|
|
178:./Src/hw_spi.c **** initStruct.Pull = GPIO_PULLUP;
|
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|
179:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_NSS_PORT, RADIO_NSS_PIN , &initStruct );
|
|
|
180:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_NSS_PORT, RADIO_NSS_PIN , 1 );
|
|
|
181:./Src/hw_spi.c **** }
|
|
|
182:./Src/hw_spi.c ****
|
|
|
183:./Src/hw_spi.c **** /*!
|
|
|
184:./Src/hw_spi.c **** * @brief Sends outData and receives inData
|
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185:./Src/hw_spi.c **** *
|
|
|
186:./Src/hw_spi.c **** * @param [IN] outData Byte to be sent
|
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187:./Src/hw_spi.c **** * @retval inData Received byte.
|
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|
188:./Src/hw_spi.c **** */
|
|
|
189:./Src/hw_spi.c **** uint16_t HW_SPI_InOut( uint16_t txData )
|
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|
190:./Src/hw_spi.c **** {
|
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191:./Src/hw_spi.c **** uint16_t rxData ;
|
|
|
192:./Src/hw_spi.c ****
|
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|
193:./Src/hw_spi.c **** HAL_SPI_TransmitReceive( &hspi, ( uint8_t * ) &txData, ( uint8_t* ) &rxData, 1, HAL_MAX_DELAY);
|
|
|
194:./Src/hw_spi.c ****
|
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195:./Src/hw_spi.c **** return rxData;
|
|
|
196:./Src/hw_spi.c **** }
|
|
|
197:./Src/hw_spi.c ****
|
|
|
198:./Src/hw_spi.c **** /* Private functions ---------------------------------------------------------*/
|
|
|
199:./Src/hw_spi.c ****
|
|
|
200:./Src/hw_spi.c **** static uint32_t SpiFrequency( uint32_t hz )
|
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201:./Src/hw_spi.c **** {
|
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202:./Src/hw_spi.c **** uint32_t divisor = 0;
|
|
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203:./Src/hw_spi.c **** uint32_t SysClkTmp = SystemCoreClock;
|
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127 .loc 1 203 0
|
|
|
128 0008 1F4B ldr r3, .L17+8
|
|
|
129 000a 1A68 ldr r2, [r3]
|
|
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130 .LVL7:
|
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|
202:./Src/hw_spi.c **** uint32_t SysClkTmp = SystemCoreClock;
|
|
|
131 .loc 1 202 0
|
|
|
132 000c 0023 movs r3, #0
|
|
|
133 .LVL8:
|
|
|
134 .L5:
|
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|
204:./Src/hw_spi.c **** uint32_t baudRate;
|
|
|
205:./Src/hw_spi.c ****
|
|
|
206:./Src/hw_spi.c **** while( SysClkTmp > hz)
|
|
|
135 .loc 1 206 0
|
|
|
136 000e 1F49 ldr r1, .L17+12
|
|
|
ARM GAS /tmp/cchlfLgp.s page 7
|
|
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|
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137 0010 8A42 cmp r2, r1
|
|
|
138 0012 03D9 bls .L6
|
|
|
207:./Src/hw_spi.c **** {
|
|
|
208:./Src/hw_spi.c **** divisor++;
|
|
|
139 .loc 1 208 0
|
|
|
140 0014 0133 adds r3, r3, #1
|
|
|
141 .LVL9:
|
|
|
209:./Src/hw_spi.c **** SysClkTmp= ( SysClkTmp >> 1);
|
|
|
142 .loc 1 209 0
|
|
|
143 0016 5208 lsrs r2, r2, #1
|
|
|
144 .LVL10:
|
|
|
210:./Src/hw_spi.c ****
|
|
|
211:./Src/hw_spi.c **** if (divisor >= 7)
|
|
|
145 .loc 1 211 0
|
|
|
146 0018 062B cmp r3, #6
|
|
|
147 001a F8D9 bls .L5
|
|
|
148 .L6:
|
|
|
212:./Src/hw_spi.c **** break;
|
|
|
213:./Src/hw_spi.c **** }
|
|
|
214:./Src/hw_spi.c ****
|
|
|
215:./Src/hw_spi.c **** baudRate =((( divisor & 0x4 ) == 0 )? 0x0 : SPI_CR1_BR_2 )|
|
|
|
149 .loc 1 215 0
|
|
|
150 001c 5A07 lsls r2, r3, #29
|
|
|
151 001e 24D4 bmi .L12
|
|
|
152 .LVL11:
|
|
|
153 0020 0022 movs r2, #0
|
|
|
154 .L8:
|
|
|
216:./Src/hw_spi.c **** ((( divisor & 0x2 ) == 0 )? 0x0 : SPI_CR1_BR_1 )|
|
|
|
155 .loc 1 216 0
|
|
|
156 0022 9907 lsls r1, r3, #30
|
|
|
157 0024 23D4 bmi .L13
|
|
|
158 0026 0021 movs r1, #0
|
|
|
159 .L9:
|
|
|
215:./Src/hw_spi.c **** ((( divisor & 0x2 ) == 0 )? 0x0 : SPI_CR1_BR_1 )|
|
|
|
160 .loc 1 215 0
|
|
|
161 0028 0A43 orrs r2, r1
|
|
|
217:./Src/hw_spi.c **** ((( divisor & 0x1 ) == 0 )? 0x0 : SPI_CR1_BR_0 );
|
|
|
162 .loc 1 217 0
|
|
|
163 002a DB07 lsls r3, r3, #31
|
|
|
164 002c 21D5 bpl .L15
|
|
|
165 .LVL12:
|
|
|
166 002e 0823 movs r3, #8
|
|
|
167 .L10:
|
|
|
215:./Src/hw_spi.c **** ((( divisor & 0x2 ) == 0 )? 0x0 : SPI_CR1_BR_1 )|
|
|
|
168 .loc 1 215 0
|
|
|
169 0030 1343 orrs r3, r2
|
|
|
170 .LVL13:
|
|
|
171 .LBE5:
|
|
|
172 .LBE4:
|
|
|
96:./Src/hw_spi.c **** hspi.Init.Direction = SPI_DIRECTION_2LINES;
|
|
|
173 .loc 1 96 0
|
|
|
174 0032 1348 ldr r0, .L17
|
|
|
175 0034 C361 str r3, [r0, #28]
|
|
|
97:./Src/hw_spi.c **** hspi.Init.Mode = SPI_MODE_MASTER;
|
|
|
176 .loc 1 97 0
|
|
|
177 0036 0023 movs r3, #0
|
|
|
178 0038 8360 str r3, [r0, #8]
|
|
|
ARM GAS /tmp/cchlfLgp.s page 8
|
|
|
|
|
|
|
|
|
98:./Src/hw_spi.c **** hspi.Init.CLKPolarity = SPI_POLARITY_LOW;
|
|
|
179 .loc 1 98 0
|
|
|
180 003a 8222 movs r2, #130
|
|
|
181 003c 5200 lsls r2, r2, #1
|
|
|
182 003e 4260 str r2, [r0, #4]
|
|
|
99:./Src/hw_spi.c **** hspi.Init.CLKPhase = SPI_PHASE_1EDGE;
|
|
|
183 .loc 1 99 0
|
|
|
184 0040 0361 str r3, [r0, #16]
|
|
|
100:./Src/hw_spi.c **** hspi.Init.DataSize = SPI_DATASIZE_8BIT;
|
|
|
185 .loc 1 100 0
|
|
|
186 0042 4361 str r3, [r0, #20]
|
|
|
101:./Src/hw_spi.c **** hspi.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
|
|
187 .loc 1 101 0
|
|
|
188 0044 C360 str r3, [r0, #12]
|
|
|
102:./Src/hw_spi.c **** hspi.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
|
|
189 .loc 1 102 0
|
|
|
190 0046 8362 str r3, [r0, #40]
|
|
|
103:./Src/hw_spi.c **** hspi.Init.NSS = SPI_NSS_SOFT;
|
|
|
191 .loc 1 103 0
|
|
|
192 0048 0362 str r3, [r0, #32]
|
|
|
104:./Src/hw_spi.c **** hspi.Init.TIMode = SPI_TIMODE_DISABLE;
|
|
|
193 .loc 1 104 0
|
|
|
194 004a FC32 adds r2, r2, #252
|
|
|
195 004c 8261 str r2, [r0, #24]
|
|
|
105:./Src/hw_spi.c ****
|
|
|
196 .loc 1 105 0
|
|
|
197 004e 4362 str r3, [r0, #36]
|
|
|
108:./Src/hw_spi.c ****
|
|
|
198 .loc 1 108 0
|
|
|
199 0050 0F4A ldr r2, .L17+16
|
|
|
200 0052 516B ldr r1, [r2, #52]
|
|
|
201 0054 8023 movs r3, #128
|
|
|
202 0056 5B01 lsls r3, r3, #5
|
|
|
203 0058 0B43 orrs r3, r1
|
|
|
204 005a 5363 str r3, [r2, #52]
|
|
|
111:./Src/hw_spi.c **** {
|
|
|
205 .loc 1 111 0
|
|
|
206 005c FFF7FEFF bl HAL_SPI_Init
|
|
|
207 .LVL14:
|
|
|
208 0060 0028 cmp r0, #0
|
|
|
209 0062 08D1 bne .L16
|
|
|
210 .L11:
|
|
|
118:./Src/hw_spi.c **** }
|
|
|
211 .loc 1 118 0
|
|
|
212 0064 FFF7FEFF bl HW_SPI_IoInit
|
|
|
213 .LVL15:
|
|
|
119:./Src/hw_spi.c ****
|
|
|
214 .loc 1 119 0
|
|
|
215 @ sp needed
|
|
|
216 0068 10BD pop {r4, pc}
|
|
|
217 .LVL16:
|
|
|
218 .L12:
|
|
|
219 .LBB7:
|
|
|
220 .LBB6:
|
|
|
215:./Src/hw_spi.c **** ((( divisor & 0x2 ) == 0 )? 0x0 : SPI_CR1_BR_1 )|
|
|
|
221 .loc 1 215 0
|
|
|
222 006a 2022 movs r2, #32
|
|
|
ARM GAS /tmp/cchlfLgp.s page 9
|
|
|
|
|
|
|
|
|
223 006c D9E7 b .L8
|
|
|
224 .L13:
|
|
|
216:./Src/hw_spi.c **** ((( divisor & 0x1 ) == 0 )? 0x0 : SPI_CR1_BR_0 );
|
|
|
225 .loc 1 216 0
|
|
|
226 006e 1021 movs r1, #16
|
|
|
227 0070 DAE7 b .L9
|
|
|
228 .LVL17:
|
|
|
229 .L15:
|
|
|
230 .loc 1 217 0
|
|
|
231 0072 0023 movs r3, #0
|
|
|
232 0074 DCE7 b .L10
|
|
|
233 .LVL18:
|
|
|
234 .L16:
|
|
|
235 .LBE6:
|
|
|
236 .LBE7:
|
|
|
114:./Src/hw_spi.c **** }
|
|
|
237 .loc 1 114 0
|
|
|
238 0076 7221 movs r1, #114
|
|
|
239 0078 0648 ldr r0, .L17+20
|
|
|
240 007a FFF7FEFF bl _Error_Handler
|
|
|
241 .LVL19:
|
|
|
242 007e F1E7 b .L11
|
|
|
243 .L18:
|
|
|
244 .align 2
|
|
|
245 .L17:
|
|
|
246 0080 00000000 .word .LANCHOR0
|
|
|
247 0084 00300140 .word 1073819648
|
|
|
248 0088 00000000 .word SystemCoreClock
|
|
|
249 008c 80969800 .word 10000000
|
|
|
250 0090 00100240 .word 1073876992
|
|
|
251 0094 00000000 .word .LC2
|
|
|
252 .cfi_endproc
|
|
|
253 .LFE96:
|
|
|
255 .section .text.HW_SPI_IoDeInit,"ax",%progbits
|
|
|
256 .align 1
|
|
|
257 .global HW_SPI_IoDeInit
|
|
|
258 .syntax unified
|
|
|
259 .code 16
|
|
|
260 .thumb_func
|
|
|
261 .fpu softvfp
|
|
|
263 HW_SPI_IoDeInit:
|
|
|
264 .LFB99:
|
|
|
161:./Src/hw_spi.c **** GPIO_InitTypeDef initStruct={0};
|
|
|
265 .loc 1 161 0
|
|
|
266 .cfi_startproc
|
|
|
267 @ args = 0, pretend = 0, frame = 24
|
|
|
268 @ frame_needed = 0, uses_anonymous_args = 0
|
|
|
269 0000 70B5 push {r4, r5, r6, lr}
|
|
|
270 .LCFI3:
|
|
|
271 .cfi_def_cfa_offset 16
|
|
|
272 .cfi_offset 4, -16
|
|
|
273 .cfi_offset 5, -12
|
|
|
274 .cfi_offset 6, -8
|
|
|
275 .cfi_offset 14, -4
|
|
|
276 0002 86B0 sub sp, sp, #24
|
|
|
277 .LCFI4:
|
|
|
278 .cfi_def_cfa_offset 40
|
|
|
ARM GAS /tmp/cchlfLgp.s page 10
|
|
|
|
|
|
|
|
|
162:./Src/hw_spi.c ****
|
|
|
279 .loc 1 162 0
|
|
|
280 0004 1422 movs r2, #20
|
|
|
281 0006 0021 movs r1, #0
|
|
|
282 0008 01A8 add r0, sp, #4
|
|
|
283 000a FFF7FEFF bl memset
|
|
|
284 .LVL20:
|
|
|
164:./Src/hw_spi.c ****
|
|
|
285 .loc 1 164 0
|
|
|
286 000e 0126 movs r6, #1
|
|
|
287 0010 0296 str r6, [sp, #8]
|
|
|
166:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_MOSI_PORT, RADIO_MOSI_PIN, &initStruct );
|
|
|
288 .loc 1 166 0
|
|
|
289 0012 0225 movs r5, #2
|
|
|
290 0014 0395 str r5, [sp, #12]
|
|
|
167:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_MOSI_PORT, RADIO_MOSI_PIN, 0 );
|
|
|
291 .loc 1 167 0
|
|
|
292 0016 A024 movs r4, #160
|
|
|
293 0018 E405 lsls r4, r4, #23
|
|
|
294 001a 01AA add r2, sp, #4
|
|
|
295 001c 8021 movs r1, #128
|
|
|
296 001e 2000 movs r0, r4
|
|
|
297 0020 FFF7FEFF bl HW_GPIO_Init
|
|
|
298 .LVL21:
|
|
|
168:./Src/hw_spi.c ****
|
|
|
299 .loc 1 168 0
|
|
|
300 0024 0022 movs r2, #0
|
|
|
301 0026 8021 movs r1, #128
|
|
|
302 0028 2000 movs r0, r4
|
|
|
303 002a FFF7FEFF bl HW_GPIO_Write
|
|
|
304 .LVL22:
|
|
|
170:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_MISO_PORT, RADIO_MISO_PIN, &initStruct );
|
|
|
305 .loc 1 170 0
|
|
|
306 002e 0395 str r5, [sp, #12]
|
|
|
171:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_MISO_PORT, RADIO_MISO_PIN, 0 );
|
|
|
307 .loc 1 171 0
|
|
|
308 0030 01AA add r2, sp, #4
|
|
|
309 0032 4021 movs r1, #64
|
|
|
310 0034 2000 movs r0, r4
|
|
|
311 0036 FFF7FEFF bl HW_GPIO_Init
|
|
|
312 .LVL23:
|
|
|
172:./Src/hw_spi.c ****
|
|
|
313 .loc 1 172 0
|
|
|
314 003a 0022 movs r2, #0
|
|
|
315 003c 4021 movs r1, #64
|
|
|
316 003e 2000 movs r0, r4
|
|
|
317 0040 FFF7FEFF bl HW_GPIO_Write
|
|
|
318 .LVL24:
|
|
|
174:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_SCLK_PORT, RADIO_SCLK_PIN, &initStruct );
|
|
|
319 .loc 1 174 0
|
|
|
320 0044 0395 str r5, [sp, #12]
|
|
|
175:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_SCLK_PORT, RADIO_SCLK_PIN, 0 );
|
|
|
321 .loc 1 175 0
|
|
|
322 0046 01AA add r2, sp, #4
|
|
|
323 0048 2021 movs r1, #32
|
|
|
324 004a 2000 movs r0, r4
|
|
|
325 004c FFF7FEFF bl HW_GPIO_Init
|
|
|
ARM GAS /tmp/cchlfLgp.s page 11
|
|
|
|
|
|
|
|
|
326 .LVL25:
|
|
|
176:./Src/hw_spi.c ****
|
|
|
327 .loc 1 176 0
|
|
|
328 0050 0022 movs r2, #0
|
|
|
329 0052 2021 movs r1, #32
|
|
|
330 0054 2000 movs r0, r4
|
|
|
331 0056 FFF7FEFF bl HW_GPIO_Write
|
|
|
332 .LVL26:
|
|
|
178:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_NSS_PORT, RADIO_NSS_PIN , &initStruct );
|
|
|
333 .loc 1 178 0
|
|
|
334 005a 0396 str r6, [sp, #12]
|
|
|
179:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_NSS_PORT, RADIO_NSS_PIN , 1 );
|
|
|
335 .loc 1 179 0
|
|
|
336 005c 064C ldr r4, .L20
|
|
|
337 005e 01AA add r2, sp, #4
|
|
|
338 0060 4021 movs r1, #64
|
|
|
339 0062 2000 movs r0, r4
|
|
|
340 0064 FFF7FEFF bl HW_GPIO_Init
|
|
|
341 .LVL27:
|
|
|
180:./Src/hw_spi.c **** }
|
|
|
342 .loc 1 180 0
|
|
|
343 0068 0122 movs r2, #1
|
|
|
344 006a 4021 movs r1, #64
|
|
|
345 006c 2000 movs r0, r4
|
|
|
346 006e FFF7FEFF bl HW_GPIO_Write
|
|
|
347 .LVL28:
|
|
|
181:./Src/hw_spi.c ****
|
|
|
348 .loc 1 181 0
|
|
|
349 0072 06B0 add sp, sp, #24
|
|
|
350 @ sp needed
|
|
|
351 0074 70BD pop {r4, r5, r6, pc}
|
|
|
352 .L21:
|
|
|
353 0076 C046 .align 2
|
|
|
354 .L20:
|
|
|
355 0078 00040050 .word 1342178304
|
|
|
356 .cfi_endproc
|
|
|
357 .LFE99:
|
|
|
359 .section .text.HW_SPI_DeInit,"ax",%progbits
|
|
|
360 .align 1
|
|
|
361 .global HW_SPI_DeInit
|
|
|
362 .syntax unified
|
|
|
363 .code 16
|
|
|
364 .thumb_func
|
|
|
365 .fpu softvfp
|
|
|
367 HW_SPI_DeInit:
|
|
|
368 .LFB97:
|
|
|
127:./Src/hw_spi.c ****
|
|
|
369 .loc 1 127 0
|
|
|
370 .cfi_startproc
|
|
|
371 @ args = 0, pretend = 0, frame = 0
|
|
|
372 @ frame_needed = 0, uses_anonymous_args = 0
|
|
|
373 0000 10B5 push {r4, lr}
|
|
|
374 .LCFI5:
|
|
|
375 .cfi_def_cfa_offset 8
|
|
|
376 .cfi_offset 4, -8
|
|
|
377 .cfi_offset 14, -4
|
|
|
129:./Src/hw_spi.c ****
|
|
|
ARM GAS /tmp/cchlfLgp.s page 12
|
|
|
|
|
|
|
|
|
378 .loc 1 129 0
|
|
|
379 0002 0848 ldr r0, .L23
|
|
|
380 0004 FFF7FEFF bl HAL_SPI_DeInit
|
|
|
381 .LVL29:
|
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132:./Src/hw_spi.c **** __HAL_RCC_SPI1_RELEASE_RESET();
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382 .loc 1 132 0
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383 0008 074B ldr r3, .L23+4
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384 000a 596A ldr r1, [r3, #36]
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385 000c 8022 movs r2, #128
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386 000e 5201 lsls r2, r2, #5
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387 0010 0A43 orrs r2, r1
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388 0012 5A62 str r2, [r3, #36]
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133:./Src/hw_spi.c **** /*##-2- Configure the SPI GPIOs */
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389 .loc 1 133 0
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390 0014 5A6A ldr r2, [r3, #36]
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391 0016 0549 ldr r1, .L23+8
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392 0018 0A40 ands r2, r1
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393 001a 5A62 str r2, [r3, #36]
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135:./Src/hw_spi.c **** }
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394 .loc 1 135 0
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395 001c FFF7FEFF bl HW_SPI_IoDeInit
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396 .LVL30:
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136:./Src/hw_spi.c ****
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397 .loc 1 136 0
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398 @ sp needed
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399 0020 10BD pop {r4, pc}
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400 .L24:
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401 0022 C046 .align 2
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402 .L23:
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403 0024 00000000 .word .LANCHOR0
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404 0028 00100240 .word 1073876992
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405 002c FFEFFFFF .word -4097
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406 .cfi_endproc
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407 .LFE97:
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409 .section .text.HW_SPI_InOut,"ax",%progbits
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410 .align 1
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411 .global HW_SPI_InOut
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412 .syntax unified
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413 .code 16
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414 .thumb_func
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415 .fpu softvfp
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417 HW_SPI_InOut:
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418 .LFB100:
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190:./Src/hw_spi.c **** uint16_t rxData ;
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419 .loc 1 190 0
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420 .cfi_startproc
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421 @ args = 0, pretend = 0, frame = 16
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422 @ frame_needed = 0, uses_anonymous_args = 0
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423 .LVL31:
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424 0000 10B5 push {r4, lr}
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425 .LCFI6:
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426 .cfi_def_cfa_offset 8
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427 .cfi_offset 4, -8
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428 .cfi_offset 14, -4
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429 0002 86B0 sub sp, sp, #24
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430 .LCFI7:
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431 .cfi_def_cfa_offset 32
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ARM GAS /tmp/cchlfLgp.s page 13
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432 0004 0E21 movs r1, #14
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433 0006 6944 add r1, r1, sp
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434 0008 0880 strh r0, [r1]
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193:./Src/hw_spi.c ****
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435 .loc 1 193 0
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436 000a 1624 movs r4, #22
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|
437 000c 6C44 add r4, r4, sp
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|
438 000e 0123 movs r3, #1
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|
439 0010 5B42 rsbs r3, r3, #0
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|
440 0012 0093 str r3, [sp]
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441 0014 0233 adds r3, r3, #2
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442 0016 2200 movs r2, r4
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443 0018 0248 ldr r0, .L26
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444 .LVL32:
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|
445 001a FFF7FEFF bl HAL_SPI_TransmitReceive
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446 .LVL33:
|
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195:./Src/hw_spi.c **** }
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|
|
447 .loc 1 195 0
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448 001e 2088 ldrh r0, [r4]
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196:./Src/hw_spi.c ****
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449 .loc 1 196 0
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450 0020 06B0 add sp, sp, #24
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|
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451 @ sp needed
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452 0022 10BD pop {r4, pc}
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|
453 .L27:
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|
454 .align 2
|
|
|
455 .L26:
|
|
|
456 0024 00000000 .word .LANCHOR0
|
|
|
457 .cfi_endproc
|
|
|
458 .LFE100:
|
|
|
460 .section .bss.hspi,"aw",%nobits
|
|
|
461 .align 2
|
|
|
462 .set .LANCHOR0,. + 0
|
|
|
465 hspi:
|
|
|
466 0000 00000000 .space 88
|
|
|
466 00000000
|
|
|
466 00000000
|
|
|
466 00000000
|
|
|
466 00000000
|
|
|
467 .section .rodata.HW_SPI_Init.str1.4,"aMS",%progbits,1
|
|
|
468 .align 2
|
|
|
469 .LC2:
|
|
|
470 0000 2E2F5372 .ascii "./Src/hw_spi.c\000"
|
|
|
470 632F6877
|
|
|
470 5F737069
|
|
|
470 2E6300
|
|
|
471 .text
|
|
|
472 .Letext0:
|
|
|
473 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
|
|
|
474 .file 3 "/usr/arm-none-eabi/include/sys/lock.h"
|
|
|
475 .file 4 "/usr/arm-none-eabi/include/sys/_types.h"
|
|
|
476 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
|
|
|
477 .file 6 "/usr/arm-none-eabi/include/sys/reent.h"
|
|
|
478 .file 7 "/usr/arm-none-eabi/include/math.h"
|
|
|
479 .file 8 "/usr/arm-none-eabi/include/sys/_stdint.h"
|
|
|
480 .file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
|
|
|
481 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
|
|
|
ARM GAS /tmp/cchlfLgp.s page 14
|
|
|
|
|
|
|
|
|
482 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h"
|
|
|
483 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h"
|
|
|
484 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h"
|
|
|
485 .file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h"
|
|
|
486 .file 15 "Inc/hw_gpio.h"
|
|
|
487 .file 16 "Inc/debug.h"
|
|
|
488 .file 17 "<built-in>"
|
|
|
ARM GAS /tmp/cchlfLgp.s page 15
|
|
|
|
|
|
|
|
|
DEFINED SYMBOLS
|
|
|
*ABS*:0000000000000000 hw_spi.c
|
|
|
/tmp/cchlfLgp.s:16 .text.HW_SPI_IoInit:0000000000000000 $t
|
|
|
/tmp/cchlfLgp.s:23 .text.HW_SPI_IoInit:0000000000000000 HW_SPI_IoInit
|
|
|
/tmp/cchlfLgp.s:97 .text.HW_SPI_IoInit:000000000000005c $d
|
|
|
/tmp/cchlfLgp.s:102 .text.HW_SPI_Init:0000000000000000 $t
|
|
|
/tmp/cchlfLgp.s:109 .text.HW_SPI_Init:0000000000000000 HW_SPI_Init
|
|
|
/tmp/cchlfLgp.s:246 .text.HW_SPI_Init:0000000000000080 $d
|
|
|
/tmp/cchlfLgp.s:256 .text.HW_SPI_IoDeInit:0000000000000000 $t
|
|
|
/tmp/cchlfLgp.s:263 .text.HW_SPI_IoDeInit:0000000000000000 HW_SPI_IoDeInit
|
|
|
/tmp/cchlfLgp.s:355 .text.HW_SPI_IoDeInit:0000000000000078 $d
|
|
|
/tmp/cchlfLgp.s:360 .text.HW_SPI_DeInit:0000000000000000 $t
|
|
|
/tmp/cchlfLgp.s:367 .text.HW_SPI_DeInit:0000000000000000 HW_SPI_DeInit
|
|
|
/tmp/cchlfLgp.s:403 .text.HW_SPI_DeInit:0000000000000024 $d
|
|
|
/tmp/cchlfLgp.s:410 .text.HW_SPI_InOut:0000000000000000 $t
|
|
|
/tmp/cchlfLgp.s:417 .text.HW_SPI_InOut:0000000000000000 HW_SPI_InOut
|
|
|
/tmp/cchlfLgp.s:456 .text.HW_SPI_InOut:0000000000000024 $d
|
|
|
/tmp/cchlfLgp.s:461 .bss.hspi:0000000000000000 $d
|
|
|
/tmp/cchlfLgp.s:465 .bss.hspi:0000000000000000 hspi
|
|
|
/tmp/cchlfLgp.s:468 .rodata.HW_SPI_Init.str1.4:0000000000000000 $d
|
|
|
.debug_frame:0000000000000010 $d
|
|
|
|
|
|
UNDEFINED SYMBOLS
|
|
|
memset
|
|
|
HW_GPIO_Init
|
|
|
HW_GPIO_Write
|
|
|
HAL_SPI_Init
|
|
|
_Error_Handler
|
|
|
SystemCoreClock
|
|
|
HAL_SPI_DeInit
|
|
|
HAL_SPI_TransmitReceive
|
|
|
|
