Commit Graph

30 Commits (9182c666ea67f56c64c601a538658777436f9651)

Author SHA1 Message Date
Ondřej Hruška e667a2dd3a
fixed some wrongly named enum constants 7 years ago
Ondřej Hruška 590d550a09
pulse generation for digital out 7 years ago
Ondřej Hruška 274f2be6e0
compat with 072hub 7 years ago
Ondřej Hruška ed7a4c80a0
size reduction by using specialized entry funcs 7 years ago
Ondřej Hruška a60b736834
massive utils refactoring, renames, avr libc utils cleaning 7 years ago
Ondřej Hruška dcddca9dd8
Added some protections against creash due to high frequency, but its not ideal ... 7 years ago
Ondřej Hruška 3ebc19fc2d
fixes and start of ADC. Not really working yet 7 years ago
Ondřej Hruška 611b38c5e6
cleaning 7 years ago
Ondřej Hruška f1b8db78d4
split DIN 7 years ago
Ondřej Hruška 4bd8dc6cb0
split some files in units to smaller .c files, comments etc 7 years ago
Ondřej Hruška 04e32860f7
implemented precision timestamps in report messages 7 years ago
Ondřej Hruška 45b4fb45e9
exti working but something is fucked up in the job queue or tinyframe 7 years ago
Ondřej Hruška 255f96c754
Installed new TinyFrame 7 years ago
Ondřej Hruška a44eb5f16a
doc for all units 7 years ago
Ondřej Hruška 4930f14047
made usart rxbuf large again 7 years ago
Ondřej Hruška 5edbf1306f
removed the DMA timeout message 7 years ago
Ondřej Hruška 8272a36aee
Implemented unit timed tick and uart rx timeout 7 years ago
Ondřej Hruška b3d1f95e7d
cleanup and added sync + async commands 7 years ago
Ondřej Hruška 5d12b23ceb
deleted old sync sending code 7 years ago
Ondřej Hruška b5d2930e30
uart tx now pretty reliable, but msg queue sometimes seemingly gets corrupted (checksum mismatch) 7 years ago
Ondřej Hruška 2d53fc29be
removed the alignment crap, left one length field byte and wraparound markers. Works except one mysterious lock-up 7 years ago
Ondřej Hruška 08b4010b13
uhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh 7 years ago
Ondřej Hruška 77f794e94a
some debuggiong. Tx is not reliable and sometimes duplicates or loses bytes 7 years ago
Ondřej Hruška 2881c2ff2a
almost finished DMA reception 7 years ago
Ondřej Hruška e2e4d91cf3
Added func for simple periph clock toggling without the horrible if jungle 7 years ago
Ondřej Hruška ace2bd6357
switch to freeRtos malloc + improve malloc_safe utils, fixed memleak 7 years ago
Ondřej Hruška d49081b190
basic work on uart 7 years ago
Ondřej Hruška 8852f9f8b4
enable all periph clocks by default on startup, added testing synchronous uart write command 7 years ago
Ondřej Hruška 29264540f7
added uart init (untested) and more config option 7 years ago
Ondřej Hruška e88bf84ea1
basic usart skeleton 7 years ago