changed to use USART2

master
Ondřej Hruška 9 years ago
parent 479b56bee7
commit eadd4e353d
  1. 22
      init.c
  2. 16
      main.c

@ -11,8 +11,8 @@ void init_gpios(void)
gpio_enable(GPIOB);
gpio_enable(GPIOC);
gpio_set_mode(GPIOC, BIT8 | BIT9 | BIT7, MODER_OUTPUT);
gpio_set_mode(GPIOA, BIT0, MODER_INPUT);
// LEDs
gpio_set_mode(GPIOC, BIT8 | BIT9, MODER_OUTPUT);
}
@ -38,21 +38,21 @@ void init_clock(void)
void init_usart(void)
{
gpio_set_af(GPIOC, BIT10 | BIT11, AF7);
gpio_set_af(GPIOA, BIT2 | BIT3, AF7);
// USART at C10 (tx), C11 (rx)
RCC_APB1ENR |= RCC_APB1ENR_USART3EN;
// USART at A2 (tx), A3 (rx)
RCC_APB1ENR |= RCC_APB1ENR_USART2EN;
// RATE 9600Bd 104.1875 (see datasheet for reference)
//USART3_BRR = 0x00683; // 9600 @ 16MHz
USART3_BRR = 0x0008A; // 115200 @ 16MHz
//USART2_BRR = 0x00683; // 9600 @ 16MHz
USART2_BRR = 0x0008A; // 115200 @ 16MHz
// USART enable
USART3_CR1 = USART_CR1_UE | USART_CR1_RE | USART_CR1_TE;
USART2_CR1 = USART_CR1_UE | USART_CR1_RE | USART_CR1_TE;
// enable interrupt on data receive
nvic_enable_irq(NVIC_USART3_IRQ);
USART3_CR1 |= USART_CR1_RXNEIE;
nvic_enable_irq(NVIC_USART2_IRQ);
USART2_CR1 |= USART_CR1_RXNEIE;
}
@ -67,6 +67,8 @@ void init_systick(void)
void init_adc(void)
{
gpio_set_mode(GPIOB, BIT12, MODER_ANALOG);
// TODO
}

@ -14,19 +14,21 @@ void say_hello(void)
/** IRQ */
void USART3_IRQHandler(void)
void USART2_IRQHandler(void)
{
if (USART3_SR & USART_SR_ORE) {
USART3_SR &= ~USART_SR_ORE;
return;
// RXIE enables also ORE - must handle ORE.
if (USART2_SR & USART_SR_ORE) {
USART2_SR &= ~USART_SR_ORE;
}
if (USART2_SR & USART_SR_RXNE) {
blue_blink();
char c = usart_rx_char(USART3);
usart_tx_char(USART3, c);
char c = usart_rx_char(USART2);
usart_tx_char(USART2, c);
USART3_SR ^= USART_SR_RXNE;
USART2_SR ^= USART_SR_RXNE;
}
}

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