commit
6338d3d1b4
GPG Key ID:
2C5FD5035250423D
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# Prerequisites |
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*.d |
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*.tmp |
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# Compiled Object files |
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*.slo |
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*.lo |
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*.o |
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*.obj |
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*.rej |
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*.orig |
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# Precompiled Headers |
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*.gch |
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*.pch |
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# Compiled Dynamic libraries |
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*.so |
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*.dylib |
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*.dll |
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# Fortran module files |
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*.mod |
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*.smod |
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# Compiled Static libraries |
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*.lai |
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*.la |
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*.a |
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*.lib |
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|
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# Executables |
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*.exe |
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*.out |
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*.app |
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# Prerequisites |
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# Object files |
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*.ko |
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*.elf |
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# Linker output |
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*.ilk |
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*.map |
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*.exp |
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# Precompiled Headers |
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# Libraries |
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# Shared objects (inc. Windows DLLs) |
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*.so.* |
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# Executables |
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*.i*86 |
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*.x86_64 |
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*.hex |
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# Debug files |
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*.dSYM/ |
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*.su |
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*.idb |
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*.pdb |
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|
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# Kernel Module Compile Results |
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*.mod* |
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*.cmd |
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.tmp_versions/ |
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modules.order |
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Module.symvers |
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Mkfile.old |
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dkms.conf |
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cmake-build-* |
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.idea/ |
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*.lst |
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/mx.scratch |
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*.bin |
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.dep/ |
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*.bak |
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/disassembly.lst |
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build/* |
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@ -0,0 +1,14 @@ |
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[PreviousGenFiles] |
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HeaderPath=/home/ondra/devel/dp/nrf-dongle/Inc |
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HeaderFiles=gpio.h;dma.h;spi.h;usart.h;usb_device.h;usbd_conf.h;usbd_desc.h;usbd_cdc_if.h;stm32f1xx_it.h;stm32_assert.h;stm32f1xx_hal_conf.h;main.h; |
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SourcePath=/home/ondra/devel/dp/nrf-dongle/Src |
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|
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[PreviousUsedMakefileFiles] |
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SourceFiles=Src/main.c;Src/gpio.c;Src/dma.c;Src/spi.c;Src/usart.c;Src/usb_device.c;Src/usbd_conf.c;Src/usbd_desc.c;Src/usbd_cdc_if.c;Src/stm32f1xx_it.c;Src/stm32f1xx_hal_msp.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c;/Src/system_stm32f1xx.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;null;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c; |
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HeaderPath=Drivers/STM32F1xx_HAL_Driver/Inc;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy;Middlewares/ST/STM32_USB_Device_Library/Core/Inc;Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc;Drivers/CMSIS/Device/ST/STM32F1xx/Include;Drivers/CMSIS/Include;Inc; |
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CDefines=USE_FULL_LL_DRIVER; |
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|
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@ -0,0 +1,211 @@ |
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/* ----------------------------------------------------------------------
|
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* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
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* |
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* $Date: 17. January 2013 |
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* $Revision: V1.4.0 |
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* |
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* Project: CMSIS DSP Library |
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* Title: arm_class_marks_example_f32.c |
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* |
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* Description: Example code to calculate Minimum, Maximum |
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* Mean, std and variance of marks obtained in a class |
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* |
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* Target Processor: Cortex-M4/Cortex-M3 |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* - Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* - Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* - Neither the name of ARM LIMITED nor the names of its contributors |
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* may be used to endorse or promote products derived from this |
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* software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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* -------------------------------------------------------------------- */ |
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|
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/**
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* @ingroup groupExamples |
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*/ |
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|
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/**
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* @defgroup ClassMarks Class Marks Example |
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* |
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* \par Description: |
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* \par |
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* Demonstrates the use the Maximum, Minimum, Mean, Standard Deviation, Variance |
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* and Matrix functions to calculate statistical values of marks obtained in a class. |
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* |
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* \note This example also demonstrates the usage of static initialization. |
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* |
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* \par Variables Description: |
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* \par |
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* \li \c testMarks_f32 points to the marks scored by 20 students in 4 subjects |
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* \li \c max_marks Maximum of all marks |
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* \li \c min_marks Minimum of all marks |
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* \li \c mean Mean of all marks |
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* \li \c var Variance of the marks |
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* \li \c std Standard deviation of the marks |
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* \li \c numStudents Total number of students in the class |
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* |
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* \par CMSIS DSP Software Library Functions Used: |
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* \par |
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* - arm_mat_init_f32() |
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* - arm_mat_mult_f32() |
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* - arm_max_f32() |
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* - arm_min_f32() |
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* - arm_mean_f32() |
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* - arm_std_f32() |
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* - arm_var_f32() |
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* |
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* <b> Refer </b> |
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* \link arm_class_marks_example_f32.c \endlink |
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* |
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*/ |
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/** \example arm_class_marks_example_f32.c
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*/ |
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#include "arm_math.h" |
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#define USE_STATIC_INIT |
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/* ----------------------------------------------------------------------
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** Global defines |
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** ------------------------------------------------------------------- */ |
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#define TEST_LENGTH_SAMPLES (20*4) |
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/* ----------------------------------------------------------------------
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** List of Marks scored by 20 students for 4 subjects |
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** ------------------------------------------------------------------- */ |
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const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] = |
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{ |
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42.000000, 37.000000, 81.000000, 28.000000, |
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83.000000, 72.000000, 36.000000, 38.000000, |
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32.000000, 51.000000, 63.000000, 64.000000, |
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97.000000, 82.000000, 95.000000, 90.000000, |
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66.000000, 51.000000, 54.000000, 42.000000, |
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67.000000, 56.000000, 45.000000, 57.000000, |
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67.000000, 69.000000, 35.000000, 52.000000, |
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29.000000, 81.000000, 58.000000, 47.000000, |
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38.000000, 76.000000, 100.000000, 29.000000, |
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33.000000, 47.000000, 29.000000, 50.000000, |
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34.000000, 41.000000, 61.000000, 46.000000, |
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52.000000, 50.000000, 48.000000, 36.000000, |
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47.000000, 55.000000, 44.000000, 40.000000, |
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100.000000, 94.000000, 84.000000, 37.000000, |
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32.000000, 71.000000, 47.000000, 77.000000, |
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31.000000, 50.000000, 49.000000, 35.000000, |
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63.000000, 67.000000, 40.000000, 31.000000, |
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29.000000, 68.000000, 61.000000, 38.000000, |
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31.000000, 28.000000, 28.000000, 76.000000, |
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55.000000, 33.000000, 29.000000, 39.000000 |
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}; |
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|
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|
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/* ----------------------------------------------------------------------
|
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* Number of subjects X 1 |
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* ------------------------------------------------------------------- */ |
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const float32_t testUnity_f32[4] = |
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{ |
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1.000, 1.000, 1.000, 1.000 |
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}; |
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|
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|
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/* ----------------------------------------------------------------------
|
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** f32 Output buffer |
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** ------------------------------------------------------------------- */ |
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static float32_t testOutput[TEST_LENGTH_SAMPLES]; |
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|
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|
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/* ------------------------------------------------------------------
|
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* Global defines |
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*------------------------------------------------------------------- */ |
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#define NUMSTUDENTS 20 |
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#define NUMSUBJECTS 4 |
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|
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/* ------------------------------------------------------------------
|
||||
* Global variables |
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*------------------------------------------------------------------- */ |
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|
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uint32_t numStudents = 20; |
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uint32_t numSubjects = 4; |
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float32_t max_marks, min_marks, mean, std, var; |
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uint32_t student_num; |
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|
||||
/* ----------------------------------------------------------------------------------
|
||||
* Main f32 test function. It returns maximum marks secured and student number |
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* ------------------------------------------------------------------------------- */ |
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|
||||
int32_t main() |
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{ |
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|
||||
#ifndef USE_STATIC_INIT |
||||
|
||||
arm_matrix_instance_f32 srcA; |
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arm_matrix_instance_f32 srcB; |
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arm_matrix_instance_f32 dstC; |
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|
||||
/* Input and output matrices initializations */ |
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arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32); |
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arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32); |
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arm_mat_init_f32(&dstC, numStudents, 1, testOutput); |
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|
||||
#else |
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|
||||
/* Static Initializations of Input and output matrix sizes and array */ |
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arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32}; |
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arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32}; |
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arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput}; |
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|
||||
#endif |
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|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
*Call the Matrix multiplication process function |
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* ------------------------------------------------------------------- */ |
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arm_mat_mult_f32(&srcA, &srcB, &dstC); |
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|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the Max function to calculate max marks among numStudents |
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** ------------------------------------------------------------------- */ |
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arm_max_f32(testOutput, numStudents, &max_marks, &student_num); |
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|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the Min function to calculate min marks among numStudents |
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** ------------------------------------------------------------------- */ |
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arm_min_f32(testOutput, numStudents, &min_marks, &student_num); |
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|
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/* ----------------------------------------------------------------------
|
||||
** Call the Mean function to calculate mean |
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** ------------------------------------------------------------------- */ |
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arm_mean_f32(testOutput, numStudents, &mean); |
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|
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/* ----------------------------------------------------------------------
|
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** Call the std function to calculate standard deviation |
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** ------------------------------------------------------------------- */ |
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arm_std_f32(testOutput, numStudents, &std); |
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|
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/* ----------------------------------------------------------------------
|
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** Call the var function to calculate variance |
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** ------------------------------------------------------------------- */ |
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arm_var_f32(testOutput, numStudents, &var); |
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|
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while(1); /* main function does not return */ |
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} |
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@ -0,0 +1,211 @@ |
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/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_class_marks_example_f32.c |
||||
* |
||||
* Description: Example code to calculate Minimum, Maximum |
||||
* Mean, std and variance of marks obtained in a class |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup ClassMarks Class Marks Example |
||||
* |
||||
* \par Description: |
||||
* \par |
||||
* Demonstrates the use the Maximum, Minimum, Mean, Standard Deviation, Variance |
||||
* and Matrix functions to calculate statistical values of marks obtained in a class. |
||||
* |
||||
* \note This example also demonstrates the usage of static initialization. |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c testMarks_f32 points to the marks scored by 20 students in 4 subjects |
||||
* \li \c max_marks Maximum of all marks |
||||
* \li \c min_marks Minimum of all marks |
||||
* \li \c mean Mean of all marks |
||||
* \li \c var Variance of the marks |
||||
* \li \c std Standard deviation of the marks |
||||
* \li \c numStudents Total number of students in the class |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_mat_init_f32() |
||||
* - arm_mat_mult_f32() |
||||
* - arm_max_f32() |
||||
* - arm_min_f32() |
||||
* - arm_mean_f32() |
||||
* - arm_std_f32() |
||||
* - arm_var_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_class_marks_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_class_marks_example_f32.c
|
||||
*/ |
||||
#include "arm_math.h" |
||||
|
||||
#define USE_STATIC_INIT |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Global defines |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
#define TEST_LENGTH_SAMPLES (20*4) |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** List of Marks scored by 20 students for 4 subjects |
||||
** ------------------------------------------------------------------- */ |
||||
const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] = |
||||
{ |
||||
42.000000, 37.000000, 81.000000, 28.000000, |
||||
83.000000, 72.000000, 36.000000, 38.000000, |
||||
32.000000, 51.000000, 63.000000, 64.000000, |
||||
97.000000, 82.000000, 95.000000, 90.000000, |
||||
66.000000, 51.000000, 54.000000, 42.000000, |
||||
67.000000, 56.000000, 45.000000, 57.000000, |
||||
67.000000, 69.000000, 35.000000, 52.000000, |
||||
29.000000, 81.000000, 58.000000, 47.000000, |
||||
38.000000, 76.000000, 100.000000, 29.000000, |
||||
33.000000, 47.000000, 29.000000, 50.000000, |
||||
34.000000, 41.000000, 61.000000, 46.000000, |
||||
52.000000, 50.000000, 48.000000, 36.000000, |
||||
47.000000, 55.000000, 44.000000, 40.000000, |
||||
100.000000, 94.000000, 84.000000, 37.000000, |
||||
32.000000, 71.000000, 47.000000, 77.000000, |
||||
31.000000, 50.000000, 49.000000, 35.000000, |
||||
63.000000, 67.000000, 40.000000, 31.000000, |
||||
29.000000, 68.000000, 61.000000, 38.000000, |
||||
31.000000, 28.000000, 28.000000, 76.000000, |
||||
55.000000, 33.000000, 29.000000, 39.000000 |
||||
}; |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Number of subjects X 1 |
||||
* ------------------------------------------------------------------- */ |
||||
const float32_t testUnity_f32[4] = |
||||
{ |
||||
1.000, 1.000, 1.000, 1.000 |
||||
}; |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** f32 Output buffer |
||||
** ------------------------------------------------------------------- */ |
||||
static float32_t testOutput[TEST_LENGTH_SAMPLES]; |
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Global defines |
||||
*------------------------------------------------------------------- */ |
||||
#define NUMSTUDENTS 20 |
||||
#define NUMSUBJECTS 4 |
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Global variables |
||||
*------------------------------------------------------------------- */ |
||||
|
||||
uint32_t numStudents = 20; |
||||
uint32_t numSubjects = 4; |
||||
float32_t max_marks, min_marks, mean, std, var; |
||||
uint32_t student_num; |
||||
|
||||
/* ----------------------------------------------------------------------------------
|
||||
* Main f32 test function. It returns maximum marks secured and student number |
||||
* ------------------------------------------------------------------------------- */ |
||||
|
||||
int32_t main() |
||||
{ |
||||
|
||||
#ifndef USE_STATIC_INIT |
||||
|
||||
arm_matrix_instance_f32 srcA; |
||||
arm_matrix_instance_f32 srcB; |
||||
arm_matrix_instance_f32 dstC; |
||||
|
||||
/* Input and output matrices initializations */ |
||||
arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32); |
||||
arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32); |
||||
arm_mat_init_f32(&dstC, numStudents, 1, testOutput); |
||||
|
||||
#else |
||||
|
||||
/* Static Initializations of Input and output matrix sizes and array */ |
||||
arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32}; |
||||
arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32}; |
||||
arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput}; |
||||
|
||||
#endif |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
*Call the Matrix multiplication process function |
||||
* ------------------------------------------------------------------- */ |
||||
arm_mat_mult_f32(&srcA, &srcB, &dstC); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the Max function to calculate max marks among numStudents |
||||
** ------------------------------------------------------------------- */ |
||||
arm_max_f32(testOutput, numStudents, &max_marks, &student_num); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the Min function to calculate min marks among numStudents |
||||
** ------------------------------------------------------------------- */ |
||||
arm_min_f32(testOutput, numStudents, &min_marks, &student_num); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the Mean function to calculate mean |
||||
** ------------------------------------------------------------------- */ |
||||
arm_mean_f32(testOutput, numStudents, &mean); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the std function to calculate standard deviation |
||||
** ------------------------------------------------------------------- */ |
||||
arm_std_f32(testOutput, numStudents, &std); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the var function to calculate variance |
||||
** ------------------------------------------------------------------- */ |
||||
arm_var_f32(testOutput, numStudents, &var); |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
@ -0,0 +1,247 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_convolution_example_f32.c |
||||
* |
||||
* Description: Example code demonstrating Convolution of two input signals using fft. |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup ConvolutionExample Convolution Example |
||||
* |
||||
* \par Description: |
||||
* \par |
||||
* Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex |
||||
* Multiplication, and Support Functions. |
||||
* |
||||
* \par Algorithm: |
||||
* \par |
||||
* The convolution theorem states that convolution in the time domain corresponds to |
||||
* multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of |
||||
* two signals is equal to the product of their individual Fourier transforms. |
||||
* The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT). |
||||
* \par |
||||
* Two input signals, <code>a[n]</code> and <code>b[n]</code>, with lengths \c n1 and \c n2 respectively, |
||||
* are zero padded so that their lengths become \c N, which is greater than or equal to <code>(n1+n2-1)</code> |
||||
* and is a power of 4 as FFT implementation is radix-4. |
||||
* The convolution of <code>a[n]</code> and <code>b[n]</code> is obtained by taking the FFT of the input |
||||
* signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of |
||||
* the multiplied result. |
||||
* \par |
||||
* This is denoted by the following equations: |
||||
* <pre> A[k] = FFT(a[n],N) |
||||
* B[k] = FFT(b[n],N) |
||||
* conv(a[n], b[n]) = IFFT(A[k] * B[k], N)</pre> |
||||
* where <code>A[k]</code> and <code>B[k]</code> are the N-point FFTs of the signals <code>a[n]</code> |
||||
* and <code>b[n]</code> respectively. |
||||
* The length of the convolved signal is <code>(n1+n2-1)</code>. |
||||
* |
||||
* \par Block Diagram: |
||||
* \par |
||||
* \image html Convolution.gif |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c testInputA_f32 points to the first input sequence |
||||
* \li \c srcALen length of the first input sequence |
||||
* \li \c testInputB_f32 points to the second input sequence |
||||
* \li \c srcBLen length of the second input sequence |
||||
* \li \c outLen length of convolution output sequence, <code>(srcALen + srcBLen - 1)</code> |
||||
* \li \c AxB points to the output array where the product of individual FFTs of inputs is stored. |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_fill_f32() |
||||
* - arm_copy_f32() |
||||
* - arm_cfft_radix4_init_f32() |
||||
* - arm_cfft_radix4_f32() |
||||
* - arm_cmplx_mult_cmplx_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_convolution_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_convolution_example_f32.c
|
||||
*/ |
||||
|
||||
#include "arm_math.h" |
||||
#include "math_helper.h" |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Defines each of the tests performed |
||||
* ------------------------------------------------------------------- */ |
||||
#define MAX_BLOCKSIZE 128 |
||||
#define DELTA (0.000001f) |
||||
#define SNR_THRESHOLD 90 |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare I/O buffers |
||||
* ------------------------------------------------------------------- */ |
||||
float32_t Ak[MAX_BLOCKSIZE]; /* Input A */ |
||||
float32_t Bk[MAX_BLOCKSIZE]; /* Input B */ |
||||
float32_t AxB[MAX_BLOCKSIZE * 2]; /* Output */ |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Test input data for Floating point Convolution example for 32-blockSize |
||||
* Generated by the MATLAB randn() function |
||||
* ------------------------------------------------------------------- */ |
||||
float32_t testInputA_f32[64] = |
||||
{ |
||||
-0.808920, 1.357369, 1.180861, -0.504544, 1.762637, -0.703285, |
||||
1.696966, 0.620571, -0.151093, -0.100235, -0.872382, -0.403579, |
||||
-0.860749, -0.382648, -1.052338, 0.128113, -0.646269, 1.093377, |
||||
-2.209198, 0.471706, 0.408901, 1.266242, 0.598252, 1.176827, |
||||
-0.203421, 0.213596, -0.851964, -0.466958, 0.021841, -0.698938, |
||||
-0.604107, 0.461778, -0.318219, 0.942520, 0.577585, 0.417619, |
||||
0.614665, 0.563679, -1.295073, -0.764437, 0.952194, -0.859222, |
||||
-0.618554, -2.268542, -1.210592, 1.655853, -2.627219, -0.994249, |
||||
-1.374704, 0.343799, 0.025619, 1.227481, -0.708031, 0.069355, |
||||
-1.845228, -1.570886, 1.010668, -1.802084, 1.630088, 1.286090, |
||||
-0.161050, -0.940794, 0.367961, 0.291907 |
||||
|
||||
}; |
||||
|
||||
float32_t testInputB_f32[64] = |
||||
{ |
||||
0.933724, 0.046881, 1.316470, 0.438345, 0.332682, 2.094885, |
||||
0.512081, 0.035546, 0.050894, -2.320371, 0.168711, -1.830493, |
||||
-0.444834, -1.003242, -0.531494, -1.365600, -0.155420, -0.757692, |
||||
-0.431880, -0.380021, 0.096243, -0.695835, 0.558850, -1.648962, |
||||
0.020369, -0.363630, 0.887146, 0.845503, -0.252864, -0.330397, |
||||
1.269131, -1.109295, -1.027876, 0.135940, 0.116721, -0.293399, |
||||
-1.349799, 0.166078, -0.802201, 0.369367, -0.964568, -2.266011, |
||||
0.465178, 0.651222, -0.325426, 0.320245, -0.784178, -0.579456, |
||||
0.093374, 0.604778, -0.048225, 0.376297, -0.394412, 0.578182, |
||||
-1.218141, -1.387326, 0.692462, -0.631297, 0.153137, -0.638952, |
||||
0.635474, -0.970468, 1.334057, -0.111370 |
||||
}; |
||||
|
||||
const float testRefOutput_f32[127] = |
||||
{ |
||||
-0.818943, 1.229484, -0.533664, 1.016604, 0.341875, -1.963656, |
||||
5.171476, 3.478033, 7.616361, 6.648384, 0.479069, 1.792012, |
||||
-1.295591, -7.447818, 0.315830, -10.657445, -2.483469, -6.524236, |
||||
-7.380591, -3.739005, -8.388957, 0.184147, -1.554888, 3.786508, |
||||
-1.684421, 5.400610, -1.578126, 7.403361, 8.315999, 2.080267, |
||||
11.077776, 2.749673, 7.138962, 2.748762, 0.660363, 0.981552, |
||||
1.442275, 0.552721, -2.576892, 4.703989, 0.989156, 8.759344, |
||||
-0.564825, -3.994680, 0.954710, -5.014144, 6.592329, 1.599488, |
||||
-13.979146, -0.391891, -4.453369, -2.311242, -2.948764, 1.761415, |
||||
-0.138322, 10.433007, -2.309103, 4.297153, 8.535523, 3.209462, |
||||
8.695819, 5.569919, 2.514304, 5.582029, 2.060199, 0.642280, |
||||
7.024616, 1.686615, -6.481756, 1.343084, -3.526451, 1.099073, |
||||
-2.965764, -0.173723, -4.111484, 6.528384, -6.965658, 1.726291, |
||||
1.535172, 11.023435, 2.338401, -4.690188, 1.298210, 3.943885, |
||||
8.407885, 5.168365, 0.684131, 1.559181, 1.859998, 2.852417, |
||||
8.574070, -6.369078, 6.023458, 11.837963, -6.027632, 4.469678, |
||||
-6.799093, -2.674048, 6.250367, -6.809971, -3.459360, 9.112410, |
||||
-2.711621, -1.336678, 1.564249, -1.564297, -1.296760, 8.904013, |
||||
-3.230109, 6.878013, -7.819823, 3.369909, -1.657410, -2.007358, |
||||
-4.112825, 1.370685, -3.420525, -6.276605, 3.244873, -3.352638, |
||||
1.545372, 0.902211, 0.197489, -1.408732, 0.523390, 0.348440, 0 |
||||
}; |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare Global variables |
||||
* ------------------------------------------------------------------- */ |
||||
uint32_t srcALen = 64; /* Length of Input A */ |
||||
uint32_t srcBLen = 64; /* Length of Input B */ |
||||
uint32_t outLen; /* Length of convolution output */ |
||||
float32_t snr; /* output SNR */ |
||||
|
||||
int32_t main(void) |
||||
{ |
||||
arm_status status; /* Status of the example */ |
||||
arm_cfft_radix4_instance_f32 cfft_instance; /* CFFT Structure instance */ |
||||
|
||||
/* CFFT Structure instance pointer */ |
||||
arm_cfft_radix4_instance_f32 *cfft_instance_ptr = |
||||
(arm_cfft_radix4_instance_f32*) &cfft_instance; |
||||
|
||||
/* output length of convolution */ |
||||
outLen = srcALen + srcBLen - 1; |
||||
|
||||
/* Initialise the fft input buffers with all zeros */ |
||||
arm_fill_f32(0.0, Ak, MAX_BLOCKSIZE); |
||||
arm_fill_f32(0.0, Bk, MAX_BLOCKSIZE); |
||||
|
||||
/* Copy the input values to the fft input buffers */ |
||||
arm_copy_f32(testInputA_f32, Ak, MAX_BLOCKSIZE/2); |
||||
arm_copy_f32(testInputB_f32, Bk, MAX_BLOCKSIZE/2); |
||||
|
||||
/* Initialize the CFFT function to compute 64 point fft */ |
||||
status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1); |
||||
|
||||
/* Transform input a[n] from time domain to frequency domain A[k] */ |
||||
arm_cfft_radix4_f32(cfft_instance_ptr, Ak); |
||||
/* Transform input b[n] from time domain to frequency domain B[k] */ |
||||
arm_cfft_radix4_f32(cfft_instance_ptr, Bk); |
||||
|
||||
/* Complex Multiplication of the two input buffers in frequency domain */ |
||||
arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2); |
||||
|
||||
/* Initialize the CIFFT function to compute 64 point ifft */ |
||||
status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1); |
||||
|
||||
/* Transform the multiplication output from frequency domain to time domain,
|
||||
that gives the convolved output */ |
||||
arm_cfft_radix4_f32(cfft_instance_ptr, AxB); |
||||
|
||||
/* SNR Calculation */ |
||||
snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1); |
||||
|
||||
/* Compare the SNR with threshold to test whether the
|
||||
computed output is matched with the reference output values. */ |
||||
if( snr > SNR_THRESHOLD) |
||||
{ |
||||
status = ARM_MATH_SUCCESS; |
||||
} |
||||
|
||||
if( status != ARM_MATH_SUCCESS) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
@ -0,0 +1,458 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.c |
||||
* |
||||
* Description: Definition of all helper functions required.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include standard header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include<math.h> |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include project header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include "math_helper.h" |
||||
|
||||
/**
|
||||
* @brief Caluclation of SNR |
||||
* @param float* Pointer to the reference buffer |
||||
* @param float* Pointer to the test buffer |
||||
* @param uint32_t total number of samples |
||||
* @return float SNR |
||||
* The function Caluclates signal to noise ratio for the reference output
|
||||
* and test output
|
||||
*/ |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) |
||||
{ |
||||
float EnergySignal = 0.0, EnergyError = 0.0; |
||||
uint32_t i; |
||||
float SNR; |
||||
int temp; |
||||
int *test; |
||||
|
||||
for (i = 0; i < buffSize; i++) |
||||
{ |
||||
/* Checking for a NAN value in pRef array */ |
||||
test = (int *)(&pRef[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
/* Checking for a NAN value in pTest array */ |
||||
test = (int *)(&pTest[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
EnergySignal += pRef[i] * pRef[i]; |
||||
EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
|
||||
} |
||||
|
||||
/* Checking for a NAN value in EnergyError */ |
||||
test = (int *)(&EnergyError); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
|
||||
SNR = 10 * log10 (EnergySignal / EnergyError); |
||||
|
||||
return (SNR); |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q15_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed in q12.20 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point(q12.20) values
|
||||
*/ |
||||
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1048576.0f corresponds to pow(2, 20) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1048576.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 1.0) |
||||
{ |
||||
pOut[i] = 0x000FFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q15_t* Pointer to Ref buffer |
||||
* @param q15_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
}
|
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q31_t* Pointer to Ref buffer |
||||
* @param q31_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
} |
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q31 (q31_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q7 (q7_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Caluclates number of guard bits
|
||||
* @param uint32_t number of additions |
||||
* @return none |
||||
* The function Caluclates the number of guard bits
|
||||
* depending on the numtaps
|
||||
*/ |
||||
|
||||
uint32_t arm_calc_guard_bits (uint32_t num_adds) |
||||
{ |
||||
uint32_t i = 1, j = 0; |
||||
|
||||
if (num_adds == 1) |
||||
{ |
||||
return (0); |
||||
} |
||||
|
||||
while (i < num_adds) |
||||
{ |
||||
i = i * 2; |
||||
j++; |
||||
} |
||||
|
||||
return (j); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts Q15 to floating-point |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
*/ |
||||
|
||||
void arm_apply_guard_bits (float32_t * pIn,
|
||||
uint32_t numSamples,
|
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Calculates pow(2, numShifts) |
||||
* @param uint32_t number of shifts |
||||
* @return pow(2, numShifts) |
||||
*/ |
||||
uint32_t arm_calc_2pow(uint32_t numShifts) |
||||
{ |
||||
|
||||
uint32_t i, val = 1; |
||||
|
||||
for (i = 0; i < numShifts; i++) |
||||
{ |
||||
val = val * 2; |
||||
}
|
||||
|
||||
return(val); |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q14
|
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q14 (float *pIn, q15_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 16384.0f corresponds to pow(2, 14) */ |
||||
pOut[i] = (q15_t) (pIn[i] * 16384.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFF; |
||||
} |
||||
|
||||
} |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q30 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q29 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 536870912.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 4.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q28 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q28 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 268435456.0f corresponds to pow(2, 28) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 268435456.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 8.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clip the float values to +/- 1
|
||||
* @param pIn input buffer |
||||
* @param numSamples number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_clip_f32 (float *pIn, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
if(pIn[i] > 1.0f) |
||||
{ |
||||
pIn[i] = 1.0; |
||||
} |
||||
else if( pIn[i] < -1.0f) |
||||
{ |
||||
pIn[i] = -1.0; |
||||
} |
||||
|
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
|
||||
@ -0,0 +1,63 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.h |
||||
*
|
||||
* Description: Prototypes of all helper functions required.
|
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
|
||||
#include "arm_math.h" |
||||
|
||||
#ifndef MATH_HELPER_H |
||||
#define MATH_HELPER_H |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); |
||||
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_clip_f32(float *pIn, uint32_t numSamples); |
||||
uint32_t arm_calc_guard_bits(uint32_t num_adds); |
||||
void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); |
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); |
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); |
||||
uint32_t arm_calc_2pow(uint32_t guard_bits); |
||||
#endif |
||||
|
||||
@ -0,0 +1,247 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_convolution_example_f32.c |
||||
* |
||||
* Description: Example code demonstrating Convolution of two input signals using fft. |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup ConvolutionExample Convolution Example |
||||
* |
||||
* \par Description: |
||||
* \par |
||||
* Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex |
||||
* Multiplication, and Support Functions. |
||||
* |
||||
* \par Algorithm: |
||||
* \par |
||||
* The convolution theorem states that convolution in the time domain corresponds to |
||||
* multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of |
||||
* two signals is equal to the product of their individual Fourier transforms. |
||||
* The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT). |
||||
* \par |
||||
* Two input signals, <code>a[n]</code> and <code>b[n]</code>, with lengths \c n1 and \c n2 respectively, |
||||
* are zero padded so that their lengths become \c N, which is greater than or equal to <code>(n1+n2-1)</code> |
||||
* and is a power of 4 as FFT implementation is radix-4. |
||||
* The convolution of <code>a[n]</code> and <code>b[n]</code> is obtained by taking the FFT of the input |
||||
* signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of |
||||
* the multiplied result. |
||||
* \par |
||||
* This is denoted by the following equations: |
||||
* <pre> A[k] = FFT(a[n],N) |
||||
* B[k] = FFT(b[n],N) |
||||
* conv(a[n], b[n]) = IFFT(A[k] * B[k], N)</pre> |
||||
* where <code>A[k]</code> and <code>B[k]</code> are the N-point FFTs of the signals <code>a[n]</code> |
||||
* and <code>b[n]</code> respectively. |
||||
* The length of the convolved signal is <code>(n1+n2-1)</code>. |
||||
* |
||||
* \par Block Diagram: |
||||
* \par |
||||
* \image html Convolution.gif |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c testInputA_f32 points to the first input sequence |
||||
* \li \c srcALen length of the first input sequence |
||||
* \li \c testInputB_f32 points to the second input sequence |
||||
* \li \c srcBLen length of the second input sequence |
||||
* \li \c outLen length of convolution output sequence, <code>(srcALen + srcBLen - 1)</code> |
||||
* \li \c AxB points to the output array where the product of individual FFTs of inputs is stored. |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_fill_f32() |
||||
* - arm_copy_f32() |
||||
* - arm_cfft_radix4_init_f32() |
||||
* - arm_cfft_radix4_f32() |
||||
* - arm_cmplx_mult_cmplx_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_convolution_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_convolution_example_f32.c
|
||||
*/ |
||||
|
||||
#include "arm_math.h" |
||||
#include "math_helper.h" |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Defines each of the tests performed |
||||
* ------------------------------------------------------------------- */ |
||||
#define MAX_BLOCKSIZE 128 |
||||
#define DELTA (0.000001f) |
||||
#define SNR_THRESHOLD 90 |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare I/O buffers |
||||
* ------------------------------------------------------------------- */ |
||||
float32_t Ak[MAX_BLOCKSIZE]; /* Input A */ |
||||
float32_t Bk[MAX_BLOCKSIZE]; /* Input B */ |
||||
float32_t AxB[MAX_BLOCKSIZE * 2]; /* Output */ |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Test input data for Floating point Convolution example for 32-blockSize |
||||
* Generated by the MATLAB randn() function |
||||
* ------------------------------------------------------------------- */ |
||||
float32_t testInputA_f32[64] = |
||||
{ |
||||
-0.808920, 1.357369, 1.180861, -0.504544, 1.762637, -0.703285, |
||||
1.696966, 0.620571, -0.151093, -0.100235, -0.872382, -0.403579, |
||||
-0.860749, -0.382648, -1.052338, 0.128113, -0.646269, 1.093377, |
||||
-2.209198, 0.471706, 0.408901, 1.266242, 0.598252, 1.176827, |
||||
-0.203421, 0.213596, -0.851964, -0.466958, 0.021841, -0.698938, |
||||
-0.604107, 0.461778, -0.318219, 0.942520, 0.577585, 0.417619, |
||||
0.614665, 0.563679, -1.295073, -0.764437, 0.952194, -0.859222, |
||||
-0.618554, -2.268542, -1.210592, 1.655853, -2.627219, -0.994249, |
||||
-1.374704, 0.343799, 0.025619, 1.227481, -0.708031, 0.069355, |
||||
-1.845228, -1.570886, 1.010668, -1.802084, 1.630088, 1.286090, |
||||
-0.161050, -0.940794, 0.367961, 0.291907 |
||||
|
||||
}; |
||||
|
||||
float32_t testInputB_f32[64] = |
||||
{ |
||||
0.933724, 0.046881, 1.316470, 0.438345, 0.332682, 2.094885, |
||||
0.512081, 0.035546, 0.050894, -2.320371, 0.168711, -1.830493, |
||||
-0.444834, -1.003242, -0.531494, -1.365600, -0.155420, -0.757692, |
||||
-0.431880, -0.380021, 0.096243, -0.695835, 0.558850, -1.648962, |
||||
0.020369, -0.363630, 0.887146, 0.845503, -0.252864, -0.330397, |
||||
1.269131, -1.109295, -1.027876, 0.135940, 0.116721, -0.293399, |
||||
-1.349799, 0.166078, -0.802201, 0.369367, -0.964568, -2.266011, |
||||
0.465178, 0.651222, -0.325426, 0.320245, -0.784178, -0.579456, |
||||
0.093374, 0.604778, -0.048225, 0.376297, -0.394412, 0.578182, |
||||
-1.218141, -1.387326, 0.692462, -0.631297, 0.153137, -0.638952, |
||||
0.635474, -0.970468, 1.334057, -0.111370 |
||||
}; |
||||
|
||||
const float testRefOutput_f32[127] = |
||||
{ |
||||
-0.818943, 1.229484, -0.533664, 1.016604, 0.341875, -1.963656, |
||||
5.171476, 3.478033, 7.616361, 6.648384, 0.479069, 1.792012, |
||||
-1.295591, -7.447818, 0.315830, -10.657445, -2.483469, -6.524236, |
||||
-7.380591, -3.739005, -8.388957, 0.184147, -1.554888, 3.786508, |
||||
-1.684421, 5.400610, -1.578126, 7.403361, 8.315999, 2.080267, |
||||
11.077776, 2.749673, 7.138962, 2.748762, 0.660363, 0.981552, |
||||
1.442275, 0.552721, -2.576892, 4.703989, 0.989156, 8.759344, |
||||
-0.564825, -3.994680, 0.954710, -5.014144, 6.592329, 1.599488, |
||||
-13.979146, -0.391891, -4.453369, -2.311242, -2.948764, 1.761415, |
||||
-0.138322, 10.433007, -2.309103, 4.297153, 8.535523, 3.209462, |
||||
8.695819, 5.569919, 2.514304, 5.582029, 2.060199, 0.642280, |
||||
7.024616, 1.686615, -6.481756, 1.343084, -3.526451, 1.099073, |
||||
-2.965764, -0.173723, -4.111484, 6.528384, -6.965658, 1.726291, |
||||
1.535172, 11.023435, 2.338401, -4.690188, 1.298210, 3.943885, |
||||
8.407885, 5.168365, 0.684131, 1.559181, 1.859998, 2.852417, |
||||
8.574070, -6.369078, 6.023458, 11.837963, -6.027632, 4.469678, |
||||
-6.799093, -2.674048, 6.250367, -6.809971, -3.459360, 9.112410, |
||||
-2.711621, -1.336678, 1.564249, -1.564297, -1.296760, 8.904013, |
||||
-3.230109, 6.878013, -7.819823, 3.369909, -1.657410, -2.007358, |
||||
-4.112825, 1.370685, -3.420525, -6.276605, 3.244873, -3.352638, |
||||
1.545372, 0.902211, 0.197489, -1.408732, 0.523390, 0.348440, 0 |
||||
}; |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare Global variables |
||||
* ------------------------------------------------------------------- */ |
||||
uint32_t srcALen = 64; /* Length of Input A */ |
||||
uint32_t srcBLen = 64; /* Length of Input B */ |
||||
uint32_t outLen; /* Length of convolution output */ |
||||
float32_t snr; /* output SNR */ |
||||
|
||||
int32_t main(void) |
||||
{ |
||||
arm_status status; /* Status of the example */ |
||||
arm_cfft_radix4_instance_f32 cfft_instance; /* CFFT Structure instance */ |
||||
|
||||
/* CFFT Structure instance pointer */ |
||||
arm_cfft_radix4_instance_f32 *cfft_instance_ptr = |
||||
(arm_cfft_radix4_instance_f32*) &cfft_instance; |
||||
|
||||
/* output length of convolution */ |
||||
outLen = srcALen + srcBLen - 1; |
||||
|
||||
/* Initialise the fft input buffers with all zeros */ |
||||
arm_fill_f32(0.0, Ak, MAX_BLOCKSIZE); |
||||
arm_fill_f32(0.0, Bk, MAX_BLOCKSIZE); |
||||
|
||||
/* Copy the input values to the fft input buffers */ |
||||
arm_copy_f32(testInputA_f32, Ak, MAX_BLOCKSIZE/2); |
||||
arm_copy_f32(testInputB_f32, Bk, MAX_BLOCKSIZE/2); |
||||
|
||||
/* Initialize the CFFT function to compute 64 point fft */ |
||||
status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1); |
||||
|
||||
/* Transform input a[n] from time domain to frequency domain A[k] */ |
||||
arm_cfft_radix4_f32(cfft_instance_ptr, Ak); |
||||
/* Transform input b[n] from time domain to frequency domain B[k] */ |
||||
arm_cfft_radix4_f32(cfft_instance_ptr, Bk); |
||||
|
||||
/* Complex Multiplication of the two input buffers in frequency domain */ |
||||
arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2); |
||||
|
||||
/* Initialize the CIFFT function to compute 64 point ifft */ |
||||
status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1); |
||||
|
||||
/* Transform the multiplication output from frequency domain to time domain,
|
||||
that gives the convolved output */ |
||||
arm_cfft_radix4_f32(cfft_instance_ptr, AxB); |
||||
|
||||
/* SNR Calculation */ |
||||
snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1); |
||||
|
||||
/* Compare the SNR with threshold to test whether the
|
||||
computed output is matched with the reference output values. */ |
||||
if( snr > SNR_THRESHOLD) |
||||
{ |
||||
status = ARM_MATH_SUCCESS; |
||||
} |
||||
|
||||
if( status != ARM_MATH_SUCCESS) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
@ -0,0 +1,458 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.c |
||||
* |
||||
* Description: Definition of all helper functions required.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include standard header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include<math.h> |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include project header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include "math_helper.h" |
||||
|
||||
/**
|
||||
* @brief Caluclation of SNR |
||||
* @param float* Pointer to the reference buffer |
||||
* @param float* Pointer to the test buffer |
||||
* @param uint32_t total number of samples |
||||
* @return float SNR |
||||
* The function Caluclates signal to noise ratio for the reference output
|
||||
* and test output
|
||||
*/ |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) |
||||
{ |
||||
float EnergySignal = 0.0, EnergyError = 0.0; |
||||
uint32_t i; |
||||
float SNR; |
||||
int temp; |
||||
int *test; |
||||
|
||||
for (i = 0; i < buffSize; i++) |
||||
{ |
||||
/* Checking for a NAN value in pRef array */ |
||||
test = (int *)(&pRef[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
/* Checking for a NAN value in pTest array */ |
||||
test = (int *)(&pTest[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
EnergySignal += pRef[i] * pRef[i]; |
||||
EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
|
||||
} |
||||
|
||||
/* Checking for a NAN value in EnergyError */ |
||||
test = (int *)(&EnergyError); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
|
||||
SNR = 10 * log10 (EnergySignal / EnergyError); |
||||
|
||||
return (SNR); |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q15_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed in q12.20 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point(q12.20) values
|
||||
*/ |
||||
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1048576.0f corresponds to pow(2, 20) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1048576.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 1.0) |
||||
{ |
||||
pOut[i] = 0x000FFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q15_t* Pointer to Ref buffer |
||||
* @param q15_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
}
|
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q31_t* Pointer to Ref buffer |
||||
* @param q31_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
} |
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q31 (q31_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q7 (q7_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Caluclates number of guard bits
|
||||
* @param uint32_t number of additions |
||||
* @return none |
||||
* The function Caluclates the number of guard bits
|
||||
* depending on the numtaps
|
||||
*/ |
||||
|
||||
uint32_t arm_calc_guard_bits (uint32_t num_adds) |
||||
{ |
||||
uint32_t i = 1, j = 0; |
||||
|
||||
if (num_adds == 1) |
||||
{ |
||||
return (0); |
||||
} |
||||
|
||||
while (i < num_adds) |
||||
{ |
||||
i = i * 2; |
||||
j++; |
||||
} |
||||
|
||||
return (j); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts Q15 to floating-point |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
*/ |
||||
|
||||
void arm_apply_guard_bits (float32_t * pIn,
|
||||
uint32_t numSamples,
|
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Calculates pow(2, numShifts) |
||||
* @param uint32_t number of shifts |
||||
* @return pow(2, numShifts) |
||||
*/ |
||||
uint32_t arm_calc_2pow(uint32_t numShifts) |
||||
{ |
||||
|
||||
uint32_t i, val = 1; |
||||
|
||||
for (i = 0; i < numShifts; i++) |
||||
{ |
||||
val = val * 2; |
||||
}
|
||||
|
||||
return(val); |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q14
|
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q14 (float *pIn, q15_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 16384.0f corresponds to pow(2, 14) */ |
||||
pOut[i] = (q15_t) (pIn[i] * 16384.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFF; |
||||
} |
||||
|
||||
} |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q30 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q29 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 536870912.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 4.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q28 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q28 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 268435456.0f corresponds to pow(2, 28) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 268435456.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 8.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clip the float values to +/- 1
|
||||
* @param pIn input buffer |
||||
* @param numSamples number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_clip_f32 (float *pIn, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
if(pIn[i] > 1.0f) |
||||
{ |
||||
pIn[i] = 1.0; |
||||
} |
||||
else if( pIn[i] < -1.0f) |
||||
{ |
||||
pIn[i] = -1.0; |
||||
} |
||||
|
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
|
||||
@ -0,0 +1,63 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.h |
||||
*
|
||||
* Description: Prototypes of all helper functions required.
|
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
|
||||
#include "arm_math.h" |
||||
|
||||
#ifndef MATH_HELPER_H |
||||
#define MATH_HELPER_H |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); |
||||
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_clip_f32(float *pIn, uint32_t numSamples); |
||||
uint32_t arm_calc_guard_bits(uint32_t num_adds); |
||||
void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); |
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); |
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); |
||||
uint32_t arm_calc_2pow(uint32_t guard_bits); |
||||
#endif |
||||
|
||||
@ -0,0 +1,178 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_dotproduct_example_f32.c |
||||
* |
||||
* Description: Example code computing dot product of two vectors. |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup DotproductExample Dot Product Example |
||||
* |
||||
* \par Description: |
||||
* \par |
||||
* Demonstrates the use of the Multiply and Add functions to perform the dot product. |
||||
* The dot product of two vectors is obtained by multiplying corresponding elements |
||||
* and summing the products. |
||||
|
||||
* \par Algorithm: |
||||
* \par |
||||
* The two input vectors \c A and \c B with length \c n, are multiplied element-by-element |
||||
* and then added to obtain dot product. |
||||
* \par |
||||
* This is denoted by the following equation: |
||||
* <pre> dotProduct = A[0] * B[0] + A[1] * B[1] + ... + A[n-1] * B[n-1]</pre> |
||||
* |
||||
* \par Block Diagram: |
||||
* \par |
||||
* \image html dotProduct.gif |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c srcA_buf_f32 points to first input vector |
||||
* \li \c srcB_buf_f32 points to second input vector |
||||
* \li \c testOutput stores dot product of the two input vectors. |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_mult_f32() |
||||
* - arm_add_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_dotproduct_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_dotproduct_example_f32.c
|
||||
*/ |
||||
|
||||
#include <math.h> |
||||
#include "arm_math.h" |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Defines each of the tests performed |
||||
* ------------------------------------------------------------------- */ |
||||
#define MAX_BLOCKSIZE 32 |
||||
#define DELTA (0.000001f) |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Test input data for Floating point Dot Product example for 32-blockSize |
||||
* Generated by the MATLAB randn() function |
||||
* ------------------------------------------------------------------- */ |
||||
/* ----------------------------------------------------------------------
|
||||
** Test input data of srcA for blockSize 32 |
||||
** ------------------------------------------------------------------- */ |
||||
float32_t srcA_buf_f32[MAX_BLOCKSIZE] = |
||||
{ |
||||
-0.4325648115282207, -1.6655843782380970, 0.1253323064748307, |
||||
0.2876764203585489, -1.1464713506814637, 1.1909154656429988, |
||||
1.1891642016521031, -0.0376332765933176, 0.3272923614086541, |
||||
0.1746391428209245, -0.1867085776814394, 0.7257905482933027, |
||||
-0.5883165430141887, 2.1831858181971011, -0.1363958830865957, |
||||
0.1139313135208096, 1.0667682113591888, 0.0592814605236053, |
||||
-0.0956484054836690, -0.8323494636500225, 0.2944108163926404, |
||||
-1.3361818579378040, 0.7143245518189522, 1.6235620644462707, |
||||
-0.6917757017022868, 0.8579966728282626, 1.2540014216025324, |
||||
-1.5937295764474768, -1.4409644319010200, 0.5711476236581780, |
||||
-0.3998855777153632, 0.6899973754643451 |
||||
}; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Test input data of srcB for blockSize 32 |
||||
** ------------------------------------------------------------------- */ |
||||
float32_t srcB_buf_f32[MAX_BLOCKSIZE] = |
||||
{ |
||||
1.7491401329284098, 0.1325982188803279, 0.3252281811989881, |
||||
-0.7938091410349637, 0.3149236145048914, -0.5272704888029532, |
||||
0.9322666565031119, 1.1646643544607362, -2.0456694357357357, |
||||
-0.6443728590041911, 1.7410657940825480, 0.4867684246821860, |
||||
1.0488288293660140, 1.4885752747099299, 1.2705014969484090, |
||||
-1.8561241921210170, 2.1343209047321410, 1.4358467535865909, |
||||
-0.9173023332875400, -1.1060770780029008, 0.8105708062681296, |
||||
0.6985430696369063, -0.4015827425012831, 1.2687512030669628, |
||||
-0.7836083053674872, 0.2132664971465569, 0.7878984786088954, |
||||
0.8966819356782295, -0.1869172943544062, 1.0131816724341454, |
||||
0.2484350696132857, 0.0596083377937976 |
||||
}; |
||||
|
||||
/* Reference dot product output */ |
||||
float32_t refDotProdOut = 5.9273644806352142; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare Global variables |
||||
* ------------------------------------------------------------------- */ |
||||
float32_t multOutput[MAX_BLOCKSIZE]; /* Intermediate output */ |
||||
float32_t testOutput; /* Final ouput */ |
||||
|
||||
arm_status status; /* Status of the example */ |
||||
|
||||
int32_t main(void) |
||||
{ |
||||
uint32_t i; /* Loop counter */ |
||||
float32_t diff; /* Difference between reference and test outputs */ |
||||
|
||||
/* Multiplication of two input buffers */ |
||||
arm_mult_f32(srcA_buf_f32, srcB_buf_f32, multOutput, MAX_BLOCKSIZE); |
||||
|
||||
/* Accumulate the multiplication output values to
|
||||
get the dot product of the two inputs */ |
||||
for(i=0; i< MAX_BLOCKSIZE; i++) |
||||
{ |
||||
arm_add_f32(&testOutput, &multOutput[i], &testOutput, 1); |
||||
} |
||||
|
||||
/* absolute value of difference between ref and test */ |
||||
diff = fabsf(refDotProdOut - testOutput); |
||||
|
||||
/* Comparison of dot product value with reference */ |
||||
if(diff > DELTA) |
||||
{ |
||||
status = ARM_MATH_TEST_FAILURE; |
||||
} |
||||
|
||||
if( status == ARM_MATH_TEST_FAILURE) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
@ -0,0 +1,178 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_dotproduct_example_f32.c |
||||
* |
||||
* Description: Example code computing dot product of two vectors. |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup DotproductExample Dot Product Example |
||||
* |
||||
* \par Description: |
||||
* \par |
||||
* Demonstrates the use of the Multiply and Add functions to perform the dot product. |
||||
* The dot product of two vectors is obtained by multiplying corresponding elements |
||||
* and summing the products. |
||||
|
||||
* \par Algorithm: |
||||
* \par |
||||
* The two input vectors \c A and \c B with length \c n, are multiplied element-by-element |
||||
* and then added to obtain dot product. |
||||
* \par |
||||
* This is denoted by the following equation: |
||||
* <pre> dotProduct = A[0] * B[0] + A[1] * B[1] + ... + A[n-1] * B[n-1]</pre> |
||||
* |
||||
* \par Block Diagram: |
||||
* \par |
||||
* \image html dotProduct.gif |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c srcA_buf_f32 points to first input vector |
||||
* \li \c srcB_buf_f32 points to second input vector |
||||
* \li \c testOutput stores dot product of the two input vectors. |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_mult_f32() |
||||
* - arm_add_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_dotproduct_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_dotproduct_example_f32.c
|
||||
*/ |
||||
|
||||
#include <math.h> |
||||
#include "arm_math.h" |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Defines each of the tests performed |
||||
* ------------------------------------------------------------------- */ |
||||
#define MAX_BLOCKSIZE 32 |
||||
#define DELTA (0.000001f) |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Test input data for Floating point Dot Product example for 32-blockSize |
||||
* Generated by the MATLAB randn() function |
||||
* ------------------------------------------------------------------- */ |
||||
/* ----------------------------------------------------------------------
|
||||
** Test input data of srcA for blockSize 32 |
||||
** ------------------------------------------------------------------- */ |
||||
float32_t srcA_buf_f32[MAX_BLOCKSIZE] = |
||||
{ |
||||
-0.4325648115282207, -1.6655843782380970, 0.1253323064748307, |
||||
0.2876764203585489, -1.1464713506814637, 1.1909154656429988, |
||||
1.1891642016521031, -0.0376332765933176, 0.3272923614086541, |
||||
0.1746391428209245, -0.1867085776814394, 0.7257905482933027, |
||||
-0.5883165430141887, 2.1831858181971011, -0.1363958830865957, |
||||
0.1139313135208096, 1.0667682113591888, 0.0592814605236053, |
||||
-0.0956484054836690, -0.8323494636500225, 0.2944108163926404, |
||||
-1.3361818579378040, 0.7143245518189522, 1.6235620644462707, |
||||
-0.6917757017022868, 0.8579966728282626, 1.2540014216025324, |
||||
-1.5937295764474768, -1.4409644319010200, 0.5711476236581780, |
||||
-0.3998855777153632, 0.6899973754643451 |
||||
}; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Test input data of srcB for blockSize 32 |
||||
** ------------------------------------------------------------------- */ |
||||
float32_t srcB_buf_f32[MAX_BLOCKSIZE] = |
||||
{ |
||||
1.7491401329284098, 0.1325982188803279, 0.3252281811989881, |
||||
-0.7938091410349637, 0.3149236145048914, -0.5272704888029532, |
||||
0.9322666565031119, 1.1646643544607362, -2.0456694357357357, |
||||
-0.6443728590041911, 1.7410657940825480, 0.4867684246821860, |
||||
1.0488288293660140, 1.4885752747099299, 1.2705014969484090, |
||||
-1.8561241921210170, 2.1343209047321410, 1.4358467535865909, |
||||
-0.9173023332875400, -1.1060770780029008, 0.8105708062681296, |
||||
0.6985430696369063, -0.4015827425012831, 1.2687512030669628, |
||||
-0.7836083053674872, 0.2132664971465569, 0.7878984786088954, |
||||
0.8966819356782295, -0.1869172943544062, 1.0131816724341454, |
||||
0.2484350696132857, 0.0596083377937976 |
||||
}; |
||||
|
||||
/* Reference dot product output */ |
||||
float32_t refDotProdOut = 5.9273644806352142; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare Global variables |
||||
* ------------------------------------------------------------------- */ |
||||
float32_t multOutput[MAX_BLOCKSIZE]; /* Intermediate output */ |
||||
float32_t testOutput; /* Final ouput */ |
||||
|
||||
arm_status status; /* Status of the example */ |
||||
|
||||
int32_t main(void) |
||||
{ |
||||
uint32_t i; /* Loop counter */ |
||||
float32_t diff; /* Difference between reference and test outputs */ |
||||
|
||||
/* Multiplication of two input buffers */ |
||||
arm_mult_f32(srcA_buf_f32, srcB_buf_f32, multOutput, MAX_BLOCKSIZE); |
||||
|
||||
/* Accumulate the multiplication output values to
|
||||
get the dot product of the two inputs */ |
||||
for(i=0; i< MAX_BLOCKSIZE; i++) |
||||
{ |
||||
arm_add_f32(&testOutput, &multOutput[i], &testOutput, 1); |
||||
} |
||||
|
||||
/* absolute value of difference between ref and test */ |
||||
diff = fabsf(refDotProdOut - testOutput); |
||||
|
||||
/* Comparison of dot product value with reference */ |
||||
if(diff > DELTA) |
||||
{ |
||||
status = ARM_MATH_TEST_FAILURE; |
||||
} |
||||
|
||||
if( status == ARM_MATH_TEST_FAILURE) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
@ -0,0 +1,308 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_fft_bin_data.c |
||||
*
|
||||
* Description: Data file used for example code |
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
Test Input signal contains 10KHz signal + Uniformly distributed white noise |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
float32_t testInput_f32_10khz[2048] =
|
||||
{
|
||||
-0.865129623056441, 0.000000000000000, -2.655020678073846, 0.000000000000000, 0.600664612949661, 0.000000000000000, 0.080378093886515, 0.000000000000000,
|
||||
-2.899160484012034, 0.000000000000000, 2.563004262857762, 0.000000000000000, 3.078328403304206, 0.000000000000000, 0.105906778385130, 0.000000000000000,
|
||||
0.048366940168201, 0.000000000000000, -0.145696461188734, 0.000000000000000, -0.023417155362879, 0.000000000000000, 2.127729174988954, 0.000000000000000,
|
||||
-1.176633086028377, 0.000000000000000, 3.690223557991855, 0.000000000000000, -0.622791766173194, 0.000000000000000, 0.722837373872203, 0.000000000000000,
|
||||
2.739754205367484, 0.000000000000000, -0.062610410524552, 0.000000000000000, -0.891296810967338, 0.000000000000000, -1.845872258871811, 0.000000000000000,
|
||||
1.195039415434387, 0.000000000000000, -2.177388969045026, 0.000000000000000, 1.078649103637905, 0.000000000000000, 2.570976050490193, 0.000000000000000,
|
||||
-1.383551403404574, 0.000000000000000, 2.392141424058873, 0.000000000000000, 2.858002843205065, 0.000000000000000, -3.682433899725536, 0.000000000000000,
|
||||
-3.488146646451150, 0.000000000000000, 1.323468578888120, 0.000000000000000, -0.099771155430726, 0.000000000000000, 1.561168082500454, 0.000000000000000,
|
||||
1.025026795103179, 0.000000000000000, 0.928841900171200, 0.000000000000000, 2.930499509864950, 0.000000000000000, 2.013349089766430, 0.000000000000000,
|
||||
2.381676148486737, 0.000000000000000, -3.081062307950236, 0.000000000000000, -0.389579115537544, 0.000000000000000, 0.181540149166620, 0.000000000000000,
|
||||
-2.601953341353208, 0.000000000000000, 0.333435137783218, 0.000000000000000, -2.812945856162965, 0.000000000000000, 2.649109640172910, 0.000000000000000,
|
||||
-1.003963025744654, 0.000000000000000, 1.552460768755035, 0.000000000000000, 0.088641345335247, 0.000000000000000, -2.519951327113426, 0.000000000000000,
|
||||
-4.341348988610527, 0.000000000000000, 0.557772429359965, 0.000000000000000, -1.671267412948494, 0.000000000000000, 0.733951350960387, 0.000000000000000,
|
||||
0.409263788034864, 0.000000000000000, 3.566033071952806, 0.000000000000000, 1.882565173848352, 0.000000000000000, -1.106017073793287, 0.000000000000000,
|
||||
0.154456720778718, 0.000000000000000, -2.513205795512153, 0.000000000000000, 0.310978660939421, 0.000000000000000, 0.579706500111723, 0.000000000000000,
|
||||
0.000086383683251, 0.000000000000000, -1.311866980897721, 0.000000000000000, 1.840007477574986, 0.000000000000000, -3.253005768451345, 0.000000000000000,
|
||||
1.462584328739432, 0.000000000000000, 1.610103610851738, 0.000000000000000, 0.761914676858907, 0.000000000000000, 0.974541361089834, 0.000000000000000,
|
||||
0.686845845885983, 0.000000000000000, 1.849153122025191, 0.000000000000000, 0.787800410401453, 0.000000000000000, -1.187438909666279, 0.000000000000000,
|
||||
-0.754937911044720, 0.000000000000000, 0.084373858395232, 0.000000000000000, -2.600269011710521, 0.000000000000000, -0.962982842142644, 0.000000000000000,
|
||||
-0.369328108540868, 0.000000000000000, 0.810791418361879, 0.000000000000000, 3.587016488699641, 0.000000000000000, -0.520776145083723, 0.000000000000000,
|
||||
0.640249919627884, 0.000000000000000, 1.103122489464969, 0.000000000000000, 2.231779881455556, 0.000000000000000, -1.308035392685241, 0.000000000000000,
|
||||
0.424070304330106, 0.000000000000000, -0.200383932651189, 0.000000000000000, -2.365526783356541, 0.000000000000000, -0.989114757436628, 0.000000000000000,
|
||||
2.770807688959777, 0.000000000000000, -0.444172737462307, 0.000000000000000, 0.079760979374078, 0.000000000000000, -0.005199118412183, 0.000000000000000,
|
||||
-0.664712668309527, 0.000000000000000, -0.624171857561896, 0.000000000000000, 0.537306979007338, 0.000000000000000, -2.575955675497642, 0.000000000000000,
|
||||
1.562363235756780, 0.000000000000000, 1.814069369848895, 0.000000000000000, -1.293428583392509, 0.000000000000000, -1.026188449495686, 0.000000000000000,
|
||||
-2.981771815588717, 0.000000000000000, -4.223468103075124, 0.000000000000000, 2.672674782004045, 0.000000000000000, -0.856096801117735, 0.000000000000000,
|
||||
0.048517345512563, 0.000000000000000, -0.026860721136222, 0.000000000000000, 0.392932277758187, 0.000000000000000, -1.331740855093099, 0.000000000000000,
|
||||
-1.894292129477081, 0.000000000000000, -1.425006468460681, 0.000000000000000, -2.721772427617057, 0.000000000000000, -1.616831100216806, 0.000000000000000,
|
||||
3.551177651488947, 0.000000000000000, -0.069685667896087, 0.000000000000000, -3.134634907409102, 0.000000000000000, -0.263627598944639, 0.000000000000000,
|
||||
-1.650469945991350, 0.000000000000000, -2.203580339374399, 0.000000000000000, -0.872203246123242, 0.000000000000000, 1.230782812607287, 0.000000000000000,
|
||||
0.257288860093291, 0.000000000000000, 1.989083106173137, 0.000000000000000, -1.985638729453261, 0.000000000000000, -1.416185105842892, 0.000000000000000,
|
||||
-1.131097688325772, 0.000000000000000, -2.245130805416057, 0.000000000000000, -1.938873996219074, 0.000000000000000, 2.043608361562645, 0.000000000000000,
|
||||
-0.583727989880841, 0.000000000000000, -1.785266378212929, 0.000000000000000, 1.961457586224753, 0.000000000000000, 1.139400099963223, 0.000000000000000,
|
||||
-1.979519343363991, 0.000000000000000, 2.003023322818429, 0.000000000000000, 0.229004069076829, 0.000000000000000, 3.452808862193135, 0.000000000000000,
|
||||
2.882273808365857, 0.000000000000000, -1.549450501844438, 0.000000000000000, -3.283872089931876, 0.000000000000000, -0.327025884099064, 0.000000000000000,
|
||||
-0.054979977136430, 0.000000000000000, -1.192280531479012, 0.000000000000000, 0.645539328365578, 0.000000000000000, 2.300832863404618, 0.000000000000000,
|
||||
-1.092951789535240, 0.000000000000000, -1.017368249363773, 0.000000000000000, -0.142673056169787, 0.000000000000000, 0.831073544881250, 0.000000000000000,
|
||||
-2.314612531587064, 0.000000000000000, -2.221456299106321, 0.000000000000000, 0.460261143885226, 0.000000000000000, 0.050585301888595, 0.000000000000000,
|
||||
0.364373329183988, 0.000000000000000, -1.685956552069538, 0.000000000000000, 0.050664512351055, 0.000000000000000, -0.193355783902718, 0.000000000000000,
|
||||
-0.158660446046828, 0.000000000000000, 2.394156453841953, 0.000000000000000, -1.562965718554525, 0.000000000000000, -2.199750600869900, 0.000000000000000,
|
||||
1.544984022381773, 0.000000000000000, -1.988307216807315, 0.000000000000000, -0.628240722541046, 0.000000000000000, -1.436235771505429, 0.000000000000000,
|
||||
1.677013691147313, 0.000000000000000, 1.600741781678228, 0.000000000000000, -0.757380959134706, 0.000000000000000, -4.784797439515566, 0.000000000000000,
|
||||
0.265121462834569, 0.000000000000000, 3.862029485934378, 0.000000000000000, 2.386823577249430, 0.000000000000000, -3.655779745436893, 0.000000000000000,
|
||||
-0.763541621368016, 0.000000000000000, -1.182140388432962, 0.000000000000000, -1.349106114858063, 0.000000000000000, -2.287533624396759, 0.000000000000000,
|
||||
-0.028603745188423, 0.000000000000000, -1.353580755934427, 0.000000000000000, 0.461602380352937, 0.000000000000000, -0.059599055078928, 0.000000000000000,
|
||||
-0.929946734342228, 0.000000000000000, 0.065773089295561, 0.000000000000000, 1.106565863102982, 0.000000000000000, 4.719295086373593, 0.000000000000000,
|
||||
-2.108377703544395, 0.000000000000000, -2.226393620240159, 0.000000000000000, 1.375668397437521, 0.000000000000000, -0.960772428525443, 0.000000000000000,
|
||||
-2.156313465390571, 0.000000000000000, 1.126060012375311, 0.000000000000000, 2.756485137030720, 0.000000000000000, 0.739639690862600, 0.000000000000000,
|
||||
3.914769510295006, 0.000000000000000, 1.685232785586675, 0.000000000000000, 4.079058040970612, 0.000000000000000, -1.174598301660513, 0.000000000000000,
|
||||
-2.885776587275580, 0.000000000000000, -0.241073635188767, 0.000000000000000, 3.080489872502403, 0.000000000000000, -2.051244183999421, 0.000000000000000,
|
||||
0.664330486845139, 0.000000000000000, -1.697798999370016, 0.000000000000000, 1.452369423649782, 0.000000000000000, -1.523532831019280, 0.000000000000000,
|
||||
0.171981186587481, 0.000000000000000, -4.685274721583927, 0.000000000000000, -1.336175835319380, 0.000000000000000, 1.419070770428945, 0.000000000000000,
|
||||
-0.035791601713475, 0.000000000000000, 2.291937971632081, 0.000000000000000, -1.962559313450293, 0.000000000000000, -4.831595589339301, 0.000000000000000,
|
||||
-1.857055284000925, 0.000000000000000, 2.606271522635512, 0.000000000000000, -0.576447978738030, 0.000000000000000, 0.082299166967720, 0.000000000000000,
|
||||
1.888399453494614, 0.000000000000000, -3.564705298046079, 0.000000000000000, -0.939357831083889, 0.000000000000000, -1.903578203697778, 0.000000000000000,
|
||||
-2.642492215447250, 0.000000000000000, -0.182990405251017, 0.000000000000000, 3.742026478011174, 0.000000000000000, 0.104295803798333, 0.000000000000000,
|
||||
1.848678195370347, 0.000000000000000, -1.887384346896369, 0.000000000000000, 0.365048973046045, 0.000000000000000, -0.889638010354219, 0.000000000000000,
|
||||
1.173877118428863, 0.000000000000000, -1.178562827540109, 0.000000000000000, 0.610271645685184, 0.000000000000000, 1.831284815697871, 0.000000000000000,
|
||||
0.449575390102283, 0.000000000000000, 1.597171905253443, 0.000000000000000, 3.918574971904773, 0.000000000000000, 0.868104027970404, 0.000000000000000,
|
||||
0.582643134746494, 0.000000000000000, 2.321256382353331, 0.000000000000000, -0.238118642223180, 0.000000000000000, -2.890287868054370, 0.000000000000000,
|
||||
0.970995414625622, 0.000000000000000, 0.666137930891283, 0.000000000000000, -0.202435718709502, 0.000000000000000, 2.057930200518194, 0.000000000000000,
|
||||
3.120583443719949, 0.000000000000000, -0.863945271701041, 0.000000000000000, 0.906848893874630, 0.000000000000000, -1.434124930222570, 0.000000000000000,
|
||||
0.754659384848783, 0.000000000000000, -5.224154442713778, 0.000000000000000, 2.330229744098967, 0.000000000000000, 1.113946320164698, 0.000000000000000,
|
||||
0.523324920322840, 0.000000000000000, 1.750740911548348, 0.000000000000000, -0.899333972913577, 0.000000000000000, 0.228705845203506, 0.000000000000000,
|
||||
-1.934782624767648, 0.000000000000000, -3.508386237231303, 0.000000000000000, -2.107108523073510, 0.000000000000000, 0.380587645474815, 0.000000000000000,
|
||||
-0.476200877183279, 0.000000000000000, -2.172086712642198, 0.000000000000000, 1.795372535780299, 0.000000000000000, -2.100318983391055, 0.000000000000000,
|
||||
-0.022571122461405, 0.000000000000000, 0.674514020010955, 0.000000000000000, -0.148872569390857, 0.000000000000000, 0.298175890592737, 0.000000000000000,
|
||||
-1.134244492493590, 0.000000000000000, -3.146848422289455, 0.000000000000000, -1.357950199087602, 0.000000000000000, 0.667362732020878, 0.000000000000000,
|
||||
-3.119397998316724, 0.000000000000000, -1.189341126297637, 0.000000000000000, -1.532744386856668, 0.000000000000000, -1.672972484202534, 0.000000000000000,
|
||||
-2.042283373871558, 0.000000000000000, -1.479481547595924, 0.000000000000000, -0.002668662875396, 0.000000000000000, 0.262737760129546, 0.000000000000000,
|
||||
2.734456080621830, 0.000000000000000, -0.671945925075102, 0.000000000000000, -3.735078262179111, 0.000000000000000, -0.161705013319883, 0.000000000000000,
|
||||
0.748963512361001, 0.000000000000000, 1.128046374367600, 0.000000000000000, 0.649651335592966, 0.000000000000000, 1.880020215025867, 0.000000000000000,
|
||||
-1.095632293842306, 0.000000000000000, 1.197764876160487, 0.000000000000000, 0.323646656252985, 0.000000000000000, -1.655502751114502, 0.000000000000000,
|
||||
3.666399062961496, 0.000000000000000, -0.334060899735197, 0.000000000000000, -2.119056978738397, 0.000000000000000, 3.721375117275012, 0.000000000000000,
|
||||
0.044874186872307, 0.000000000000000, -2.733053897593234, 0.000000000000000, 1.590700278891042, 0.000000000000000, 3.215711772781902, 0.000000000000000,
|
||||
-1.792085012843801, 0.000000000000000, -0.405797188885475, 0.000000000000000, -0.628080020080892, 0.000000000000000, -1.831815840843960, 0.000000000000000,
|
||||
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-1.213451272938616, 0.000000000000000, 0.697439404325690, 0.000000000000000, -0.309902287574293, 0.000000000000000, 2.622575852162781, 0.000000000000000,
|
||||
-2.075881936219060, 0.000000000000000, 0.777847545691770, 0.000000000000000, -3.967947986440650, 0.000000000000000, -3.066503371806472, 0.000000000000000,
|
||||
1.193780625937845, 0.000000000000000, 0.214246579281311, 0.000000000000000, -2.610681491162162, 0.000000000000000, -1.261224183972745, 0.000000000000000,
|
||||
-1.165071748544285, 0.000000000000000, -1.116548474834374, 0.000000000000000, 0.847202164846982, 0.000000000000000, -3.474301529532390, 0.000000000000000,
|
||||
0.020799541946476, 0.000000000000000, -3.868995473288166, 0.000000000000000, 1.757979409638067, 0.000000000000000, 0.868115130183109, 0.000000000000000,
|
||||
0.910167436737958, 0.000000000000000, -1.878855115563720, 0.000000000000000, 1.710357104174161, 0.000000000000000, -1.468933980990902, 0.000000000000000,
|
||||
1.799544171601169, 0.000000000000000, -4.922332880027887, 0.000000000000000, 0.219424548939720, 0.000000000000000, -0.971671113451924, 0.000000000000000,
|
||||
-0.940533475616266, 0.000000000000000, 0.122510114412152, 0.000000000000000, -1.373686254916911, 0.000000000000000, 1.760348103896323, 0.000000000000000,
|
||||
0.391745067829643, 0.000000000000000, 2.521958505327354, 0.000000000000000, -1.300693516405092, 0.000000000000000, -0.538251788309178, 0.000000000000000,
|
||||
0.797184135810173, 0.000000000000000, 2.908800548982588, 0.000000000000000, 1.590902251655215, 0.000000000000000, -1.070323714487264, 0.000000000000000,
|
||||
-3.349764443340999, 0.000000000000000, -1.190563529731447, 0.000000000000000, 1.363369471291963, 0.000000000000000, -1.814270299924576, 0.000000000000000,
|
||||
-0.023381588315711, 0.000000000000000, 1.719182048679569, 0.000000000000000, 0.839917213252626, 0.000000000000000, 1.006099633839122, 0.000000000000000,
|
||||
0.812462674381527, 0.000000000000000, 1.755814336346739, 0.000000000000000, 2.546848681206319, 0.000000000000000, -1.555300208869455, 0.000000000000000,
|
||||
1.017053811631167, 0.000000000000000, 0.996591039170903, 0.000000000000000, -1.228047247924881, 0.000000000000000, 4.809462271463009, 0.000000000000000,
|
||||
2.318113116151685, 0.000000000000000, -1.206932520679733, 0.000000000000000, 1.273757685623312, 0.000000000000000, 0.724335352481802, 0.000000000000000,
|
||||
1.519876652073198, 0.000000000000000, -2.749670314714158, 0.000000000000000, 3.424042481847581, 0.000000000000000, -3.714668360421517, 0.000000000000000,
|
||||
1.612834197004014, 0.000000000000000, -2.038234723985566, 0.000000000000000, 1.470938786562152, 0.000000000000000, 2.111634918450302, 0.000000000000000,
|
||||
1.030376670151787, 0.000000000000000, -0.420877189003829, 0.000000000000000, -1.502024800532894, 0.000000000000000, 0.452310749163804, 0.000000000000000,
|
||||
-1.606059382300987, 0.000000000000000, -4.006159967834147, 0.000000000000000, -2.152801208196508, 0.000000000000000, 1.671674089372579, 0.000000000000000,
|
||||
1.714536333564101, 0.000000000000000, -1.011518543005344, 0.000000000000000, -0.576410282180584, 0.000000000000000, 0.733689809480836, 0.000000000000000,
|
||||
1.004245602717974, 0.000000000000000, 1.010090391888449, 0.000000000000000, 3.811459513385621, 0.000000000000000, -5.230621089271954, 0.000000000000000,
|
||||
0.678044861034399, 0.000000000000000, 1.255935859598107, 0.000000000000000, 1.674521701615288, 0.000000000000000, -1.656695216761705, 0.000000000000000,
|
||||
1.169286028869693, 0.000000000000000, 0.524915416191998, 0.000000000000000, 2.397642885039520, 0.000000000000000, 2.108711400616072, 0.000000000000000,
|
||||
2.037618211018084, 0.000000000000000, -0.623664553406925, 0.000000000000000, 2.984106170984409, 0.000000000000000, 1.132182737400932, 0.000000000000000,
|
||||
-2.859274340352130, 0.000000000000000, -0.975550071398723, 0.000000000000000, -1.359935119997407, 0.000000000000000, -2.963308211050121, 0.000000000000000,
|
||||
-0.228726662781163, 0.000000000000000, -1.411110379682043, 0.000000000000000, 0.741553355734225, 0.000000000000000, 0.497554254758309, 0.000000000000000,
|
||||
2.371907950598855, 0.000000000000000, 1.063465168988748, 0.000000000000000, -0.641082692081488, 0.000000000000000, -0.855439878540726, 0.000000000000000,
|
||||
0.578321738578726, 0.000000000000000, 3.005809768796194, 0.000000000000000, 1.961458699064065, 0.000000000000000, -3.206261663772745, 0.000000000000000,
|
||||
-0.364431989095434, 0.000000000000000, -0.263182496622273, 0.000000000000000, 1.843464680631139, 0.000000000000000, -0.419107530229249, 0.000000000000000,
|
||||
1.662335873298487, 0.000000000000000, -0.853687563304005, 0.000000000000000, -2.584133404357169, 0.000000000000000, 3.466839568922895, 0.000000000000000,
|
||||
0.881671345091973, 0.000000000000000, 0.454620014206908, 0.000000000000000, -1.737245187402739, 0.000000000000000, 2.162713238369243, 0.000000000000000,
|
||||
-3.868539002714486, 0.000000000000000, 2.014114855933826, 0.000000000000000, -0.703233831811006, 0.000000000000000, -3.410319935997574, 0.000000000000000,
|
||||
-1.851235811006584, 0.000000000000000, 0.909783907894036, 0.000000000000000, 0.091884002136728, 0.000000000000000, -2.688294201131650, 0.000000000000000,
|
||||
-0.906134178460955, 0.000000000000000, 3.475054609035133, 0.000000000000000, -0.573927964170323, 0.000000000000000, -0.429542937515399, 0.000000000000000,
|
||||
0.991348618739939, 0.000000000000000, 1.974804904926325, 0.000000000000000, 0.975783450796698, 0.000000000000000, -3.057119549071503, 0.000000000000000,
|
||||
-3.899429237481194, 0.000000000000000, 0.362439009175350, 0.000000000000000, -1.124461670265618, 0.000000000000000, 1.806000360163583, 0.000000000000000,
|
||||
-2.768333362600288, 0.000000000000000, 0.244387897900379, 0.000000000000000, 0.908767296720926, 0.000000000000000, 1.254669374391882, 0.000000000000000,
|
||||
-1.420441929463686, 0.000000000000000, -0.875658895966293, 0.000000000000000, 0.183824603376167, 0.000000000000000, -3.361653917011686, 0.000000000000000,
|
||||
-0.796615630227952, 0.000000000000000, -1.660226542658673, 0.000000000000000, 1.654439358307226, 0.000000000000000, 2.782812946709771, 0.000000000000000,
|
||||
1.418064412811531, 0.000000000000000, -0.819645647243761, 0.000000000000000, 0.807724772592699, 0.000000000000000, -0.941967976379298, 0.000000000000000,
|
||||
-2.312768306047469, 0.000000000000000, 0.872426936477443, 0.000000000000000, 0.919528961530845, 0.000000000000000, -2.084904575264847, 0.000000000000000,
|
||||
-1.972464868459322, 0.000000000000000, -1.050687203338466, 0.000000000000000, 1.659579707007902, 0.000000000000000, -1.820640014705855, 0.000000000000000,
|
||||
-1.195078061671045, 0.000000000000000, -1.639773173762048, 0.000000000000000, 1.616744338157063, 0.000000000000000, 4.019216096811563, 0.000000000000000,
|
||||
3.461021102549681, 0.000000000000000, 1.642352734361484, 0.000000000000000, -0.046354693720813, 0.000000000000000, -0.041936252359677, 0.000000000000000,
|
||||
-2.393307519480551, 0.000000000000000, -0.341471634615121, 0.000000000000000, -0.392073595257017, 0.000000000000000, -0.219299018372730, 0.000000000000000,
|
||||
-2.016391579662071, 0.000000000000000, -0.653096251969787, 0.000000000000000, 1.466353155666821, 0.000000000000000, -2.872058864320412, 0.000000000000000,
|
||||
-2.157180779503830, 0.000000000000000, 0.723257479841560, 0.000000000000000, 3.769951308104384, 0.000000000000000, -1.923392042420024, 0.000000000000000,
|
||||
0.644899359942840, 0.000000000000000, -2.090226891621437, 0.000000000000000, -0.277043982890403, 0.000000000000000, -0.528271428321112, 0.000000000000000,
|
||||
2.518120645960652, 0.000000000000000, 1.040820431111488, 0.000000000000000, -4.560583754742486, 0.000000000000000, -0.226899614918836, 0.000000000000000,
|
||||
1.713331231108959, 0.000000000000000, -3.293941019163642, 0.000000000000000, -1.113331444648290, 0.000000000000000, -1.032308423149906, 0.000000000000000,
|
||||
1.593774272982443, 0.000000000000000, -1.246840475090529, 0.000000000000000, -0.190344684920137, 0.000000000000000, -1.719386356896355, 0.000000000000000,
|
||||
-2.827721754659679, 0.000000000000000, -0.092438285279020, 0.000000000000000, -0.565844430675246, 0.000000000000000, -1.077916121691716, 0.000000000000000,
|
||||
-1.208665809504693, 0.000000000000000, -2.996014266381254, 0.000000000000000, 2.888573323402423, 0.000000000000000, 2.829507048720695, 0.000000000000000,
|
||||
-0.859177034120755, 0.000000000000000, -1.969302377743254, 0.000000000000000, 0.777437674525362, 0.000000000000000, -0.124910190157646, 0.000000000000000,
|
||||
0.129875493115290, 0.000000000000000, -4.192139262163992, 0.000000000000000, 3.023496047962126, 0.000000000000000, 1.149775163736637, 0.000000000000000,
|
||||
2.038151304801731, 0.000000000000000, 3.016122489841263, 0.000000000000000, -4.829481812137012, 0.000000000000000, -1.668436615909279, 0.000000000000000,
|
||||
0.958586784636918, 0.000000000000000, 1.550652410058678, 0.000000000000000, -1.456305257976716, 0.000000000000000, -0.079588392344731, 0.000000000000000,
|
||||
-2.453213599392345, 0.000000000000000, 0.296795909127105, 0.000000000000000, -0.253426616607643, 0.000000000000000, 1.418937160028195, 0.000000000000000,
|
||||
-1.672949529066915, 0.000000000000000, -1.620990298572947, 0.000000000000000, -1.085103073196045, 0.000000000000000, 0.738606361195386, 0.000000000000000,
|
||||
-2.097831202853255, 0.000000000000000, 2.711952282071310, 0.000000000000000, 1.498539238246888, 0.000000000000000, 1.317457282535915, 0.000000000000000,
|
||||
-0.302765938349717, 0.000000000000000, -0.044623707947201, 0.000000000000000, 2.337405215062395, 0.000000000000000, -3.980689173859100, 0.000000000000000,
|
||||
|
||||
|
||||
}; |
||||
|
||||
@ -0,0 +1,158 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_fft_bin_example_f32.c |
||||
* |
||||
* Description: Example code demonstrating calculation of Max energy bin of |
||||
* frequency domain of input signal. |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup FrequencyBin Frequency Bin Example |
||||
* |
||||
* \par Description |
||||
* \par |
||||
* Demonstrates the calculation of the maximum energy bin in the frequency |
||||
* domain of the input signal with the use of Complex FFT, Complex |
||||
* Magnitude, and Maximum functions. |
||||
* |
||||
* \par Algorithm: |
||||
* \par |
||||
* The input test signal contains a 10 kHz signal with uniformly distributed white noise. |
||||
* Calculating the FFT of the input signal will give us the maximum energy of the |
||||
* bin corresponding to the input frequency of 10 kHz. |
||||
* |
||||
* \par Block Diagram: |
||||
* \image html FFTBin.gif "Block Diagram" |
||||
* \par |
||||
* The figure below shows the time domain signal of 10 kHz signal with |
||||
* uniformly distributed white noise, and the next figure shows the input |
||||
* in the frequency domain. The bin with maximum energy corresponds to 10 kHz signal. |
||||
* \par |
||||
* \image html FFTBinInput.gif "Input signal in Time domain" |
||||
* \image html FFTBinOutput.gif "Input signal in Frequency domain" |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c testInput_f32_10khz points to the input data |
||||
* \li \c testOutput points to the output data |
||||
* \li \c fftSize length of FFT |
||||
* \li \c ifftFlag flag for the selection of CFFT/CIFFT |
||||
* \li \c doBitReverse Flag for selection of normal order or bit reversed order |
||||
* \li \c refIndex reference index value at which maximum energy of bin ocuurs |
||||
* \li \c testIndex calculated index value at which maximum energy of bin ocuurs |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_cfft_f32() |
||||
* - arm_cmplx_mag_f32() |
||||
* - arm_max_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_fft_bin_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_fft_bin_example_f32.c
|
||||
*/ |
||||
|
||||
|
||||
#include "arm_math.h" |
||||
#include "arm_const_structs.h" |
||||
|
||||
#define TEST_LENGTH_SAMPLES 2048 |
||||
|
||||
/* -------------------------------------------------------------------
|
||||
* External Input and Output buffer Declarations for FFT Bin Example |
||||
* ------------------------------------------------------------------- */ |
||||
extern float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES]; |
||||
static float32_t testOutput[TEST_LENGTH_SAMPLES/2]; |
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Global variables for FFT Bin Example |
||||
* ------------------------------------------------------------------- */ |
||||
uint32_t fftSize = 1024; |
||||
uint32_t ifftFlag = 0; |
||||
uint32_t doBitReverse = 1; |
||||
|
||||
/* Reference index at which max energy of bin ocuurs */ |
||||
uint32_t refIndex = 213, testIndex = 0; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Max magnitude FFT Bin test |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
int32_t main(void) |
||||
{ |
||||
|
||||
arm_status status; |
||||
float32_t maxValue; |
||||
|
||||
status = ARM_MATH_SUCCESS; |
||||
|
||||
/* Process the data through the CFFT/CIFFT module */ |
||||
arm_cfft_f32(&arm_cfft_sR_f32_len1024, testInput_f32_10khz, ifftFlag, doBitReverse); |
||||
|
||||
/* Process the data through the Complex Magnitude Module for
|
||||
calculating the magnitude at each bin */ |
||||
arm_cmplx_mag_f32(testInput_f32_10khz, testOutput, fftSize); |
||||
|
||||
/* Calculates maxValue and returns corresponding BIN value */ |
||||
arm_max_f32(testOutput, fftSize, &maxValue, &testIndex); |
||||
|
||||
if(testIndex != refIndex) |
||||
{ |
||||
status = ARM_MATH_TEST_FAILURE; |
||||
} |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Loop here if the signals fail the PASS check. |
||||
** This denotes a test failure |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
if( status != ARM_MATH_SUCCESS) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
@ -0,0 +1,308 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_fft_bin_data.c |
||||
*
|
||||
* Description: Data file used for example code |
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
Test Input signal contains 10KHz signal + Uniformly distributed white noise |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
float32_t testInput_f32_10khz[2048] =
|
||||
{
|
||||
-0.865129623056441, 0.000000000000000, -2.655020678073846, 0.000000000000000, 0.600664612949661, 0.000000000000000, 0.080378093886515, 0.000000000000000,
|
||||
-2.899160484012034, 0.000000000000000, 2.563004262857762, 0.000000000000000, 3.078328403304206, 0.000000000000000, 0.105906778385130, 0.000000000000000,
|
||||
0.048366940168201, 0.000000000000000, -0.145696461188734, 0.000000000000000, -0.023417155362879, 0.000000000000000, 2.127729174988954, 0.000000000000000,
|
||||
-1.176633086028377, 0.000000000000000, 3.690223557991855, 0.000000000000000, -0.622791766173194, 0.000000000000000, 0.722837373872203, 0.000000000000000,
|
||||
2.739754205367484, 0.000000000000000, -0.062610410524552, 0.000000000000000, -0.891296810967338, 0.000000000000000, -1.845872258871811, 0.000000000000000,
|
||||
1.195039415434387, 0.000000000000000, -2.177388969045026, 0.000000000000000, 1.078649103637905, 0.000000000000000, 2.570976050490193, 0.000000000000000,
|
||||
-1.383551403404574, 0.000000000000000, 2.392141424058873, 0.000000000000000, 2.858002843205065, 0.000000000000000, -3.682433899725536, 0.000000000000000,
|
||||
-3.488146646451150, 0.000000000000000, 1.323468578888120, 0.000000000000000, -0.099771155430726, 0.000000000000000, 1.561168082500454, 0.000000000000000,
|
||||
1.025026795103179, 0.000000000000000, 0.928841900171200, 0.000000000000000, 2.930499509864950, 0.000000000000000, 2.013349089766430, 0.000000000000000,
|
||||
2.381676148486737, 0.000000000000000, -3.081062307950236, 0.000000000000000, -0.389579115537544, 0.000000000000000, 0.181540149166620, 0.000000000000000,
|
||||
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|
||||
-1.208665809504693, 0.000000000000000, -2.996014266381254, 0.000000000000000, 2.888573323402423, 0.000000000000000, 2.829507048720695, 0.000000000000000,
|
||||
-0.859177034120755, 0.000000000000000, -1.969302377743254, 0.000000000000000, 0.777437674525362, 0.000000000000000, -0.124910190157646, 0.000000000000000,
|
||||
0.129875493115290, 0.000000000000000, -4.192139262163992, 0.000000000000000, 3.023496047962126, 0.000000000000000, 1.149775163736637, 0.000000000000000,
|
||||
2.038151304801731, 0.000000000000000, 3.016122489841263, 0.000000000000000, -4.829481812137012, 0.000000000000000, -1.668436615909279, 0.000000000000000,
|
||||
0.958586784636918, 0.000000000000000, 1.550652410058678, 0.000000000000000, -1.456305257976716, 0.000000000000000, -0.079588392344731, 0.000000000000000,
|
||||
-2.453213599392345, 0.000000000000000, 0.296795909127105, 0.000000000000000, -0.253426616607643, 0.000000000000000, 1.418937160028195, 0.000000000000000,
|
||||
-1.672949529066915, 0.000000000000000, -1.620990298572947, 0.000000000000000, -1.085103073196045, 0.000000000000000, 0.738606361195386, 0.000000000000000,
|
||||
-2.097831202853255, 0.000000000000000, 2.711952282071310, 0.000000000000000, 1.498539238246888, 0.000000000000000, 1.317457282535915, 0.000000000000000,
|
||||
-0.302765938349717, 0.000000000000000, -0.044623707947201, 0.000000000000000, 2.337405215062395, 0.000000000000000, -3.980689173859100, 0.000000000000000,
|
||||
|
||||
|
||||
}; |
||||
|
||||
@ -0,0 +1,158 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_fft_bin_example_f32.c |
||||
* |
||||
* Description: Example code demonstrating calculation of Max energy bin of |
||||
* frequency domain of input signal. |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup FrequencyBin Frequency Bin Example |
||||
* |
||||
* \par Description |
||||
* \par |
||||
* Demonstrates the calculation of the maximum energy bin in the frequency |
||||
* domain of the input signal with the use of Complex FFT, Complex |
||||
* Magnitude, and Maximum functions. |
||||
* |
||||
* \par Algorithm: |
||||
* \par |
||||
* The input test signal contains a 10 kHz signal with uniformly distributed white noise. |
||||
* Calculating the FFT of the input signal will give us the maximum energy of the |
||||
* bin corresponding to the input frequency of 10 kHz. |
||||
* |
||||
* \par Block Diagram: |
||||
* \image html FFTBin.gif "Block Diagram" |
||||
* \par |
||||
* The figure below shows the time domain signal of 10 kHz signal with |
||||
* uniformly distributed white noise, and the next figure shows the input |
||||
* in the frequency domain. The bin with maximum energy corresponds to 10 kHz signal. |
||||
* \par |
||||
* \image html FFTBinInput.gif "Input signal in Time domain" |
||||
* \image html FFTBinOutput.gif "Input signal in Frequency domain" |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c testInput_f32_10khz points to the input data |
||||
* \li \c testOutput points to the output data |
||||
* \li \c fftSize length of FFT |
||||
* \li \c ifftFlag flag for the selection of CFFT/CIFFT |
||||
* \li \c doBitReverse Flag for selection of normal order or bit reversed order |
||||
* \li \c refIndex reference index value at which maximum energy of bin ocuurs |
||||
* \li \c testIndex calculated index value at which maximum energy of bin ocuurs |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_cfft_f32() |
||||
* - arm_cmplx_mag_f32() |
||||
* - arm_max_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_fft_bin_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_fft_bin_example_f32.c
|
||||
*/ |
||||
|
||||
|
||||
#include "arm_math.h" |
||||
#include "arm_const_structs.h" |
||||
|
||||
#define TEST_LENGTH_SAMPLES 2048 |
||||
|
||||
/* -------------------------------------------------------------------
|
||||
* External Input and Output buffer Declarations for FFT Bin Example |
||||
* ------------------------------------------------------------------- */ |
||||
extern float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES]; |
||||
static float32_t testOutput[TEST_LENGTH_SAMPLES/2]; |
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Global variables for FFT Bin Example |
||||
* ------------------------------------------------------------------- */ |
||||
uint32_t fftSize = 1024; |
||||
uint32_t ifftFlag = 0; |
||||
uint32_t doBitReverse = 1; |
||||
|
||||
/* Reference index at which max energy of bin ocuurs */ |
||||
uint32_t refIndex = 213, testIndex = 0; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Max magnitude FFT Bin test |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
int32_t main(void) |
||||
{ |
||||
|
||||
arm_status status; |
||||
float32_t maxValue; |
||||
|
||||
status = ARM_MATH_SUCCESS; |
||||
|
||||
/* Process the data through the CFFT/CIFFT module */ |
||||
arm_cfft_f32(&arm_cfft_sR_f32_len1024, testInput_f32_10khz, ifftFlag, doBitReverse); |
||||
|
||||
/* Process the data through the Complex Magnitude Module for
|
||||
calculating the magnitude at each bin */ |
||||
arm_cmplx_mag_f32(testInput_f32_10khz, testOutput, fftSize); |
||||
|
||||
/* Calculates maxValue and returns corresponding BIN value */ |
||||
arm_max_f32(testOutput, fftSize, &maxValue, &testIndex); |
||||
|
||||
if(testIndex != refIndex) |
||||
{ |
||||
status = ARM_MATH_TEST_FAILURE; |
||||
} |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Loop here if the signals fail the PASS check. |
||||
** This denotes a test failure |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
if( status != ARM_MATH_SUCCESS) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
@ -0,0 +1,134 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_fir_data.c |
||||
*
|
||||
* Description: Data file used for example code |
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Test input signal contains 1000Hz + 15000 Hz |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
float32_t testInput_f32_1kHz_15kHz[320] = |
||||
{ |
||||
+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
|
||||
+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
|
||||
+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
|
||||
-0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
|
||||
-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
|
||||
-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
|
||||
+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
|
||||
+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
|
||||
+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
|
||||
+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
|
||||
-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
|
||||
-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
|
||||
+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
|
||||
+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
|
||||
+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
|
||||
+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
|
||||
-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
|
||||
-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
|
||||
-0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
|
||||
+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
|
||||
+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
|
||||
-0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
|
||||
-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
|
||||
-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
|
||||
+0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
|
||||
+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
|
||||
+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
|
||||
+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
|
||||
-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
|
||||
-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
|
||||
-0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
|
||||
+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
|
||||
+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
|
||||
+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
|
||||
-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f,
|
||||
-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f,
|
||||
-0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f,
|
||||
+0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f,
|
||||
+0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f,
|
||||
+0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f,
|
||||
}; |
||||
|
||||
float32_t refOutput[320] =
|
||||
{ |
||||
+0.0000000000f, -0.0010797829f, -0.0007681386f, -0.0001982932f, +0.0000644313f, +0.0020854271f, +0.0036891871f, +0.0015855941f,
|
||||
-0.0026280805f, -0.0075907658f, -0.0119390538f, -0.0086665968f, +0.0088981202f, +0.0430539279f, +0.0974468742f, +0.1740405600f,
|
||||
+0.2681416601f, +0.3747720089f, +0.4893362230f, +0.6024154672f, +0.7058740791f, +0.7968348987f, +0.8715901940f, +0.9277881093f,
|
||||
+0.9682182661f, +0.9934674267f, +1.0012052245f, +0.9925859371f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
|
||||
+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f,
|
||||
-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
|
||||
-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
|
||||
-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
|
||||
+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
|
||||
+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
|
||||
+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f,
|
||||
-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
|
||||
-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
|
||||
-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
|
||||
+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
|
||||
+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
|
||||
+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f,
|
||||
-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
|
||||
-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
|
||||
-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
|
||||
+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
|
||||
+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
|
||||
+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f,
|
||||
-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
|
||||
-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
|
||||
-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
|
||||
+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
|
||||
+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
|
||||
+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f,
|
||||
-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
|
||||
-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
|
||||
-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, -0.0000000000f, +0.1309866321f,
|
||||
+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
|
||||
+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f,
|
||||
+0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f,
|
||||
-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f,
|
||||
-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f,
|
||||
-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f,
|
||||
+0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f,
|
||||
+0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f
|
||||
}; |
||||
|
||||
@ -0,0 +1,233 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_fir_example_f32.c |
||||
* |
||||
* Description: Example code demonstrating how an FIR filter can be used |
||||
* as a low pass filter. |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup FIRLPF FIR Lowpass Filter Example |
||||
* |
||||
* \par Description: |
||||
* \par |
||||
* Removes high frequency signal components from the input using an FIR lowpass filter. |
||||
* The example demonstrates how to configure an FIR filter and then pass data through |
||||
* it in a block-by-block fashion. |
||||
* \image html FIRLPF_signalflow.gif |
||||
* |
||||
* \par Algorithm: |
||||
* \par |
||||
* The input signal is a sum of two sine waves: 1 kHz and 15 kHz. |
||||
* This is processed by an FIR lowpass filter with cutoff frequency 6 kHz. |
||||
* The lowpass filter eliminates the 15 kHz signal leaving only the 1 kHz sine wave at the output. |
||||
* \par |
||||
* The lowpass filter was designed using MATLAB with a sample rate of 48 kHz and |
||||
* a length of 29 points. |
||||
* The MATLAB code to generate the filter coefficients is shown below: |
||||
* <pre> |
||||
* h = fir1(28, 6/24); |
||||
* </pre> |
||||
* The first argument is the "order" of the filter and is always one less than the desired length. |
||||
* The second argument is the normalized cutoff frequency. This is in the range 0 (DC) to 1.0 (Nyquist). |
||||
* A 6 kHz cutoff with a Nyquist frequency of 24 kHz lies at a normalized frequency of 6/24 = 0.25. |
||||
* The CMSIS FIR filter function requires the coefficients to be in time reversed order. |
||||
* <pre> |
||||
* fliplr(h) |
||||
* </pre> |
||||
* The resulting filter coefficients and are shown below. |
||||
* Note that the filter is symmetric (a property of linear phase FIR filters) |
||||
* and the point of symmetry is sample 14. Thus the filter will have a delay of |
||||
* 14 samples for all frequencies. |
||||
* \par |
||||
* \image html FIRLPF_coeffs.gif |
||||
* \par |
||||
* The frequency response of the filter is shown next. |
||||
* The passband gain of the filter is 1.0 and it reaches 0.5 at the cutoff frequency 6 kHz. |
||||
* \par |
||||
* \image html FIRLPF_response.gif |
||||
* \par |
||||
* The input signal is shown below. |
||||
* The left hand side shows the signal in the time domain while the right hand side is a frequency domain representation. |
||||
* The two sine wave components can be clearly seen. |
||||
* \par |
||||
* \image html FIRLPF_input.gif |
||||
* \par |
||||
* The output of the filter is shown below. The 15 kHz component has been eliminated. |
||||
* \par |
||||
* \image html FIRLPF_output.gif |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c testInput_f32_1kHz_15kHz points to the input data |
||||
* \li \c refOutput points to the reference output data |
||||
* \li \c testOutput points to the test output data |
||||
* \li \c firStateF32 points to state buffer |
||||
* \li \c firCoeffs32 points to coefficient buffer |
||||
* \li \c blockSize number of samples processed at a time |
||||
* \li \c numBlocks number of frames |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_fir_init_f32() |
||||
* - arm_fir_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_fir_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_fir_example_f32.c
|
||||
*/ |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Include Files |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
#include "math_helper.h" |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Macro Defines |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
#define TEST_LENGTH_SAMPLES 320 |
||||
#define SNR_THRESHOLD_F32 140.0f |
||||
#define BLOCK_SIZE 32 |
||||
#define NUM_TAPS 29 |
||||
|
||||
/* -------------------------------------------------------------------
|
||||
* The input signal and reference output (computed with MATLAB) |
||||
* are defined externally in arm_fir_lpf_data.c. |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
extern float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES]; |
||||
extern float32_t refOutput[TEST_LENGTH_SAMPLES]; |
||||
|
||||
/* -------------------------------------------------------------------
|
||||
* Declare Test output buffer |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
static float32_t testOutput[TEST_LENGTH_SAMPLES]; |
||||
|
||||
/* -------------------------------------------------------------------
|
||||
* Declare State buffer of size (numTaps + blockSize - 1) |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
static float32_t firStateF32[BLOCK_SIZE + NUM_TAPS - 1]; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** FIR Coefficients buffer generated using fir1() MATLAB function. |
||||
** fir1(28, 6/24) |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
const float32_t firCoeffs32[NUM_TAPS] = { |
||||
-0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f, |
||||
-0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f, |
||||
+0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f, |
||||
+0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f |
||||
}; |
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Global variables for FIR LPF Example |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
uint32_t blockSize = BLOCK_SIZE; |
||||
uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE; |
||||
|
||||
float32_t snr; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* FIR LPF Example |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
int32_t main(void) |
||||
{ |
||||
uint32_t i; |
||||
arm_fir_instance_f32 S; |
||||
arm_status status; |
||||
float32_t *inputF32, *outputF32; |
||||
|
||||
/* Initialize input and output buffer pointers */ |
||||
inputF32 = &testInput_f32_1kHz_15kHz[0]; |
||||
outputF32 = &testOutput[0]; |
||||
|
||||
/* Call FIR init function to initialize the instance structure. */ |
||||
arm_fir_init_f32(&S, NUM_TAPS, (float32_t *)&firCoeffs32[0], &firStateF32[0], blockSize); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the FIR process function for every blockSize samples |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
for(i=0; i < numBlocks; i++) |
||||
{ |
||||
arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize); |
||||
} |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Compare the generated output against the reference output computed |
||||
** in MATLAB. |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES); |
||||
|
||||
if (snr < SNR_THRESHOLD_F32) |
||||
{ |
||||
status = ARM_MATH_TEST_FAILURE; |
||||
} |
||||
else |
||||
{ |
||||
status = ARM_MATH_SUCCESS; |
||||
} |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Loop here if the signal does not match the reference output. |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
if( status != ARM_MATH_SUCCESS) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
@ -0,0 +1,458 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.c |
||||
* |
||||
* Description: Definition of all helper functions required.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include standard header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include<math.h> |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include project header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include "math_helper.h" |
||||
|
||||
/**
|
||||
* @brief Caluclation of SNR |
||||
* @param float* Pointer to the reference buffer |
||||
* @param float* Pointer to the test buffer |
||||
* @param uint32_t total number of samples |
||||
* @return float SNR |
||||
* The function Caluclates signal to noise ratio for the reference output
|
||||
* and test output
|
||||
*/ |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) |
||||
{ |
||||
float EnergySignal = 0.0, EnergyError = 0.0; |
||||
uint32_t i; |
||||
float SNR; |
||||
int temp; |
||||
int *test; |
||||
|
||||
for (i = 0; i < buffSize; i++) |
||||
{ |
||||
/* Checking for a NAN value in pRef array */ |
||||
test = (int *)(&pRef[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
/* Checking for a NAN value in pTest array */ |
||||
test = (int *)(&pTest[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
EnergySignal += pRef[i] * pRef[i]; |
||||
EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
|
||||
} |
||||
|
||||
/* Checking for a NAN value in EnergyError */ |
||||
test = (int *)(&EnergyError); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
|
||||
SNR = 10 * log10 (EnergySignal / EnergyError); |
||||
|
||||
return (SNR); |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q15_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed in q12.20 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point(q12.20) values
|
||||
*/ |
||||
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1048576.0f corresponds to pow(2, 20) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1048576.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 1.0) |
||||
{ |
||||
pOut[i] = 0x000FFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q15_t* Pointer to Ref buffer |
||||
* @param q15_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
}
|
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q31_t* Pointer to Ref buffer |
||||
* @param q31_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
} |
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q31 (q31_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q7 (q7_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Caluclates number of guard bits
|
||||
* @param uint32_t number of additions |
||||
* @return none |
||||
* The function Caluclates the number of guard bits
|
||||
* depending on the numtaps
|
||||
*/ |
||||
|
||||
uint32_t arm_calc_guard_bits (uint32_t num_adds) |
||||
{ |
||||
uint32_t i = 1, j = 0; |
||||
|
||||
if (num_adds == 1) |
||||
{ |
||||
return (0); |
||||
} |
||||
|
||||
while (i < num_adds) |
||||
{ |
||||
i = i * 2; |
||||
j++; |
||||
} |
||||
|
||||
return (j); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts Q15 to floating-point |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
*/ |
||||
|
||||
void arm_apply_guard_bits (float32_t * pIn,
|
||||
uint32_t numSamples,
|
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Calculates pow(2, numShifts) |
||||
* @param uint32_t number of shifts |
||||
* @return pow(2, numShifts) |
||||
*/ |
||||
uint32_t arm_calc_2pow(uint32_t numShifts) |
||||
{ |
||||
|
||||
uint32_t i, val = 1; |
||||
|
||||
for (i = 0; i < numShifts; i++) |
||||
{ |
||||
val = val * 2; |
||||
}
|
||||
|
||||
return(val); |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q14
|
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q14 (float *pIn, q15_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 16384.0f corresponds to pow(2, 14) */ |
||||
pOut[i] = (q15_t) (pIn[i] * 16384.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFF; |
||||
} |
||||
|
||||
} |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q30 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q29 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 536870912.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 4.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q28 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q28 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 268435456.0f corresponds to pow(2, 28) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 268435456.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 8.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clip the float values to +/- 1
|
||||
* @param pIn input buffer |
||||
* @param numSamples number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_clip_f32 (float *pIn, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
if(pIn[i] > 1.0f) |
||||
{ |
||||
pIn[i] = 1.0; |
||||
} |
||||
else if( pIn[i] < -1.0f) |
||||
{ |
||||
pIn[i] = -1.0; |
||||
} |
||||
|
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
|
||||
@ -0,0 +1,63 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.h |
||||
*
|
||||
* Description: Prototypes of all helper functions required.
|
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
|
||||
#include "arm_math.h" |
||||
|
||||
#ifndef MATH_HELPER_H |
||||
#define MATH_HELPER_H |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); |
||||
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_clip_f32(float *pIn, uint32_t numSamples); |
||||
uint32_t arm_calc_guard_bits(uint32_t num_adds); |
||||
void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); |
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); |
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); |
||||
uint32_t arm_calc_2pow(uint32_t guard_bits); |
||||
#endif |
||||
|
||||
@ -0,0 +1,134 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_graphic_equalizer_data.c |
||||
*
|
||||
* Description: Data file used for example code |
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
float32_t testRefOutput_f32[320] = { |
||||
|
||||
0.000000000000000000, 0.001898396760225296, 0.004215449094772339, 0.007432077080011368, 0.010948467999696732, 0.015026375651359558, 0.019191544502973557, 0.023574527353048325,
|
||||
0.027919445186853409, 0.032277785241603851, 0.036551639437675476, 0.040732793509960175, 0.044799156486988068, 0.048710610717535019, 0.052476800978183746, 0.056059073656797409,
|
||||
0.059482168406248093, 0.062726479023694992, 0.065821025520563126, 0.068763464689254761, 0.071577839553356171, 0.074270240962505341, 0.076856281608343124, 0.079344697296619415,
|
||||
0.081745062023401260, 0.084067162126302719, 0.086318407207727432, 0.088509257882833481, 0.090647127479314804, 0.092742368578910828, 0.094802625477313995, 0.096837285906076431,
|
||||
0.098853722214698792, 0.100859899073839190, 0.102862443774938580, 0.104867763817310330, 0.106881409883499150, 0.108908228576183320, 0.110952425748109820, 0.113017357885837550,
|
||||
0.115105822682380680, 0.117219865322113040, 0.119361080229282380, 0.121530555188655850, 0.123729091137647630, 0.125957202166318890, 0.128215309232473370, 0.130503740161657330,
|
||||
0.132822841405868530, 0.135173004120588300, 0.137554679065942760, 0.139968376606702800, 0.142414685338735580, 0.144894234836101530, 0.147407654672861100, 0.149955596774816510,
|
||||
0.152538605034351350, 0.155157200992107390, 0.157811731100082400, 0.160502441227436070, 0.163229387253522870, 0.165992442518472670, 0.168791320174932480, 0.171625509858131410,
|
||||
0.174494370818138120, 0.177397061139345170, 0.180332608520984650, 0.183299910277128220, 0.186297744512557980, 0.189324837177991870, 0.192379791289567950, 0.195461250841617580,
|
||||
0.198567759245634080, 0.201697919517755510, 0.204850304871797560, 0.208023533225059510, 0.211216274648904800, 0.214427210390567780, 0.217655111104249950, 0.220898788422346120,
|
||||
0.224157124757766720, 0.227429077029228210, 0.230713658034801480, 0.234009962528944020, 0.237317133694887160, 0.240634419023990630, 0.243961080908775330, 0.247296508401632310,
|
||||
0.250640105456113820, 0.253991369158029560, 0.257349837571382520, 0.260715119540691380, 0.264086868613958360, 0.267464816570281980, 0.270848698914051060, 0.274238351732492450,
|
||||
0.277633611112833020, 0.281034380197525020, 0.284440591931343080, 0.287852220237255100, 0.291269283741712570, 0.294691801071166990, 0.298119872808456420, 0.301553562283515930,
|
||||
0.304993014782667160, 0.308438356965780260, 0.311889752745628360, 0.315347377210855480, 0.318811416625976560, 0.322282072156667710, 0.325759567320346830, 0.329244095832109450,
|
||||
0.332735907286405560, 0.336235217750072480, 0.339742250740528110, 0.343257248401641850, 0.346780419349670410, 0.350311983376741410, 0.353852160274982450, 0.357401121407747270,
|
||||
0.360959105193614960, 0.364526227116584780, 0.368102725595235820, 0.371688675135374070, 0.375284302979707720, 0.378889638930559160, 0.382504884153604510, 0.386130042374134060,
|
||||
0.389765247702598570, 0.393410529941320420, 0.397065933793783190, 0.400731507688760760, 0.404407206922769550, 0.408093083649873730, 0.411789052188396450, 0.415495119988918300,
|
||||
0.419211201369762420, 0.422937240451574330, 0.426673140376806260, 0.430418811738491060, 0.434174135327339170, 0.437938995659351350, 0.441713258624076840, 0.445496778935194020,
|
||||
0.449289388954639430, 0.453090950846672060, 0.456901267170906070, 0.460720170289278030, 0.464547459036111830, 0.468382950872182850, 0.472226426005363460, 0.476077698171138760,
|
||||
0.479936532676219940, 0.483802750706672670, 0.487676106393337250, 0.491556398570537570, 0.495443399995565410, 0.499336875975131990, 0.503236617892980580, 0.507142387330532070,
|
||||
0.511053957045078280, 0.514971107244491580, 0.518893606960773470, 0.522821225225925450, 0.526753749698400500, 0.530690938234329220, 0.534632585942745210, 0.538578454405069350,
|
||||
0.542528338730335240, 0.546481993049383160, 0.550439231097698210, 0.554399792104959490, 0.558363504707813260, 0.562330115586519240, 0.566299438476562500, 0.570271246135234830,
|
||||
0.574245333671569820, 0.578221492469310760, 0.582199502736330030, 0.586179181933403020, 0.590160276740789410, 0.594142623245716090, 0.598125983029603960, 0.602110169827938080,
|
||||
0.606094967573881150, 0.610080175101757050, 0.614065583795309070, 0.618050977587699890, 0.622036151587963100, 0.626020893454551700, 0.630004994571208950, 0.633988231420516970,
|
||||
0.637970402836799620, 0.641951277852058410, 0.645930647850036620, 0.649908289313316350, 0.653883971273899080, 0.657857488840818410, 0.661828581243753430, 0.665797054767608640,
|
||||
0.669762641191482540, 0.673725124448537830, 0.677684243768453600, 0.681639779359102250, 0.685591462999582290, 0.689539063721895220, 0.693482317030429840, 0.697420965880155560,
|
||||
0.701354760676622390, 0.705283410847187040, 0.709206689149141310, 0.713124278932809830, 0.717035952955484390, 0.720941375941038130, 0.724840316921472550, 0.728732451796531680,
|
||||
0.732617516070604320, 0.736495196819305420, 0.740365199744701390, 0.744227230548858640, 0.748080968856811520, 0.751926124095916750, 0.755762357264757160, 0.759589381515979770,
|
||||
0.763406842947006230, 0.767214450985193250, 0.771011855453252790, 0.774798732250928880, 0.778574761003255840, 0.782339565455913540, 0.786092851310968400, 0.789834223687648770,
|
||||
0.793563373386859890, 0.797279909253120420, 0.800983514636754990, 0.804673787206411360, 0.808350402861833570, 0.812012966722249980, 0.815661124885082240, 0.819294504821300510,
|
||||
0.822912722826004030, 0.826515413820743560, 0.830102190375328060, 0.833672653883695600, 0.837226435542106630, 0.840763118118047710, 0.844282336533069610, 0.847783654928207400,
|
||||
0.851266715675592420, 0.854731071740388870, 0.858176350593566890, 0.861602116376161580, 0.865007970482110980, 0.868393491953611370, 0.871758259832859040, 0.875101849436759950,
|
||||
0.878423850983381270, 0.881723806262016300, 0.885001312941312790, 0.888255912810564040, 0.891487173736095430, 0.894694659858942030, 0.897877920418977740, 0.901036512106657030,
|
||||
0.904169965535402300, 0.907277844846248630, 0.910359673202037810, 0.913415014743804930, 0.916443370282649990, 0.919444311410188670, 0.922417331486940380, 0.925361987203359600,
|
||||
0.928277771919965740, 0.931164238601922990, 0.934020876884460450, 0.936847217381000520, 0.939642757177352910, 0.942407000809907910, 0.945139460265636440, 0.947839632630348210,
|
||||
0.950507018715143200, 0.953141096979379650, 0.955741371959447860, 0.958307322114706040, 0.960838429629802700, 0.963334184139966960, 0.965794049203395840, 0.968217510730028150,
|
||||
0.970604017376899720, 0.972953058779239650, 0.975264083594083790, 0.977536566555500030, 0.979769956320524220, 0.981963708996772770, 0.984117280691862110, 0.986230112612247470,
|
||||
0.988301653414964680, 0.990331344306468960, 0.992318630218505860, 0.994262944906950000, 0.996163722127676010, 0.998020399361848830, 0.999832402914762500, 1.001599155366420700,
|
||||
1.003320086747407900, 1.004994612187147100, 1.006622135639190700, 1.008202098309993700, 1.009733878076076500, 1.011216927319765100, 1.012650609016418500, 1.014034371823072400,
|
||||
1.015367589890956900, 1.016649682074785200, 1.017880033701658200, 1.019058048725128200, 1.020183108747005500, 1.021254621446132700, 1.022271949797868700, 1.023234523832798000,
|
||||
|
||||
}; |
||||
/* ----------------------------------------------------------------------
|
||||
** Test input - logarithmic chirp signal |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
float32_t testInput_f32[320] = |
||||
{ |
||||
0.000000000000000061, 0.002622410992047861, 0.005253663973466970, 0.007893770384930297, 0.010542741395035495, 0.013200587895525877, 0.015867320496454066, 0.018542949521290073,
|
||||
0.021227485001971542, 0.023920936673895138, 0.026623313970853074, 0.029334626019908643, 0.032054881636210709, 0.034784089317753723, 0.037522257240071598, 0.040269393250875855,
|
||||
0.043025504864628375, 0.045790599257054837, 0.048564683259595690, 0.051347763353792118, 0.054139845665610427, 0.056940935959702531, 0.059751039633601337, 0.062570161711849828,
|
||||
0.065398306840066575, 0.068235479278943648, 0.071081682898178900, 0.073936921170339814, 0.076801197164660218, 0.079674513540768196, 0.082556872542344922, 0.085448275990715375,
|
||||
0.088348725278367082, 0.091258221362398390, 0.094176764757897533, 0.097104355531246703, 0.100040993293358240, 0.102986677192832010, 0.105941405909045980, 0.108905177645166230,
|
||||
0.111877990121087980, 0.114859840566297130, 0.117850725712659680, 0.120850641787131110, 0.123859584504392860, 0.126877549059407400, 0.129904530119898690, 0.132940521818751430,
|
||||
0.135985517746334080, 0.139039510942737950, 0.142102493889940090, 0.145174458503884160, 0.148255396126476810, 0.151345297517508140, 0.154444152846483080, 0.157551951684374300,
|
||||
0.160668682995289720, 0.163794335128054890, 0.166928895807713030, 0.170072352126936720, 0.173224690537355760, 0.176385896840798810, 0.179555956180445340, 0.182734853031894270,
|
||||
0.185922571194139130, 0.189119093780459800, 0.192324403209221870, 0.195538481194587030, 0.198761308737133020, 0.201992866114384050, 0.205233132871247170, 0.208482087810360570,
|
||||
0.211739708982344370, 0.215005973675965020, 0.218280858408200220, 0.221564338914212730, 0.224856390137231970, 0.228156986218334190, 0.231466100486134670, 0.234783705446379690,
|
||||
0.238109772771442410, 0.241444273289723230, 0.244787176974952890, 0.248138452935395580, 0.251498069402956710, 0.254865993722190930, 0.258242192339209860, 0.261626630790492030,
|
||||
0.265019273691591620, 0.268420084725748410, 0.271829026632395280, 0.275246061195565440, 0.278671149232197430, 0.282104250580339830, 0.285545324087251580, 0.288994327597401960,
|
||||
0.292451217940364990, 0.295915950918612280, 0.299388481295203350, 0.302868762781368150, 0.306356748023990040, 0.309852388592980640, 0.313355634968552230, 0.316866436528383590,
|
||||
0.320384741534681720, 0.323910497121136620, 0.327443649279772870, 0.330984142847692230, 0.334531921493712690, 0.338086927704900790, 0.341649102772995210, 0.345218386780727190,
|
||||
0.348794718588032520, 0.352378035818156910, 0.355968274843654950, 0.359565370772282730, 0.363169257432780890, 0.366779867360555120, 0.370397131783246010, 0.374020980606193880,
|
||||
0.377651342397795690, 0.381288144374756830, 0.384931312387234990, 0.388580770903877330, 0.392236442996751310, 0.395898250326170650, 0.399566113125414350, 0.403239950185338420,
|
||||
0.406919678838884410, 0.410605214945482130, 0.414296472875345100, 0.417993365493664670, 0.421695804144698540, 0.425403698635752780, 0.429116957221065130, 0.432835486585582130,
|
||||
0.436559191828633180, 0.440287976447505720, 0.444021742320914510, 0.447760389692375140, 0.451503817153472210, 0.455251921627031540, 0.459004598350192470, 0.462761740857380200,
|
||||
0.466523240963184150, 0.470288988745136360, 0.474058872526396560, 0.477832778858340690, 0.481610592503056990, 0.485392196415748600, 0.489177471727042850, 0.492966297725213780,
|
||||
0.496758551838309250, 0.500554109616195060, 0.504352844712508190, 0.508154628866524960, 0.511959331884944910, 0.515766821623591440, 0.519576963969030530, 0.523389622820107150,
|
||||
0.527204660069405030, 0.531021935584629400, 0.534841307189911630, 0.538662630647041900, 0.542485759636628150, 0.546310545739186690, 0.550136838416161340, 0.553964484990880020,
|
||||
0.557793330629441700, 0.561623218321546380, 0.565453988861259300, 0.569285480827721570, 0.573117530565801950, 0.576949972166696630, 0.580782637448476910, 0.584615355936589420,
|
||||
0.588447954844309340, 0.592280259053150400, 0.596112091093235260, 0.599943271123626440, 0.603773616912622660, 0.607602943818024150, 0.611431064767369080, 0.615257790238142090,
|
||||
0.619082928237961740, 0.622906284284749700, 0.626727661386881850, 0.630546860023327600, 0.634363678123782030, 0.638177911048790960, 0.641989351569874020, 0.645797789849653410,
|
||||
0.649603013421986450, 0.653404807172108140, 0.657202953316791350, 0.660997231384523490, 0.664787418195706640, 0.668573287842887610, 0.672354611671016960, 0.676131158257749170,
|
||||
0.679902693393781730, 0.683668980063242500, 0.687429778424128110, 0.691184845788802130, 0.694933936604551380, 0.698676802434213370, 0.702413191936877570, 0.706142850848662460,
|
||||
0.709865521963579990, 0.713580945114492330, 0.717288857154159800, 0.720988991936399870, 0.724681080297347790, 0.728364850036839040, 0.732040025899910680, 0.735706329558433620,
|
||||
0.739363479592880620, 0.743011191474238440, 0.746649177546067850, 0.750277147006723990, 0.753894805891742180, 0.757501857056394940, 0.761098000158428880, 0.764682931640995540,
|
||||
0.768256344715771980, 0.771817929346292900, 0.775367372231492210, 0.778904356789468790, 0.782428563141483460, 0.785939668096195860, 0.789437345134148760, 0.792921264392515420,
|
||||
0.796391092650110770, 0.799846493312681210, 0.803287126398485760, 0.806712648524170680, 0.810122712890953390, 0.813516969271127150, 0.816895063994893090, 0.820256639937531280,
|
||||
0.823601336506926020, 0.826928789631450890, 0.830238631748229430, 0.833530491791779850, 0.836803995183058700, 0.840058763818912760, 0.843294416061954100, 0.846510566730867220,
|
||||
0.849706827091166740, 0.852882804846411770, 0.856038104129895340, 0.859172325496819990, 0.862285065916973510, 0.865375918767918860, 0.868444473828712590, 0.871490317274166260,
|
||||
0.874513031669661770, 0.877512195966544280, 0.880487385498096800, 0.883438171976119850, 0.886364123488128100, 0.889264804495180530, 0.892139775830360640, 0.894988594697921020,
|
||||
0.897810814673113080, 0.900605985702712770, 0.903373654106265470, 0.906113362578062300, 0.908824650189867690, 0.911507052394417540, 0.914160101029702910, 0.916783324324059180,
|
||||
0.919376246902079860, 0.921938389791372770, 0.924469270430179120, 0.926968402675872660, 0.929435296814361430, 0.931869459570409790, 0.934270394118903560, 0.936637600097074200,
|
||||
0.938970573617708970, 0.941268807283364040, 0.943531790201601380, 0.945759008001275100, 0.947949942849885320, 0.950104073472023970, 0.952220875168933280, 0.954299819839202090,
|
||||
0.956340376000621160, 0.958342008813221960, 0.960304180103520260, 0.962226348389994210, 0.964107968909812760, 0.965948493646846980, 0.967747371360983650, 0.969504047618768740,
|
||||
0.971217964825405680, 0.972888562258134030, 0.974515276101013520, 0.976097539481141750, 0.977634782506330400, 0.979126432304266880, 0.980571913063189360, 0.981970646074102120,
|
||||
0.983322049774557390, 0.984625539794035220, 0.985880529000944810, 0.987086427551279730, 0.988242642938953360, 0.989348580047844540, 0.990403641205582440, 0.991407226239099710,
|
||||
0.992358732531984260, 0.993257555083659870, 0.994103086570423680, 0.994894717408374870, 0.995631835818261310, 0.996313827892278070, 0.996940077662846650, 0.997509967173408010,
|
||||
|
||||
}; |
||||
@ -0,0 +1,411 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_graphic_equalizer_example_q31.c |
||||
* |
||||
* Description: Example showing an audio graphic equalizer constructed |
||||
* out of Biquad filters. |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup GEQ5Band Graphic Audio Equalizer Example |
||||
* |
||||
* \par Description: |
||||
* \par |
||||
* This example demonstrates how a 5-band graphic equalizer can be constructed |
||||
* using the Biquad cascade functions. |
||||
* A graphic equalizer is used in audio applications to vary the tonal quality |
||||
* of the audio. |
||||
* |
||||
* \par Block Diagram: |
||||
* \par |
||||
* The design is based on a cascade of 5 filter sections. |
||||
* \image html GEQ_signalflow.gif |
||||
* Each filter section is 4th order and consists of a cascade of two Biquads. |
||||
* Each filter has a nominal gain of 0 dB (1.0 in linear units) and |
||||
* boosts or cuts signals within a specific frequency range. |
||||
* The edge frequencies between the 5 bands are 100, 500, 2000, and 6000 Hz. |
||||
* Each band has an adjustable boost or cut in the range of +/- 9 dB. |
||||
* For example, the band that extends from 500 to 2000 Hz has the response shown below: |
||||
* \par |
||||
* \image html GEQ_bandresponse.gif |
||||
* \par |
||||
* With 1 dB steps, each filter has a total of 19 different settings. |
||||
* The filter coefficients for all possible 19 settings were precomputed |
||||
* in MATLAB and stored in a table. With 5 different tables, there are |
||||
* a total of 5 x 19 = 95 different 4th order filters. |
||||
* All 95 responses are shown below: |
||||
* \par |
||||
* \image html GEQ_allbandresponse.gif |
||||
* \par |
||||
* Each 4th order filter has 10 coefficents for a grand total of 950 different filter |
||||
* coefficients that must be tabulated. The input and output data is in Q31 format. |
||||
* For better noise performance, the two low frequency bands are implemented using the high |
||||
* precision 32x64-bit Biquad filters. The remaining 3 high frequency bands use standard |
||||
* 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp. |
||||
* \par |
||||
* \image html GEQ_inputchirp.gif |
||||
* \par |
||||
* The array <code>bandGains</code> specifies the gain in dB to apply in each band. |
||||
* For example, if <code>bandGains={0, -3, 6, 4, -6};</code> then the output signal will be: |
||||
* \par |
||||
* \image html GEQ_outputchirp.gif |
||||
* \par |
||||
* \note The output chirp signal follows the gain or boost of each band. |
||||
* \par |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c testInput_f32 points to the input data |
||||
* \li \c testRefOutput_f32 points to the reference output data |
||||
* \li \c testOutput points to the test output data |
||||
* \li \c inputQ31 temporary input buffer |
||||
* \li \c outputQ31 temporary output buffer |
||||
* \li \c biquadStateBand1Q31 points to state buffer for band1 |
||||
* \li \c biquadStateBand2Q31 points to state buffer for band2 |
||||
* \li \c biquadStateBand3Q31 points to state buffer for band3 |
||||
* \li \c biquadStateBand4Q31 points to state buffer for band4 |
||||
* \li \c biquadStateBand5Q31 points to state buffer for band5 |
||||
* \li \c coeffTable points to coefficient buffer for all bands |
||||
* \li \c gainDB gain buffer which has gains applied for all the bands |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_biquad_cas_df1_32x64_init_q31() |
||||
* - arm_biquad_cas_df1_32x64_q31() |
||||
* - arm_biquad_cascade_df1_init_q31() |
||||
* - arm_biquad_cascade_df1_q31() |
||||
* - arm_scale_q31() |
||||
* - arm_scale_f32() |
||||
* - arm_float_to_q31() |
||||
* - arm_q31_to_float() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_graphic_equalizer_example_q31.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_graphic_equalizer_example_q31.c
|
||||
*/ |
||||
|
||||
|
||||
#include "arm_math.h" |
||||
#include "math_helper.h" |
||||
|
||||
/* Length of the overall data in the test */ |
||||
#define TESTLENGTH 320 |
||||
|
||||
/* Block size for the underlying processing */ |
||||
#define BLOCKSIZE 32 |
||||
|
||||
/* Total number of blocks to run */ |
||||
#define NUMBLOCKS (TESTLENGTH/BLOCKSIZE) |
||||
|
||||
/* Number of 2nd order Biquad stages per filter */ |
||||
#define NUMSTAGES 2 |
||||
|
||||
#define SNR_THRESHOLD_F32 98 |
||||
|
||||
/* -------------------------------------------------------------------
|
||||
* External Declarations for Input and Output buffers |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
extern float32_t testInput_f32[TESTLENGTH]; |
||||
static float32_t testOutput[TESTLENGTH]; |
||||
|
||||
extern float32_t testRefOutput_f32[TESTLENGTH]; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Q31 state buffers for Band1, Band2, Band3, Band4, Band5 |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
static q63_t biquadStateBand1Q31[4 * 2]; |
||||
static q63_t biquadStateBand2Q31[4 * 2]; |
||||
static q31_t biquadStateBand3Q31[4 * 2]; |
||||
static q31_t biquadStateBand4Q31[4 * 2]; |
||||
static q31_t biquadStateBand5Q31[4 * 2]; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Q31 input and output buffers |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
q31_t inputQ31[BLOCKSIZE]; |
||||
q31_t outputQ31[BLOCKSIZE]; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Entire coefficient table. There are 10 coefficients per 4th order Biquad |
||||
** cascade filter. The first 10 coefficients correspond to the -9 dB gain |
||||
** setting of band 1; the next 10 coefficient correspond to the -8 dB gain |
||||
** setting of band 1; and so on. There are 10*19=190 coefficients in total |
||||
** for band 1 (gains = -9, -8, -7, ..., 9). After this come the 190 coefficients |
||||
** for band 2. |
||||
** |
||||
** The coefficients are in Q29 format and require a postShift of 2. |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
const q31_t coeffTable[950] = { |
||||
|
||||
/* Band 1, -9 dB gain */ |
||||
535576962, -1071153923, 535576962, 1073741824, -536870912, 535576962, -1063501998, 527979313, 1060865294, -524146981, |
||||
/* Band 1, -8 dB gain */ |
||||
535723226, -1071446451, 535723226, 1073741824, -536870912, 535723226, -1063568947, 527903217, 1061230578, -524503778, |
||||
535868593, -1071737186, 535868593, 1073741824, -536870912, 535868593, -1063627467, 527819780, 1061585502, -524850686, |
||||
536013181, -1072026363, 536013181, 1073741824, -536870912, 536013181, -1063677598, 527728935, 1061930361, -525187972, |
||||
536157109, -1072314217, 536157109, 1073741824, -536870912, 536157109, -1063719372, 527630607, 1062265438, -525515897, |
||||
536300492, -1072600983, 536300492, 1073741824, -536870912, 536300492, -1063752815, 527524720, 1062591011, -525834716, |
||||
536443447, -1072886894, 536443447, 1073741824, -536870912, 536443447, -1063777945, 527411186, 1062907350, -526144676, |
||||
536586091, -1073172183, 536586091, 1073741824, -536870912, 536586091, -1063794775, 527289917, 1063214717, -526446017, |
||||
536728541, -1073457082, 536728541, 1073741824, -536870912, 536728541, -1063803308, 527160815, 1063513366, -526738975, |
||||
536870912, -1073741824, 536870912, 1073741824, -536870912, 536870912, -1063803543, 527023777, 1063803543, -527023777, |
||||
537013321, -1074026642, 537013321, 1073741824, -536870912, 537013321, -1063795470, 526878696, 1064085490, -527300648, |
||||
537155884, -1074311768, 537155884, 1073741824, -536870912, 537155884, -1063779073, 526725455, 1064359439, -527569803, |
||||
537298718, -1074597435, 537298718, 1073741824, -536870912, 537298718, -1063754328, 526563934, 1064625617, -527831454, |
||||
537441939, -1074883878, 537441939, 1073741824, -536870912, 537441939, -1063721205, 526394005, 1064884245, -528085806, |
||||
537585666, -1075171331, 537585666, 1073741824, -536870912, 537585666, -1063679666, 526215534, 1065135536, -528333059, |
||||
537730015, -1075460030, 537730015, 1073741824, -536870912, 537730015, -1063629666, 526028380, 1065379699, -528573409, |
||||
537875106, -1075750212, 537875106, 1073741824, -536870912, 537875106, -1063571152, 525832396, 1065616936, -528807045, |
||||
538021057, -1076042114, 538021057, 1073741824, -536870912, 538021057, -1063504065, 525627429, 1065847444, -529034151, |
||||
538167989, -1076335977, 538167989, 1073741824, -536870912, 538167989, -1063428338, 525413317, 1066071412, -529254907, |
||||
|
||||
/* Band 2, -9 dB gain */ |
||||
531784976, -1055497692, 523873415, 1066213307, -529420241, 531784976, -1040357886, 509828014, 1028908252, -494627367, |
||||
/* Band 2, -8 dB gain */ |
||||
532357636, -1056601982, 524400080, 1066115844, -529326645, 532357636, -1040623406, 509562600, 1030462237, -496062122, |
||||
532927392, -1057707729, 524931110, 1066024274, -529239070, 532927392, -1040848253, 509262081, 1031969246, -497457090, |
||||
533494678, -1058816094, 525467240, 1065939047, -529157961, 533494678, -1041032161, 508925950, 1033429976, -498812573, |
||||
534059929, -1059928204, 526009170, 1065860582, -529083734, 534059929, -1041174868, 508553717, 1034845124, -500128887, |
||||
534623580, -1061045148, 526557561, 1065789260, -529016764, 534623580, -1041276126, 508144920, 1036215393, -501406373, |
||||
535186068, -1062167969, 527113032, 1065725420, -528957385, 535186068, -1041335703, 507699125, 1037541500, -502645399, |
||||
535747827, -1063297666, 527676151, 1065669351, -528905879, 535747827, -1041353386, 507215934, 1038824183, -503846368, |
||||
536309295, -1064435183, 528247436, 1065621289, -528862476, 536309295, -1041328990, 506694984, 1040064203, -505009724, |
||||
536870912, -1065581413, 528827349, 1065581413, -528827349, 536870912, -1041262354, 506135953, 1041262354, -506135953, |
||||
537433117, -1066737194, 529416295, 1065549847, -528800610, 537433117, -1041153346, 505538564, 1042419457, -507225588, |
||||
537996352, -1067903307, 530014622, 1065526651, -528782316, 537996352, -1041001864, 504902578, 1043536370, -508279208, |
||||
538561061, -1069080480, 530622620, 1065511830, -528772462, 538561061, -1040807833, 504227800, 1044613981, -509297437, |
||||
539127690, -1070269387, 531240527, 1065505333, -528770987, 539127690, -1040571205, 503514074, 1045653211, -510280946, |
||||
539696690, -1071470656, 531868525, 1065507054, -528777778, 539696690, -1040291951, 502761277, 1046655011, -511230450, |
||||
540268512, -1072684867, 532506750, 1065516837, -528792672, 540268512, -1039970063, 501969320, 1047620358, -512146700, |
||||
540843613, -1073912567, 533155297, 1065534483, -528815459, 540843613, -1039605542, 501138139, 1048550251, -513030484, |
||||
541422451, -1075154268, 533814224, 1065559750, -528845892, 541422451, -1039198394, 500267687, 1049445708, -513882621, |
||||
542005489, -1076410460, 534483561, 1065592362, -528883686, 542005489, -1038748624, 499357932, 1050307760, -514703956, |
||||
518903861, -1001986830, 486725277, 1037235801, -502367695, 518903861, -945834422, 446371043, 902366163, -400700571, |
||||
520899989, -1005630916, 488289126, 1036926846, -502147311, 520899989, -946490935, 445581846, 907921945, -404936158, |
||||
522893209, -1009290002, 489869792, 1036650484, -501961419, 522893209, -947006359, 444685310, 913306106, -409075225, |
||||
524884763, -1012968199, 491470256, 1036407567, -501810737, 524884763, -947377809, 443679533, 918521018, -413116221, |
||||
526875910, -1016669649, 493093518, 1036198712, -501695739, 526875910, -947602324, 442562672, 923569247, -417057897, |
||||
528867927, -1020398503, 494742575, 1036024293, -501616651, 528867927, -947676875, 441332970, 928453558, -420899319, |
||||
530862111, -1024158905, 496420407, 1035884447, -501573457, 530862111, -947598385, 439988777, 933176909, -424639872, |
||||
532859778, -1027954970, 498129955, 1035779077, -501565907, 532859778, -947363742, 438528571, 937742446, -428279254, |
||||
534862260, -1031790763, 499874098, 1035707863, -501593525, 534862260, -946969823, 436950987, 942153486, -431817474, |
||||
536870912, -1035670279, 501655630, 1035670279, -501655630, 536870912, -946413508, 435254839, 946413508, -435254839, |
||||
538887107, -1039597419, 503477238, 1035665609, -501751354, 538887107, -945691703, 433439146, 950526127, -438591937, |
||||
540912240, -1043575967, 505341475, 1035692963, -501879659, 540912240, -944801359, 431503152, 954495080, -441829621, |
||||
542947726, -1047609569, 507250741, 1035751307, -502039364, 542947726, -943739490, 429446349, 958324201, -444968987, |
||||
544995000, -1051701717, 509207261, 1035839473, -502229165, 544995000, -942503190, 427268492, 962017400, -448011351, |
||||
547055523, -1055855728, 511213065, 1035956193, -502447657, 547055523, -941089647, 424969617, 965578640, -450958226, |
||||
549130774, -1060074734, 513269973, 1036100110, -502693359, 549130774, -939496155, 422550049, 969011913, -453811298, |
||||
551222259, -1064361672, 515379585, 1036269804, -502964731, 551222259, -937720119, 420010407, 972321228, -456572401, |
||||
553331507, -1068719280, 517543273, 1036463810, -503260192, 553331507, -935759057, 417351601, 975510582, -459243495, |
||||
555460072, -1073150100, 519762181, 1036680633, -503578144, 555460072, -933610600, 414574832, 978583948, -461826644, |
||||
494084017, -851422604, 404056273, 930151631, -423619864, 494084017, -673714108, 339502486, 561843007, -265801750, |
||||
498713542, -859177141, 406587077, 929211656, -423786402, 498713542, -673274906, 338185129, 573719128, -272222942, |
||||
503369016, -867012190, 409148384, 928362985, -424054784, 503369016, -672533059, 336693984, 585290277, -278599028, |
||||
508052536, -874935599, 411746438, 927604291, -424422151, 508052536, -671478538, 335026905, 596558312, -284920289, |
||||
512766286, -882955583, 414387826, 926933782, -424885216, 512766286, -670100998, 333182045, 607525792, -291177811, |
||||
517512534, -891080712, 417079474, 926349262, -425440318, 517512534, -668389789, 331157902, 618195914, -297363485, |
||||
522293635, -899319903, 419828635, 925848177, -426083491, 522293635, -666333963, 328953368, 628572440, -303470012, |
||||
527112032, -907682405, 422642886, 925427679, -426810526, 527112032, -663922286, 326567785, 638659631, -309490882, |
||||
531970251, -916177781, 425530105, 925084675, -427617023, 531970251, -661143261, 324000998, 648462180, -315420352, |
||||
536870912, -924815881, 428498454, 924815881, -428498454, 536870912, -657985147, 321253420, 657985147, -321253420, |
||||
541816719, -933606817, 431556352, 924617870, -429450209, 541816719, -654435997, 318326093, 667233900, -326985786, |
||||
546810467, -942560921, 434712438, 924487114, -430467639, 546810467, -650483688, 315220754, 676214053, -332613816, |
||||
551855042, -951688708, 437975532, 924420027, -431546101, 551855042, -646115970, 311939896, 684931422, -338134495, |
||||
556953421, -961000826, 441354588, 924413001, -432680993, 556953421, -641320513, 308486839, 693391970, -343545389, |
||||
562108672, -970508005, 444858642, 924462435, -433867780, 562108672, -636084967, 304865786, 701601770, -348844597, |
||||
567323959, -980220994, 448496743, 924564764, -435102022, 567323959, -630397020, 301081886, 709566963, -354030710, |
||||
572602539, -990150500, 452277894, 924716482, -436379394, 572602539, -624244471, 297141281, 717293726, -359102767, |
||||
577947763, -1000307125, 456210977, 924914158, -437695705, 577947763, -617615296, 293051155, 724788245, -364060214, |
||||
583363084, -1010701292, 460304674, 925154455, -439046908, 583363084, -610497723, 288819761, 732056685, -368902865, |
||||
387379495, -506912469, 196933274, 840112184, -347208270, 387379495, 506912469, 196933274, -840112184, -347208270, |
||||
401658082, -532275898, 207149427, 833765363, -343175316, 401658082, 532275898, 207149427, -833765363, -343175316, |
||||
416472483, -558722695, 217902617, 827270154, -339107319, 416472483, 558722695, 217902617, -827270154, -339107319, |
||||
431841949, -586290861, 229212798, 820624988, -335007540, 431841949, 586290861, 229212798, -820624988, -335007540, |
||||
447786335, -615019650, 241100489, 813828443, -330879528, 447786335, 615019650, 241100489, -813828443, -330879528, |
||||
464326111, -644949597, 253586805, 806879270, -326727141, 464326111, 644949597, 253586805, -806879270, -326727141, |
||||
481482377, -676122557, 266693475, 799776409, -322554559, 481482377, 676122557, 266693475, -799776409, -322554559, |
||||
499276882, -708581728, 280442865, 792519013, -318366296, 499276882, 708581728, 280442865, -792519013, -318366296, |
||||
517732032, -742371685, 294857996, 785106465, -314167221, 517732032, 742371685, 294857996, -785106465, -314167221, |
||||
536870912, -777538408, 309962566, 777538408, -309962566, 536870912, 777538408, 309962566, -777538408, -309962566, |
||||
556717294, -814129313, 325780968, 769814766, -305757943, 556717294, 814129313, 325780968, -769814766, -305757943, |
||||
577295658, -852193284, 342338310, 761935777, -301559360, 577295658, 852193284, 342338310, -761935777, -301559360, |
||||
598631206, -891780698, 359660433, 753902014, -297373230, 598631206, 891780698, 359660433, -753902014, -297373230, |
||||
620749877, -932943463, 377773927, 745714425, -293206383, 620749877, 932943463, 377773927, -745714425, -293206383, |
||||
643678365, -975735041, 396706151, 737374355, -289066077, 643678365, 975735041, 396706151, -737374355, -289066077, |
||||
667444134, -1020210487, 416485252, 728883588, -284960004, 667444134, 1020210487, 416485252, -728883588, -284960004, |
||||
692075438, -1066426476, 437140179, 720244375, -280896294, 692075438, 1066426476, 437140179, -720244375, -280896294, |
||||
717601336, -1114441339, 458700704, 711459472, -276883515, 717601336, 1114441339, 458700704, -711459472, -276883515, |
||||
744051710, -1164315096, 481197437, 702532174, -272930673, 744051710, 1164315096, 481197437, -702532174, -272930673 |
||||
|
||||
}; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Desired gains, in dB, per band |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
int gainDB[5] = {0, -3, 6, 4, -6}; |
||||
|
||||
float32_t snr; |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Graphic equalizer Example |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
int32_t main(void) |
||||
{ |
||||
float32_t *inputF32, *outputF32; |
||||
arm_biquad_cas_df1_32x64_ins_q31 S1; |
||||
arm_biquad_cas_df1_32x64_ins_q31 S2; |
||||
arm_biquad_casd_df1_inst_q31 S3; |
||||
arm_biquad_casd_df1_inst_q31 S4; |
||||
arm_biquad_casd_df1_inst_q31 S5; |
||||
int i; |
||||
int32_t status; |
||||
|
||||
inputF32 = &testInput_f32[0]; |
||||
outputF32 = &testOutput[0]; |
||||
|
||||
/* Initialize the state and coefficient buffers for all Biquad sections */ |
||||
|
||||
arm_biquad_cas_df1_32x64_init_q31(&S1, NUMSTAGES, |
||||
(q31_t *) &coeffTable[190*0 + 10*(gainDB[0] + 9)], |
||||
&biquadStateBand1Q31[0], 2); |
||||
|
||||
arm_biquad_cas_df1_32x64_init_q31(&S2, NUMSTAGES, |
||||
(q31_t *) &coeffTable[190*1 + 10*(gainDB[1] + 9)], |
||||
&biquadStateBand2Q31[0], 2); |
||||
|
||||
arm_biquad_cascade_df1_init_q31(&S3, NUMSTAGES, |
||||
(q31_t *) &coeffTable[190*2 + 10*(gainDB[2] + 9)], |
||||
&biquadStateBand3Q31[0], 2); |
||||
|
||||
arm_biquad_cascade_df1_init_q31(&S4, NUMSTAGES, |
||||
(q31_t *) &coeffTable[190*3 + 10*(gainDB[3] + 9)], |
||||
&biquadStateBand4Q31[0], 2); |
||||
|
||||
arm_biquad_cascade_df1_init_q31(&S5, NUMSTAGES, |
||||
(q31_t *) &coeffTable[190*4 + 10*(gainDB[4] + 9)], |
||||
&biquadStateBand5Q31[0], 2); |
||||
|
||||
|
||||
/* Call the process functions and needs to change filter coefficients
|
||||
for varying the gain of each band */ |
||||
|
||||
for(i=0; i < NUMBLOCKS; i++) |
||||
{ |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Convert block of input data from float to Q31 |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
arm_float_to_q31(inputF32 + (i*BLOCKSIZE), inputQ31, BLOCKSIZE); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Scale down by 1/8. This provides additional headroom so that the |
||||
** graphic EQ can apply gain. |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
arm_scale_q31(inputQ31, 0x7FFFFFFF, -3, inputQ31, BLOCKSIZE); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the Q31 Biquad Cascade DF1 32x64 process function for band1, band2 |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
arm_biquad_cas_df1_32x64_q31(&S1, inputQ31, outputQ31, BLOCKSIZE); |
||||
arm_biquad_cas_df1_32x64_q31(&S2, outputQ31, outputQ31, BLOCKSIZE); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the Q31 Biquad Cascade DF1 process function for band3, band4, band5 |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
arm_biquad_cascade_df1_q31(&S3, outputQ31, outputQ31, BLOCKSIZE); |
||||
arm_biquad_cascade_df1_q31(&S4, outputQ31, outputQ31, BLOCKSIZE); |
||||
arm_biquad_cascade_df1_q31(&S5, outputQ31, outputQ31, BLOCKSIZE); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Convert Q31 result back to float |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
arm_q31_to_float(outputQ31, outputF32 + (i * BLOCKSIZE), BLOCKSIZE); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Scale back up |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
arm_scale_f32(outputF32 + (i * BLOCKSIZE), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE); |
||||
}; |
||||
|
||||
snr = arm_snr_f32(testRefOutput_f32, testOutput, TESTLENGTH); |
||||
|
||||
if (snr < SNR_THRESHOLD_F32) |
||||
{ |
||||
status = ARM_MATH_TEST_FAILURE; |
||||
} |
||||
else |
||||
{ |
||||
status = ARM_MATH_SUCCESS; |
||||
} |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Loop here if the signal does not match the reference output. |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
if( status != ARM_MATH_SUCCESS) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
|
||||
|
||||
|
||||
@ -0,0 +1,458 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.c |
||||
* |
||||
* Description: Definition of all helper functions required.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include standard header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include<math.h> |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include project header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include "math_helper.h" |
||||
|
||||
/**
|
||||
* @brief Caluclation of SNR |
||||
* @param float* Pointer to the reference buffer |
||||
* @param float* Pointer to the test buffer |
||||
* @param uint32_t total number of samples |
||||
* @return float SNR |
||||
* The function Caluclates signal to noise ratio for the reference output
|
||||
* and test output
|
||||
*/ |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) |
||||
{ |
||||
float EnergySignal = 0.0, EnergyError = 0.0; |
||||
uint32_t i; |
||||
float SNR; |
||||
int temp; |
||||
int *test; |
||||
|
||||
for (i = 0; i < buffSize; i++) |
||||
{ |
||||
/* Checking for a NAN value in pRef array */ |
||||
test = (int *)(&pRef[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
/* Checking for a NAN value in pTest array */ |
||||
test = (int *)(&pTest[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
EnergySignal += pRef[i] * pRef[i]; |
||||
EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
|
||||
} |
||||
|
||||
/* Checking for a NAN value in EnergyError */ |
||||
test = (int *)(&EnergyError); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
|
||||
SNR = 10 * log10 (EnergySignal / EnergyError); |
||||
|
||||
return (SNR); |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q15_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed in q12.20 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point(q12.20) values
|
||||
*/ |
||||
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1048576.0f corresponds to pow(2, 20) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1048576.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 1.0) |
||||
{ |
||||
pOut[i] = 0x000FFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q15_t* Pointer to Ref buffer |
||||
* @param q15_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
}
|
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q31_t* Pointer to Ref buffer |
||||
* @param q31_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
} |
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q31 (q31_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q7 (q7_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Caluclates number of guard bits
|
||||
* @param uint32_t number of additions |
||||
* @return none |
||||
* The function Caluclates the number of guard bits
|
||||
* depending on the numtaps
|
||||
*/ |
||||
|
||||
uint32_t arm_calc_guard_bits (uint32_t num_adds) |
||||
{ |
||||
uint32_t i = 1, j = 0; |
||||
|
||||
if (num_adds == 1) |
||||
{ |
||||
return (0); |
||||
} |
||||
|
||||
while (i < num_adds) |
||||
{ |
||||
i = i * 2; |
||||
j++; |
||||
} |
||||
|
||||
return (j); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts Q15 to floating-point |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
*/ |
||||
|
||||
void arm_apply_guard_bits (float32_t * pIn,
|
||||
uint32_t numSamples,
|
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Calculates pow(2, numShifts) |
||||
* @param uint32_t number of shifts |
||||
* @return pow(2, numShifts) |
||||
*/ |
||||
uint32_t arm_calc_2pow(uint32_t numShifts) |
||||
{ |
||||
|
||||
uint32_t i, val = 1; |
||||
|
||||
for (i = 0; i < numShifts; i++) |
||||
{ |
||||
val = val * 2; |
||||
}
|
||||
|
||||
return(val); |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q14
|
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q14 (float *pIn, q15_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 16384.0f corresponds to pow(2, 14) */ |
||||
pOut[i] = (q15_t) (pIn[i] * 16384.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFF; |
||||
} |
||||
|
||||
} |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q30 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q29 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 536870912.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 4.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q28 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q28 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 268435456.0f corresponds to pow(2, 28) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 268435456.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 8.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clip the float values to +/- 1
|
||||
* @param pIn input buffer |
||||
* @param numSamples number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_clip_f32 (float *pIn, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
if(pIn[i] > 1.0f) |
||||
{ |
||||
pIn[i] = 1.0; |
||||
} |
||||
else if( pIn[i] < -1.0f) |
||||
{ |
||||
pIn[i] = -1.0; |
||||
} |
||||
|
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
|
||||
@ -0,0 +1,63 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.h |
||||
*
|
||||
* Description: Prototypes of all helper functions required.
|
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
|
||||
#include "arm_math.h" |
||||
|
||||
#ifndef MATH_HELPER_H |
||||
#define MATH_HELPER_H |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); |
||||
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_clip_f32(float *pIn, uint32_t numSamples); |
||||
uint32_t arm_calc_guard_bits(uint32_t num_adds); |
||||
void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); |
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); |
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); |
||||
uint32_t arm_calc_2pow(uint32_t guard_bits); |
||||
#endif |
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,204 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_linear_interp_example_f32.c |
||||
* |
||||
* Description: Example code demonstrating usage of sin function |
||||
* and uses linear interpolation to get higher precision |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup LinearInterpExample Linear Interpolate Example |
||||
* |
||||
* <b> CMSIS DSP Software Library -- Linear Interpolate Example </b> |
||||
* |
||||
* <b> Description </b> |
||||
* This example demonstrates usage of linear interpolate modules and fast math modules. |
||||
* Method 1 uses fast math sine function to calculate sine values using cubic interpolation and method 2 uses |
||||
* linear interpolation function and results are compared to reference output. |
||||
* Example shows linear interpolation function can be used to get higher precision compared to fast math sin calculation. |
||||
* |
||||
* \par Block Diagram: |
||||
* \par |
||||
* \image html linearInterpExampleMethod1.gif "Method 1: Sine caluclation using fast math" |
||||
* \par |
||||
* \image html linearInterpExampleMethod2.gif "Method 2: Sine caluclation using interpolation function" |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c testInputSin_f32 points to the input values for sine calculation |
||||
* \li \c testRefSinOutput32_f32 points to the reference values caculated from sin() matlab function |
||||
* \li \c testOutput points to output buffer calculation from cubic interpolation |
||||
* \li \c testLinIntOutput points to output buffer calculation from linear interpolation |
||||
* \li \c snr1 Signal to noise ratio for reference and cubic interpolation output |
||||
* \li \c snr2 Signal to noise ratio for reference and linear interpolation output |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_sin_f32() |
||||
* - arm_linear_interp_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_linear_interp_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_linear_interp_example_f32.c
|
||||
*/ |
||||
|
||||
#include "arm_math.h" |
||||
#include "math_helper.h" |
||||
|
||||
#define SNR_THRESHOLD 90 |
||||
#define TEST_LENGTH_SAMPLES 10 |
||||
#define XSPACING (0.00005f) |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Test input data for F32 SIN function |
||||
* Generated by the MATLAB rand() function |
||||
* randn('state', 0) |
||||
* xi = (((1/4.18318581819710)* randn(blockSize, 1) * 2* pi)); |
||||
* --------------------------------------------------------------------*/ |
||||
float32_t testInputSin_f32[TEST_LENGTH_SAMPLES] = |
||||
{ |
||||
-0.649716504673081170, -2.501723745497831200, |
||||
0.188250329003310100, 0.432092748487532540, |
||||
-1.722010988459680800, 1.788766476323060600, |
||||
1.786136060975809500, -0.056525543169408797, |
||||
0.491596272728153760, 0.262309671126153390 |
||||
}; |
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Reference out of SIN F32 function for Block Size = 10 |
||||
* Calculated from sin(testInputSin_f32) |
||||
*------------------------------------------------------------------------------*/ |
||||
float32_t testRefSinOutput32_f32[TEST_LENGTH_SAMPLES] = |
||||
{ |
||||
-0.604960695383043530, -0.597090287967934840, |
||||
0.187140422442966500, 0.418772124875992690, |
||||
-0.988588831792106880, 0.976338412038794010, |
||||
0.976903856413481100, -0.056495446835214236, |
||||
0.472033731854734240, 0.259311907228582830 |
||||
}; |
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Method 1: Test out Buffer Calculated from Cubic Interpolation |
||||
*------------------------------------------------------------------------------*/ |
||||
float32_t testOutput[TEST_LENGTH_SAMPLES]; |
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Method 2: Test out buffer Calculated from Linear Interpolation |
||||
*------------------------------------------------------------------------------*/ |
||||
float32_t testLinIntOutput[TEST_LENGTH_SAMPLES]; |
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* External table used for linear interpolation |
||||
*------------------------------------------------------------------------------*/ |
||||
extern float arm_linear_interep_table[188495]; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Global Variables for caluclating SNR's for Method1 & Method 2 |
||||
* ------------------------------------------------------------------- */ |
||||
float32_t snr1; |
||||
float32_t snr2; |
||||
|
||||
/* ----------------------------------------------------------------------------
|
||||
* Calculation of Sine values from Cubic Interpolation and Linear interpolation |
||||
* ---------------------------------------------------------------------------- */ |
||||
int32_t main(void) |
||||
{ |
||||
uint32_t i; |
||||
arm_status status; |
||||
|
||||
arm_linear_interp_instance_f32 S = {188495, -3.141592653589793238, XSPACING, &arm_linear_interep_table[0]}; |
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Method 1: Test out Calculated from Cubic Interpolation |
||||
*------------------------------------------------------------------------------*/ |
||||
for(i=0; i< TEST_LENGTH_SAMPLES; i++) |
||||
{ |
||||
testOutput[i] = arm_sin_f32(testInputSin_f32[i]); |
||||
} |
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Method 2: Test out Calculated from Cubic Interpolation and Linear interpolation |
||||
*------------------------------------------------------------------------------*/ |
||||
|
||||
for(i=0; i< TEST_LENGTH_SAMPLES; i++) |
||||
{ |
||||
testLinIntOutput[i] = arm_linear_interp_f32(&S, testInputSin_f32[i]); |
||||
} |
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* SNR calculation for method 1 |
||||
*------------------------------------------------------------------------------*/ |
||||
snr1 = arm_snr_f32(testRefSinOutput32_f32, testOutput, 2); |
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* SNR calculation for method 2 |
||||
*------------------------------------------------------------------------------*/ |
||||
snr2 = arm_snr_f32(testRefSinOutput32_f32, testLinIntOutput, 2); |
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Initialise status depending on SNR calculations |
||||
*------------------------------------------------------------------------------*/ |
||||
if( snr2 > snr1) |
||||
{ |
||||
status = ARM_MATH_SUCCESS; |
||||
} |
||||
else |
||||
{ |
||||
status = ARM_MATH_TEST_FAILURE; |
||||
} |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Loop here if the signals fail the PASS check. |
||||
** This denotes a test failure |
||||
** ------------------------------------------------------------------- */ |
||||
if( status != ARM_MATH_SUCCESS) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
@ -0,0 +1,458 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.c |
||||
* |
||||
* Description: Definition of all helper functions required.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include standard header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include<math.h> |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include project header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include "math_helper.h" |
||||
|
||||
/**
|
||||
* @brief Caluclation of SNR |
||||
* @param float* Pointer to the reference buffer |
||||
* @param float* Pointer to the test buffer |
||||
* @param uint32_t total number of samples |
||||
* @return float SNR |
||||
* The function Caluclates signal to noise ratio for the reference output
|
||||
* and test output
|
||||
*/ |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) |
||||
{ |
||||
float EnergySignal = 0.0, EnergyError = 0.0; |
||||
uint32_t i; |
||||
float SNR; |
||||
int temp; |
||||
int *test; |
||||
|
||||
for (i = 0; i < buffSize; i++) |
||||
{ |
||||
/* Checking for a NAN value in pRef array */ |
||||
test = (int *)(&pRef[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
/* Checking for a NAN value in pTest array */ |
||||
test = (int *)(&pTest[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
EnergySignal += pRef[i] * pRef[i]; |
||||
EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
|
||||
} |
||||
|
||||
/* Checking for a NAN value in EnergyError */ |
||||
test = (int *)(&EnergyError); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
|
||||
SNR = 10 * log10 (EnergySignal / EnergyError); |
||||
|
||||
return (SNR); |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q15_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed in q12.20 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point(q12.20) values
|
||||
*/ |
||||
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1048576.0f corresponds to pow(2, 20) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1048576.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 1.0) |
||||
{ |
||||
pOut[i] = 0x000FFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q15_t* Pointer to Ref buffer |
||||
* @param q15_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
}
|
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q31_t* Pointer to Ref buffer |
||||
* @param q31_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
} |
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q31 (q31_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q7 (q7_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Caluclates number of guard bits
|
||||
* @param uint32_t number of additions |
||||
* @return none |
||||
* The function Caluclates the number of guard bits
|
||||
* depending on the numtaps
|
||||
*/ |
||||
|
||||
uint32_t arm_calc_guard_bits (uint32_t num_adds) |
||||
{ |
||||
uint32_t i = 1, j = 0; |
||||
|
||||
if (num_adds == 1) |
||||
{ |
||||
return (0); |
||||
} |
||||
|
||||
while (i < num_adds) |
||||
{ |
||||
i = i * 2; |
||||
j++; |
||||
} |
||||
|
||||
return (j); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts Q15 to floating-point |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
*/ |
||||
|
||||
void arm_apply_guard_bits (float32_t * pIn,
|
||||
uint32_t numSamples,
|
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Calculates pow(2, numShifts) |
||||
* @param uint32_t number of shifts |
||||
* @return pow(2, numShifts) |
||||
*/ |
||||
uint32_t arm_calc_2pow(uint32_t numShifts) |
||||
{ |
||||
|
||||
uint32_t i, val = 1; |
||||
|
||||
for (i = 0; i < numShifts; i++) |
||||
{ |
||||
val = val * 2; |
||||
}
|
||||
|
||||
return(val); |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q14
|
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q14 (float *pIn, q15_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 16384.0f corresponds to pow(2, 14) */ |
||||
pOut[i] = (q15_t) (pIn[i] * 16384.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFF; |
||||
} |
||||
|
||||
} |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q30 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q29 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 536870912.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 4.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q28 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q28 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 268435456.0f corresponds to pow(2, 28) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 268435456.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 8.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clip the float values to +/- 1
|
||||
* @param pIn input buffer |
||||
* @param numSamples number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_clip_f32 (float *pIn, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
if(pIn[i] > 1.0f) |
||||
{ |
||||
pIn[i] = 1.0; |
||||
} |
||||
else if( pIn[i] < -1.0f) |
||||
{ |
||||
pIn[i] = -1.0; |
||||
} |
||||
|
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
|
||||
@ -0,0 +1,63 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.h |
||||
*
|
||||
* Description: Prototypes of all helper functions required.
|
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
|
||||
#include "arm_math.h" |
||||
|
||||
#ifndef MATH_HELPER_H |
||||
#define MATH_HELPER_H |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); |
||||
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_clip_f32(float *pIn, uint32_t numSamples); |
||||
uint32_t arm_calc_guard_bits(uint32_t num_adds); |
||||
void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); |
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); |
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); |
||||
uint32_t arm_calc_2pow(uint32_t guard_bits); |
||||
#endif |
||||
|
||||
@ -0,0 +1,233 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_matrix_example_f32.c |
||||
* |
||||
* Description: Example code demonstrating least square fit to data |
||||
* using matrix functions |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup MatrixExample Matrix Example |
||||
* |
||||
* \par Description: |
||||
* \par |
||||
* Demonstrates the use of Matrix Transpose, Matrix Muliplication, and Matrix Inverse |
||||
* functions to apply least squares fitting to input data. Least squares fitting is |
||||
* the procedure for finding the best-fitting curve that minimizes the sum of the |
||||
* squares of the offsets (least square error) from a given set of data. |
||||
* |
||||
* \par Algorithm: |
||||
* \par |
||||
* The linear combination of parameters considered is as follows: |
||||
* \par |
||||
* <code>A * X = B</code>, where \c X is the unknown value and can be estimated |
||||
* from \c A & \c B. |
||||
* \par |
||||
* The least squares estimate \c X is given by the following equation: |
||||
* \par |
||||
* <code>X = Inverse(A<sup>T</sup> * A) * A<sup>T</sup> * B</code> |
||||
* |
||||
* \par Block Diagram: |
||||
* \par |
||||
* \image html matrixExample.gif |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c A_f32 input matrix in the linear combination equation |
||||
* \li \c B_f32 output matrix in the linear combination equation |
||||
* \li \c X_f32 unknown matrix estimated using \c A_f32 & \c B_f32 matrices |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_mat_init_f32() |
||||
* - arm_mat_trans_f32() |
||||
* - arm_mat_mult_f32() |
||||
* - arm_mat_inverse_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_matrix_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_matrix_example_f32.c
|
||||
*/ |
||||
|
||||
#include "arm_math.h" |
||||
#include "math_helper.h" |
||||
|
||||
#define SNR_THRESHOLD 90 |
||||
|
||||
/* --------------------------------------------------------------------------------
|
||||
* Test input data(Cycles) taken from FIR Q15 module for differant cases of blockSize |
||||
* and tapSize |
||||
* --------------------------------------------------------------------------------- */ |
||||
|
||||
const float32_t B_f32[4] = |
||||
{ |
||||
782.0, 7577.0, 470.0, 4505.0 |
||||
}; |
||||
|
||||
/* --------------------------------------------------------------------------------
|
||||
* Formula to fit is C1 + C2 * numTaps + C3 * blockSize + C4 * numTaps * blockSize |
||||
* -------------------------------------------------------------------------------- */ |
||||
|
||||
const float32_t A_f32[16] = |
||||
{ |
||||
/* Const, numTaps, blockSize, numTaps*blockSize */ |
||||
1.0, 32.0, 4.0, 128.0, |
||||
1.0, 32.0, 64.0, 2048.0, |
||||
1.0, 16.0, 4.0, 64.0, |
||||
1.0, 16.0, 64.0, 1024.0, |
||||
}; |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Temporary buffers for storing intermediate values |
||||
* ------------------------------------------------------------------- */ |
||||
/* Transpose of A Buffer */ |
||||
float32_t AT_f32[16]; |
||||
/* (Transpose of A * A) Buffer */ |
||||
float32_t ATMA_f32[16]; |
||||
/* Inverse(Transpose of A * A) Buffer */ |
||||
float32_t ATMAI_f32[16]; |
||||
/* Test Output Buffer */ |
||||
float32_t X_f32[4]; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Reference ouput buffer C1, C2, C3 and C4 taken from MATLAB |
||||
* ------------------------------------------------------------------- */ |
||||
const float32_t xRef_f32[4] = {73.0, 8.0, 21.25, 2.875}; |
||||
|
||||
float32_t snr; |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Max magnitude FFT Bin test |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
int32_t main(void) |
||||
{ |
||||
|
||||
arm_matrix_instance_f32 A; /* Matrix A Instance */ |
||||
arm_matrix_instance_f32 AT; /* Matrix AT(A transpose) instance */ |
||||
arm_matrix_instance_f32 ATMA; /* Matrix ATMA( AT multiply with A) instance */ |
||||
arm_matrix_instance_f32 ATMAI; /* Matrix ATMAI(Inverse of ATMA) instance */ |
||||
arm_matrix_instance_f32 B; /* Matrix B instance */ |
||||
arm_matrix_instance_f32 X; /* Matrix X(Unknown Matrix) instance */ |
||||
|
||||
uint32_t srcRows, srcColumns; /* Temporary variables */ |
||||
arm_status status; |
||||
|
||||
/* Initialise A Matrix Instance with numRows, numCols and data array(A_f32) */ |
||||
srcRows = 4; |
||||
srcColumns = 4; |
||||
arm_mat_init_f32(&A, srcRows, srcColumns, (float32_t *)A_f32); |
||||
|
||||
/* Initialise Matrix Instance AT with numRows, numCols and data array(AT_f32) */ |
||||
srcRows = 4; |
||||
srcColumns = 4; |
||||
arm_mat_init_f32(&AT, srcRows, srcColumns, AT_f32); |
||||
|
||||
/* calculation of A transpose */ |
||||
status = arm_mat_trans_f32(&A, &AT); |
||||
|
||||
|
||||
/* Initialise ATMA Matrix Instance with numRows, numCols and data array(ATMA_f32) */ |
||||
srcRows = 4; |
||||
srcColumns = 4; |
||||
arm_mat_init_f32(&ATMA, srcRows, srcColumns, ATMA_f32); |
||||
|
||||
/* calculation of AT Multiply with A */ |
||||
status = arm_mat_mult_f32(&AT, &A, &ATMA); |
||||
|
||||
/* Initialise ATMAI Matrix Instance with numRows, numCols and data array(ATMAI_f32) */ |
||||
srcRows = 4; |
||||
srcColumns = 4; |
||||
arm_mat_init_f32(&ATMAI, srcRows, srcColumns, ATMAI_f32); |
||||
|
||||
/* calculation of Inverse((Transpose(A) * A) */ |
||||
status = arm_mat_inverse_f32(&ATMA, &ATMAI); |
||||
|
||||
/* calculation of (Inverse((Transpose(A) * A)) * Transpose(A)) */ |
||||
status = arm_mat_mult_f32(&ATMAI, &AT, &ATMA); |
||||
|
||||
/* Initialise B Matrix Instance with numRows, numCols and data array(B_f32) */ |
||||
srcRows = 4; |
||||
srcColumns = 1; |
||||
arm_mat_init_f32(&B, srcRows, srcColumns, (float32_t *)B_f32); |
||||
|
||||
/* Initialise X Matrix Instance with numRows, numCols and data array(X_f32) */ |
||||
srcRows = 4; |
||||
srcColumns = 1; |
||||
arm_mat_init_f32(&X, srcRows, srcColumns, X_f32); |
||||
|
||||
/* calculation ((Inverse((Transpose(A) * A)) * Transpose(A)) * B) */ |
||||
status = arm_mat_mult_f32(&ATMA, &B, &X); |
||||
|
||||
/* Comparison of reference with test output */ |
||||
snr = arm_snr_f32((float32_t *)xRef_f32, X_f32, 4); |
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Initialise status depending on SNR calculations |
||||
*------------------------------------------------------------------------------*/ |
||||
if( snr > SNR_THRESHOLD) |
||||
{ |
||||
status = ARM_MATH_SUCCESS; |
||||
} |
||||
else |
||||
{ |
||||
status = ARM_MATH_TEST_FAILURE; |
||||
} |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Loop here if the signals fail the PASS check. |
||||
** This denotes a test failure |
||||
** ------------------------------------------------------------------- */ |
||||
if( status != ARM_MATH_SUCCESS) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
@ -0,0 +1,458 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.c |
||||
* |
||||
* Description: Definition of all helper functions required.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include standard header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include<math.h> |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include project header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include "math_helper.h" |
||||
|
||||
/**
|
||||
* @brief Caluclation of SNR |
||||
* @param float* Pointer to the reference buffer |
||||
* @param float* Pointer to the test buffer |
||||
* @param uint32_t total number of samples |
||||
* @return float SNR |
||||
* The function Caluclates signal to noise ratio for the reference output
|
||||
* and test output
|
||||
*/ |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) |
||||
{ |
||||
float EnergySignal = 0.0, EnergyError = 0.0; |
||||
uint32_t i; |
||||
float SNR; |
||||
int temp; |
||||
int *test; |
||||
|
||||
for (i = 0; i < buffSize; i++) |
||||
{ |
||||
/* Checking for a NAN value in pRef array */ |
||||
test = (int *)(&pRef[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
/* Checking for a NAN value in pTest array */ |
||||
test = (int *)(&pTest[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
EnergySignal += pRef[i] * pRef[i]; |
||||
EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
|
||||
} |
||||
|
||||
/* Checking for a NAN value in EnergyError */ |
||||
test = (int *)(&EnergyError); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
|
||||
SNR = 10 * log10 (EnergySignal / EnergyError); |
||||
|
||||
return (SNR); |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q15_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed in q12.20 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point(q12.20) values
|
||||
*/ |
||||
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1048576.0f corresponds to pow(2, 20) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1048576.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 1.0) |
||||
{ |
||||
pOut[i] = 0x000FFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q15_t* Pointer to Ref buffer |
||||
* @param q15_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
}
|
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q31_t* Pointer to Ref buffer |
||||
* @param q31_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
} |
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q31 (q31_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q7 (q7_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Caluclates number of guard bits
|
||||
* @param uint32_t number of additions |
||||
* @return none |
||||
* The function Caluclates the number of guard bits
|
||||
* depending on the numtaps
|
||||
*/ |
||||
|
||||
uint32_t arm_calc_guard_bits (uint32_t num_adds) |
||||
{ |
||||
uint32_t i = 1, j = 0; |
||||
|
||||
if (num_adds == 1) |
||||
{ |
||||
return (0); |
||||
} |
||||
|
||||
while (i < num_adds) |
||||
{ |
||||
i = i * 2; |
||||
j++; |
||||
} |
||||
|
||||
return (j); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts Q15 to floating-point |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
*/ |
||||
|
||||
void arm_apply_guard_bits (float32_t * pIn,
|
||||
uint32_t numSamples,
|
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Calculates pow(2, numShifts) |
||||
* @param uint32_t number of shifts |
||||
* @return pow(2, numShifts) |
||||
*/ |
||||
uint32_t arm_calc_2pow(uint32_t numShifts) |
||||
{ |
||||
|
||||
uint32_t i, val = 1; |
||||
|
||||
for (i = 0; i < numShifts; i++) |
||||
{ |
||||
val = val * 2; |
||||
}
|
||||
|
||||
return(val); |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q14
|
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q14 (float *pIn, q15_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 16384.0f corresponds to pow(2, 14) */ |
||||
pOut[i] = (q15_t) (pIn[i] * 16384.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFF; |
||||
} |
||||
|
||||
} |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q30 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q29 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 536870912.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 4.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q28 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q28 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 268435456.0f corresponds to pow(2, 28) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 268435456.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 8.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clip the float values to +/- 1
|
||||
* @param pIn input buffer |
||||
* @param numSamples number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_clip_f32 (float *pIn, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
if(pIn[i] > 1.0f) |
||||
{ |
||||
pIn[i] = 1.0; |
||||
} |
||||
else if( pIn[i] < -1.0f) |
||||
{ |
||||
pIn[i] = -1.0; |
||||
} |
||||
|
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
|
||||
@ -0,0 +1,63 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.h |
||||
*
|
||||
* Description: Prototypes of all helper functions required.
|
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
|
||||
#include "arm_math.h" |
||||
|
||||
#ifndef MATH_HELPER_H |
||||
#define MATH_HELPER_H |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); |
||||
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_clip_f32(float *pIn, uint32_t numSamples); |
||||
uint32_t arm_calc_guard_bits(uint32_t num_adds); |
||||
void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); |
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); |
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); |
||||
uint32_t arm_calc_2pow(uint32_t guard_bits); |
||||
#endif |
||||
|
||||
@ -0,0 +1,269 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_signal_converge_data.c |
||||
*
|
||||
* Description: Test input data for Floating point LMS Norm FIR filter |
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Test input data for Floating point LMS Norm FIR filter |
||||
** Generated by the MATLAB randn() function |
||||
** ------------------------------------------------------------------- */ |
||||
|
||||
float32_t testInput_f32[1536] =
|
||||
{
|
||||
-0.432565, -1.665584, 0.125332, 0.287676, -1.146471, 1.190915, 1.189164, -0.037633,
|
||||
0.327292, 0.174639, -0.186709, 0.725791, -0.588317, 2.183186, -0.136396, 0.113931,
|
||||
1.066768, 0.059281, -0.095648, -0.832349, 0.294411, -1.336182, 0.714325, 1.623562,
|
||||
-0.691776, 0.857997, 1.254001, -1.593730, -1.440964, 0.571148, -0.399886, 0.689997,
|
||||
0.815622, 0.711908, 1.290250, 0.668601, 1.190838, -1.202457, -0.019790, -0.156717,
|
||||
-1.604086, 0.257304, -1.056473, 1.415141, -0.805090, 0.528743, 0.219321, -0.921902,
|
||||
-2.170674, -0.059188, -1.010634, 0.614463, 0.507741, 1.692430, 0.591283, -0.643595,
|
||||
0.380337, -1.009116, -0.019511, -0.048221, 0.000043, -0.317859, 1.095004, -1.873990,
|
||||
0.428183, 0.895638, 0.730957, 0.577857, 0.040314, 0.677089, 0.568900, -0.255645,
|
||||
-0.377469, -0.295887, -1.475135, -0.234004, 0.118445, 0.314809, 1.443508, -0.350975,
|
||||
0.623234, 0.799049, 0.940890, -0.992092, 0.212035, 0.237882, -1.007763, -0.742045,
|
||||
1.082295, -0.131500, 0.389880, 0.087987, -0.635465, -0.559573, 0.443653, -0.949904,
|
||||
0.781182, 0.568961, -0.821714, -0.265607, -1.187777, -2.202321, 0.986337, -0.518635,
|
||||
0.327368, 0.234057, 0.021466, -1.003944, -0.947146, -0.374429, -1.185886, -1.055903,
|
||||
1.472480, 0.055744, -1.217317, -0.041227, -1.128344, -1.349278, -0.261102, 0.953465,
|
||||
0.128644, 0.656468, -1.167819, -0.460605, -0.262440, -1.213152, -1.319437, 0.931218,
|
||||
0.011245, -0.645146, 0.805729, 0.231626, -0.989760, 1.339586, 0.289502, 1.478917,
|
||||
1.138028, -0.684139, -1.291936, -0.072926, -0.330599, -0.843628, 0.497770, 1.488490,
|
||||
-0.546476, -0.846758, -0.246337, 0.663024, -0.854197, -1.201315, -0.119869, -0.065294,
|
||||
0.485296, -0.595491, -0.149668, -0.434752, -0.079330, 1.535152, -0.606483, -1.347363,
|
||||
0.469383, -0.903567, 0.035880, -0.627531, 0.535398, 0.552884, -0.203690, -2.054325,
|
||||
0.132561, 1.592941, 1.018412, -1.580402, -0.078662, -0.681657, -1.024553, -1.234353,
|
||||
0.288807, -0.429303, 0.055801, -0.367874, -0.464973, 0.370961, 0.728283, 2.112160,
|
||||
-1.357298, -1.022610, 1.037834, -0.389800, -1.381266, 0.315543, 1.553243, 0.707894,
|
||||
1.957385, 0.504542, 1.864529, -0.339812, -1.139779, -0.211123, 1.190245, -1.116209,
|
||||
0.635274, -0.601412, 0.551185, -1.099840, 0.085991, -2.004563, -0.493088, 0.462048,
|
||||
-0.321005, 1.236556, -0.631280, -2.325211, -1.231637, 1.055648, -0.113224, 0.379224,
|
||||
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|
||||
0.646420, -1.129412, 0.197038, 1.696870, 0.726034, 0.792526, 0.603357, -0.058405,
|
||||
-1.108666, 2.144229, -1.352821, 0.457021, 0.391175, 2.073013, -0.323318, 1.468132,
|
||||
-0.502399, 0.209593, 0.754800, -0.948189, 0.613157, 1.760503, 0.088762, 2.595570,
|
||||
-0.675470, 2.786804, -0.016827, 0.271651, -0.914102, -1.951371, -0.317418, 0.588333,
|
||||
0.828996, -1.674851, -1.922293, -0.436662, 0.044974, 2.416609, -0.309892, 0.187583,
|
||||
0.947699, -0.525703, -1.115605, -1.592320, 1.174844, 0.485144, 1.645480, -0.454233,
|
||||
1.008768, 2.049403, 0.602020, 0.017860, -1.610426, 1.238752, 0.683587, -0.780716,
|
||||
0.530979, 2.134498, 0.354361, 0.231700, 1.287980, -0.013488, -1.333345, -0.556343,
|
||||
0.755597, -0.911854, 1.371684, 0.245580, 0.118845, 0.384690, -0.070152, -0.578309,
|
||||
0.469308, 1.299687, 1.634798, -0.702809, 0.807253, -1.027451, 1.294496, 0.014930,
|
||||
0.218705, 1.713188, -2.078805, 0.112917, -1.086491, -1.558311, 0.637406, -0.404576,
|
||||
-0.403325, 0.084076, -0.435349, -0.562623, 0.878062, -0.814650, -0.258363, 0.493299,
|
||||
-0.802694, -0.008329, 0.627571, 0.154382, 2.580735, -1.306246, 1.023526, 0.777795,
|
||||
-0.833884, -0.586663, 0.065664, -0.012342, -0.076987, -1.558587, 1.702607, -0.468984,
|
||||
0.094619, 0.287071, 0.919354, 0.510136, 0.245440, -1.400519, 0.969571, 1.593698,
|
||||
-1.437917, -1.534230, -0.074710, 0.081459, -0.843240, -0.564640, -0.028207, -1.243702,
|
||||
0.733039, 0.059580, 0.149144, 1.595857, -0.777250, 1.550277, 1.055002, -0.166654,
|
||||
0.314484, 1.419571, 0.327348, 0.475653, 0.398754, -0.072770, 1.314784, 0.978279,
|
||||
1.722114, -0.412302, 0.565133, 0.739851, 0.220138, 1.312807, 0.629152, -1.107987,
|
||||
-0.447001, -0.725993, 0.354045, -0.506772, -2.103747, -0.664684, 1.450110, -0.329805,
|
||||
2.701872, -1.634939, -0.536325, 0.547223, 1.492603, -0.455243, -0.496416, 1.235260,
|
||||
0.040926, 0.748467, 1.230764, 0.304903, 1.077771, 0.765151, -1.319580, -0.509191,
|
||||
0.555116, -1.957625, -0.760453, -2.443886, -0.659366, -0.114779, 0.300079, -0.583996,
|
||||
-3.073745, 1.551042, -0.407369, 1.428095, -1.353242, 0.903970, 0.541671, -0.465020 |
||||
}; |
||||
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Coefficients for 32-tap filter for Floating point LMS FIR filter |
||||
* FIR high pass filter with cutoff freq 9.6kHz (transition 9.6KHz to 11.52KHz)
|
||||
** ------------------------------------------------------------------- */
|
||||
float32_t lmsNormCoeff_f32[32] = { |
||||
-0.004240, 0.002301, 0.008860, -0.000000, -0.019782, -0.010543, 0.032881, 0.034736,
|
||||
-0.037374, -0.069586, 0.022397, 0.102169, 0.014185, -0.115908, -0.061648, 0.101018,
|
||||
0.101018, -0.061648, -0.115908, 0.014185, 0.102169, 0.022397, -0.069586, -0.037374,
|
||||
0.034736, 0.032881, -0.010543, -0.019782, -0.000000, 0.008860, 0.002301, -0.004240
|
||||
|
||||
}; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Coefficients for 32-tap filter for Floating point FIR filter |
||||
* FIR low pass filter with cutoff freq 24Hz (transition 24Hz to 240Hz)
|
||||
** ------------------------------------------------------------------- */
|
||||
const float32_t FIRCoeff_f32[32] = { |
||||
0.004502, 0.005074, 0.006707, 0.009356, 0.012933, 0.017303, 0.022298, 0.027717,
|
||||
0.033338, 0.038930, 0.044258, 0.049098, 0.053243, 0.056519, 0.058784, 0.059941,
|
||||
0.059941, 0.058784, 0.056519, 0.053243, 0.049098, 0.044258, 0.038930, 0.033338,
|
||||
0.027717, 0.022298, 0.017303, 0.012933, 0.009356, 0.006707, 0.005074, 0.004502 |
||||
|
||||
}; |
||||
|
||||
@ -0,0 +1,259 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_signal_converge_example_f32.c |
||||
* |
||||
* Description: Example code demonstrating convergence of an adaptive |
||||
* filter. |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup SignalConvergence Signal Convergence Example |
||||
* |
||||
* \par Description: |
||||
* \par |
||||
* Demonstrates the ability of an adaptive filter to "learn" the transfer function of |
||||
* a FIR lowpass filter using the Normalized LMS Filter, Finite Impulse |
||||
* Response (FIR) Filter, and Basic Math Functions. |
||||
* |
||||
* \par Algorithm: |
||||
* \par |
||||
* The figure below illustrates the signal flow in this example. Uniformly distributed white |
||||
* noise is passed through an FIR lowpass filter. The output of the FIR filter serves as the |
||||
* reference input of the adaptive filter (normalized LMS filter). The white noise is input |
||||
* to the adaptive filter. The adaptive filter learns the transfer function of the FIR filter. |
||||
* The filter outputs two signals: (1) the output of the internal adaptive FIR filter, and |
||||
* (2) the error signal which is the difference between the adaptive filter and the reference |
||||
* output of the FIR filter. Over time as the adaptive filter learns the transfer function |
||||
* of the FIR filter, the first output approaches the reference output of the FIR filter, |
||||
* and the error signal approaches zero. |
||||
* \par |
||||
* The adaptive filter converges properly even if the input signal has a large dynamic |
||||
* range (i.e., varies from small to large values). The coefficients of the adaptive filter |
||||
* are initially zero, and then converge over 1536 samples. The internal function test_signal_converge() |
||||
* implements the stopping condition. The function checks if all of the values of the error signal have a |
||||
* magnitude below a threshold DELTA. |
||||
* |
||||
* \par Block Diagram: |
||||
* \par |
||||
* \image html SignalFlow.gif |
||||
* |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c testInput_f32 points to the input data |
||||
* \li \c firStateF32 points to FIR state buffer |
||||
* \li \c lmsStateF32 points to Normalised Least mean square FIR filter state buffer |
||||
* \li \c FIRCoeff_f32 points to coefficient buffer |
||||
* \li \c lmsNormCoeff_f32 points to Normalised Least mean square FIR filter coefficient buffer |
||||
* \li \c wire1, wir2, wire3 temporary buffers |
||||
* \li \c errOutput, err_signal temporary error buffers |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_lms_norm_init_f32() |
||||
* - arm_fir_init_f32() |
||||
* - arm_fir_f32() |
||||
* - arm_lms_norm_f32() |
||||
* - arm_scale_f32() |
||||
* - arm_abs_f32() |
||||
* - arm_sub_f32() |
||||
* - arm_min_f32() |
||||
* - arm_copy_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_signal_converge_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_signal_converge_example_f32.c
|
||||
*/ |
||||
|
||||
#include "arm_math.h" |
||||
#include "math_helper.h" |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Global defines for the simulation |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
#define TEST_LENGTH_SAMPLES 1536 |
||||
#define NUMTAPS 32 |
||||
#define BLOCKSIZE 32 |
||||
#define DELTA_ERROR 0.000001f |
||||
#define DELTA_COEFF 0.0001f |
||||
#define MU 0.5f |
||||
|
||||
#define NUMFRAMES (TEST_LENGTH_SAMPLES / BLOCKSIZE) |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare FIR state buffers and structure |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
float32_t firStateF32[NUMTAPS + BLOCKSIZE]; |
||||
arm_fir_instance_f32 LPF_instance; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare LMSNorm state buffers and structure |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
float32_t lmsStateF32[NUMTAPS + BLOCKSIZE]; |
||||
float32_t errOutput[TEST_LENGTH_SAMPLES]; |
||||
arm_lms_norm_instance_f32 lmsNorm_instance; |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Function Declarations for Signal Convergence Example |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
arm_status test_signal_converge_example( void ); |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Internal functions |
||||
* ------------------------------------------------------------------- */ |
||||
arm_status test_signal_converge(float32_t* err_signal, |
||||
uint32_t blockSize); |
||||
|
||||
void getinput(float32_t* input, |
||||
uint32_t fr_cnt, |
||||
uint32_t blockSize); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* External Declarations for FIR F32 module Test |
||||
* ------------------------------------------------------------------- */ |
||||
extern float32_t testInput_f32[TEST_LENGTH_SAMPLES]; |
||||
extern float32_t lmsNormCoeff_f32[32]; |
||||
extern const float32_t FIRCoeff_f32[32]; |
||||
extern arm_lms_norm_instance_f32 lmsNorm_instance; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare I/O buffers |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
float32_t wire1[BLOCKSIZE]; |
||||
float32_t wire2[BLOCKSIZE]; |
||||
float32_t wire3[BLOCKSIZE]; |
||||
float32_t err_signal[BLOCKSIZE]; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Signal converge test |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
int32_t main(void) |
||||
{ |
||||
uint32_t i; |
||||
arm_status status; |
||||
uint32_t index; |
||||
float32_t minValue; |
||||
|
||||
/* Initialize the LMSNorm data structure */ |
||||
arm_lms_norm_init_f32(&lmsNorm_instance, NUMTAPS, lmsNormCoeff_f32, lmsStateF32, MU, BLOCKSIZE); |
||||
|
||||
/* Initialize the FIR data structure */ |
||||
arm_fir_init_f32(&LPF_instance, NUMTAPS, (float32_t *)FIRCoeff_f32, firStateF32, BLOCKSIZE); |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Loop over the frames of data and execute each of the processing |
||||
* functions in the system. |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
for(i=0; i < NUMFRAMES; i++) |
||||
{ |
||||
/* Read the input data - uniformly distributed random noise - into wire1 */ |
||||
arm_copy_f32(testInput_f32 + (i * BLOCKSIZE), wire1, BLOCKSIZE); |
||||
|
||||
/* Execute the FIR processing function. Input wire1 and output wire2 */ |
||||
arm_fir_f32(&LPF_instance, wire1, wire2, BLOCKSIZE); |
||||
|
||||
/* Execute the LMS Norm processing function*/ |
||||
|
||||
arm_lms_norm_f32(&lmsNorm_instance, /* LMSNorm instance */ |
||||
wire1, /* Input signal */ |
||||
wire2, /* Reference Signal */ |
||||
wire3, /* Converged Signal */ |
||||
err_signal, /* Error Signal, this will become small as the signal converges */ |
||||
BLOCKSIZE); /* BlockSize */ |
||||
|
||||
/* apply overall gain */ |
||||
arm_scale_f32(wire3, 5, wire3, BLOCKSIZE); /* in-place buffer */ |
||||
} |
||||
|
||||
status = ARM_MATH_SUCCESS; |
||||
|
||||
/* -------------------------------------------------------------------------------
|
||||
* Test whether the error signal has reached towards 0. |
||||
* ----------------------------------------------------------------------------- */ |
||||
|
||||
arm_abs_f32(err_signal, err_signal, BLOCKSIZE); |
||||
arm_min_f32(err_signal, BLOCKSIZE, &minValue, &index); |
||||
|
||||
if (minValue > DELTA_ERROR) |
||||
{ |
||||
status = ARM_MATH_TEST_FAILURE; |
||||
} |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Test whether the filter coefficients have converged. |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
arm_sub_f32((float32_t *)FIRCoeff_f32, lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS); |
||||
|
||||
arm_abs_f32(lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS); |
||||
arm_min_f32(lmsNormCoeff_f32, NUMTAPS, &minValue, &index); |
||||
|
||||
if (minValue > DELTA_COEFF) |
||||
{ |
||||
status = ARM_MATH_TEST_FAILURE; |
||||
} |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Loop here if the signals did not pass the convergence check. |
||||
* This denotes a test failure |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
if( status != ARM_MATH_SUCCESS) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
@ -0,0 +1,458 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.c |
||||
* |
||||
* Description: Definition of all helper functions required.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include standard header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include<math.h> |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include project header files
|
||||
* -------------------------------------------------------------------- */ |
||||
#include "math_helper.h" |
||||
|
||||
/**
|
||||
* @brief Caluclation of SNR |
||||
* @param float* Pointer to the reference buffer |
||||
* @param float* Pointer to the test buffer |
||||
* @param uint32_t total number of samples |
||||
* @return float SNR |
||||
* The function Caluclates signal to noise ratio for the reference output
|
||||
* and test output
|
||||
*/ |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) |
||||
{ |
||||
float EnergySignal = 0.0, EnergyError = 0.0; |
||||
uint32_t i; |
||||
float SNR; |
||||
int temp; |
||||
int *test; |
||||
|
||||
for (i = 0; i < buffSize; i++) |
||||
{ |
||||
/* Checking for a NAN value in pRef array */ |
||||
test = (int *)(&pRef[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
/* Checking for a NAN value in pTest array */ |
||||
test = (int *)(&pTest[i]); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
EnergySignal += pRef[i] * pRef[i]; |
||||
EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
|
||||
} |
||||
|
||||
/* Checking for a NAN value in EnergyError */ |
||||
test = (int *)(&EnergyError); |
||||
temp = *test; |
||||
|
||||
if(temp == 0x7FC00000) |
||||
{ |
||||
return(0); |
||||
} |
||||
|
||||
|
||||
SNR = 10 * log10 (EnergySignal / EnergyError); |
||||
|
||||
return (SNR); |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q15_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed in q12.20 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point(q12.20) values
|
||||
*/ |
||||
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1048576.0f corresponds to pow(2, 20) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1048576.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 1.0) |
||||
{ |
||||
pOut[i] = 0x000FFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q15_t* Pointer to Ref buffer |
||||
* @param q15_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
}
|
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output |
||||
* @param q31_t* Pointer to Ref buffer |
||||
* @param q31_t* Pointer to Test buffer |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none
|
||||
*/ |
||||
|
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples) |
||||
{ |
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0; |
||||
uint32_t maxDiff = 0; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
diff = pIn[i] - pOut[i]; |
||||
diffCrnt = (diff > 0) ? diff : -diff; |
||||
|
||||
if(diffCrnt > maxDiff) |
||||
{ |
||||
maxDiff = diffCrnt; |
||||
} |
||||
} |
||||
|
||||
return(maxDiff); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q31 (q31_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer |
||||
* @param q31_t* Pointer to input buffer |
||||
* @param uint32_t blockSize |
||||
* @param uint32_t guard_bits |
||||
* @return none |
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/ |
||||
|
||||
void arm_provide_guard_bits_q7 (q7_t * input_buf,
|
||||
uint32_t blockSize, |
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < blockSize; i++) |
||||
{ |
||||
input_buf[i] = input_buf[i] >> guard_bits; |
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Caluclates number of guard bits
|
||||
* @param uint32_t number of additions |
||||
* @return none |
||||
* The function Caluclates the number of guard bits
|
||||
* depending on the numtaps
|
||||
*/ |
||||
|
||||
uint32_t arm_calc_guard_bits (uint32_t num_adds) |
||||
{ |
||||
uint32_t i = 1, j = 0; |
||||
|
||||
if (num_adds == 1) |
||||
{ |
||||
return (0); |
||||
} |
||||
|
||||
while (i < num_adds) |
||||
{ |
||||
i = i * 2; |
||||
j++; |
||||
} |
||||
|
||||
return (j); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts Q15 to floating-point |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
*/ |
||||
|
||||
void arm_apply_guard_bits (float32_t * pIn,
|
||||
uint32_t numSamples,
|
||||
uint32_t guard_bits) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
pIn[i] = pIn[i] * arm_calc_2pow(guard_bits); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Calculates pow(2, numShifts) |
||||
* @param uint32_t number of shifts |
||||
* @return pow(2, numShifts) |
||||
*/ |
||||
uint32_t arm_calc_2pow(uint32_t numShifts) |
||||
{ |
||||
|
||||
uint32_t i, val = 1; |
||||
|
||||
for (i = 0; i < numShifts; i++) |
||||
{ |
||||
val = val * 2; |
||||
}
|
||||
|
||||
return(val); |
||||
} |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q14
|
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q14 (float *pIn, q15_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 16384.0f corresponds to pow(2, 14) */ |
||||
pOut[i] = (q15_t) (pIn[i] * 16384.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFF; |
||||
} |
||||
|
||||
} |
||||
|
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q30 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 1073741824.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 2.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q29 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 1073741824.0f corresponds to pow(2, 30) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 536870912.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 4.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q28 format |
||||
* @param uint32_t number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_float_to_q28 (float *pIn, q31_t * pOut,
|
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
/* 268435456.0f corresponds to pow(2, 28) */ |
||||
pOut[i] = (q31_t) (pIn[i] * 268435456.0f); |
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5; |
||||
|
||||
if (pIn[i] == (float) 8.0) |
||||
{ |
||||
pOut[i] = 0x7FFFFFFF; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clip the float values to +/- 1
|
||||
* @param pIn input buffer |
||||
* @param numSamples number of samples in the buffer |
||||
* @return none |
||||
* The function converts floating point values to fixed point values
|
||||
*/ |
||||
|
||||
void arm_clip_f32 (float *pIn, uint32_t numSamples) |
||||
{ |
||||
uint32_t i; |
||||
|
||||
for (i = 0; i < numSamples; i++) |
||||
{ |
||||
if(pIn[i] > 1.0f) |
||||
{ |
||||
pIn[i] = 1.0; |
||||
} |
||||
else if( pIn[i] < -1.0f) |
||||
{ |
||||
pIn[i] = -1.0; |
||||
} |
||||
|
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
|
||||
@ -0,0 +1,63 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* |
||||
* Title: math_helper.h |
||||
*
|
||||
* Description: Prototypes of all helper functions required.
|
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
|
||||
#include "arm_math.h" |
||||
|
||||
#ifndef MATH_HELPER_H |
||||
#define MATH_HELPER_H |
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples); |
||||
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits); |
||||
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples); |
||||
void arm_clip_f32(float *pIn, uint32_t numSamples); |
||||
uint32_t arm_calc_guard_bits(uint32_t num_adds); |
||||
void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits); |
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples); |
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples); |
||||
uint32_t arm_calc_2pow(uint32_t guard_bits); |
||||
#endif |
||||
|
||||
@ -0,0 +1,161 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 12. March 2014 |
||||
* $Revision: V1.4.3 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_sin_cos_example_f32.c |
||||
* |
||||
* Description: Example code demonstrating sin and cos calculation of input signal. |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup SinCosExample SineCosine Example |
||||
* |
||||
* \par Description: |
||||
* \par |
||||
* Demonstrates the Pythagorean trignometric identity with the use of Cosine, Sine, Vector |
||||
* Multiplication, and Vector Addition functions. |
||||
* |
||||
* \par Algorithm: |
||||
* \par |
||||
* Mathematically, the Pythagorean trignometric identity is defined by the following equation: |
||||
* <pre>sin(x) * sin(x) + cos(x) * cos(x) = 1</pre> |
||||
* where \c x is the angle in radians. |
||||
* |
||||
* \par Block Diagram: |
||||
* \par |
||||
* \image html sinCos.gif |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c testInput_f32 array of input angle in radians |
||||
* \li \c testOutput stores sum of the squares of sine and cosine values of input angle |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_cos_f32() |
||||
* - arm_sin_f32() |
||||
* - arm_mult_f32() |
||||
* - arm_add_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_sin_cos_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_sin_cos_example_f32.c
|
||||
*/ |
||||
|
||||
#include <math.h> |
||||
#include "arm_math.h" |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Defines each of the tests performed |
||||
* ------------------------------------------------------------------- */ |
||||
#define MAX_BLOCKSIZE 32 |
||||
#define DELTA (0.0001f) |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Test input data for Floating point sin_cos example for 32-blockSize |
||||
* Generated by the MATLAB randn() function |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
const float32_t testInput_f32[MAX_BLOCKSIZE] = |
||||
{ |
||||
-1.244916875853235400, -4.793533929171324800, 0.360705030233248850, 0.827929644170887320, -3.299532218312426900, 3.427441903227623800, 3.422401784294607700, -0.108308165334010680, |
||||
0.941943896490312180, 0.502609575000365850, -0.537345278736373500, 2.088817392965764500, -1.693168684143455700, 6.283185307179590700, -0.392545884746175080, 0.327893095115825040, |
||||
3.070147440456292300, 0.170611405884662230, -0.275275082396073010, -2.395492805446796300, 0.847311163536506600, -3.845517018083148800, 2.055818378415868300, 4.672594161978930800, |
||||
-1.990923030266425800, 2.469305197656249500, 3.609002606064021000, -4.586736582331667500, -4.147080139136136300, 1.643756718868359500, -1.150866392366494800, 1.985805026477433800 |
||||
|
||||
|
||||
}; |
||||
|
||||
const float32_t testRefOutput_f32 = 1.000000000; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare Global variables |
||||
* ------------------------------------------------------------------- */ |
||||
uint32_t blockSize = 32; |
||||
float32_t testOutput; |
||||
float32_t cosOutput; |
||||
float32_t sinOutput; |
||||
float32_t cosSquareOutput; |
||||
float32_t sinSquareOutput; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Max magnitude FFT Bin test |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
arm_status status; |
||||
|
||||
int32_t main(void) |
||||
{ |
||||
float32_t diff; |
||||
uint32_t i; |
||||
|
||||
for(i=0; i< blockSize; i++) |
||||
{ |
||||
cosOutput = arm_cos_f32(testInput_f32[i]); |
||||
sinOutput = arm_sin_f32(testInput_f32[i]); |
||||
|
||||
arm_mult_f32(&cosOutput, &cosOutput, &cosSquareOutput, 1); |
||||
arm_mult_f32(&sinOutput, &sinOutput, &sinSquareOutput, 1); |
||||
|
||||
arm_add_f32(&cosSquareOutput, &sinSquareOutput, &testOutput, 1); |
||||
|
||||
/* absolute value of difference between ref and test */ |
||||
diff = fabsf(testRefOutput_f32 - testOutput); |
||||
|
||||
/* Comparison of sin_cos value with reference */ |
||||
if(diff > DELTA) |
||||
{ |
||||
status = ARM_MATH_TEST_FAILURE; |
||||
} |
||||
|
||||
if( status == ARM_MATH_TEST_FAILURE) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
@ -0,0 +1,204 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved. |
||||
* |
||||
* $Date: 17. January 2013 |
||||
* $Revision: V1.4.0 |
||||
* |
||||
* Project: CMSIS DSP Library |
||||
* Title: arm_variance_example_f32.c |
||||
* |
||||
* Description: Example code demonstrating variance calculation of input sequence. |
||||
* |
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the |
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
/**
|
||||
* @ingroup groupExamples |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup VarianceExample Variance Example |
||||
* |
||||
* \par Description: |
||||
* \par |
||||
* Demonstrates the use of Basic Math and Support Functions to calculate the variance of an |
||||
* input sequence with N samples. Uniformly distributed white noise is taken as input. |
||||
* |
||||
* \par Algorithm: |
||||
* \par |
||||
* The variance of a sequence is the mean of the squared deviation of the sequence from its mean. |
||||
* \par |
||||
* This is denoted by the following equation: |
||||
* <pre> variance = ((x[0] - x') * (x[0] - x') + (x[1] - x') * (x[1] - x') + ... + * (x[n-1] - x') * (x[n-1] - x')) / (N-1)</pre> |
||||
* where, <code>x[n]</code> is the input sequence, <code>N</code> is the number of input samples, and |
||||
* <code>x'</code> is the mean value of the input sequence, <code>x[n]</code>. |
||||
* \par |
||||
* The mean value <code>x'</code> is defined as: |
||||
* <pre> x' = (x[0] + x[1] + ... + x[n-1]) / N</pre> |
||||
* |
||||
* \par Block Diagram: |
||||
* \par |
||||
* \image html Variance.gif |
||||
* |
||||
* |
||||
* \par Variables Description: |
||||
* \par |
||||
* \li \c testInput_f32 points to the input data |
||||
* \li \c wire1, \c wir2, \c wire3 temporary buffers |
||||
* \li \c blockSize number of samples processed at a time |
||||
* \li \c refVarianceOut reference variance value |
||||
* |
||||
* \par CMSIS DSP Software Library Functions Used: |
||||
* \par |
||||
* - arm_dot_prod_f32() |
||||
* - arm_mult_f32() |
||||
* - arm_sub_f32() |
||||
* - arm_fill_f32() |
||||
* - arm_copy_f32() |
||||
* |
||||
* <b> Refer </b> |
||||
* \link arm_variance_example_f32.c \endlink |
||||
* |
||||
*/ |
||||
|
||||
|
||||
/** \example arm_variance_example_f32.c
|
||||
*/ |
||||
#include <math.h> |
||||
#include "arm_math.h" |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Defines each of the tests performed |
||||
* ------------------------------------------------------------------- */ |
||||
#define MAX_BLOCKSIZE 32 |
||||
#define DELTA (0.000001f) |
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare I/O buffers |
||||
* ------------------------------------------------------------------- */ |
||||
float32_t wire1[MAX_BLOCKSIZE]; |
||||
float32_t wire2[MAX_BLOCKSIZE]; |
||||
float32_t wire3[MAX_BLOCKSIZE]; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Test input data for Floating point Variance example for 32-blockSize |
||||
* Generated by the MATLAB randn() function |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
float32_t testInput_f32[32] = |
||||
{ |
||||
-0.432564811528221, -1.665584378238097, 0.125332306474831, 0.287676420358549, |
||||
-1.146471350681464, 1.190915465642999, 1.189164201652103, -0.037633276593318, |
||||
0.327292361408654, 0.174639142820925, -0.186708577681439, 0.725790548293303, |
||||
-0.588316543014189, 2.183185818197101, -0.136395883086596, 0.113931313520810, |
||||
1.066768211359189, 0.059281460523605, -0.095648405483669, -0.832349463650022, |
||||
0.294410816392640, -1.336181857937804, 0.714324551818952, 1.623562064446271, |
||||
-0.691775701702287, 0.857996672828263, 1.254001421602532, -1.593729576447477, |
||||
-1.440964431901020, 0.571147623658178, -0.399885577715363, 0.689997375464345 |
||||
|
||||
}; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare Global variables |
||||
* ------------------------------------------------------------------- */ |
||||
uint32_t blockSize = 32; |
||||
float32_t refVarianceOut = 0.903941793931839; |
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Variance calculation test |
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
int32_t main(void) |
||||
{ |
||||
arm_status status; |
||||
float32_t mean, oneByBlockSize; |
||||
float32_t variance; |
||||
float32_t diff; |
||||
|
||||
status = ARM_MATH_SUCCESS; |
||||
|
||||
/* Calculation of mean value of input */ |
||||
|
||||
/* x' = 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */ |
||||
|
||||
/* Fill wire1 buffer with 1.0 value */ |
||||
arm_fill_f32(1.0, wire1, blockSize); |
||||
|
||||
/* Calculate the dot product of wire1 and wire2 */ |
||||
/* (x(0)* 1 + x(1) * 1 + ...+ x(n-1) * 1) */ |
||||
arm_dot_prod_f32(testInput_f32, wire1, blockSize, &mean); |
||||
|
||||
/* Calculation of 1/blockSize */ |
||||
oneByBlockSize = 1.0 / (blockSize); |
||||
|
||||
/* 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */ |
||||
arm_mult_f32(&mean, &oneByBlockSize, &mean, 1); |
||||
|
||||
|
||||
/* Calculation of variance value of input */ |
||||
|
||||
/* (1/blockSize) * (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */ |
||||
|
||||
/* Fill wire2 with mean value x' */ |
||||
arm_fill_f32(mean, wire2, blockSize); |
||||
|
||||
/* wire3 contains (x-x') */ |
||||
arm_sub_f32(testInput_f32, wire2, wire3, blockSize); |
||||
|
||||
/* wire2 contains (x-x') */ |
||||
arm_copy_f32(wire3, wire2, blockSize); |
||||
|
||||
/* (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */ |
||||
arm_dot_prod_f32(wire2, wire3, blockSize, &variance); |
||||
|
||||
/* Calculation of 1/blockSize */ |
||||
oneByBlockSize = 1.0 / (blockSize - 1); |
||||
|
||||
/* Calculation of variance */ |
||||
arm_mult_f32(&variance, &oneByBlockSize, &variance, 1); |
||||
|
||||
/* absolute value of difference between ref and test */ |
||||
diff = fabsf(refVarianceOut - variance); |
||||
|
||||
/* Comparison of variance value with reference */ |
||||
if(diff > DELTA) |
||||
{ |
||||
status = ARM_MATH_TEST_FAILURE; |
||||
} |
||||
|
||||
if( status != ARM_MATH_SUCCESS) |
||||
{ |
||||
while(1); |
||||
} |
||||
|
||||
while(1); /* main function does not return */ |
||||
} |
||||
|
||||
/** \endlink */ |
||||
@ -0,0 +1,165 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_f32.c
|
||||
*
|
||||
* Description: Vector absolute value.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
#include <math.h> |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup BasicAbs Vector Absolute Value
|
||||
*
|
||||
* Computes the absolute value of a vector on an element-by-element basis.
|
||||
*
|
||||
* <pre>
|
||||
* pDst[n] = abs(pSrc[n]), 0 <= n < blockSize.
|
||||
* </pre>
|
||||
*
|
||||
* The functions support in-place computation allowing the source and |
||||
* destination pointers to reference the same memory buffer. |
||||
* There are separate functions for floating-point, Q7, Q15, and Q31 data types. |
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicAbs
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Floating-point vector absolute value.
|
||||
* @param[in] *pSrc points to the input buffer
|
||||
* @param[out] *pDst points to the output buffer
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
void arm_abs_f32( |
||||
float32_t * pSrc, |
||||
float32_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
float32_t in1, in2, in3, in4; /* temporary variables */ |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = |A| */ |
||||
/* Calculate absolute and then store the results in the destination buffer. */ |
||||
/* read sample from source */ |
||||
in1 = *pSrc; |
||||
in2 = *(pSrc + 1); |
||||
in3 = *(pSrc + 2); |
||||
|
||||
/* find absolute value */ |
||||
in1 = fabsf(in1); |
||||
|
||||
/* read sample from source */ |
||||
in4 = *(pSrc + 3); |
||||
|
||||
/* find absolute value */ |
||||
in2 = fabsf(in2); |
||||
|
||||
/* read sample from source */ |
||||
*pDst = in1; |
||||
|
||||
/* find absolute value */ |
||||
in3 = fabsf(in3); |
||||
|
||||
/* find absolute value */ |
||||
in4 = fabsf(in4); |
||||
|
||||
/* store result to destination */ |
||||
*(pDst + 1) = in2; |
||||
|
||||
/* store result to destination */ |
||||
*(pDst + 2) = in3; |
||||
|
||||
/* store result to destination */ |
||||
*(pDst + 3) = in4; |
||||
|
||||
|
||||
/* Update source pointer to process next sampels */ |
||||
pSrc += 4u; |
||||
|
||||
/* Update destination pointer to process next sampels */ |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = |A| */ |
||||
/* Calculate absolute and then store the results in the destination buffer. */ |
||||
*pDst++ = fabsf(*pSrc++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicAbs group
|
||||
*/ |
||||
@ -0,0 +1,179 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_q15.c
|
||||
*
|
||||
* Description: Q15 vector absolute value.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicAbs
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q15 vector absolute value.
|
||||
* @param[in] *pSrc points to the input buffer
|
||||
* @param[out] *pDst points to the output buffer
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
|
||||
*/ |
||||
|
||||
void arm_abs_q15( |
||||
q15_t * pSrc, |
||||
q15_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
__SIMD32_TYPE *simd; |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
|
||||
q15_t in1; /* Input value1 */ |
||||
q15_t in2; /* Input value2 */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
simd = __SIMD32_CONST(pDst); |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = |A| */ |
||||
/* Read two inputs */ |
||||
in1 = *pSrc++; |
||||
in2 = *pSrc++; |
||||
|
||||
|
||||
/* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */ |
||||
#ifndef ARM_MATH_BIG_ENDIAN |
||||
*simd++ = |
||||
__PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), |
||||
((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16); |
||||
|
||||
#else |
||||
|
||||
|
||||
*simd++ = |
||||
__PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), |
||||
((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16); |
||||
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
||||
|
||||
in1 = *pSrc++; |
||||
in2 = *pSrc++; |
||||
|
||||
|
||||
#ifndef ARM_MATH_BIG_ENDIAN |
||||
|
||||
*simd++ = |
||||
__PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), |
||||
((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16); |
||||
|
||||
#else |
||||
|
||||
|
||||
*simd++ = |
||||
__PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), |
||||
((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16); |
||||
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
pDst = (q15_t *)simd; |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = |A| */ |
||||
/* Read the input */ |
||||
in1 = *pSrc++; |
||||
|
||||
/* Calculate absolute value of input and then store the result in the destination buffer. */ |
||||
*pDst++ = (in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
q15_t in; /* Temporary input variable */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = |A| */ |
||||
/* Read the input */ |
||||
in = *pSrc++; |
||||
|
||||
/* Calculate absolute value of input and then store the result in the destination buffer. */ |
||||
*pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicAbs group
|
||||
*/ |
||||
@ -0,0 +1,130 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_q31.c
|
||||
*
|
||||
* Description: Q31 vector absolute value.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicAbs
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 vector absolute value.
|
||||
* @param[in] *pSrc points to the input buffer
|
||||
* @param[out] *pDst points to the output buffer
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
|
||||
*/ |
||||
|
||||
void arm_abs_q31( |
||||
q31_t * pSrc, |
||||
q31_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
q31_t in; /* Input value */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t in1, in2, in3, in4; |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = |A| */ |
||||
/* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */ |
||||
in1 = *pSrc++; |
||||
in2 = *pSrc++; |
||||
in3 = *pSrc++; |
||||
in4 = *pSrc++; |
||||
|
||||
*pDst++ = (in1 > 0) ? in1 : (q31_t)__QSUB(0, in1); |
||||
*pDst++ = (in2 > 0) ? in2 : (q31_t)__QSUB(0, in2); |
||||
*pDst++ = (in3 > 0) ? in3 : (q31_t)__QSUB(0, in3); |
||||
*pDst++ = (in4 > 0) ? in4 : (q31_t)__QSUB(0, in4); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = |A| */ |
||||
/* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */ |
||||
in = *pSrc++; |
||||
*pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicAbs group
|
||||
*/ |
||||
@ -0,0 +1,157 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_abs_q7.c
|
||||
*
|
||||
* Description: Q7 vector absolute value.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicAbs
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q7 vector absolute value.
|
||||
* @param[in] *pSrc points to the input buffer
|
||||
* @param[out] *pDst points to the output buffer
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* \par Conditions for optimum performance
|
||||
* Input and output buffers should be aligned by 32-bit
|
||||
*
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
|
||||
*/ |
||||
|
||||
void arm_abs_q7( |
||||
q7_t * pSrc, |
||||
q7_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
q7_t in; /* Input value1 */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t in1, in2, in3, in4; /* temporary input variables */ |
||||
q31_t out1, out2, out3, out4; /* temporary output variables */ |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = |A| */ |
||||
/* Read inputs */ |
||||
in1 = (q31_t) * pSrc; |
||||
in2 = (q31_t) * (pSrc + 1); |
||||
in3 = (q31_t) * (pSrc + 2); |
||||
|
||||
/* find absolute value */ |
||||
out1 = (in1 > 0) ? in1 : (q31_t)__QSUB8(0, in1); |
||||
|
||||
/* read input */ |
||||
in4 = (q31_t) * (pSrc + 3); |
||||
|
||||
/* find absolute value */ |
||||
out2 = (in2 > 0) ? in2 : (q31_t)__QSUB8(0, in2); |
||||
|
||||
/* store result to destination */ |
||||
*pDst = (q7_t) out1; |
||||
|
||||
/* find absolute value */ |
||||
out3 = (in3 > 0) ? in3 : (q31_t)__QSUB8(0, in3); |
||||
|
||||
/* find absolute value */ |
||||
out4 = (in4 > 0) ? in4 : (q31_t)__QSUB8(0, in4); |
||||
|
||||
/* store result to destination */ |
||||
*(pDst + 1) = (q7_t) out2; |
||||
|
||||
/* store result to destination */ |
||||
*(pDst + 2) = (q7_t) out3; |
||||
|
||||
/* store result to destination */ |
||||
*(pDst + 3) = (q7_t) out4; |
||||
|
||||
/* update pointers to process next samples */ |
||||
pSrc += 4u; |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #define ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = |A| */ |
||||
/* Read the input */ |
||||
in = *pSrc++; |
||||
|
||||
/* Store the Absolute result in the destination buffer */ |
||||
*pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? 0x7f : -in); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicAbs group
|
||||
*/ |
||||
@ -0,0 +1,150 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_f32.c
|
||||
*
|
||||
* Description: Floating-point vector addition.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup BasicAdd Vector Addition
|
||||
*
|
||||
* Element-by-element addition of two vectors.
|
||||
*
|
||||
* <pre>
|
||||
* pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicAdd
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Floating-point vector addition.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
void arm_add_f32( |
||||
float32_t * pSrcA, |
||||
float32_t * pSrcB, |
||||
float32_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */ |
||||
float32_t inB1, inB2, inB3, inB4; /* temporary input variables */ |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + B */ |
||||
/* Add and then store the results in the destination buffer. */ |
||||
|
||||
/* read four inputs from sourceA and four inputs from sourceB */ |
||||
inA1 = *pSrcA; |
||||
inB1 = *pSrcB; |
||||
inA2 = *(pSrcA + 1); |
||||
inB2 = *(pSrcB + 1); |
||||
inA3 = *(pSrcA + 2); |
||||
inB3 = *(pSrcB + 2); |
||||
inA4 = *(pSrcA + 3); |
||||
inB4 = *(pSrcB + 3); |
||||
|
||||
/* C = A + B */ |
||||
/* add and store result to destination */ |
||||
*pDst = inA1 + inB1; |
||||
*(pDst + 1) = inA2 + inB2; |
||||
*(pDst + 2) = inA3 + inB3; |
||||
*(pDst + 3) = inA4 + inB4; |
||||
|
||||
/* update pointers to process next samples */ |
||||
pSrcA += 4u; |
||||
pSrcB += 4u; |
||||
pDst += 4u; |
||||
|
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + B */ |
||||
/* Add and then store the results in the destination buffer. */ |
||||
*pDst++ = (*pSrcA++) + (*pSrcB++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicAdd group
|
||||
*/ |
||||
@ -0,0 +1,140 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_q15.c
|
||||
*
|
||||
* Description: Q15 vector addition
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicAdd
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q15 vector addition.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_add_q15( |
||||
q15_t * pSrcA, |
||||
q15_t * pSrcB, |
||||
q15_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t inA1, inA2, inB1, inB2; |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + B */ |
||||
/* Add and then store the results in the destination buffer. */ |
||||
inA1 = *__SIMD32(pSrcA)++; |
||||
inA2 = *__SIMD32(pSrcA)++; |
||||
inB1 = *__SIMD32(pSrcB)++; |
||||
inB2 = *__SIMD32(pSrcB)++; |
||||
|
||||
*__SIMD32(pDst)++ = __QADD16(inA1, inB1); |
||||
*__SIMD32(pDst)++ = __QADD16(inA2, inB2); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + B */ |
||||
/* Add and then store the results in the destination buffer. */ |
||||
*pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
|
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + B */ |
||||
/* Add and then store the results in the destination buffer. */ |
||||
*pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicAdd group
|
||||
*/ |
||||
@ -0,0 +1,148 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_q31.c
|
||||
*
|
||||
* Description: Q31 vector addition.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicAdd
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 vector addition.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_add_q31( |
||||
q31_t * pSrcA, |
||||
q31_t * pSrcB, |
||||
q31_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t inA1, inA2, inA3, inA4; |
||||
q31_t inB1, inB2, inB3, inB4; |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + B */ |
||||
/* Add and then store the results in the destination buffer. */ |
||||
inA1 = *pSrcA++; |
||||
inA2 = *pSrcA++; |
||||
inB1 = *pSrcB++; |
||||
inB2 = *pSrcB++; |
||||
|
||||
inA3 = *pSrcA++; |
||||
inA4 = *pSrcA++; |
||||
inB3 = *pSrcB++; |
||||
inB4 = *pSrcB++; |
||||
|
||||
*pDst++ = __QADD(inA1, inB1); |
||||
*pDst++ = __QADD(inA2, inB2); |
||||
*pDst++ = __QADD(inA3, inB3); |
||||
*pDst++ = __QADD(inA4, inB4); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + B */ |
||||
/* Add and then store the results in the destination buffer. */ |
||||
*pDst++ = __QADD(*pSrcA++, *pSrcB++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
|
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + B */ |
||||
/* Add and then store the results in the destination buffer. */ |
||||
*pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicAdd group
|
||||
*/ |
||||
@ -0,0 +1,134 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_add_q7.c
|
||||
*
|
||||
* Description: Q7 vector addition.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicAdd
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q7 vector addition.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_add_q7( |
||||
q7_t * pSrcA, |
||||
q7_t * pSrcB, |
||||
q7_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + B */ |
||||
/* Add and then store the results in the destination buffer. */ |
||||
*__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + B */ |
||||
/* Add and then store the results in the destination buffer. */ |
||||
*pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
|
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + B */ |
||||
/* Add and then store the results in the destination buffer. */ |
||||
*pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicAdd group
|
||||
*/ |
||||
@ -0,0 +1,135 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dot_prod_f32.c
|
||||
*
|
||||
* Description: Floating-point dot product.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup dot_prod Vector Dot Product |
||||
* |
||||
* Computes the dot product of two vectors. |
||||
* The vectors are multiplied element-by-element and then summed. |
||||
* |
||||
* <pre> |
||||
* sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1] |
||||
* </pre>
|
||||
* |
||||
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup dot_prod
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Dot product of floating-point vectors.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @param[out] *result output result returned here
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
|
||||
void arm_dot_prod_f32( |
||||
float32_t * pSrcA, |
||||
float32_t * pSrcB, |
||||
uint32_t blockSize, |
||||
float32_t * result) |
||||
{ |
||||
float32_t sum = 0.0f; /* Temporary result storage */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ |
||||
/* Calculate dot product and then store the result in a temporary buffer */ |
||||
sum += (*pSrcA++) * (*pSrcB++); |
||||
sum += (*pSrcA++) * (*pSrcB++); |
||||
sum += (*pSrcA++) * (*pSrcB++); |
||||
sum += (*pSrcA++) * (*pSrcB++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ |
||||
/* Calculate dot product and then store the result in a temporary buffer. */ |
||||
sum += (*pSrcA++) * (*pSrcB++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
/* Store the result back in the destination buffer */ |
||||
*result = sum; |
||||
} |
||||
|
||||
/**
|
||||
* @} end of dot_prod group
|
||||
*/ |
||||
@ -0,0 +1,140 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dot_prod_q15.c
|
||||
*
|
||||
* Description: Q15 dot product.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup dot_prod
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Dot product of Q15 vectors.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @param[out] *result output result returned here
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
|
||||
* results are added to a 64-bit accumulator in 34.30 format.
|
||||
* Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
|
||||
* there is no risk of overflow.
|
||||
* The return result is in 34.30 format.
|
||||
*/ |
||||
|
||||
void arm_dot_prod_q15( |
||||
q15_t * pSrcA, |
||||
q15_t * pSrcB, |
||||
uint32_t blockSize, |
||||
q63_t * result) |
||||
{ |
||||
q63_t sum = 0; /* Temporary result storage */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ |
||||
/* Calculate dot product and then store the result in a temporary buffer. */ |
||||
sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum); |
||||
sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ |
||||
/* Calculate dot product and then store the results in a temporary buffer. */ |
||||
sum = __SMLALD(*pSrcA++, *pSrcB++, sum); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ |
||||
/* Calculate dot product and then store the results in a temporary buffer. */ |
||||
sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
/* Store the result in the destination buffer in 34.30 format */ |
||||
*result = sum; |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of dot_prod group
|
||||
*/ |
||||
@ -0,0 +1,143 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dot_prod_q31.c
|
||||
*
|
||||
* Description: Q31 dot product.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup dot_prod
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Dot product of Q31 vectors.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @param[out] *result output result returned here
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
|
||||
* are truncated to 2.48 format by discarding the lower 14 bits.
|
||||
* The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
|
||||
* There are 15 guard bits in the accumulator and there is no risk of overflow as long as
|
||||
* the length of the vectors is less than 2^16 elements.
|
||||
* The return result is in 16.48 format.
|
||||
*/ |
||||
|
||||
void arm_dot_prod_q31( |
||||
q31_t * pSrcA, |
||||
q31_t * pSrcB, |
||||
uint32_t blockSize, |
||||
q63_t * result) |
||||
{ |
||||
q63_t sum = 0; /* Temporary result storage */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t inA1, inA2, inA3, inA4; |
||||
q31_t inB1, inB2, inB3, inB4; |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ |
||||
/* Calculate dot product and then store the result in a temporary buffer. */ |
||||
inA1 = *pSrcA++; |
||||
inA2 = *pSrcA++; |
||||
inA3 = *pSrcA++; |
||||
inA4 = *pSrcA++; |
||||
inB1 = *pSrcB++; |
||||
inB2 = *pSrcB++; |
||||
inB3 = *pSrcB++; |
||||
inB4 = *pSrcB++; |
||||
|
||||
sum += ((q63_t) inA1 * inB1) >> 14u; |
||||
sum += ((q63_t) inA2 * inB2) >> 14u; |
||||
sum += ((q63_t) inA3 * inB3) >> 14u; |
||||
sum += ((q63_t) inA4 * inB4) >> 14u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ |
||||
/* Calculate dot product and then store the result in a temporary buffer. */ |
||||
sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* Store the result in the destination buffer in 16.48 format */ |
||||
*result = sum; |
||||
} |
||||
|
||||
/**
|
||||
* @} end of dot_prod group
|
||||
*/ |
||||
@ -0,0 +1,159 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dot_prod_q7.c
|
||||
*
|
||||
* Description: Q7 dot product.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup dot_prod
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Dot product of Q7 vectors.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @param[out] *result output result returned here
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
|
||||
* results are added to an accumulator in 18.14 format.
|
||||
* Nonsaturating additions are used and there is no danger of wrap around as long as
|
||||
* the vectors are less than 2^18 elements long.
|
||||
* The return result is in 18.14 format.
|
||||
*/ |
||||
|
||||
void arm_dot_prod_q7( |
||||
q7_t * pSrcA, |
||||
q7_t * pSrcB, |
||||
uint32_t blockSize, |
||||
q31_t * result) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
q31_t sum = 0; /* Temporary variables to store output */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
|
||||
q31_t input1, input2; /* Temporary variables to store input */ |
||||
q31_t inA1, inA2, inB1, inB2; /* Temporary variables to store input */ |
||||
|
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* read 4 samples at a time from sourceA */ |
||||
input1 = *__SIMD32(pSrcA)++; |
||||
/* read 4 samples at a time from sourceB */ |
||||
input2 = *__SIMD32(pSrcB)++; |
||||
|
||||
/* extract two q7_t samples to q15_t samples */ |
||||
inA1 = __SXTB16(__ROR(input1, 8)); |
||||
/* extract reminaing two samples */ |
||||
inA2 = __SXTB16(input1); |
||||
/* extract two q7_t samples to q15_t samples */ |
||||
inB1 = __SXTB16(__ROR(input2, 8)); |
||||
/* extract reminaing two samples */ |
||||
inB2 = __SXTB16(input2); |
||||
|
||||
/* multiply and accumulate two samples at a time */ |
||||
sum = __SMLAD(inA1, inB1, sum); |
||||
sum = __SMLAD(inA2, inB2, sum); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ |
||||
/* Dot product and then store the results in a temporary buffer. */ |
||||
sum = __SMLAD(*pSrcA++, *pSrcB++, sum); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
|
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ |
||||
/* Dot product and then store the results in a temporary buffer. */ |
||||
sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
|
||||
/* Store the result in the destination buffer in 18.14 format */ |
||||
*result = sum; |
||||
} |
||||
|
||||
/**
|
||||
* @} end of dot_prod group
|
||||
*/ |
||||
@ -0,0 +1,174 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_mult_f32.c
|
||||
*
|
||||
* Description: Floating-point vector multiplication.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup BasicMult Vector Multiplication
|
||||
*
|
||||
* Element-by-element multiplication of two vectors.
|
||||
*
|
||||
* <pre>
|
||||
* pDst[n] = pSrcA[n] * pSrcB[n], 0 <= n < blockSize.
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicMult
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Floating-point vector multiplication.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
void arm_mult_f32( |
||||
float32_t * pSrcA, |
||||
float32_t * pSrcB, |
||||
float32_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counters */ |
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
float32_t inA1, inA2, inA3, inA4; /* temporary input variables */ |
||||
float32_t inB1, inB2, inB3, inB4; /* temporary input variables */ |
||||
float32_t out1, out2, out3, out4; /* temporary output variables */ |
||||
|
||||
/* loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * B */ |
||||
/* Multiply the inputs and store the results in output buffer */ |
||||
/* read sample from sourceA */ |
||||
inA1 = *pSrcA; |
||||
/* read sample from sourceB */ |
||||
inB1 = *pSrcB; |
||||
/* read sample from sourceA */ |
||||
inA2 = *(pSrcA + 1); |
||||
/* read sample from sourceB */ |
||||
inB2 = *(pSrcB + 1); |
||||
|
||||
/* out = sourceA * sourceB */ |
||||
out1 = inA1 * inB1; |
||||
|
||||
/* read sample from sourceA */ |
||||
inA3 = *(pSrcA + 2); |
||||
/* read sample from sourceB */ |
||||
inB3 = *(pSrcB + 2); |
||||
|
||||
/* out = sourceA * sourceB */ |
||||
out2 = inA2 * inB2; |
||||
|
||||
/* read sample from sourceA */ |
||||
inA4 = *(pSrcA + 3); |
||||
|
||||
/* store result to destination buffer */ |
||||
*pDst = out1; |
||||
|
||||
/* read sample from sourceB */ |
||||
inB4 = *(pSrcB + 3); |
||||
|
||||
/* out = sourceA * sourceB */ |
||||
out3 = inA3 * inB3; |
||||
|
||||
/* store result to destination buffer */ |
||||
*(pDst + 1) = out2; |
||||
|
||||
/* out = sourceA * sourceB */ |
||||
out4 = inA4 * inB4; |
||||
/* store result to destination buffer */ |
||||
*(pDst + 2) = out3; |
||||
/* store result to destination buffer */ |
||||
*(pDst + 3) = out4; |
||||
|
||||
|
||||
/* update pointers to process next samples */ |
||||
pSrcA += 4u; |
||||
pSrcB += 4u; |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * B */ |
||||
/* Multiply the inputs and store the results in output buffer */ |
||||
*pDst++ = (*pSrcA++) * (*pSrcB++); |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicMult group
|
||||
*/ |
||||
@ -0,0 +1,154 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. October 2015 |
||||
* $Revision: V.1.4.5 a |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_mult_q15.c
|
||||
*
|
||||
* Description: Q15 vector multiplication.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicMult
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 vector multiplication
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_mult_q15( |
||||
q15_t * pSrcA, |
||||
q15_t * pSrcB, |
||||
q15_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counters */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t inA1, inA2, inB1, inB2; /* temporary input variables */ |
||||
q15_t out1, out2, out3, out4; /* temporary output variables */ |
||||
q31_t mul1, mul2, mul3, mul4; /* temporary variables */ |
||||
|
||||
/* loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* read two samples at a time from sourceA */ |
||||
inA1 = *__SIMD32(pSrcA)++; |
||||
/* read two samples at a time from sourceB */ |
||||
inB1 = *__SIMD32(pSrcB)++; |
||||
/* read two samples at a time from sourceA */ |
||||
inA2 = *__SIMD32(pSrcA)++; |
||||
/* read two samples at a time from sourceB */ |
||||
inB2 = *__SIMD32(pSrcB)++; |
||||
|
||||
/* multiply mul = sourceA * sourceB */ |
||||
mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); |
||||
mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1); |
||||
mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16)); |
||||
mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2); |
||||
|
||||
/* saturate result to 16 bit */ |
||||
out1 = (q15_t) __SSAT(mul1 >> 15, 16); |
||||
out2 = (q15_t) __SSAT(mul2 >> 15, 16); |
||||
out3 = (q15_t) __SSAT(mul3 >> 15, 16); |
||||
out4 = (q15_t) __SSAT(mul4 >> 15, 16); |
||||
|
||||
/* store the result */ |
||||
#ifndef ARM_MATH_BIG_ENDIAN |
||||
|
||||
*__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); |
||||
*__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); |
||||
|
||||
#else |
||||
|
||||
*__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); |
||||
*__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); |
||||
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * B */ |
||||
/* Multiply the inputs and store the result in the destination buffer */ |
||||
*pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16); |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicMult group
|
||||
*/ |
||||
@ -0,0 +1,160 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_mult_q31.c
|
||||
*
|
||||
* Description: Q31 vector multiplication.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicMult
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q31 vector multiplication.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_mult_q31( |
||||
q31_t * pSrcA, |
||||
q31_t * pSrcB, |
||||
q31_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counters */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t inA1, inA2, inA3, inA4; /* temporary input variables */ |
||||
q31_t inB1, inB2, inB3, inB4; /* temporary input variables */ |
||||
q31_t out1, out2, out3, out4; /* temporary output variables */ |
||||
|
||||
/* loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * B */ |
||||
/* Multiply the inputs and then store the results in the destination buffer. */ |
||||
inA1 = *pSrcA++; |
||||
inA2 = *pSrcA++; |
||||
inA3 = *pSrcA++; |
||||
inA4 = *pSrcA++; |
||||
inB1 = *pSrcB++; |
||||
inB2 = *pSrcB++; |
||||
inB3 = *pSrcB++; |
||||
inB4 = *pSrcB++; |
||||
|
||||
out1 = ((q63_t) inA1 * inB1) >> 32; |
||||
out2 = ((q63_t) inA2 * inB2) >> 32; |
||||
out3 = ((q63_t) inA3 * inB3) >> 32; |
||||
out4 = ((q63_t) inA4 * inB4) >> 32; |
||||
|
||||
out1 = __SSAT(out1, 31); |
||||
out2 = __SSAT(out2, 31); |
||||
out3 = __SSAT(out3, 31); |
||||
out4 = __SSAT(out4, 31); |
||||
|
||||
*pDst++ = out1 << 1u; |
||||
*pDst++ = out2 << 1u; |
||||
*pDst++ = out3 << 1u; |
||||
*pDst++ = out4 << 1u; |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * B */ |
||||
/* Multiply the inputs and then store the results in the destination buffer. */ |
||||
inA1 = *pSrcA++; |
||||
inB1 = *pSrcB++; |
||||
out1 = ((q63_t) inA1 * inB1) >> 32; |
||||
out1 = __SSAT(out1, 31); |
||||
*pDst++ = out1 << 1u; |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * B */ |
||||
/* Multiply the inputs and then store the results in the destination buffer. */ |
||||
*pDst++ = |
||||
(q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31); |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicMult group
|
||||
*/ |
||||
@ -0,0 +1,127 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_mult_q7.c
|
||||
*
|
||||
* Description: Q7 vector multiplication.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicMult
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q7 vector multiplication
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_mult_q7( |
||||
q7_t * pSrcA, |
||||
q7_t * pSrcB, |
||||
q7_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counters */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q7_t out1, out2, out3, out4; /* Temporary variables to store the product */ |
||||
|
||||
/* loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * B */ |
||||
/* Multiply the inputs and store the results in temporary variables */ |
||||
out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); |
||||
out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); |
||||
out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); |
||||
out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); |
||||
|
||||
/* Store the results of 4 inputs in the destination buffer in single cycle by packing */ |
||||
*__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4); |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * B */ |
||||
/* Multiply the inputs and store the result in the destination buffer */ |
||||
*pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicMult group
|
||||
*/ |
||||
@ -0,0 +1,146 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_negate_f32.c
|
||||
*
|
||||
* Description: Negates floating-point vectors.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup negate Vector Negate
|
||||
*
|
||||
* Negates the elements of a vector.
|
||||
*
|
||||
* <pre>
|
||||
* pDst[n] = -pSrc[n], 0 <= n < blockSize.
|
||||
* </pre>
|
||||
* |
||||
* The functions support in-place computation allowing the source and |
||||
* destination pointers to reference the same memory buffer. |
||||
* There are separate functions for floating-point, Q7, Q15, and Q31 data types. |
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup negate
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Negates the elements of a floating-point vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
void arm_negate_f32( |
||||
float32_t * pSrc, |
||||
float32_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
float32_t in1, in2, in3, in4; /* temporary variables */ |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* read inputs from source */ |
||||
in1 = *pSrc; |
||||
in2 = *(pSrc + 1); |
||||
in3 = *(pSrc + 2); |
||||
in4 = *(pSrc + 3); |
||||
|
||||
/* negate the input */ |
||||
in1 = -in1; |
||||
in2 = -in2; |
||||
in3 = -in3; |
||||
in4 = -in4; |
||||
|
||||
/* store the result to destination */ |
||||
*pDst = in1; |
||||
*(pDst + 1) = in2; |
||||
*(pDst + 2) = in3; |
||||
*(pDst + 3) = in4; |
||||
|
||||
/* update pointers to process next samples */ |
||||
pSrc += 4u; |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = -A */ |
||||
/* Negate and then store the results in the destination buffer. */ |
||||
*pDst++ = -*pSrc++; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of negate group
|
||||
*/ |
||||
@ -0,0 +1,142 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_negate_q15.c
|
||||
*
|
||||
* Description: Negates Q15 vectors.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup negate
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Negates the elements of a Q15 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
* \par Conditions for optimum performance
|
||||
* Input and output buffers should be aligned by 32-bit
|
||||
*
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
|
||||
*/ |
||||
|
||||
void arm_negate_q15( |
||||
q15_t * pSrc, |
||||
q15_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
q15_t in; |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
|
||||
q31_t in1, in2; /* Temporary variables */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = -A */ |
||||
/* Read two inputs at a time */ |
||||
in1 = _SIMD32_OFFSET(pSrc); |
||||
in2 = _SIMD32_OFFSET(pSrc + 2); |
||||
|
||||
/* negate two samples at a time */ |
||||
in1 = __QSUB16(0, in1); |
||||
|
||||
/* negate two samples at a time */ |
||||
in2 = __QSUB16(0, in2); |
||||
|
||||
/* store the result to destination 2 samples at a time */ |
||||
_SIMD32_OFFSET(pDst) = in1; |
||||
/* store the result to destination 2 samples at a time */ |
||||
_SIMD32_OFFSET(pDst + 2) = in2; |
||||
|
||||
|
||||
/* update pointers to process next samples */ |
||||
pSrc += 4u; |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = -A */ |
||||
/* Negate and then store the result in the destination buffer. */ |
||||
in = *pSrc++; |
||||
*pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of negate group
|
||||
*/ |
||||
@ -0,0 +1,129 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_negate_q31.c
|
||||
*
|
||||
* Description: Negates Q31 vectors.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup negate
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Negates the elements of a Q31 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
|
||||
*/ |
||||
|
||||
void arm_negate_q31( |
||||
q31_t * pSrc, |
||||
q31_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
q31_t in; /* Temporary variable */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t in1, in2, in3, in4; |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = -A */ |
||||
/* Negate and then store the results in the destination buffer. */ |
||||
in1 = *pSrc++; |
||||
in2 = *pSrc++; |
||||
in3 = *pSrc++; |
||||
in4 = *pSrc++; |
||||
|
||||
*pDst++ = __QSUB(0, in1); |
||||
*pDst++ = __QSUB(0, in2); |
||||
*pDst++ = __QSUB(0, in3); |
||||
*pDst++ = __QSUB(0, in4); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = -A */ |
||||
/* Negate and then store the result in the destination buffer. */ |
||||
in = *pSrc++; |
||||
*pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of negate group
|
||||
*/ |
||||
@ -0,0 +1,125 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_negate_q7.c
|
||||
*
|
||||
* Description: Negates Q7 vectors.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup negate
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Negates the elements of a Q7 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
|
||||
*/ |
||||
|
||||
void arm_negate_q7( |
||||
q7_t * pSrc, |
||||
q7_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
q7_t in; |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t input; /* Input values1-4 */ |
||||
q31_t zero = 0x00000000; |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = -A */ |
||||
/* Read four inputs */ |
||||
input = *__SIMD32(pSrc)++; |
||||
|
||||
/* Store the Negated results in the destination buffer in a single cycle by packing the results */ |
||||
*__SIMD32(pDst)++ = __QSUB8(zero, input); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = -A */ |
||||
/* Negate and then store the results in the destination buffer. */ \
|
||||
in = *pSrc++; |
||||
*pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of negate group
|
||||
*/ |
||||
@ -0,0 +1,165 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_offset_f32.c
|
||||
*
|
||||
* Description: Floating-point vector offset.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup offset Vector Offset
|
||||
*
|
||||
* Adds a constant offset to each element of a vector.
|
||||
*
|
||||
* <pre>
|
||||
* pDst[n] = pSrc[n] + offset, 0 <= n < blockSize.
|
||||
* </pre>
|
||||
*
|
||||
* The functions support in-place computation allowing the source and |
||||
* destination pointers to reference the same memory buffer. |
||||
* There are separate functions for floating-point, Q7, Q15, and Q31 data types. |
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup offset
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Adds a constant offset to a floating-point vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] offset is the offset to be added
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
|
||||
void arm_offset_f32( |
||||
float32_t * pSrc, |
||||
float32_t offset, |
||||
float32_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
float32_t in1, in2, in3, in4; |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + offset */ |
||||
/* Add offset and then store the results in the destination buffer. */ |
||||
/* read samples from source */ |
||||
in1 = *pSrc; |
||||
in2 = *(pSrc + 1); |
||||
|
||||
/* add offset to input */ |
||||
in1 = in1 + offset; |
||||
|
||||
/* read samples from source */ |
||||
in3 = *(pSrc + 2); |
||||
|
||||
/* add offset to input */ |
||||
in2 = in2 + offset; |
||||
|
||||
/* read samples from source */ |
||||
in4 = *(pSrc + 3); |
||||
|
||||
/* add offset to input */ |
||||
in3 = in3 + offset; |
||||
|
||||
/* store result to destination */ |
||||
*pDst = in1; |
||||
|
||||
/* add offset to input */ |
||||
in4 = in4 + offset; |
||||
|
||||
/* store result to destination */ |
||||
*(pDst + 1) = in2; |
||||
|
||||
/* store result to destination */ |
||||
*(pDst + 2) = in3; |
||||
|
||||
/* store result to destination */ |
||||
*(pDst + 3) = in4; |
||||
|
||||
/* update pointers to process next samples */ |
||||
pSrc += 4u; |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + offset */ |
||||
/* Add offset and then store the result in the destination buffer. */ |
||||
*pDst++ = (*pSrc++) + offset; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of offset group
|
||||
*/ |
||||
@ -0,0 +1,136 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_offset_q15.c
|
||||
*
|
||||
* Description: Q15 vector offset.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup offset
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Adds a constant offset to a Q15 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] offset is the offset to be added
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
|
||||
*/ |
||||
|
||||
void arm_offset_q15( |
||||
q15_t * pSrc, |
||||
q15_t offset, |
||||
q15_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t offset_packed; /* Offset packed to 32 bit */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* Offset is packed to 32 bit in order to use SIMD32 for addition */ |
||||
offset_packed = __PKHBT(offset, offset, 16); |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + offset */ |
||||
/* Add offset and then store the results in the destination buffer, 2 samples at a time. */ |
||||
*__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed); |
||||
*__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + offset */ |
||||
/* Add offset and then store the results in the destination buffer. */ |
||||
*pDst++ = (q15_t) __QADD16(*pSrc++, offset); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + offset */ |
||||
/* Add offset and then store the results in the destination buffer. */ |
||||
*pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of offset group
|
||||
*/ |
||||
@ -0,0 +1,140 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_offset_q31.c
|
||||
*
|
||||
* Description: Q31 vector offset.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup offset
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Adds a constant offset to a Q31 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] offset is the offset to be added
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
|
||||
*/ |
||||
|
||||
void arm_offset_q31( |
||||
q31_t * pSrc, |
||||
q31_t offset, |
||||
q31_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t in1, in2, in3, in4; |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + offset */ |
||||
/* Add offset and then store the results in the destination buffer. */ |
||||
in1 = *pSrc++; |
||||
in2 = *pSrc++; |
||||
in3 = *pSrc++; |
||||
in4 = *pSrc++; |
||||
|
||||
*pDst++ = __QADD(in1, offset); |
||||
*pDst++ = __QADD(in2, offset); |
||||
*pDst++ = __QADD(in3, offset); |
||||
*pDst++ = __QADD(in4, offset); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + offset */ |
||||
/* Add offset and then store the result in the destination buffer. */ |
||||
*pDst++ = __QADD(*pSrc++, offset); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + offset */ |
||||
/* Add offset and then store the result in the destination buffer. */ |
||||
*pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of offset group
|
||||
*/ |
||||
@ -0,0 +1,135 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_offset_q7.c
|
||||
*
|
||||
* Description: Q7 vector offset.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup offset
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Adds a constant offset to a Q7 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] offset is the offset to be added
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
|
||||
*/ |
||||
|
||||
void arm_offset_q7( |
||||
q7_t * pSrc, |
||||
q7_t offset, |
||||
q7_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t offset_packed; /* Offset packed to 32 bit */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* Offset is packed to 32 bit in order to use SIMD32 for addition */ |
||||
offset_packed = __PACKq7(offset, offset, offset, offset); |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + offset */ |
||||
/* Add offset and then store the results in the destination bufferfor 4 samples at a time. */ |
||||
*__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + offset */ |
||||
/* Add offset and then store the result in the destination buffer. */ |
||||
*pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A + offset */ |
||||
/* Add offset and then store the result in the destination buffer. */ |
||||
*pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of offset group
|
||||
*/ |
||||
@ -0,0 +1,169 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_scale_f32.c
|
||||
*
|
||||
* Description: Multiplies a floating-point vector by a scalar.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup scale Vector Scale
|
||||
*
|
||||
* Multiply a vector by a scalar value. For floating-point data, the algorithm used is:
|
||||
*
|
||||
* <pre>
|
||||
* pDst[n] = pSrc[n] * scale, 0 <= n < blockSize.
|
||||
* </pre>
|
||||
*
|
||||
* In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
|
||||
* a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
|
||||
* The shift allows the gain of the scaling operation to exceed 1.0.
|
||||
* The algorithm used with fixed-point data is:
|
||||
*
|
||||
* <pre>
|
||||
* pDst[n] = (pSrc[n] * scaleFract) << shift, 0 <= n < blockSize.
|
||||
* </pre>
|
||||
*
|
||||
* The overall scale factor applied to the fixed-point data is
|
||||
* <pre>
|
||||
* scale = scaleFract * 2^shift.
|
||||
* </pre>
|
||||
* |
||||
* The functions support in-place computation allowing the source and destination |
||||
* pointers to reference the same memory buffer. |
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup scale
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Multiplies a floating-point vector by a scalar.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] scale scale factor to be applied
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
|
||||
void arm_scale_f32( |
||||
float32_t * pSrc, |
||||
float32_t scale, |
||||
float32_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
float32_t in1, in2, in3, in4; /* temporary variabels */ |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * scale */ |
||||
/* Scale the input and then store the results in the destination buffer. */ |
||||
/* read input samples from source */ |
||||
in1 = *pSrc; |
||||
in2 = *(pSrc + 1); |
||||
|
||||
/* multiply with scaling factor */ |
||||
in1 = in1 * scale; |
||||
|
||||
/* read input sample from source */ |
||||
in3 = *(pSrc + 2); |
||||
|
||||
/* multiply with scaling factor */ |
||||
in2 = in2 * scale; |
||||
|
||||
/* read input sample from source */ |
||||
in4 = *(pSrc + 3); |
||||
|
||||
/* multiply with scaling factor */ |
||||
in3 = in3 * scale; |
||||
in4 = in4 * scale; |
||||
/* store the result to destination */ |
||||
*pDst = in1; |
||||
*(pDst + 1) = in2; |
||||
*(pDst + 2) = in3; |
||||
*(pDst + 3) = in4; |
||||
|
||||
/* update pointers to process next samples */ |
||||
pSrc += 4u; |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * scale */ |
||||
/* Scale the input and then store the result in the destination buffer. */ |
||||
*pDst++ = (*pSrc++) * scale; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of scale group
|
||||
*/ |
||||
@ -0,0 +1,162 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_scale_q15.c
|
||||
*
|
||||
* Description: Multiplies a Q15 vector by a scalar.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup scale
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Multiplies a Q15 vector by a scalar.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] scaleFract fractional portion of the scale value
|
||||
* @param[in] shift number of bits to shift the result by
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
|
||||
* These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
|
||||
*/ |
||||
|
||||
|
||||
void arm_scale_q15( |
||||
q15_t * pSrc, |
||||
q15_t scaleFract, |
||||
int8_t shift, |
||||
q15_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
int8_t kShift = 15 - shift; /* shift to apply after scaling */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q15_t in1, in2, in3, in4; |
||||
q31_t inA1, inA2; /* Temporary variables */ |
||||
q31_t out1, out2, out3, out4; |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* Reading 2 inputs from memory */ |
||||
inA1 = *__SIMD32(pSrc)++; |
||||
inA2 = *__SIMD32(pSrc)++; |
||||
|
||||
/* C = A * scale */ |
||||
/* Scale the inputs and then store the 2 results in the destination buffer
|
||||
* in single cycle by packing the outputs */ |
||||
out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract); |
||||
out2 = (q31_t) ((q15_t) inA1 * scaleFract); |
||||
out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract); |
||||
out4 = (q31_t) ((q15_t) inA2 * scaleFract); |
||||
|
||||
/* apply shifting */ |
||||
out1 = out1 >> kShift; |
||||
out2 = out2 >> kShift; |
||||
out3 = out3 >> kShift; |
||||
out4 = out4 >> kShift; |
||||
|
||||
/* saturate the output */ |
||||
in1 = (q15_t) (__SSAT(out1, 16)); |
||||
in2 = (q15_t) (__SSAT(out2, 16)); |
||||
in3 = (q15_t) (__SSAT(out3, 16)); |
||||
in4 = (q15_t) (__SSAT(out4, 16)); |
||||
|
||||
/* store the result to destination */ |
||||
*__SIMD32(pDst)++ = __PKHBT(in2, in1, 16); |
||||
*__SIMD32(pDst)++ = __PKHBT(in4, in3, 16); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * scale */ |
||||
/* Scale the input and then store the result in the destination buffer. */ |
||||
*pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16)); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * scale */ |
||||
/* Scale the input and then store the result in the destination buffer. */ |
||||
*pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16)); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of scale group
|
||||
*/ |
||||
@ -0,0 +1,239 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_scale_q31.c
|
||||
*
|
||||
* Description: Multiplies a Q31 vector by a scalar.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup scale
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Multiplies a Q31 vector by a scalar.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] scaleFract fractional portion of the scale value
|
||||
* @param[in] shift number of bits to shift the result by
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
|
||||
* These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
|
||||
*/ |
||||
|
||||
void arm_scale_q31( |
||||
q31_t * pSrc, |
||||
q31_t scaleFract, |
||||
int8_t shift, |
||||
q31_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
int8_t kShift = shift + 1; /* Shift to apply after scaling */ |
||||
int8_t sign = (kShift & 0x80); |
||||
uint32_t blkCnt; /* loop counter */ |
||||
q31_t in, out; |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
|
||||
q31_t in1, in2, in3, in4; /* temporary input variables */ |
||||
q31_t out1, out2, out3, out4; /* temporary output variabels */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
if(sign == 0u) |
||||
{ |
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* read four inputs from source */ |
||||
in1 = *pSrc; |
||||
in2 = *(pSrc + 1); |
||||
in3 = *(pSrc + 2); |
||||
in4 = *(pSrc + 3); |
||||
|
||||
/* multiply input with scaler value */ |
||||
in1 = ((q63_t) in1 * scaleFract) >> 32; |
||||
in2 = ((q63_t) in2 * scaleFract) >> 32; |
||||
in3 = ((q63_t) in3 * scaleFract) >> 32; |
||||
in4 = ((q63_t) in4 * scaleFract) >> 32; |
||||
|
||||
/* apply shifting */ |
||||
out1 = in1 << kShift; |
||||
out2 = in2 << kShift; |
||||
|
||||
/* saturate the results. */ |
||||
if(in1 != (out1 >> kShift)) |
||||
out1 = 0x7FFFFFFF ^ (in1 >> 31); |
||||
|
||||
if(in2 != (out2 >> kShift)) |
||||
out2 = 0x7FFFFFFF ^ (in2 >> 31); |
||||
|
||||
out3 = in3 << kShift; |
||||
out4 = in4 << kShift; |
||||
|
||||
*pDst = out1; |
||||
*(pDst + 1) = out2; |
||||
|
||||
if(in3 != (out3 >> kShift)) |
||||
out3 = 0x7FFFFFFF ^ (in3 >> 31); |
||||
|
||||
if(in4 != (out4 >> kShift)) |
||||
out4 = 0x7FFFFFFF ^ (in4 >> 31); |
||||
|
||||
/* Store result destination */ |
||||
*(pDst + 2) = out3; |
||||
*(pDst + 3) = out4; |
||||
|
||||
/* Update pointers to process next sampels */ |
||||
pSrc += 4u; |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
} |
||||
else |
||||
{ |
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* read four inputs from source */ |
||||
in1 = *pSrc; |
||||
in2 = *(pSrc + 1); |
||||
in3 = *(pSrc + 2); |
||||
in4 = *(pSrc + 3); |
||||
|
||||
/* multiply input with scaler value */ |
||||
in1 = ((q63_t) in1 * scaleFract) >> 32; |
||||
in2 = ((q63_t) in2 * scaleFract) >> 32; |
||||
in3 = ((q63_t) in3 * scaleFract) >> 32; |
||||
in4 = ((q63_t) in4 * scaleFract) >> 32; |
||||
|
||||
/* apply shifting */ |
||||
out1 = in1 >> -kShift; |
||||
out2 = in2 >> -kShift; |
||||
|
||||
out3 = in3 >> -kShift; |
||||
out4 = in4 >> -kShift; |
||||
|
||||
/* Store result destination */ |
||||
*pDst = out1; |
||||
*(pDst + 1) = out2; |
||||
|
||||
*(pDst + 2) = out3; |
||||
*(pDst + 3) = out4; |
||||
|
||||
/* Update pointers to process next sampels */ |
||||
pSrc += 4u; |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
if(sign == 0) |
||||
{ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * scale */ |
||||
/* Scale the input and then store the result in the destination buffer. */ |
||||
in = *pSrc++; |
||||
in = ((q63_t) in * scaleFract) >> 32; |
||||
|
||||
out = in << kShift; |
||||
|
||||
if(in != (out >> kShift)) |
||||
out = 0x7FFFFFFF ^ (in >> 31); |
||||
|
||||
*pDst++ = out; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
else |
||||
{ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * scale */ |
||||
/* Scale the input and then store the result in the destination buffer. */ |
||||
in = *pSrc++; |
||||
in = ((q63_t) in * scaleFract) >> 32; |
||||
|
||||
out = in >> -kShift; |
||||
|
||||
*pDst++ = out; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of scale group
|
||||
*/ |
||||
@ -0,0 +1,149 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_scale_q7.c
|
||||
*
|
||||
* Description: Multiplies a Q7 vector by a scalar.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup scale
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Multiplies a Q7 vector by a scalar.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] scaleFract fractional portion of the scale value
|
||||
* @param[in] shift number of bits to shift the result by
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
|
||||
* These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
|
||||
*/ |
||||
|
||||
void arm_scale_q7( |
||||
q7_t * pSrc, |
||||
q7_t scaleFract, |
||||
int8_t shift, |
||||
q7_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
int8_t kShift = 7 - shift; /* shift to apply after scaling */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* Reading 4 inputs from memory */ |
||||
in1 = *pSrc++; |
||||
in2 = *pSrc++; |
||||
in3 = *pSrc++; |
||||
in4 = *pSrc++; |
||||
|
||||
/* C = A * scale */ |
||||
/* Scale the inputs and then store the results in the temporary variables. */ |
||||
out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8)); |
||||
out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8)); |
||||
out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8)); |
||||
out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8)); |
||||
|
||||
/* Packing the individual outputs into 32bit and storing in
|
||||
* destination buffer in single write */ |
||||
*__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * scale */ |
||||
/* Scale the input and then store the result in the destination buffer. */ |
||||
*pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8)); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A * scale */ |
||||
/* Scale the input and then store the result in the destination buffer. */ |
||||
*pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8)); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of scale group
|
||||
*/ |
||||
@ -0,0 +1,248 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_shift_q15.c
|
||||
*
|
||||
* Description: Shifts the elements of a Q15 vector by a specified number of bits.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup shift
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Shifts the elements of a Q15 vector a specified number of bits.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_shift_q15( |
||||
q15_t * pSrc, |
||||
int8_t shiftBits, |
||||
q15_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
uint8_t sign; /* Sign of shiftBits */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
|
||||
q15_t in1, in2; /* Temporary variables */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* Getting the sign of shiftBits */ |
||||
sign = (shiftBits & 0x80); |
||||
|
||||
/* If the shift value is positive then do right shift else left shift */ |
||||
if(sign == 0u) |
||||
{ |
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* Read 2 inputs */ |
||||
in1 = *pSrc++; |
||||
in2 = *pSrc++; |
||||
/* C = A << shiftBits */ |
||||
/* Shift the inputs and then store the results in the destination buffer. */ |
||||
#ifndef ARM_MATH_BIG_ENDIAN |
||||
|
||||
*__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16), |
||||
__SSAT((in2 << shiftBits), 16), 16); |
||||
|
||||
#else |
||||
|
||||
*__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16), |
||||
__SSAT((in1 << shiftBits), 16), 16); |
||||
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
||||
|
||||
in1 = *pSrc++; |
||||
in2 = *pSrc++; |
||||
|
||||
#ifndef ARM_MATH_BIG_ENDIAN |
||||
|
||||
*__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16), |
||||
__SSAT((in2 << shiftBits), 16), 16); |
||||
|
||||
#else |
||||
|
||||
*__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16), |
||||
__SSAT((in1 << shiftBits), 16), 16); |
||||
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A << shiftBits */ |
||||
/* Shift and then store the results in the destination buffer. */ |
||||
*pDst++ = __SSAT((*pSrc++ << shiftBits), 16); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
else |
||||
{ |
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* Read 2 inputs */ |
||||
in1 = *pSrc++; |
||||
in2 = *pSrc++; |
||||
|
||||
/* C = A >> shiftBits */ |
||||
/* Shift the inputs and then store the results in the destination buffer. */ |
||||
#ifndef ARM_MATH_BIG_ENDIAN |
||||
|
||||
*__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits), |
||||
(in2 >> -shiftBits), 16); |
||||
|
||||
#else |
||||
|
||||
*__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits), |
||||
(in1 >> -shiftBits), 16); |
||||
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
||||
|
||||
in1 = *pSrc++; |
||||
in2 = *pSrc++; |
||||
|
||||
#ifndef ARM_MATH_BIG_ENDIAN |
||||
|
||||
*__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits), |
||||
(in2 >> -shiftBits), 16); |
||||
|
||||
#else |
||||
|
||||
*__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits), |
||||
(in1 >> -shiftBits), 16); |
||||
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A >> shiftBits */ |
||||
/* Shift the inputs and then store the results in the destination buffer. */ |
||||
*pDst++ = (*pSrc++ >> -shiftBits); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Getting the sign of shiftBits */ |
||||
sign = (shiftBits & 0x80); |
||||
|
||||
/* If the shift value is positive then do right shift else left shift */ |
||||
if(sign == 0u) |
||||
{ |
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A << shiftBits */ |
||||
/* Shift and then store the results in the destination buffer. */ |
||||
*pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
else |
||||
{ |
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A >> shiftBits */ |
||||
/* Shift the inputs and then store the results in the destination buffer. */ |
||||
*pDst++ = (*pSrc++ >> -shiftBits); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of shift group
|
||||
*/ |
||||
@ -0,0 +1,203 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_shift_q31.c
|
||||
*
|
||||
* Description: Shifts the elements of a Q31 vector by a specified number of bits.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
/**
|
||||
* @defgroup shift Vector Shift
|
||||
*
|
||||
* Shifts the elements of a fixed-point vector by a specified number of bits.
|
||||
* There are separate functions for Q7, Q15, and Q31 data types.
|
||||
* The underlying algorithm used is:
|
||||
*
|
||||
* <pre>
|
||||
* pDst[n] = pSrc[n] << shift, 0 <= n < blockSize.
|
||||
* </pre>
|
||||
*
|
||||
* If <code>shift</code> is positive then the elements of the vector are shifted to the left.
|
||||
* If <code>shift</code> is negative then the elements of the vector are shifted to the right.
|
||||
* |
||||
* The functions support in-place computation allowing the source and destination |
||||
* pointers to reference the same memory buffer. |
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup shift
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Shifts the elements of a Q31 vector a specified number of bits.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_shift_q31( |
||||
q31_t * pSrc, |
||||
int8_t shiftBits, |
||||
q31_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
q31_t in1, in2, in3, in4; /* Temporary input variables */ |
||||
q31_t out1, out2, out3, out4; /* Temporary output variables */ |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
|
||||
if(sign == 0u) |
||||
{ |
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A << shiftBits */ |
||||
/* Shift the input and then store the results in the destination buffer. */ |
||||
in1 = *pSrc; |
||||
in2 = *(pSrc + 1); |
||||
out1 = in1 << shiftBits; |
||||
in3 = *(pSrc + 2); |
||||
out2 = in2 << shiftBits; |
||||
in4 = *(pSrc + 3); |
||||
if(in1 != (out1 >> shiftBits)) |
||||
out1 = 0x7FFFFFFF ^ (in1 >> 31); |
||||
|
||||
if(in2 != (out2 >> shiftBits)) |
||||
out2 = 0x7FFFFFFF ^ (in2 >> 31); |
||||
|
||||
*pDst = out1; |
||||
out3 = in3 << shiftBits; |
||||
*(pDst + 1) = out2; |
||||
out4 = in4 << shiftBits; |
||||
|
||||
if(in3 != (out3 >> shiftBits)) |
||||
out3 = 0x7FFFFFFF ^ (in3 >> 31); |
||||
|
||||
if(in4 != (out4 >> shiftBits)) |
||||
out4 = 0x7FFFFFFF ^ (in4 >> 31); |
||||
|
||||
*(pDst + 2) = out3; |
||||
*(pDst + 3) = out4; |
||||
|
||||
/* Update destination pointer to process next sampels */ |
||||
pSrc += 4u; |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
else |
||||
{ |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A >> shiftBits */ |
||||
/* Shift the input and then store the results in the destination buffer. */ |
||||
in1 = *pSrc; |
||||
in2 = *(pSrc + 1); |
||||
in3 = *(pSrc + 2); |
||||
in4 = *(pSrc + 3); |
||||
|
||||
*pDst = (in1 >> -shiftBits); |
||||
*(pDst + 1) = (in2 >> -shiftBits); |
||||
*(pDst + 2) = (in3 >> -shiftBits); |
||||
*(pDst + 3) = (in4 >> -shiftBits); |
||||
|
||||
|
||||
pSrc += 4u; |
||||
pDst += 4u; |
||||
|
||||
blkCnt--; |
||||
} |
||||
|
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A (>> or <<) shiftBits */ |
||||
/* Shift the input and then store the result in the destination buffer. */ |
||||
*pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) : |
||||
(*pSrc++ >> -shiftBits); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of shift group
|
||||
*/ |
||||
@ -0,0 +1,220 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_shift_q7.c
|
||||
*
|
||||
* Description: Processing function for the Q7 Shifting
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup shift
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Shifts the elements of a Q7 vector a specified number of bits.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in the vector
|
||||
* @return none.
|
||||
*
|
||||
* \par Conditions for optimum performance
|
||||
* Input and output buffers should be aligned by 32-bit
|
||||
*
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_shift_q7( |
||||
q7_t * pSrc, |
||||
int8_t shiftBits, |
||||
q7_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
uint8_t sign; /* Sign of shiftBits */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q7_t in1; /* Input value1 */ |
||||
q7_t in2; /* Input value2 */ |
||||
q7_t in3; /* Input value3 */ |
||||
q7_t in4; /* Input value4 */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* Getting the sign of shiftBits */ |
||||
sign = (shiftBits & 0x80); |
||||
|
||||
/* If the shift value is positive then do right shift else left shift */ |
||||
if(sign == 0u) |
||||
{ |
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A << shiftBits */ |
||||
/* Read 4 inputs */ |
||||
in1 = *pSrc; |
||||
in2 = *(pSrc + 1); |
||||
in3 = *(pSrc + 2); |
||||
in4 = *(pSrc + 3); |
||||
|
||||
/* Store the Shifted result in the destination buffer in single cycle by packing the outputs */ |
||||
*__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8), |
||||
__SSAT((in2 << shiftBits), 8), |
||||
__SSAT((in3 << shiftBits), 8), |
||||
__SSAT((in4 << shiftBits), 8)); |
||||
/* Update source pointer to process next sampels */ |
||||
pSrc += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A << shiftBits */ |
||||
/* Shift the input and then store the result in the destination buffer. */ |
||||
*pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
else |
||||
{ |
||||
shiftBits = -shiftBits; |
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A >> shiftBits */ |
||||
/* Read 4 inputs */ |
||||
in1 = *pSrc; |
||||
in2 = *(pSrc + 1); |
||||
in3 = *(pSrc + 2); |
||||
in4 = *(pSrc + 3); |
||||
|
||||
/* Store the Shifted result in the destination buffer in single cycle by packing the outputs */ |
||||
*__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits), |
||||
(in3 >> shiftBits), (in4 >> shiftBits)); |
||||
|
||||
|
||||
pSrc += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A >> shiftBits */ |
||||
/* Shift the input and then store the result in the destination buffer. */ |
||||
in1 = *pSrc++; |
||||
*pDst++ = (in1 >> shiftBits); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Getting the sign of shiftBits */ |
||||
sign = (shiftBits & 0x80); |
||||
|
||||
/* If the shift value is positive then do right shift else left shift */ |
||||
if(sign == 0u) |
||||
{ |
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A << shiftBits */ |
||||
/* Shift the input and then store the result in the destination buffer. */ |
||||
*pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
else |
||||
{ |
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A >> shiftBits */ |
||||
/* Shift the input and then store the result in the destination buffer. */ |
||||
*pDst++ = (*pSrc++ >> -shiftBits); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
} |
||||
|
||||
/**
|
||||
* @} end of shift group
|
||||
*/ |
||||
@ -0,0 +1,150 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_sub_f32.c
|
||||
*
|
||||
* Description: Floating-point vector subtraction.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup BasicSub Vector Subtraction
|
||||
*
|
||||
* Element-by-element subtraction of two vectors.
|
||||
*
|
||||
* <pre>
|
||||
* pDst[n] = pSrcA[n] - pSrcB[n], 0 <= n < blockSize.
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicSub
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point vector subtraction.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
void arm_sub_f32( |
||||
float32_t * pSrcA, |
||||
float32_t * pSrcB, |
||||
float32_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
float32_t inA1, inA2, inA3, inA4; /* temporary variables */ |
||||
float32_t inB1, inB2, inB3, inB4; /* temporary variables */ |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A - B */ |
||||
/* Subtract and then store the results in the destination buffer. */ |
||||
/* Read 4 input samples from sourceA and sourceB */ |
||||
inA1 = *pSrcA; |
||||
inB1 = *pSrcB; |
||||
inA2 = *(pSrcA + 1); |
||||
inB2 = *(pSrcB + 1); |
||||
inA3 = *(pSrcA + 2); |
||||
inB3 = *(pSrcB + 2); |
||||
inA4 = *(pSrcA + 3); |
||||
inB4 = *(pSrcB + 3); |
||||
|
||||
/* dst = srcA - srcB */ |
||||
/* subtract and store the result */ |
||||
*pDst = inA1 - inB1; |
||||
*(pDst + 1) = inA2 - inB2; |
||||
*(pDst + 2) = inA3 - inB3; |
||||
*(pDst + 3) = inA4 - inB4; |
||||
|
||||
|
||||
/* Update pointers to process next sampels */ |
||||
pSrcA += 4u; |
||||
pSrcB += 4u; |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A - B */ |
||||
/* Subtract and then store the results in the destination buffer. */ |
||||
*pDst++ = (*pSrcA++) - (*pSrcB++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicSub group
|
||||
*/ |
||||
@ -0,0 +1,140 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_sub_q15.c
|
||||
*
|
||||
* Description: Q15 vector subtraction.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicSub
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q15 vector subtraction.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_sub_q15( |
||||
q15_t * pSrcA, |
||||
q15_t * pSrcB, |
||||
q15_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t inA1, inA2; |
||||
q31_t inB1, inB2; |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A - B */ |
||||
/* Subtract and then store the results in the destination buffer two samples at a time. */ |
||||
inA1 = *__SIMD32(pSrcA)++; |
||||
inA2 = *__SIMD32(pSrcA)++; |
||||
inB1 = *__SIMD32(pSrcB)++; |
||||
inB2 = *__SIMD32(pSrcB)++; |
||||
|
||||
*__SIMD32(pDst)++ = __QSUB16(inA1, inB1); |
||||
*__SIMD32(pDst)++ = __QSUB16(inA2, inB2); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A - B */ |
||||
/* Subtract and then store the result in the destination buffer. */ |
||||
*pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A - B */ |
||||
/* Subtract and then store the result in the destination buffer. */ |
||||
*pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ - *pSrcB++), 16); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicSub group
|
||||
*/ |
||||
@ -0,0 +1,146 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_sub_q31.c
|
||||
*
|
||||
* Description: Q31 vector subtraction.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE. |
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicSub
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q31 vector subtraction.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_sub_q31( |
||||
q31_t * pSrcA, |
||||
q31_t * pSrcB, |
||||
q31_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t inA1, inA2, inA3, inA4; |
||||
q31_t inB1, inB2, inB3, inB4; |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A - B */ |
||||
/* Subtract and then store the results in the destination buffer. */ |
||||
inA1 = *pSrcA++; |
||||
inA2 = *pSrcA++; |
||||
inB1 = *pSrcB++; |
||||
inB2 = *pSrcB++; |
||||
|
||||
inA3 = *pSrcA++; |
||||
inA4 = *pSrcA++; |
||||
inB3 = *pSrcB++; |
||||
inB4 = *pSrcB++; |
||||
|
||||
*pDst++ = __QSUB(inA1, inB1); |
||||
*pDst++ = __QSUB(inA2, inB2); |
||||
*pDst++ = __QSUB(inA3, inB3); |
||||
*pDst++ = __QSUB(inA4, inB4); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A - B */ |
||||
/* Subtract and then store the result in the destination buffer. */ |
||||
*pDst++ = __QSUB(*pSrcA++, *pSrcB++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A - B */ |
||||
/* Subtract and then store the result in the destination buffer. */ |
||||
*pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicSub group
|
||||
*/ |
||||
@ -0,0 +1,131 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_sub_q7.c
|
||||
*
|
||||
* Description: Q7 vector subtraction.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup BasicSub
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q7 vector subtraction.
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] blockSize number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_sub_q7( |
||||
q7_t * pSrcA, |
||||
q7_t * pSrcB, |
||||
q7_t * pDst, |
||||
uint32_t blockSize) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = blockSize >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A - B */ |
||||
/* Subtract and then store the results in the destination buffer 4 samples at a time. */ |
||||
*__SIMD32(pDst)++ = __QSUB8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = blockSize % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A - B */ |
||||
/* Subtract and then store the result in the destination buffer. */ |
||||
*pDst++ = __SSAT(*pSrcA++ - *pSrcB++, 8); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* Initialize blkCnt with number of samples */ |
||||
blkCnt = blockSize; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C = A - B */ |
||||
/* Subtract and then store the result in the destination buffer. */ |
||||
*pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ - *pSrcB++, 8); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of BasicSub group
|
||||
*/ |
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,156 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015
|
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_const_structs.c
|
||||
*
|
||||
* Description: This file has constant structs that are initialized for |
||||
* user convenience. For example, some can be given as
|
||||
* arguments to the arm_cfft_f32() function. |
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_const_structs.h" |
||||
|
||||
//Floating-point structs
|
||||
|
||||
const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = { |
||||
16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE__16_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = { |
||||
32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE__32_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = { |
||||
64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE__64_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = { |
||||
128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = { |
||||
256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = { |
||||
512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = { |
||||
1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE1024_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = { |
||||
2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE2048_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = { |
||||
4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE4096_TABLE_LENGTH |
||||
}; |
||||
|
||||
//Fixed-point structs
|
||||
|
||||
const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = { |
||||
16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = { |
||||
32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = { |
||||
64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = { |
||||
128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = { |
||||
256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = { |
||||
512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = { |
||||
1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = { |
||||
2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = { |
||||
4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH |
||||
}; |
||||
|
||||
|
||||
const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = { |
||||
16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = { |
||||
32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = { |
||||
64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = { |
||||
128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = { |
||||
256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = { |
||||
512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = { |
||||
1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = { |
||||
2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH |
||||
}; |
||||
|
||||
const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = { |
||||
4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH |
||||
}; |
||||
@ -0,0 +1,182 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_conj_f32.c
|
||||
*
|
||||
* Description: Floating-point complex conjugate.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup cmplx_conj Complex Conjugate
|
||||
*
|
||||
* Conjugates the elements of a complex data vector.
|
||||
*
|
||||
* The <code>pSrc</code> points to the source data and
|
||||
* <code>pDst</code> points to the where the result should be written.
|
||||
* <code>numSamples</code> specifies the number of complex samples
|
||||
* and the data in each array is stored in an interleaved fashion
|
||||
* (real, imag, real, imag, ...).
|
||||
* Each array has a total of <code>2*numSamples</code> values.
|
||||
* The underlying algorithm is used:
|
||||
*
|
||||
* <pre>
|
||||
* for(n=0; n<numSamples; n++) {
|
||||
* pDst[(2*n)+0)] = pSrc[(2*n)+0]; // real part
|
||||
* pDst[(2*n)+1)] = -pSrc[(2*n)+1]; // imag part
|
||||
* }
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating-point, Q15, and Q31 data types.
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup cmplx_conj
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Floating-point complex conjugate.
|
||||
* @param *pSrc points to the input vector
|
||||
* @param *pDst points to the output vector
|
||||
* @param numSamples number of complex samples in each vector
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
void arm_cmplx_conj_f32( |
||||
float32_t * pSrc, |
||||
float32_t * pDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
float32_t inR1, inR2, inR3, inR4; |
||||
float32_t inI1, inI2, inI3, inI4; |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0]+jC[1] = A[0]+ j (-1) A[1] */ |
||||
/* Calculate Complex Conjugate and then store the results in the destination buffer. */ |
||||
/* read real input samples */ |
||||
inR1 = pSrc[0]; |
||||
/* store real samples to destination */ |
||||
pDst[0] = inR1; |
||||
inR2 = pSrc[2]; |
||||
pDst[2] = inR2; |
||||
inR3 = pSrc[4]; |
||||
pDst[4] = inR3; |
||||
inR4 = pSrc[6]; |
||||
pDst[6] = inR4; |
||||
|
||||
/* read imaginary input samples */ |
||||
inI1 = pSrc[1]; |
||||
inI2 = pSrc[3]; |
||||
|
||||
/* conjugate input */ |
||||
inI1 = -inI1; |
||||
|
||||
/* read imaginary input samples */ |
||||
inI3 = pSrc[5]; |
||||
|
||||
/* conjugate input */ |
||||
inI2 = -inI2; |
||||
|
||||
/* read imaginary input samples */ |
||||
inI4 = pSrc[7]; |
||||
|
||||
/* conjugate input */ |
||||
inI3 = -inI3; |
||||
|
||||
/* store imaginary samples to destination */ |
||||
pDst[1] = inI1; |
||||
pDst[3] = inI2; |
||||
|
||||
/* conjugate input */ |
||||
inI4 = -inI4; |
||||
|
||||
/* store imaginary samples to destination */ |
||||
pDst[5] = inI3; |
||||
|
||||
/* increment source pointer by 8 to process next sampels */ |
||||
pSrc += 8u; |
||||
|
||||
/* store imaginary sample to destination */ |
||||
pDst[7] = inI4; |
||||
|
||||
/* increment destination pointer by 8 to store next samples */ |
||||
pDst += 8u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
blkCnt = numSamples; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* realOut + j (imagOut) = realIn + j (-1) imagIn */ |
||||
/* Calculate Complex Conjugate and then store the results in the destination buffer. */ |
||||
*pDst++ = *pSrc++; |
||||
*pDst++ = -*pSrc++; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of cmplx_conj group
|
||||
*/ |
||||
@ -0,0 +1,161 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. October 2015 |
||||
* $Revision: V.1.4.5 a |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_conj_q15.c
|
||||
*
|
||||
* Description: Q15 complex conjugate.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup cmplx_conj
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q15 complex conjugate.
|
||||
* @param *pSrc points to the input vector
|
||||
* @param *pDst points to the output vector
|
||||
* @param numSamples number of complex samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
|
||||
*/ |
||||
|
||||
void arm_cmplx_conj_q15( |
||||
q15_t * pSrc, |
||||
q15_t * pDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
q31_t in1, in2, in3, in4; |
||||
q31_t zero = 0; |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0]+jC[1] = A[0]+ j (-1) A[1] */ |
||||
/* Calculate Complex Conjugate and then store the results in the destination buffer. */ |
||||
in1 = *__SIMD32(pSrc)++; |
||||
in2 = *__SIMD32(pSrc)++; |
||||
in3 = *__SIMD32(pSrc)++; |
||||
in4 = *__SIMD32(pSrc)++; |
||||
|
||||
#ifndef ARM_MATH_BIG_ENDIAN |
||||
|
||||
in1 = __QASX(zero, in1); |
||||
in2 = __QASX(zero, in2); |
||||
in3 = __QASX(zero, in3); |
||||
in4 = __QASX(zero, in4); |
||||
|
||||
#else |
||||
|
||||
in1 = __QSAX(zero, in1); |
||||
in2 = __QSAX(zero, in2); |
||||
in3 = __QSAX(zero, in3); |
||||
in4 = __QSAX(zero, in4); |
||||
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
||||
|
||||
in1 = ((uint32_t) in1 >> 16) | ((uint32_t) in1 << 16); |
||||
in2 = ((uint32_t) in2 >> 16) | ((uint32_t) in2 << 16); |
||||
in3 = ((uint32_t) in3 >> 16) | ((uint32_t) in3 << 16); |
||||
in4 = ((uint32_t) in4 >> 16) | ((uint32_t) in4 << 16); |
||||
|
||||
*__SIMD32(pDst)++ = in1; |
||||
*__SIMD32(pDst)++ = in2; |
||||
*__SIMD32(pDst)++ = in3; |
||||
*__SIMD32(pDst)++ = in4; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0]+jC[1] = A[0]+ j (-1) A[1] */ |
||||
/* Calculate Complex Conjugate and then store the results in the destination buffer. */ |
||||
*pDst++ = *pSrc++; |
||||
*pDst++ = __SSAT(-*pSrc++, 16); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
q15_t in; |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
while(numSamples > 0u) |
||||
{ |
||||
/* realOut + j (imagOut) = realIn+ j (-1) imagIn */ |
||||
/* Calculate Complex Conjugate and then store the results in the destination buffer. */ |
||||
*pDst++ = *pSrc++; |
||||
in = *pSrc++; |
||||
*pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in; |
||||
|
||||
/* Decrement the loop counter */ |
||||
numSamples--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of cmplx_conj group
|
||||
*/ |
||||
@ -0,0 +1,180 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_conj_q31.c
|
||||
*
|
||||
* Description: Q31 complex conjugate.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup cmplx_conj
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q31 complex conjugate.
|
||||
* @param *pSrc points to the input vector
|
||||
* @param *pDst points to the output vector
|
||||
* @param numSamples number of complex samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
|
||||
*/ |
||||
|
||||
void arm_cmplx_conj_q31( |
||||
q31_t * pSrc, |
||||
q31_t * pDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
q31_t in; /* Input value */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t inR1, inR2, inR3, inR4; /* Temporary real variables */ |
||||
q31_t inI1, inI2, inI3, inI4; /* Temporary imaginary variables */ |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0]+jC[1] = A[0]+ j (-1) A[1] */ |
||||
/* Calculate Complex Conjugate and then store the results in the destination buffer. */ |
||||
/* Saturated to 0x7fffffff if the input is -1(0x80000000) */ |
||||
/* read real input sample */ |
||||
inR1 = pSrc[0]; |
||||
/* store real input sample */ |
||||
pDst[0] = inR1; |
||||
|
||||
/* read imaginary input sample */ |
||||
inI1 = pSrc[1]; |
||||
|
||||
/* read real input sample */ |
||||
inR2 = pSrc[2]; |
||||
/* store real input sample */ |
||||
pDst[2] = inR2; |
||||
|
||||
/* read imaginary input sample */ |
||||
inI2 = pSrc[3]; |
||||
|
||||
/* negate imaginary input sample */ |
||||
inI1 = __QSUB(0, inI1); |
||||
|
||||
/* read real input sample */ |
||||
inR3 = pSrc[4]; |
||||
/* store real input sample */ |
||||
pDst[4] = inR3; |
||||
|
||||
/* read imaginary input sample */ |
||||
inI3 = pSrc[5]; |
||||
|
||||
/* negate imaginary input sample */ |
||||
inI2 = __QSUB(0, inI2); |
||||
|
||||
/* read real input sample */ |
||||
inR4 = pSrc[6]; |
||||
/* store real input sample */ |
||||
pDst[6] = inR4; |
||||
|
||||
/* negate imaginary input sample */ |
||||
inI3 = __QSUB(0, inI3); |
||||
|
||||
/* store imaginary input sample */ |
||||
inI4 = pSrc[7]; |
||||
|
||||
/* store imaginary input samples */ |
||||
pDst[1] = inI1; |
||||
|
||||
/* negate imaginary input sample */ |
||||
inI4 = __QSUB(0, inI4); |
||||
|
||||
/* store imaginary input samples */ |
||||
pDst[3] = inI2; |
||||
|
||||
/* increment source pointer by 8 to proecess next samples */ |
||||
pSrc += 8u; |
||||
|
||||
/* store imaginary input samples */ |
||||
pDst[5] = inI3; |
||||
pDst[7] = inI4; |
||||
|
||||
/* increment destination pointer by 8 to process next samples */ |
||||
pDst += 8u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
blkCnt = numSamples; |
||||
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0]+jC[1] = A[0]+ j (-1) A[1] */ |
||||
/* Calculate Complex Conjugate and then store the results in the destination buffer. */ |
||||
/* Saturated to 0x7fffffff if the input is -1(0x80000000) */ |
||||
*pDst++ = *pSrc++; |
||||
in = *pSrc++; |
||||
*pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of cmplx_conj group
|
||||
*/ |
||||
@ -0,0 +1,203 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_dot_prod_f32.c
|
||||
*
|
||||
* Description: Floating-point complex dot product
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup cmplx_dot_prod Complex Dot Product
|
||||
*
|
||||
* Computes the dot product of two complex vectors.
|
||||
* The vectors are multiplied element-by-element and then summed.
|
||||
*
|
||||
* The <code>pSrcA</code> points to the first complex input vector and
|
||||
* <code>pSrcB</code> points to the second complex input vector.
|
||||
* <code>numSamples</code> specifies the number of complex samples
|
||||
* and the data in each array is stored in an interleaved fashion
|
||||
* (real, imag, real, imag, ...).
|
||||
* Each array has a total of <code>2*numSamples</code> values.
|
||||
*
|
||||
* The underlying algorithm is used:
|
||||
* <pre>
|
||||
* realResult=0;
|
||||
* imagResult=0;
|
||||
* for(n=0; n<numSamples; n++) {
|
||||
* realResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+0] - pSrcA[(2*n)+1]*pSrcB[(2*n)+1];
|
||||
* imagResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+1] + pSrcA[(2*n)+1]*pSrcB[(2*n)+0];
|
||||
* }
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating-point, Q15, and Q31 data types.
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup cmplx_dot_prod
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Floating-point complex dot product
|
||||
* @param *pSrcA points to the first input vector
|
||||
* @param *pSrcB points to the second input vector
|
||||
* @param numSamples number of complex samples in each vector
|
||||
* @param *realResult real part of the result returned here
|
||||
* @param *imagResult imaginary part of the result returned here
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
void arm_cmplx_dot_prod_f32( |
||||
float32_t * pSrcA, |
||||
float32_t * pSrcB, |
||||
uint32_t numSamples, |
||||
float32_t * realResult, |
||||
float32_t * imagResult) |
||||
{ |
||||
float32_t real_sum = 0.0f, imag_sum = 0.0f; /* Temporary result storage */ |
||||
float32_t a0,b0,c0,d0; |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += a0 * c0; |
||||
imag_sum += a0 * d0; |
||||
real_sum -= b0 * d0; |
||||
imag_sum += b0 * c0; |
||||
|
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += a0 * c0; |
||||
imag_sum += a0 * d0; |
||||
real_sum -= b0 * d0; |
||||
imag_sum += b0 * c0; |
||||
|
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += a0 * c0; |
||||
imag_sum += a0 * d0; |
||||
real_sum -= b0 * d0; |
||||
imag_sum += b0 * c0; |
||||
|
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += a0 * c0; |
||||
imag_sum += a0 * d0; |
||||
real_sum -= b0 * d0; |
||||
imag_sum += b0 * c0; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples & 0x3u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += a0 * c0; |
||||
imag_sum += a0 * d0; |
||||
real_sum -= b0 * d0; |
||||
imag_sum += b0 * c0; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
while(numSamples > 0u) |
||||
{ |
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += a0 * c0; |
||||
imag_sum += a0 * d0; |
||||
real_sum -= b0 * d0; |
||||
imag_sum += b0 * c0; |
||||
|
||||
/* Decrement the loop counter */ |
||||
numSamples--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
/* Store the real and imaginary results in the destination buffers */ |
||||
*realResult = real_sum; |
||||
*imagResult = imag_sum; |
||||
} |
||||
|
||||
/**
|
||||
* @} end of cmplx_dot_prod group
|
||||
*/ |
||||
@ -0,0 +1,189 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_dot_prod_q15.c
|
||||
*
|
||||
* Description: Processing function for the Q15 Complex Dot product
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup cmplx_dot_prod
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q15 complex dot product
|
||||
* @param *pSrcA points to the first input vector
|
||||
* @param *pSrcB points to the second input vector
|
||||
* @param numSamples number of complex samples in each vector
|
||||
* @param *realResult real part of the result returned here
|
||||
* @param *imagResult imaginary part of the result returned here
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function is implemented using an internal 64-bit accumulator.
|
||||
* The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
|
||||
* These are accumulated in a 64-bit accumulator with 34.30 precision.
|
||||
* As a final step, the accumulators are converted to 8.24 format.
|
||||
* The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format.
|
||||
*/ |
||||
|
||||
void arm_cmplx_dot_prod_q15( |
||||
q15_t * pSrcA, |
||||
q15_t * pSrcB, |
||||
uint32_t numSamples, |
||||
q31_t * realResult, |
||||
q31_t * imagResult) |
||||
{ |
||||
q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */ |
||||
q15_t a0,b0,c0,d0; |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += (q31_t)a0 * c0; |
||||
imag_sum += (q31_t)a0 * d0; |
||||
real_sum -= (q31_t)b0 * d0; |
||||
imag_sum += (q31_t)b0 * c0; |
||||
|
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += (q31_t)a0 * c0; |
||||
imag_sum += (q31_t)a0 * d0; |
||||
real_sum -= (q31_t)b0 * d0; |
||||
imag_sum += (q31_t)b0 * c0; |
||||
|
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += (q31_t)a0 * c0; |
||||
imag_sum += (q31_t)a0 * d0; |
||||
real_sum -= (q31_t)b0 * d0; |
||||
imag_sum += (q31_t)b0 * c0; |
||||
|
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += (q31_t)a0 * c0; |
||||
imag_sum += (q31_t)a0 * d0; |
||||
real_sum -= (q31_t)b0 * d0; |
||||
imag_sum += (q31_t)b0 * c0; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += (q31_t)a0 * c0; |
||||
imag_sum += (q31_t)a0 * d0; |
||||
real_sum -= (q31_t)b0 * d0; |
||||
imag_sum += (q31_t)b0 * c0; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
while(numSamples > 0u) |
||||
{ |
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += a0 * c0; |
||||
imag_sum += a0 * d0; |
||||
real_sum -= b0 * d0; |
||||
imag_sum += b0 * c0; |
||||
|
||||
|
||||
/* Decrement the loop counter */ |
||||
numSamples--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
/* Store the real and imaginary results in 8.24 format */ |
||||
/* Convert real data in 34.30 to 8.24 by 6 right shifts */ |
||||
*realResult = (q31_t) (real_sum >> 6); |
||||
/* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */ |
||||
*imagResult = (q31_t) (imag_sum >> 6); |
||||
} |
||||
|
||||
/**
|
||||
* @} end of cmplx_dot_prod group
|
||||
*/ |
||||
@ -0,0 +1,187 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_dot_prod_q31.c
|
||||
*
|
||||
* Description: Q31 complex dot product
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup cmplx_dot_prod
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q31 complex dot product
|
||||
* @param *pSrcA points to the first input vector
|
||||
* @param *pSrcB points to the second input vector
|
||||
* @param numSamples number of complex samples in each vector
|
||||
* @param *realResult real part of the result returned here
|
||||
* @param *imagResult imaginary part of the result returned here
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function is implemented using an internal 64-bit accumulator.
|
||||
* The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
|
||||
* The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
|
||||
* Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.
|
||||
* The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.
|
||||
* Input down scaling is not required.
|
||||
*/ |
||||
|
||||
void arm_cmplx_dot_prod_q31( |
||||
q31_t * pSrcA, |
||||
q31_t * pSrcB, |
||||
uint32_t numSamples, |
||||
q63_t * realResult, |
||||
q63_t * imagResult) |
||||
{ |
||||
q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */ |
||||
q31_t a0,b0,c0,d0; |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += ((q63_t)a0 * c0) >> 14; |
||||
imag_sum += ((q63_t)a0 * d0) >> 14; |
||||
real_sum -= ((q63_t)b0 * d0) >> 14; |
||||
imag_sum += ((q63_t)b0 * c0) >> 14; |
||||
|
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += ((q63_t)a0 * c0) >> 14; |
||||
imag_sum += ((q63_t)a0 * d0) >> 14; |
||||
real_sum -= ((q63_t)b0 * d0) >> 14; |
||||
imag_sum += ((q63_t)b0 * c0) >> 14; |
||||
|
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += ((q63_t)a0 * c0) >> 14; |
||||
imag_sum += ((q63_t)a0 * d0) >> 14; |
||||
real_sum -= ((q63_t)b0 * d0) >> 14; |
||||
imag_sum += ((q63_t)b0 * c0) >> 14; |
||||
|
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += ((q63_t)a0 * c0) >> 14; |
||||
imag_sum += ((q63_t)a0 * d0) >> 14; |
||||
real_sum -= ((q63_t)b0 * d0) >> 14; |
||||
imag_sum += ((q63_t)b0 * c0) >> 14; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += ((q63_t)a0 * c0) >> 14; |
||||
imag_sum += ((q63_t)a0 * d0) >> 14; |
||||
real_sum -= ((q63_t)b0 * d0) >> 14; |
||||
imag_sum += ((q63_t)b0 * c0) >> 14; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
while(numSamples > 0u) |
||||
{ |
||||
a0 = *pSrcA++; |
||||
b0 = *pSrcA++; |
||||
c0 = *pSrcB++; |
||||
d0 = *pSrcB++;
|
||||
|
||||
real_sum += ((q63_t)a0 * c0) >> 14; |
||||
imag_sum += ((q63_t)a0 * d0) >> 14; |
||||
real_sum -= ((q63_t)b0 * d0) >> 14; |
||||
imag_sum += ((q63_t)b0 * c0) >> 14; |
||||
|
||||
/* Decrement the loop counter */ |
||||
numSamples--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
/* Store the real and imaginary results in 16.48 format */ |
||||
*realResult = real_sum; |
||||
*imagResult = imag_sum; |
||||
} |
||||
|
||||
/**
|
||||
* @} end of cmplx_dot_prod group
|
||||
*/ |
||||
@ -0,0 +1,165 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_mag_f32.c
|
||||
*
|
||||
* Description: Floating-point complex magnitude.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup cmplx_mag Complex Magnitude
|
||||
*
|
||||
* Computes the magnitude of the elements of a complex data vector.
|
||||
*
|
||||
* The <code>pSrc</code> points to the source data and
|
||||
* <code>pDst</code> points to the where the result should be written.
|
||||
* <code>numSamples</code> specifies the number of complex samples
|
||||
* in the input array and the data is stored in an interleaved fashion
|
||||
* (real, imag, real, imag, ...).
|
||||
* The input array has a total of <code>2*numSamples</code> values;
|
||||
* the output array has a total of <code>numSamples</code> values.
|
||||
* The underlying algorithm is used:
|
||||
*
|
||||
* <pre>
|
||||
* for(n=0; n<numSamples; n++) {
|
||||
* pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
|
||||
* }
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating-point, Q15, and Q31 data types.
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup cmplx_mag
|
||||
* @{
|
||||
*/ |
||||
/**
|
||||
* @brief Floating-point complex magnitude.
|
||||
* @param[in] *pSrc points to complex input buffer
|
||||
* @param[out] *pDst points to real output buffer
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
* @return none.
|
||||
*
|
||||
*/ |
||||
|
||||
|
||||
void arm_cmplx_mag_f32( |
||||
float32_t * pSrc, |
||||
float32_t * pDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
float32_t realIn, imagIn; /* Temporary variables to hold input values */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
|
||||
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ |
||||
realIn = *pSrc++; |
||||
imagIn = *pSrc++; |
||||
/* store the result in the destination buffer. */ |
||||
arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++); |
||||
|
||||
realIn = *pSrc++; |
||||
imagIn = *pSrc++; |
||||
arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++); |
||||
|
||||
realIn = *pSrc++; |
||||
imagIn = *pSrc++; |
||||
arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++); |
||||
|
||||
realIn = *pSrc++; |
||||
imagIn = *pSrc++; |
||||
arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++); |
||||
|
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ |
||||
realIn = *pSrc++; |
||||
imagIn = *pSrc++; |
||||
/* store the result in the destination buffer. */ |
||||
arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
while(numSamples > 0u) |
||||
{ |
||||
/* out = sqrt((real * real) + (imag * imag)) */ |
||||
realIn = *pSrc++; |
||||
imagIn = *pSrc++; |
||||
/* store the result in the destination buffer. */ |
||||
arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
numSamples--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of cmplx_mag group
|
||||
*/ |
||||
@ -0,0 +1,153 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_mag_q15.c
|
||||
*
|
||||
* Description: Q15 complex magnitude.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup cmplx_mag
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 complex magnitude
|
||||
* @param *pSrc points to the complex input vector
|
||||
* @param *pDst points to the real output vector
|
||||
* @param numSamples number of complex samples in the input vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
|
||||
*/ |
||||
|
||||
void arm_cmplx_mag_q15( |
||||
q15_t * pSrc, |
||||
q15_t * pDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
q31_t acc0, acc1; /* Accumulators */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
q31_t in1, in2, in3, in4; |
||||
q31_t acc2, acc3; |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
|
||||
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ |
||||
in1 = *__SIMD32(pSrc)++; |
||||
in2 = *__SIMD32(pSrc)++; |
||||
in3 = *__SIMD32(pSrc)++; |
||||
in4 = *__SIMD32(pSrc)++; |
||||
|
||||
acc0 = __SMUAD(in1, in1); |
||||
acc1 = __SMUAD(in2, in2); |
||||
acc2 = __SMUAD(in3, in3); |
||||
acc3 = __SMUAD(in4, in4); |
||||
|
||||
/* store the result in 2.14 format in the destination buffer. */ |
||||
arm_sqrt_q15((q15_t) ((acc0) >> 17), pDst++); |
||||
arm_sqrt_q15((q15_t) ((acc1) >> 17), pDst++); |
||||
arm_sqrt_q15((q15_t) ((acc2) >> 17), pDst++); |
||||
arm_sqrt_q15((q15_t) ((acc3) >> 17), pDst++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ |
||||
in1 = *__SIMD32(pSrc)++; |
||||
acc0 = __SMUAD(in1, in1); |
||||
|
||||
/* store the result in 2.14 format in the destination buffer. */ |
||||
arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
q15_t real, imag; /* Temporary variables to hold input values */ |
||||
|
||||
while(numSamples > 0u) |
||||
{ |
||||
/* out = sqrt(real * real + imag * imag) */ |
||||
real = *pSrc++; |
||||
imag = *pSrc++; |
||||
|
||||
acc0 = (real * real); |
||||
acc1 = (imag * imag); |
||||
|
||||
/* store the result in 2.14 format in the destination buffer. */ |
||||
arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
numSamples--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of cmplx_mag group
|
||||
*/ |
||||
@ -0,0 +1,185 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_mag_q31.c
|
||||
*
|
||||
* Description: Q31 complex magnitude
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup cmplx_mag
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q31 complex magnitude
|
||||
* @param *pSrc points to the complex input vector
|
||||
* @param *pDst points to the real output vector
|
||||
* @param numSamples number of complex samples in the input vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.
|
||||
* Input down scaling is not required.
|
||||
*/ |
||||
|
||||
void arm_cmplx_mag_q31( |
||||
q31_t * pSrc, |
||||
q31_t * pDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
q31_t real, imag; /* Temporary variables to hold input values */ |
||||
q31_t acc0, acc1; /* Accumulators */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
q31_t real1, real2, imag1, imag2; /* Temporary variables to hold input values */ |
||||
q31_t out1, out2, out3, out4; /* Accumulators */ |
||||
q63_t mul1, mul2, mul3, mul4; /* Temporary variables */ |
||||
|
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* read complex input from source buffer */ |
||||
real1 = pSrc[0]; |
||||
imag1 = pSrc[1]; |
||||
real2 = pSrc[2]; |
||||
imag2 = pSrc[3]; |
||||
|
||||
/* calculate power of input values */ |
||||
mul1 = (q63_t) real1 *real1; |
||||
mul2 = (q63_t) imag1 *imag1; |
||||
mul3 = (q63_t) real2 *real2; |
||||
mul4 = (q63_t) imag2 *imag2; |
||||
|
||||
/* get the result to 3.29 format */ |
||||
out1 = (q31_t) (mul1 >> 33); |
||||
out2 = (q31_t) (mul2 >> 33); |
||||
out3 = (q31_t) (mul3 >> 33); |
||||
out4 = (q31_t) (mul4 >> 33); |
||||
|
||||
/* add real and imaginary accumulators */ |
||||
out1 = out1 + out2; |
||||
out3 = out3 + out4; |
||||
|
||||
/* read complex input from source buffer */ |
||||
real1 = pSrc[4]; |
||||
imag1 = pSrc[5]; |
||||
real2 = pSrc[6]; |
||||
imag2 = pSrc[7]; |
||||
|
||||
/* calculate square root */ |
||||
arm_sqrt_q31(out1, &pDst[0]); |
||||
|
||||
/* calculate power of input values */ |
||||
mul1 = (q63_t) real1 *real1; |
||||
|
||||
/* calculate square root */ |
||||
arm_sqrt_q31(out3, &pDst[1]); |
||||
|
||||
/* calculate power of input values */ |
||||
mul2 = (q63_t) imag1 *imag1; |
||||
mul3 = (q63_t) real2 *real2; |
||||
mul4 = (q63_t) imag2 *imag2; |
||||
|
||||
/* get the result to 3.29 format */ |
||||
out1 = (q31_t) (mul1 >> 33); |
||||
out2 = (q31_t) (mul2 >> 33); |
||||
out3 = (q31_t) (mul3 >> 33); |
||||
out4 = (q31_t) (mul4 >> 33); |
||||
|
||||
/* add real and imaginary accumulators */ |
||||
out1 = out1 + out2; |
||||
out3 = out3 + out4; |
||||
|
||||
/* calculate square root */ |
||||
arm_sqrt_q31(out1, &pDst[2]); |
||||
|
||||
/* increment destination by 8 to process next samples */ |
||||
pSrc += 8u; |
||||
|
||||
/* calculate square root */ |
||||
arm_sqrt_q31(out3, &pDst[3]); |
||||
|
||||
/* increment destination by 4 to process next samples */ |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
blkCnt = numSamples; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ |
||||
real = *pSrc++; |
||||
imag = *pSrc++; |
||||
acc0 = (q31_t) (((q63_t) real * real) >> 33); |
||||
acc1 = (q31_t) (((q63_t) imag * imag) >> 33); |
||||
/* store the result in 2.30 format in the destination buffer. */ |
||||
arm_sqrt_q31(acc0 + acc1, pDst++); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of cmplx_mag group
|
||||
*/ |
||||
@ -0,0 +1,215 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_mag_squared_f32.c
|
||||
*
|
||||
* Description: Floating-point complex magnitude squared.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup cmplx_mag_squared Complex Magnitude Squared
|
||||
*
|
||||
* Computes the magnitude squared of the elements of a complex data vector.
|
||||
*
|
||||
* The <code>pSrc</code> points to the source data and
|
||||
* <code>pDst</code> points to the where the result should be written.
|
||||
* <code>numSamples</code> specifies the number of complex samples
|
||||
* in the input array and the data is stored in an interleaved fashion
|
||||
* (real, imag, real, imag, ...).
|
||||
* The input array has a total of <code>2*numSamples</code> values;
|
||||
* the output array has a total of <code>numSamples</code> values.
|
||||
*
|
||||
* The underlying algorithm is used:
|
||||
*
|
||||
* <pre>
|
||||
* for(n=0; n<numSamples; n++) {
|
||||
* pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
|
||||
* }
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating-point, Q15, and Q31 data types.
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup cmplx_mag_squared
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex magnitude squared
|
||||
* @param[in] *pSrc points to the complex input vector
|
||||
* @param[out] *pDst points to the real output vector
|
||||
* @param[in] numSamples number of complex samples in the input vector
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
void arm_cmplx_mag_squared_f32( |
||||
float32_t * pSrc, |
||||
float32_t * pDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
float32_t real, imag; /* Temporary variables to store real and imaginary values */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
float32_t real1, real2, real3, real4; /* Temporary variables to hold real values */ |
||||
float32_t imag1, imag2, imag3, imag4; /* Temporary variables to hold imaginary values */ |
||||
float32_t mul1, mul2, mul3, mul4; /* Temporary variables */ |
||||
float32_t mul5, mul6, mul7, mul8; /* Temporary variables */ |
||||
float32_t out1, out2, out3, out4; /* Temporary variables to hold output values */ |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */ |
||||
/* read real input sample from source buffer */ |
||||
real1 = pSrc[0]; |
||||
/* read imaginary input sample from source buffer */ |
||||
imag1 = pSrc[1]; |
||||
|
||||
/* calculate power of real value */ |
||||
mul1 = real1 * real1; |
||||
|
||||
/* read real input sample from source buffer */ |
||||
real2 = pSrc[2]; |
||||
|
||||
/* calculate power of imaginary value */ |
||||
mul2 = imag1 * imag1; |
||||
|
||||
/* read imaginary input sample from source buffer */ |
||||
imag2 = pSrc[3]; |
||||
|
||||
/* calculate power of real value */ |
||||
mul3 = real2 * real2; |
||||
|
||||
/* read real input sample from source buffer */ |
||||
real3 = pSrc[4]; |
||||
|
||||
/* calculate power of imaginary value */ |
||||
mul4 = imag2 * imag2; |
||||
|
||||
/* read imaginary input sample from source buffer */ |
||||
imag3 = pSrc[5]; |
||||
|
||||
/* calculate power of real value */ |
||||
mul5 = real3 * real3; |
||||
/* calculate power of imaginary value */ |
||||
mul6 = imag3 * imag3; |
||||
|
||||
/* read real input sample from source buffer */ |
||||
real4 = pSrc[6]; |
||||
|
||||
/* accumulate real and imaginary powers */ |
||||
out1 = mul1 + mul2; |
||||
|
||||
/* read imaginary input sample from source buffer */ |
||||
imag4 = pSrc[7]; |
||||
|
||||
/* accumulate real and imaginary powers */ |
||||
out2 = mul3 + mul4; |
||||
|
||||
/* calculate power of real value */ |
||||
mul7 = real4 * real4; |
||||
/* calculate power of imaginary value */ |
||||
mul8 = imag4 * imag4; |
||||
|
||||
/* store output to destination */ |
||||
pDst[0] = out1; |
||||
|
||||
/* accumulate real and imaginary powers */ |
||||
out3 = mul5 + mul6; |
||||
|
||||
/* store output to destination */ |
||||
pDst[1] = out2; |
||||
|
||||
/* accumulate real and imaginary powers */ |
||||
out4 = mul7 + mul8; |
||||
|
||||
/* store output to destination */ |
||||
pDst[2] = out3; |
||||
|
||||
/* increment destination pointer by 8 to process next samples */ |
||||
pSrc += 8u; |
||||
|
||||
/* store output to destination */ |
||||
pDst[3] = out4; |
||||
|
||||
/* increment destination pointer by 4 to process next samples */ |
||||
pDst += 4u; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
blkCnt = numSamples; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */ |
||||
real = *pSrc++; |
||||
imag = *pSrc++; |
||||
|
||||
/* out = (real * real) + (imag * imag) */ |
||||
/* store the result in the destination buffer. */ |
||||
*pDst++ = (real * real) + (imag * imag); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of cmplx_mag_squared group
|
||||
*/ |
||||
@ -0,0 +1,148 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_mag_squared_q15.c
|
||||
*
|
||||
* Description: Q15 complex magnitude squared.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup cmplx_mag_squared
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q15 complex magnitude squared
|
||||
* @param *pSrc points to the complex input vector
|
||||
* @param *pDst points to the real output vector
|
||||
* @param numSamples number of complex samples in the input vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
|
||||
*/ |
||||
|
||||
void arm_cmplx_mag_squared_q15( |
||||
q15_t * pSrc, |
||||
q15_t * pDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
q31_t acc0, acc1; /* Accumulators */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
q31_t in1, in2, in3, in4; |
||||
q31_t acc2, acc3; |
||||
|
||||
/*loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */ |
||||
in1 = *__SIMD32(pSrc)++; |
||||
in2 = *__SIMD32(pSrc)++; |
||||
in3 = *__SIMD32(pSrc)++; |
||||
in4 = *__SIMD32(pSrc)++; |
||||
|
||||
acc0 = __SMUAD(in1, in1); |
||||
acc1 = __SMUAD(in2, in2); |
||||
acc2 = __SMUAD(in3, in3); |
||||
acc3 = __SMUAD(in4, in4); |
||||
|
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = (q15_t) (acc0 >> 17); |
||||
*pDst++ = (q15_t) (acc1 >> 17); |
||||
*pDst++ = (q15_t) (acc2 >> 17); |
||||
*pDst++ = (q15_t) (acc3 >> 17); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */ |
||||
in1 = *__SIMD32(pSrc)++; |
||||
acc0 = __SMUAD(in1, in1); |
||||
|
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = (q15_t) (acc0 >> 17); |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
q15_t real, imag; /* Temporary variables to store real and imaginary values */ |
||||
|
||||
while(numSamples > 0u) |
||||
{ |
||||
/* out = ((real * real) + (imag * imag)) */ |
||||
real = *pSrc++; |
||||
imag = *pSrc++; |
||||
acc0 = (real * real); |
||||
acc1 = (imag * imag); |
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17); |
||||
|
||||
/* Decrement the loop counter */ |
||||
numSamples--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of cmplx_mag_squared group
|
||||
*/ |
||||
@ -0,0 +1,161 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_mag_squared_q31.c
|
||||
*
|
||||
* Description: Q31 complex magnitude squared.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup cmplx_mag_squared
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 complex magnitude squared
|
||||
* @param *pSrc points to the complex input vector
|
||||
* @param *pDst points to the real output vector
|
||||
* @param numSamples number of complex samples in the input vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
|
||||
* Input down scaling is not required.
|
||||
*/ |
||||
|
||||
void arm_cmplx_mag_squared_q31( |
||||
q31_t * pSrc, |
||||
q31_t * pDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
q31_t real, imag; /* Temporary variables to store real and imaginary values */ |
||||
q31_t acc0, acc1; /* Accumulators */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
uint32_t blkCnt; /* loop counter */ |
||||
|
||||
/* loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */ |
||||
real = *pSrc++; |
||||
imag = *pSrc++; |
||||
acc0 = (q31_t) (((q63_t) real * real) >> 33); |
||||
acc1 = (q31_t) (((q63_t) imag * imag) >> 33); |
||||
/* store the result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = acc0 + acc1; |
||||
|
||||
real = *pSrc++; |
||||
imag = *pSrc++; |
||||
acc0 = (q31_t) (((q63_t) real * real) >> 33); |
||||
acc1 = (q31_t) (((q63_t) imag * imag) >> 33); |
||||
/* store the result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = acc0 + acc1; |
||||
|
||||
real = *pSrc++; |
||||
imag = *pSrc++; |
||||
acc0 = (q31_t) (((q63_t) real * real) >> 33); |
||||
acc1 = (q31_t) (((q63_t) imag * imag) >> 33); |
||||
/* store the result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = acc0 + acc1; |
||||
|
||||
real = *pSrc++; |
||||
imag = *pSrc++; |
||||
acc0 = (q31_t) (((q63_t) real * real) >> 33); |
||||
acc1 = (q31_t) (((q63_t) imag * imag) >> 33); |
||||
/* store the result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = acc0 + acc1; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */ |
||||
real = *pSrc++; |
||||
imag = *pSrc++; |
||||
acc0 = (q31_t) (((q63_t) real * real) >> 33); |
||||
acc1 = (q31_t) (((q63_t) imag * imag) >> 33); |
||||
/* store the result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = acc0 + acc1; |
||||
|
||||
/* Decrement the loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
while(numSamples > 0u) |
||||
{ |
||||
/* out = ((real * real) + (imag * imag)) */ |
||||
real = *pSrc++; |
||||
imag = *pSrc++; |
||||
acc0 = (q31_t) (((q63_t) real * real) >> 33); |
||||
acc1 = (q31_t) (((q63_t) imag * imag) >> 33); |
||||
/* store the result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = acc0 + acc1; |
||||
|
||||
/* Decrement the loop counter */ |
||||
numSamples--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of cmplx_mag_squared group
|
||||
*/ |
||||
@ -0,0 +1,207 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_mult_cmplx_f32.c
|
||||
*
|
||||
* Description: Floating-point complex-by-complex multiplication
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
|
||||
*
|
||||
* Multiplies a complex vector by another complex vector and generates a complex result.
|
||||
* The data in the complex arrays is stored in an interleaved fashion
|
||||
* (real, imag, real, imag, ...).
|
||||
* The parameter <code>numSamples</code> represents the number of complex
|
||||
* samples processed. The complex arrays have a total of <code>2*numSamples</code>
|
||||
* real values.
|
||||
*
|
||||
* The underlying algorithm is used:
|
||||
*
|
||||
* <pre>
|
||||
* for(n=0; n<numSamples; n++) {
|
||||
* pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
|
||||
* pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
|
||||
* }
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating-point, Q15, and Q31 data types.
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup CmplxByCmplxMult
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex-by-complex multiplication
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
void arm_cmplx_mult_cmplx_f32( |
||||
float32_t * pSrcA, |
||||
float32_t * pSrcB, |
||||
float32_t * pDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
float32_t a1, b1, c1, d1; /* Temporary variables to store real and imaginary values */ |
||||
uint32_t blkCnt; /* loop counters */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
float32_t a2, b2, c2, d2; /* Temporary variables to store real and imaginary values */ |
||||
float32_t acc1, acc2, acc3, acc4; |
||||
|
||||
|
||||
/* loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ |
||||
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ |
||||
a1 = *pSrcA; /* A[2 * i] */ |
||||
c1 = *pSrcB; /* B[2 * i] */ |
||||
|
||||
b1 = *(pSrcA + 1); /* A[2 * i + 1] */ |
||||
acc1 = a1 * c1; /* acc1 = A[2 * i] * B[2 * i] */ |
||||
|
||||
a2 = *(pSrcA + 2); /* A[2 * i + 2] */ |
||||
acc2 = (b1 * c1); /* acc2 = A[2 * i + 1] * B[2 * i] */ |
||||
|
||||
d1 = *(pSrcB + 1); /* B[2 * i + 1] */ |
||||
c2 = *(pSrcB + 2); /* B[2 * i + 2] */ |
||||
acc1 -= b1 * d1; /* acc1 = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */ |
||||
|
||||
d2 = *(pSrcB + 3); /* B[2 * i + 3] */ |
||||
acc3 = a2 * c2; /* acc3 = A[2 * i + 2] * B[2 * i + 2] */ |
||||
|
||||
b2 = *(pSrcA + 3); /* A[2 * i + 3] */ |
||||
acc2 += (a1 * d1); /* acc2 = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */ |
||||
|
||||
a1 = *(pSrcA + 4); /* A[2 * i + 4] */ |
||||
acc4 = (a2 * d2); /* acc4 = A[2 * i + 2] * B[2 * i + 3] */ |
||||
|
||||
c1 = *(pSrcB + 4); /* B[2 * i + 4] */ |
||||
acc3 -= (b2 * d2); /* acc3 = A[2 * i + 2] * B[2 * i + 2] - A[2 * i + 3] * B[2 * i + 3] */ |
||||
*pDst = acc1; /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */ |
||||
|
||||
b1 = *(pSrcA + 5); /* A[2 * i + 5] */ |
||||
acc4 += b2 * c2; /* acc4 = A[2 * i + 2] * B[2 * i + 3] + A[2 * i + 3] * B[2 * i + 2] */ |
||||
|
||||
*(pDst + 1) = acc2; /* C[2 * i + 1] = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */ |
||||
acc1 = (a1 * c1); |
||||
|
||||
d1 = *(pSrcB + 5); |
||||
acc2 = (b1 * c1); |
||||
|
||||
*(pDst + 2) = acc3; |
||||
*(pDst + 3) = acc4; |
||||
|
||||
a2 = *(pSrcA + 6); |
||||
acc1 -= (b1 * d1); |
||||
|
||||
c2 = *(pSrcB + 6); |
||||
acc2 += (a1 * d1); |
||||
|
||||
b2 = *(pSrcA + 7); |
||||
acc3 = (a2 * c2); |
||||
|
||||
d2 = *(pSrcB + 7); |
||||
acc4 = (b2 * c2); |
||||
|
||||
*(pDst + 4) = acc1; |
||||
pSrcA += 8u; |
||||
|
||||
acc3 -= (b2 * d2); |
||||
acc4 += (a2 * d2); |
||||
|
||||
*(pDst + 5) = acc2; |
||||
pSrcB += 8u; |
||||
|
||||
*(pDst + 6) = acc3; |
||||
*(pDst + 7) = acc4; |
||||
|
||||
pDst += 8u; |
||||
|
||||
/* Decrement the numSamples loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
blkCnt = numSamples; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ |
||||
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ |
||||
a1 = *pSrcA++; |
||||
b1 = *pSrcA++; |
||||
c1 = *pSrcB++; |
||||
d1 = *pSrcB++; |
||||
|
||||
/* store the result in the destination buffer. */ |
||||
*pDst++ = (a1 * c1) - (b1 * d1); |
||||
*pDst++ = (a1 * d1) + (b1 * c1); |
||||
|
||||
/* Decrement the numSamples loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of CmplxByCmplxMult group
|
||||
*/ |
||||
@ -0,0 +1,193 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_mult_cmplx_q15.c
|
||||
*
|
||||
* Description: Q15 complex-by-complex multiplication
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup CmplxByCmplxMult
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q15 complex-by-complex multiplication
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
|
||||
*/ |
||||
|
||||
void arm_cmplx_mult_cmplx_q15( |
||||
q15_t * pSrcA, |
||||
q15_t * pSrcB, |
||||
q15_t * pDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
q15_t a, b, c, d; /* Temporary variables to store real and imaginary values */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
uint32_t blkCnt; /* loop counters */ |
||||
|
||||
/* loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ |
||||
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ |
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = |
||||
(q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17); |
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = |
||||
(q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17); |
||||
|
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = |
||||
(q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17); |
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = |
||||
(q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17); |
||||
|
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = |
||||
(q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17); |
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = |
||||
(q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17); |
||||
|
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = |
||||
(q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17); |
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = |
||||
(q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17); |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ |
||||
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ |
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = |
||||
(q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17); |
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = |
||||
(q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17); |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
while(numSamples > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ |
||||
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ |
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = |
||||
(q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17); |
||||
/* store the result in 3.13 format in the destination buffer. */ |
||||
*pDst++ = |
||||
(q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17); |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
numSamples--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of CmplxByCmplxMult group
|
||||
*/ |
||||
@ -0,0 +1,326 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_mult_cmplx_q31.c
|
||||
*
|
||||
* Description: Q31 complex-by-complex multiplication
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup CmplxByCmplxMult
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 complex-by-complex multiplication
|
||||
* @param[in] *pSrcA points to the first input vector
|
||||
* @param[in] *pSrcB points to the second input vector
|
||||
* @param[out] *pDst points to the output vector
|
||||
* @param[in] numSamples number of complex samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
|
||||
* Input down scaling is not required.
|
||||
*/ |
||||
|
||||
void arm_cmplx_mult_cmplx_q31( |
||||
q31_t * pSrcA, |
||||
q31_t * pSrcB, |
||||
q31_t * pDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
q31_t a, b, c, d; /* Temporary variables to store real and imaginary values */ |
||||
uint32_t blkCnt; /* loop counters */ |
||||
q31_t mul1, mul2, mul3, mul4; |
||||
q31_t out1, out2; |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
|
||||
/* loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ |
||||
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ |
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
mul1 = (q31_t) (((q63_t) a * c) >> 32); |
||||
mul2 = (q31_t) (((q63_t) b * d) >> 32); |
||||
mul3 = (q31_t) (((q63_t) a * d) >> 32); |
||||
mul4 = (q31_t) (((q63_t) b * c) >> 32); |
||||
|
||||
mul1 = (mul1 >> 1); |
||||
mul2 = (mul2 >> 1); |
||||
mul3 = (mul3 >> 1); |
||||
mul4 = (mul4 >> 1); |
||||
|
||||
out1 = mul1 - mul2; |
||||
out2 = mul3 + mul4; |
||||
|
||||
/* store the real result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out1; |
||||
/* store the imag result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out2; |
||||
|
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
mul1 = (q31_t) (((q63_t) a * c) >> 32); |
||||
mul2 = (q31_t) (((q63_t) b * d) >> 32); |
||||
mul3 = (q31_t) (((q63_t) a * d) >> 32); |
||||
mul4 = (q31_t) (((q63_t) b * c) >> 32); |
||||
|
||||
mul1 = (mul1 >> 1); |
||||
mul2 = (mul2 >> 1); |
||||
mul3 = (mul3 >> 1); |
||||
mul4 = (mul4 >> 1); |
||||
|
||||
out1 = mul1 - mul2; |
||||
out2 = mul3 + mul4; |
||||
|
||||
/* store the real result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out1; |
||||
/* store the imag result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out2; |
||||
|
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
mul1 = (q31_t) (((q63_t) a * c) >> 32); |
||||
mul2 = (q31_t) (((q63_t) b * d) >> 32); |
||||
mul3 = (q31_t) (((q63_t) a * d) >> 32); |
||||
mul4 = (q31_t) (((q63_t) b * c) >> 32); |
||||
|
||||
mul1 = (mul1 >> 1); |
||||
mul2 = (mul2 >> 1); |
||||
mul3 = (mul3 >> 1); |
||||
mul4 = (mul4 >> 1); |
||||
|
||||
out1 = mul1 - mul2; |
||||
out2 = mul3 + mul4; |
||||
|
||||
/* store the real result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out1; |
||||
/* store the imag result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out2; |
||||
|
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
mul1 = (q31_t) (((q63_t) a * c) >> 32); |
||||
mul2 = (q31_t) (((q63_t) b * d) >> 32); |
||||
mul3 = (q31_t) (((q63_t) a * d) >> 32); |
||||
mul4 = (q31_t) (((q63_t) b * c) >> 32); |
||||
|
||||
mul1 = (mul1 >> 1); |
||||
mul2 = (mul2 >> 1); |
||||
mul3 = (mul3 >> 1); |
||||
mul4 = (mul4 >> 1); |
||||
|
||||
out1 = mul1 - mul2; |
||||
out2 = mul3 + mul4; |
||||
|
||||
/* store the real result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out1; |
||||
/* store the imag result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out2; |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ |
||||
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ |
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
mul1 = (q31_t) (((q63_t) a * c) >> 32); |
||||
mul2 = (q31_t) (((q63_t) b * d) >> 32); |
||||
mul3 = (q31_t) (((q63_t) a * d) >> 32); |
||||
mul4 = (q31_t) (((q63_t) b * c) >> 32); |
||||
|
||||
mul1 = (mul1 >> 1); |
||||
mul2 = (mul2 >> 1); |
||||
mul3 = (mul3 >> 1); |
||||
mul4 = (mul4 >> 1); |
||||
|
||||
out1 = mul1 - mul2; |
||||
out2 = mul3 + mul4; |
||||
|
||||
/* store the real result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out1; |
||||
/* store the imag result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out2; |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
/* loop Unrolling */ |
||||
blkCnt = numSamples >> 1u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 2 outputs at a time.
|
||||
** a second loop below computes the remaining 1 sample. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ |
||||
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ |
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
mul1 = (q31_t) (((q63_t) a * c) >> 32); |
||||
mul2 = (q31_t) (((q63_t) b * d) >> 32); |
||||
mul3 = (q31_t) (((q63_t) a * d) >> 32); |
||||
mul4 = (q31_t) (((q63_t) b * c) >> 32); |
||||
|
||||
mul1 = (mul1 >> 1); |
||||
mul2 = (mul2 >> 1); |
||||
mul3 = (mul3 >> 1); |
||||
mul4 = (mul4 >> 1); |
||||
|
||||
out1 = mul1 - mul2; |
||||
out2 = mul3 + mul4; |
||||
|
||||
/* store the real result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out1; |
||||
/* store the imag result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out2; |
||||
|
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
mul1 = (q31_t) (((q63_t) a * c) >> 32); |
||||
mul2 = (q31_t) (((q63_t) b * d) >> 32); |
||||
mul3 = (q31_t) (((q63_t) a * d) >> 32); |
||||
mul4 = (q31_t) (((q63_t) b * c) >> 32); |
||||
|
||||
mul1 = (mul1 >> 1); |
||||
mul2 = (mul2 >> 1); |
||||
mul3 = (mul3 >> 1); |
||||
mul4 = (mul4 >> 1); |
||||
|
||||
out1 = mul1 - mul2; |
||||
out2 = mul3 + mul4; |
||||
|
||||
/* store the real result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out1; |
||||
/* store the imag result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out2; |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the blockSize is not a multiple of 2, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x2u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ |
||||
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ |
||||
a = *pSrcA++; |
||||
b = *pSrcA++; |
||||
c = *pSrcB++; |
||||
d = *pSrcB++; |
||||
|
||||
mul1 = (q31_t) (((q63_t) a * c) >> 32); |
||||
mul2 = (q31_t) (((q63_t) b * d) >> 32); |
||||
mul3 = (q31_t) (((q63_t) a * d) >> 32); |
||||
mul4 = (q31_t) (((q63_t) b * c) >> 32); |
||||
|
||||
mul1 = (mul1 >> 1); |
||||
mul2 = (mul2 >> 1); |
||||
mul3 = (mul3 >> 1); |
||||
mul4 = (mul4 >> 1); |
||||
|
||||
out1 = mul1 - mul2; |
||||
out2 = mul3 + mul4; |
||||
|
||||
/* store the real result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out1; |
||||
/* store the imag result in 3.29 format in the destination buffer. */ |
||||
*pDst++ = out2; |
||||
|
||||
/* Decrement the blockSize loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of CmplxByCmplxMult group
|
||||
*/ |
||||
@ -0,0 +1,225 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_mult_real_f32.c
|
||||
*
|
||||
* Description: Floating-point complex by real multiplication
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup CmplxByRealMult Complex-by-Real Multiplication
|
||||
*
|
||||
* Multiplies a complex vector by a real vector and generates a complex result.
|
||||
* The data in the complex arrays is stored in an interleaved fashion
|
||||
* (real, imag, real, imag, ...).
|
||||
* The parameter <code>numSamples</code> represents the number of complex
|
||||
* samples processed. The complex arrays have a total of <code>2*numSamples</code>
|
||||
* real values while the real array has a total of <code>numSamples</code>
|
||||
* real values.
|
||||
*
|
||||
* The underlying algorithm is used:
|
||||
*
|
||||
* <pre>
|
||||
* for(n=0; n<numSamples; n++) {
|
||||
* pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
|
||||
* pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
|
||||
* }
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating-point, Q15, and Q31 data types.
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup CmplxByRealMult
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Floating-point complex-by-real multiplication
|
||||
* @param[in] *pSrcCmplx points to the complex input vector
|
||||
* @param[in] *pSrcReal points to the real input vector
|
||||
* @param[out] *pCmplxDst points to the complex output vector
|
||||
* @param[in] numSamples number of samples in each vector
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
void arm_cmplx_mult_real_f32( |
||||
float32_t * pSrcCmplx, |
||||
float32_t * pSrcReal, |
||||
float32_t * pCmplxDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
float32_t in; /* Temporary variable to store input value */ |
||||
uint32_t blkCnt; /* loop counters */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
float32_t inA1, inA2, inA3, inA4; /* Temporary variables to hold input data */ |
||||
float32_t inA5, inA6, inA7, inA8; /* Temporary variables to hold input data */ |
||||
float32_t inB1, inB2, inB3, inB4; /* Temporary variables to hold input data */ |
||||
float32_t out1, out2, out3, out4; /* Temporary variables to hold output data */ |
||||
float32_t out5, out6, out7, out8; /* Temporary variables to hold output data */ |
||||
|
||||
/* loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[i]. */ |
||||
/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ |
||||
/* read input from complex input buffer */ |
||||
inA1 = pSrcCmplx[0]; |
||||
inA2 = pSrcCmplx[1]; |
||||
/* read input from real input buffer */ |
||||
inB1 = pSrcReal[0]; |
||||
|
||||
/* read input from complex input buffer */ |
||||
inA3 = pSrcCmplx[2]; |
||||
|
||||
/* multiply complex buffer real input with real buffer input */ |
||||
out1 = inA1 * inB1; |
||||
|
||||
/* read input from complex input buffer */ |
||||
inA4 = pSrcCmplx[3]; |
||||
|
||||
/* multiply complex buffer imaginary input with real buffer input */ |
||||
out2 = inA2 * inB1; |
||||
|
||||
/* read input from real input buffer */ |
||||
inB2 = pSrcReal[1]; |
||||
/* read input from complex input buffer */ |
||||
inA5 = pSrcCmplx[4]; |
||||
|
||||
/* multiply complex buffer real input with real buffer input */ |
||||
out3 = inA3 * inB2; |
||||
|
||||
/* read input from complex input buffer */ |
||||
inA6 = pSrcCmplx[5]; |
||||
/* read input from real input buffer */ |
||||
inB3 = pSrcReal[2]; |
||||
|
||||
/* multiply complex buffer imaginary input with real buffer input */ |
||||
out4 = inA4 * inB2; |
||||
|
||||
/* read input from complex input buffer */ |
||||
inA7 = pSrcCmplx[6]; |
||||
|
||||
/* multiply complex buffer real input with real buffer input */ |
||||
out5 = inA5 * inB3; |
||||
|
||||
/* read input from complex input buffer */ |
||||
inA8 = pSrcCmplx[7]; |
||||
|
||||
/* multiply complex buffer imaginary input with real buffer input */ |
||||
out6 = inA6 * inB3; |
||||
|
||||
/* read input from real input buffer */ |
||||
inB4 = pSrcReal[3]; |
||||
|
||||
/* store result to destination bufer */ |
||||
pCmplxDst[0] = out1; |
||||
|
||||
/* multiply complex buffer real input with real buffer input */ |
||||
out7 = inA7 * inB4; |
||||
|
||||
/* store result to destination bufer */ |
||||
pCmplxDst[1] = out2; |
||||
|
||||
/* multiply complex buffer imaginary input with real buffer input */ |
||||
out8 = inA8 * inB4; |
||||
|
||||
/* store result to destination bufer */ |
||||
pCmplxDst[2] = out3; |
||||
pCmplxDst[3] = out4; |
||||
pCmplxDst[4] = out5; |
||||
|
||||
/* incremnet complex input buffer by 8 to process next samples */ |
||||
pSrcCmplx += 8u; |
||||
|
||||
/* store result to destination bufer */ |
||||
pCmplxDst[5] = out6; |
||||
|
||||
/* increment real input buffer by 4 to process next samples */ |
||||
pSrcReal += 4u; |
||||
|
||||
/* store result to destination bufer */ |
||||
pCmplxDst[6] = out7; |
||||
pCmplxDst[7] = out8; |
||||
|
||||
/* increment destination buffer by 8 to process next sampels */ |
||||
pCmplxDst += 8u; |
||||
|
||||
/* Decrement the numSamples loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
blkCnt = numSamples; |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[i]. */ |
||||
/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ |
||||
in = *pSrcReal++; |
||||
/* store the result in the destination buffer. */ |
||||
*pCmplxDst++ = (*pSrcCmplx++) * (in); |
||||
*pCmplxDst++ = (*pSrcCmplx++) * (in); |
||||
|
||||
/* Decrement the numSamples loop counter */ |
||||
blkCnt--; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} end of CmplxByRealMult group
|
||||
*/ |
||||
@ -0,0 +1,203 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. October 2015 |
||||
* $Revision: V.1.4.5 a |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_mult_real_q15.c
|
||||
*
|
||||
* Description: Q15 complex by real multiplication
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup CmplxByRealMult
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Q15 complex-by-real multiplication
|
||||
* @param[in] *pSrcCmplx points to the complex input vector
|
||||
* @param[in] *pSrcReal points to the real input vector
|
||||
* @param[out] *pCmplxDst points to the complex output vector
|
||||
* @param[in] numSamples number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_cmplx_mult_real_q15( |
||||
q15_t * pSrcCmplx, |
||||
q15_t * pSrcReal, |
||||
q15_t * pCmplxDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
q15_t in; /* Temporary variable to store input value */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
uint32_t blkCnt; /* loop counters */ |
||||
q31_t inA1, inA2; /* Temporary variables to hold input data */ |
||||
q31_t inB1; /* Temporary variables to hold input data */ |
||||
q15_t out1, out2, out3, out4; /* Temporary variables to hold output data */ |
||||
q31_t mul1, mul2, mul3, mul4; /* Temporary variables to hold intermediate data */ |
||||
|
||||
/* loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[i]. */ |
||||
/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ |
||||
/* read complex number both real and imaginary from complex input buffer */ |
||||
inA1 = *__SIMD32(pSrcCmplx)++; |
||||
/* read two real values at a time from real input buffer */ |
||||
inB1 = *__SIMD32(pSrcReal)++; |
||||
/* read complex number both real and imaginary from complex input buffer */ |
||||
inA2 = *__SIMD32(pSrcCmplx)++; |
||||
|
||||
/* multiply complex number with real numbers */ |
||||
#ifndef ARM_MATH_BIG_ENDIAN |
||||
|
||||
mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1)); |
||||
mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1)); |
||||
mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16)); |
||||
mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16)); |
||||
|
||||
#else |
||||
|
||||
mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); |
||||
mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16)); |
||||
mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1); |
||||
mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1); |
||||
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
||||
|
||||
/* saturate the result */ |
||||
out1 = (q15_t) __SSAT(mul1 >> 15u, 16); |
||||
out2 = (q15_t) __SSAT(mul2 >> 15u, 16); |
||||
out3 = (q15_t) __SSAT(mul3 >> 15u, 16); |
||||
out4 = (q15_t) __SSAT(mul4 >> 15u, 16); |
||||
|
||||
/* pack real and imaginary outputs and store them to destination */ |
||||
*__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16); |
||||
*__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16); |
||||
|
||||
inA1 = *__SIMD32(pSrcCmplx)++; |
||||
inB1 = *__SIMD32(pSrcReal)++; |
||||
inA2 = *__SIMD32(pSrcCmplx)++; |
||||
|
||||
#ifndef ARM_MATH_BIG_ENDIAN |
||||
|
||||
mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1)); |
||||
mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1)); |
||||
mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16)); |
||||
mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16)); |
||||
|
||||
#else |
||||
|
||||
mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); |
||||
mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16)); |
||||
mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1); |
||||
mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1); |
||||
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
||||
|
||||
out1 = (q15_t) __SSAT(mul1 >> 15u, 16); |
||||
out2 = (q15_t) __SSAT(mul2 >> 15u, 16); |
||||
out3 = (q15_t) __SSAT(mul3 >> 15u, 16); |
||||
out4 = (q15_t) __SSAT(mul4 >> 15u, 16); |
||||
|
||||
*__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16); |
||||
*__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16); |
||||
|
||||
/* Decrement the numSamples loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[i]. */ |
||||
/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ |
||||
in = *pSrcReal++; |
||||
/* store the result in the destination buffer. */ |
||||
*pCmplxDst++ = |
||||
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); |
||||
*pCmplxDst++ = |
||||
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); |
||||
|
||||
/* Decrement the numSamples loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
while(numSamples > 0u) |
||||
{ |
||||
/* realOut = realA * realB. */ |
||||
/* imagOut = imagA * realB. */ |
||||
in = *pSrcReal++; |
||||
/* store the result in the destination buffer. */ |
||||
*pCmplxDst++ = |
||||
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); |
||||
*pCmplxDst++ = |
||||
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); |
||||
|
||||
/* Decrement the numSamples loop counter */ |
||||
numSamples--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of CmplxByRealMult group
|
||||
*/ |
||||
@ -0,0 +1,223 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_cmplx_mult_real_q31.c
|
||||
*
|
||||
* Description: Q31 complex by real multiplication
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @ingroup groupCmplxMath
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup CmplxByRealMult
|
||||
* @{
|
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @brief Q31 complex-by-real multiplication
|
||||
* @param[in] *pSrcCmplx points to the complex input vector
|
||||
* @param[in] *pSrcReal points to the real input vector
|
||||
* @param[out] *pCmplxDst points to the complex output vector
|
||||
* @param[in] numSamples number of samples in each vector
|
||||
* @return none.
|
||||
*
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function uses saturating arithmetic.
|
||||
* Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
|
||||
*/ |
||||
|
||||
void arm_cmplx_mult_real_q31( |
||||
q31_t * pSrcCmplx, |
||||
q31_t * pSrcReal, |
||||
q31_t * pCmplxDst, |
||||
uint32_t numSamples) |
||||
{ |
||||
q31_t inA1; /* Temporary variable to store input value */ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
uint32_t blkCnt; /* loop counters */ |
||||
q31_t inA2, inA3, inA4; /* Temporary variables to hold input data */ |
||||
q31_t inB1, inB2; /* Temporary variabels to hold input data */ |
||||
q31_t out1, out2, out3, out4; /* Temporary variables to hold output data */ |
||||
|
||||
/* loop Unrolling */ |
||||
blkCnt = numSamples >> 2u; |
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */ |
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[i]. */ |
||||
/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ |
||||
/* read real input from complex input buffer */ |
||||
inA1 = *pSrcCmplx++; |
||||
inA2 = *pSrcCmplx++; |
||||
/* read input from real input bufer */ |
||||
inB1 = *pSrcReal++; |
||||
inB2 = *pSrcReal++; |
||||
/* read imaginary input from complex input buffer */ |
||||
inA3 = *pSrcCmplx++; |
||||
inA4 = *pSrcCmplx++; |
||||
|
||||
/* multiply complex input with real input */ |
||||
out1 = ((q63_t) inA1 * inB1) >> 32; |
||||
out2 = ((q63_t) inA2 * inB1) >> 32; |
||||
out3 = ((q63_t) inA3 * inB2) >> 32; |
||||
out4 = ((q63_t) inA4 * inB2) >> 32; |
||||
|
||||
/* sature the result */ |
||||
out1 = __SSAT(out1, 31); |
||||
out2 = __SSAT(out2, 31); |
||||
out3 = __SSAT(out3, 31); |
||||
out4 = __SSAT(out4, 31); |
||||
|
||||
/* get result in 1.31 format */ |
||||
out1 = out1 << 1; |
||||
out2 = out2 << 1; |
||||
out3 = out3 << 1; |
||||
out4 = out4 << 1; |
||||
|
||||
/* store the result to destination buffer */ |
||||
*pCmplxDst++ = out1; |
||||
*pCmplxDst++ = out2; |
||||
*pCmplxDst++ = out3; |
||||
*pCmplxDst++ = out4; |
||||
|
||||
/* read real input from complex input buffer */ |
||||
inA1 = *pSrcCmplx++; |
||||
inA2 = *pSrcCmplx++; |
||||
/* read input from real input bufer */ |
||||
inB1 = *pSrcReal++; |
||||
inB2 = *pSrcReal++; |
||||
/* read imaginary input from complex input buffer */ |
||||
inA3 = *pSrcCmplx++; |
||||
inA4 = *pSrcCmplx++; |
||||
|
||||
/* multiply complex input with real input */ |
||||
out1 = ((q63_t) inA1 * inB1) >> 32; |
||||
out2 = ((q63_t) inA2 * inB1) >> 32; |
||||
out3 = ((q63_t) inA3 * inB2) >> 32; |
||||
out4 = ((q63_t) inA4 * inB2) >> 32; |
||||
|
||||
/* sature the result */ |
||||
out1 = __SSAT(out1, 31); |
||||
out2 = __SSAT(out2, 31); |
||||
out3 = __SSAT(out3, 31); |
||||
out4 = __SSAT(out4, 31); |
||||
|
||||
/* get result in 1.31 format */ |
||||
out1 = out1 << 1; |
||||
out2 = out2 << 1; |
||||
out3 = out3 << 1; |
||||
out4 = out4 << 1; |
||||
|
||||
/* store the result to destination buffer */ |
||||
*pCmplxDst++ = out1; |
||||
*pCmplxDst++ = out2; |
||||
*pCmplxDst++ = out3; |
||||
*pCmplxDst++ = out4; |
||||
|
||||
/* Decrement the numSamples loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */ |
||||
blkCnt = numSamples % 0x4u; |
||||
|
||||
while(blkCnt > 0u) |
||||
{ |
||||
/* C[2 * i] = A[2 * i] * B[i]. */ |
||||
/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ |
||||
/* read real input from complex input buffer */ |
||||
inA1 = *pSrcCmplx++; |
||||
inA2 = *pSrcCmplx++; |
||||
/* read input from real input bufer */ |
||||
inB1 = *pSrcReal++; |
||||
|
||||
/* multiply complex input with real input */ |
||||
out1 = ((q63_t) inA1 * inB1) >> 32; |
||||
out2 = ((q63_t) inA2 * inB1) >> 32; |
||||
|
||||
/* sature the result */ |
||||
out1 = __SSAT(out1, 31); |
||||
out2 = __SSAT(out2, 31); |
||||
|
||||
/* get result in 1.31 format */ |
||||
out1 = out1 << 1; |
||||
out2 = out2 << 1; |
||||
|
||||
/* store the result to destination buffer */ |
||||
*pCmplxDst++ = out1; |
||||
*pCmplxDst++ = out2; |
||||
|
||||
/* Decrement the numSamples loop counter */ |
||||
blkCnt--; |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
while(numSamples > 0u) |
||||
{ |
||||
/* realOut = realA * realB. */ |
||||
/* imagReal = imagA * realB. */ |
||||
inA1 = *pSrcReal++; |
||||
/* store the result in the destination buffer. */ |
||||
*pCmplxDst++ = |
||||
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31); |
||||
*pCmplxDst++ = |
||||
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31); |
||||
|
||||
/* Decrement the numSamples loop counter */ |
||||
numSamples--; |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of CmplxByRealMult group
|
||||
*/ |
||||
@ -0,0 +1,87 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_pid_init_f32.c
|
||||
*
|
||||
* Description: Floating-point PID Control initialization function
|
||||
*
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @addtogroup PID
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Initialization function for the floating-point PID Control.
|
||||
* @param[in,out] *S points to an instance of the PID structure.
|
||||
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state & 1 = reset the state.
|
||||
* @return none.
|
||||
* \par Description:
|
||||
* \par
|
||||
* The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
|
||||
* The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
|
||||
* using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
|
||||
* also sets the state variables to all zeros.
|
||||
*/ |
||||
|
||||
void arm_pid_init_f32( |
||||
arm_pid_instance_f32 * S, |
||||
int32_t resetStateFlag) |
||||
{ |
||||
|
||||
/* Derived coefficient A0 */ |
||||
S->A0 = S->Kp + S->Ki + S->Kd; |
||||
|
||||
/* Derived coefficient A1 */ |
||||
S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd); |
||||
|
||||
/* Derived coefficient A2 */ |
||||
S->A2 = S->Kd; |
||||
|
||||
/* Check whether state needs reset or not */ |
||||
if(resetStateFlag) |
||||
{ |
||||
/* Clear the state buffer. The size will be always 3 samples */ |
||||
memset(S->state, 0, 3u * sizeof(float32_t)); |
||||
} |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of PID group
|
||||
*/ |
||||
@ -0,0 +1,122 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_pid_init_q15.c
|
||||
*
|
||||
* Description: Q15 PID Control initialization function
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @addtogroup PID
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @details
|
||||
* @param[in,out] *S points to an instance of the Q15 PID structure.
|
||||
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
|
||||
* @return none.
|
||||
* \par Description:
|
||||
* \par
|
||||
* The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
|
||||
* The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
|
||||
* using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
|
||||
* also sets the state variables to all zeros.
|
||||
*/ |
||||
|
||||
void arm_pid_init_q15( |
||||
arm_pid_instance_q15 * S, |
||||
int32_t resetStateFlag) |
||||
{ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
|
||||
/* Derived coefficient A0 */ |
||||
S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd); |
||||
|
||||
/* Derived coefficients and pack into A1 */ |
||||
|
||||
#ifndef ARM_MATH_BIG_ENDIAN |
||||
|
||||
S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16); |
||||
|
||||
#else |
||||
|
||||
S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16); |
||||
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
||||
|
||||
/* Check whether state needs reset or not */ |
||||
if(resetStateFlag) |
||||
{ |
||||
/* Clear the state buffer. The size will be always 3 samples */ |
||||
memset(S->state, 0, 3u * sizeof(q15_t)); |
||||
} |
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
q31_t temp; /*to store the sum */ |
||||
|
||||
/* Derived coefficient A0 */ |
||||
temp = S->Kp + S->Ki + S->Kd; |
||||
S->A0 = (q15_t) __SSAT(temp, 16); |
||||
|
||||
/* Derived coefficients and pack into A1 */ |
||||
temp = -(S->Kd + S->Kd + S->Kp); |
||||
S->A1 = (q15_t) __SSAT(temp, 16); |
||||
S->A2 = S->Kd; |
||||
|
||||
|
||||
|
||||
/* Check whether state needs reset or not */ |
||||
if(resetStateFlag) |
||||
{ |
||||
/* Clear the state buffer. The size will be always 3 samples */ |
||||
memset(S->state, 0, 3u * sizeof(q15_t)); |
||||
} |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of PID group
|
||||
*/ |
||||
@ -0,0 +1,107 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_pid_init_q31.c
|
||||
*
|
||||
* Description: Q31 PID Control initialization function
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @addtogroup PID
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Initialization function for the Q31 PID Control.
|
||||
* @param[in,out] *S points to an instance of the Q31 PID structure.
|
||||
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
|
||||
* @return none.
|
||||
* \par Description:
|
||||
* \par
|
||||
* The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
|
||||
* The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
|
||||
* using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
|
||||
* also sets the state variables to all zeros.
|
||||
*/ |
||||
|
||||
void arm_pid_init_q31( |
||||
arm_pid_instance_q31 * S, |
||||
int32_t resetStateFlag) |
||||
{ |
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY |
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */ |
||||
|
||||
/* Derived coefficient A0 */ |
||||
S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd); |
||||
|
||||
/* Derived coefficient A1 */ |
||||
S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp); |
||||
|
||||
|
||||
#else |
||||
|
||||
/* Run the below code for Cortex-M0 */ |
||||
|
||||
q31_t temp; |
||||
|
||||
/* Derived coefficient A0 */ |
||||
temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki); |
||||
S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd); |
||||
|
||||
/* Derived coefficient A1 */ |
||||
temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd); |
||||
S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp); |
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||||
|
||||
/* Derived coefficient A2 */ |
||||
S->A2 = S->Kd; |
||||
|
||||
/* Check whether state needs reset or not */ |
||||
if(resetStateFlag) |
||||
{ |
||||
/* Clear the state buffer. The size will be always 3 samples */ |
||||
memset(S->state, 0, 3u * sizeof(q31_t)); |
||||
} |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @} end of PID group
|
||||
*/ |
||||
@ -0,0 +1,65 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_pid_reset_f32.c
|
||||
*
|
||||
* Description: Floating-point PID Control reset function
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @addtogroup PID
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Reset function for the floating-point PID Control.
|
||||
* @param[in] *S Instance pointer of PID control data structure.
|
||||
* @return none.
|
||||
* \par Description:
|
||||
* The function resets the state buffer to zeros.
|
||||
*/ |
||||
void arm_pid_reset_f32( |
||||
arm_pid_instance_f32 * S) |
||||
{ |
||||
|
||||
/* Clear the state buffer. The size will be always 3 samples */ |
||||
memset(S->state, 0, 3u * sizeof(float32_t)); |
||||
} |
||||
|
||||
/**
|
||||
* @} end of PID group
|
||||
*/ |
||||
@ -0,0 +1,64 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_pid_reset_q15.c
|
||||
*
|
||||
* Description: Q15 PID Control reset function
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @addtogroup PID
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Reset function for the Q15 PID Control.
|
||||
* @param[in] *S Instance pointer of PID control data structure.
|
||||
* @return none.
|
||||
* \par Description:
|
||||
* The function resets the state buffer to zeros.
|
||||
*/ |
||||
void arm_pid_reset_q15( |
||||
arm_pid_instance_q15 * S) |
||||
{ |
||||
/* Reset state to zero, The size will be always 3 samples */ |
||||
memset(S->state, 0, 3u * sizeof(q15_t)); |
||||
} |
||||
|
||||
/**
|
||||
* @} end of PID group
|
||||
*/ |
||||
@ -0,0 +1,65 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_pid_reset_q31.c
|
||||
*
|
||||
* Description: Q31 PID Control reset function
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
|
||||
/**
|
||||
* @addtogroup PID
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Reset function for the Q31 PID Control.
|
||||
* @param[in] *S Instance pointer of PID control data structure.
|
||||
* @return none.
|
||||
* \par Description:
|
||||
* The function resets the state buffer to zeros.
|
||||
*/ |
||||
void arm_pid_reset_q31( |
||||
arm_pid_instance_q31 * S) |
||||
{ |
||||
|
||||
/* Clear the state buffer. The size will be always 3 samples */ |
||||
memset(S->state, 0, 3u * sizeof(q31_t)); |
||||
} |
||||
|
||||
/**
|
||||
* @} end of PID group
|
||||
*/ |
||||
@ -0,0 +1,149 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_sin_cos_f32.c
|
||||
*
|
||||
* Description: Sine and Cosine calculation for floating-point values.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
#include "arm_common_tables.h" |
||||
|
||||
/**
|
||||
* @ingroup groupController
|
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup SinCos Sine Cosine
|
||||
*
|
||||
* Computes the trigonometric sine and cosine values using a combination of table lookup
|
||||
* and linear interpolation.
|
||||
* There are separate functions for Q31 and floating-point data types.
|
||||
* The input to the floating-point version is in degrees while the
|
||||
* fixed-point Q31 have a scaled input with the range
|
||||
* [-1 0.9999] mapping to [-180 +180] degrees.
|
||||
* |
||||
* The floating point function also allows values that are out of the usual range. When this happens, the function will |
||||
* take extra time to adjust the input value to the range of [-180 180]. |
||||
*
|
||||
* The implementation is based on table lookup using 360 values together with linear interpolation.
|
||||
* The steps used are:
|
||||
* -# Calculation of the nearest integer table index.
|
||||
* -# Compute the fractional portion (fract) of the input.
|
||||
* -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.
|
||||
* -# Sine value is computed as <code> *psinVal = y0 + (fract * (y1 - y0))</code>.
|
||||
* -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.
|
||||
* -# Cosine value is computed as <code> *pcosVal = y0 + (fract * (y1 - y0))</code>.
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup SinCos
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Floating-point sin_cos function.
|
||||
* @param[in] theta input value in degrees
|
||||
* @param[out] *pSinVal points to the processed sine output.
|
||||
* @param[out] *pCosVal points to the processed cos output.
|
||||
* @return none.
|
||||
*/ |
||||
|
||||
void arm_sin_cos_f32( |
||||
float32_t theta, |
||||
float32_t * pSinVal, |
||||
float32_t * pCosVal) |
||||
{ |
||||
float32_t fract, in; /* Temporary variables for input, output */ |
||||
uint16_t indexS, indexC; /* Index variable */ |
||||
float32_t f1, f2, d1, d2; /* Two nearest output values */ |
||||
int32_t n; |
||||
float32_t findex, Dn, Df, temp; |
||||
|
||||
/* input x is in degrees */ |
||||
/* Scale the input, divide input by 360, for cosine add 0.25 (pi/2) to read sine table */ |
||||
in = theta * 0.00277777777778f; |
||||
|
||||
/* Calculation of floor value of input */ |
||||
n = (int32_t) in; |
||||
|
||||
/* Make negative values towards -infinity */ |
||||
if(in < 0.0f) |
||||
{ |
||||
n--; |
||||
} |
||||
/* Map input value to [0 1] */ |
||||
in = in - (float32_t) n; |
||||
|
||||
/* Calculation of index of the table */ |
||||
findex = (float32_t) FAST_MATH_TABLE_SIZE * in; |
||||
indexS = ((uint16_t)findex) & 0x1ff; |
||||
indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff; |
||||
|
||||
/* fractional value calculation */ |
||||
fract = findex - (float32_t) indexS; |
||||
|
||||
/* Read two nearest values of input value from the cos & sin tables */ |
||||
f1 = sinTable_f32[indexC+0]; |
||||
f2 = sinTable_f32[indexC+1]; |
||||
d1 = -sinTable_f32[indexS+0]; |
||||
d2 = -sinTable_f32[indexS+1]; |
||||
|
||||
Dn = 0.0122718463030f; // delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE
|
||||
Df = f2 - f1; // delta between the values of the functions
|
||||
temp = Dn*(d1 + d2) - 2*Df; |
||||
temp = fract*temp + (3*Df - (d2 + 2*d1)*Dn); |
||||
temp = fract*temp + d1*Dn; |
||||
|
||||
/* Calculation of cosine value */ |
||||
*pCosVal = fract*temp + f1; |
||||
|
||||
/* Read two nearest values of input value from the cos & sin tables */ |
||||
f1 = sinTable_f32[indexS+0]; |
||||
f2 = sinTable_f32[indexS+1]; |
||||
d1 = sinTable_f32[indexC+0]; |
||||
d2 = sinTable_f32[indexC+1]; |
||||
|
||||
Df = f2 - f1; // delta between the values of the functions
|
||||
temp = Dn*(d1 + d2) - 2*Df; |
||||
temp = fract*temp + (3*Df - (d2 + 2*d1)*Dn); |
||||
temp = fract*temp + d1*Dn; |
||||
|
||||
/* Calculation of sine value */ |
||||
*pSinVal = fract*temp + f1; |
||||
} |
||||
/**
|
||||
* @} end of SinCos group
|
||||
*/ |
||||
@ -0,0 +1,122 @@ |
||||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 19. March 2015 |
||||
* $Revision: V.1.4.5 |
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_sin_cos_q31.c
|
||||
*
|
||||
* Description: Cosine & Sine calculation for Q31 values.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* - Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* - Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in |
||||
* the documentation and/or other materials provided with the
|
||||
* distribution. |
||||
* - Neither the name of ARM LIMITED nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this |
||||
* software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */ |
||||
|
||||
#include "arm_math.h" |
||||
#include "arm_common_tables.h" |
||||
|
||||
/**
|
||||
* @ingroup groupController
|
||||
*/ |
||||
|
||||
/**
|
||||
* @addtogroup SinCos
|
||||
* @{
|
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Q31 sin_cos function.
|
||||
* @param[in] theta scaled input value in degrees
|
||||
* @param[out] *pSinVal points to the processed sine output.
|
||||
* @param[out] *pCosVal points to the processed cosine output.
|
||||
* @return none.
|
||||
*
|
||||
* The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179].
|
||||
*
|
||||
*/ |
||||
|
||||
void arm_sin_cos_q31( |
||||
q31_t theta, |
||||
q31_t * pSinVal, |
||||
q31_t * pCosVal) |
||||
{ |
||||
q31_t fract; /* Temporary variables for input, output */ |
||||
uint16_t indexS, indexC; /* Index variable */ |
||||
q31_t f1, f2, d1, d2; /* Two nearest output values */ |
||||
q31_t Dn, Df; |
||||
q63_t temp; |
||||
|
||||
/* Calculate the nearest index */ |
||||
indexS = (uint32_t)theta >> CONTROLLER_Q31_SHIFT; |
||||
indexC = (indexS + 128) & 0x1ff; |
||||
|
||||
/* Calculation of fractional value */ |
||||
fract = (theta - (indexS << CONTROLLER_Q31_SHIFT)) << 8; |
||||
|
||||
/* Read two nearest values of input value from the cos & sin tables */ |
||||
f1 = sinTable_q31[indexC+0]; |
||||
f2 = sinTable_q31[indexC+1]; |
||||
d1 = -sinTable_q31[indexS+0]; |
||||
d2 = -sinTable_q31[indexS+1]; |
||||
|
||||
Dn = 0x1921FB5; // delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE
|
||||
Df = f2 - f1; // delta between the values of the functions
|
||||
temp = Dn*((q63_t)d1 + d2); |
||||
temp = temp - ((q63_t)Df << 32); |
||||
temp = (q63_t)fract*(temp >> 31); |
||||
temp = temp + ((3*(q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1))*Dn); |
||||
temp = (q63_t)fract*(temp >> 31); |
||||
temp = temp + (q63_t)d1*Dn; |
||||
temp = (q63_t)fract*(temp >> 31); |
||||
|
||||
/* Calculation of cosine value */ |
||||
*pCosVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1); |
||||
|
||||
/* Read two nearest values of input value from the cos & sin tables */ |
||||
f1 = sinTable_q31[indexS+0]; |
||||
f2 = sinTable_q31[indexS+1]; |
||||
d1 = sinTable_q31[indexC+0]; |
||||
d2 = sinTable_q31[indexC+1]; |
||||
|
||||
Df = f2 - f1; // delta between the values of the functions
|
||||
temp = Dn*((q63_t)d1 + d2); |
||||
temp = temp - ((q63_t)Df << 32); |
||||
temp = (q63_t)fract*(temp >> 31); |
||||
temp = temp + ((3*(q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1))*Dn); |
||||
temp = (q63_t)fract*(temp >> 31); |
||||
temp = temp + (q63_t)d1*Dn; |
||||
temp = (q63_t)fract*(temp >> 31); |
||||
|
||||
/* Calculation of sine value */ |
||||
*pSinVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1); |
||||
} |
||||
|
||||
/**
|
||||
* @} end of SinCos group
|
||||
*/ |
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in new issue