10 Commits
33 changed files with 1944 additions and 125 deletions
+2 -1
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@@ -71,6 +71,7 @@ static void settings_bulkread_cb(BulkRead *bulk, uint32_t chunk, uint8_t *buffer
if (bulk->offset == 0) iw_begin(); if (bulk->offset == 0) iw_begin();
IniWriter iw = iw_init((char *)buffer, bulk->offset, chunk); IniWriter iw = iw_init((char *)buffer, bulk->offset, chunk);
iw.tag = 1;
settings_build_units_ini(&iw); settings_build_units_ini(&iw);
} }
@@ -85,7 +86,7 @@ static TF_Result lst_ini_export(TinyFrame *tf, TF_Msg *msg)
assert_param(bulk != NULL); assert_param(bulk != NULL);
bulk->frame_id = msg->frame_id; bulk->frame_id = msg->frame_id;
bulk->len = iw_measure_total(settings_build_units_ini); bulk->len = iw_measure_total(settings_build_units_ini, 1);
bulk->read = settings_bulkread_cb; bulk->read = settings_bulkread_cb;
bulk->userdata = NULL; bulk->userdata = NULL;
+4 -2
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@@ -229,7 +229,6 @@ static void gex_file_preamble(IniWriter *iw, const char *filename)
iw_hdr_comment(iw, filename); iw_hdr_comment(iw, filename);
iw_hdr_comment(iw, "GEX v%s on %s", GEX_VERSION, GEX_PLATFORM); iw_hdr_comment(iw, "GEX v%s on %s", GEX_VERSION, GEX_PLATFORM);
iw_hdr_comment(iw, "built %s at %s", __DATE__, __TIME__); iw_hdr_comment(iw, "built %s at %s", __DATE__, __TIME__);
iw_cmt_newline(iw);
} }
/** Generate a config file header (write instructions) */ /** Generate a config file header (write instructions) */
@@ -237,12 +236,15 @@ static void ini_preamble(IniWriter *iw, const char *filename)
{ {
gex_file_preamble(iw, filename); gex_file_preamble(iw, filename);
if (iw->tag == 0) { // tag 1 is set when exporting via the API
iw_cmt_newline(iw);
iw_comment(iw, "Overwrite this file to change settings."); iw_comment(iw, "Overwrite this file to change settings.");
#if PLAT_LOCK_BTN #if PLAT_LOCK_BTN
iw_comment(iw, "Press the LOCK button to save them to Flash."); iw_comment(iw, "Press the LOCK button to save them to Flash.");
#else #else
iw_comment(iw, "Close the LOCK jumper to save them to Flash."); iw_comment(iw, "Close the LOCK jumper to save them to Flash.");
#endif #endif
}
} }
// --- UNITS.INI --- // --- UNITS.INI ---
@@ -284,7 +286,7 @@ extern void plat_print_system_pinout(IniWriter *iw);
void settings_build_pinout_txt(IniWriter *iw) void settings_build_pinout_txt(IniWriter *iw)
{ {
gex_file_preamble(iw, "PINOUT.TXT"); gex_file_preamble(iw, "PINOUT.TXT");
iw_cmt_newline(iw);
rsc_print_all_available(iw); rsc_print_all_available(iw);
ureg_print_unit_resources(iw); ureg_print_unit_resources(iw);
plat_print_system_pinout(iw); plat_print_system_pinout(iw);
+17 -9
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@@ -340,19 +340,27 @@ bool ureg_finalize_all_init(void)
} else { } else {
pUnit->status = pUnit->driver->init(pUnit); pUnit->status = pUnit->driver->init(pUnit);
if (pUnit->status != E_SUCCESS) { if (pUnit->status != E_SUCCESS) {
dbg("!!! error initing unit %s: %s", pUnit->name, dbg("!!! error initing unit %s: %s", pUnit->name, error_get_message(pUnit->status));
error_get_message(pUnit->status));
} }
// try to assign unique callsigns // try to assign unique callsigns
// FIXME this is wrong, sometimes leads to duplicate CS
if (pUnit->callsign == 0) { if (pUnit->callsign == 0) {
pUnit->callsign = callsign++; // this is very inefficient but should be reliable
bool change;
do {
change = false;
UlistEntry *xli = ulist_head;
while (xli != NULL) {
if (xli->unit.callsign != 0) {
if (xli->unit.callsign == callsign) {
change = true;
callsign++;
} }
else {
if (pUnit->callsign >= callsign) {
callsign = (uint8_t) (pUnit->callsign + 1);
} }
xli = xli->next;
}
} while (change && callsign < 255);
pUnit->callsign = callsign;
} }
} }
@@ -398,8 +406,9 @@ void ureg_build_ini(IniWriter *iw)
// Unit list // Unit list
iw_section(iw, "UNITS"); iw_section(iw, "UNITS");
iw_comment(iw, "Create units by adding their names next to a type (e.g. PIN=A,B),"); iw_comment(iw, "Create units by adding their names next to a type (e.g. DO=A,B),");
iw_comment(iw, "remove the same way. Reload to update the unit sections below."); iw_comment(iw, "remove the same way. Reload to update the unit sections below.");
iw_cmt_newline(iw);
// This could certainly be done in some more efficient way ... // This could certainly be done in some more efficient way ...
re = ureg_head; re = ureg_head;
@@ -412,7 +421,6 @@ void ureg_build_ini(IniWriter *iw)
const UnitDriver *const pDriver = re->driver; const UnitDriver *const pDriver = re->driver;
iw_cmt_newline(iw);
iw_comment(iw, pDriver->description); iw_comment(iw, pDriver->description);
iw_string(iw, pDriver->name); iw_string(iw, pDriver->name);
iw_string(iw, "="); iw_string(iw, "=");
+2
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@@ -14,6 +14,8 @@ GEX_SRC_DIR = \
User/units/i2c \ User/units/i2c \
User/units/spi \ User/units/spi \
User/units/adc \ User/units/adc \
User/units/sipo \
User/units/fcap \
User/TinyFrame \ User/TinyFrame \
User/CWPack \ User/CWPack \
User/tasks User/tasks
+4 -1
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@@ -240,6 +240,8 @@ char * pinmask2str_up(uint32_t pins, char *buffer)
return buffer; return buffer;
} }
#pragma GCC push_options
#pragma GCC optimize ("O2")
/** spread a packed pinfield using a mask */ /** spread a packed pinfield using a mask */
uint32_t pinmask_spread_32(uint32_t packed, uint32_t mask) uint32_t pinmask_spread_32(uint32_t packed, uint32_t mask)
{ {
@@ -247,7 +249,7 @@ uint32_t pinmask_spread_32(uint32_t packed, uint32_t mask)
uint32_t poke = 1; uint32_t poke = 1;
if(packed == 0) return 0; if(packed == 0) return 0;
for (int i = 0; i<32; i++) { for (int i = 0; i < 32; i++) {
if (mask & 1) { if (mask & 1) {
if (packed & poke) { if (packed & poke) {
result |= 1<<i; result |= 1<<i;
@@ -295,6 +297,7 @@ uint8_t pinmask_translate(uint32_t mask, uint8_t index)
} }
return 0; return 0;
} }
#pragma GCC pop_options
/** Configure unit pins as analog (part of unit teardown) */ /** Configure unit pins as analog (part of unit teardown) */
void hw_deinit_unit_pins(Unit *unit) void hw_deinit_unit_pins(Unit *unit)
+2
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@@ -100,6 +100,7 @@ char * pinmask2str_up(uint32_t pins, char *buffer);
*/ */
uint32_t pinmask_spread_32(uint32_t packed, uint32_t mask); uint32_t pinmask_spread_32(uint32_t packed, uint32_t mask);
/** Spread packed port pins using a mask - 16-bit version */
static inline uint16_t pinmask_spread(uint16_t packed, uint16_t mask) static inline uint16_t pinmask_spread(uint16_t packed, uint16_t mask)
{ {
return (uint16_t) pinmask_spread_32(packed, mask); return (uint16_t) pinmask_spread_32(packed, mask);
@@ -114,6 +115,7 @@ static inline uint16_t pinmask_spread(uint16_t packed, uint16_t mask)
*/ */
uint32_t pinmask_pack_32(uint32_t spread, uint32_t mask); uint32_t pinmask_pack_32(uint32_t spread, uint32_t mask);
/** Pack spread port pins using a mask - 16-bit version */
static inline uint16_t pinmask_pack(uint32_t spread, uint32_t mask) static inline uint16_t pinmask_pack(uint32_t spread, uint32_t mask)
{ {
return (uint16_t) pinmask_pack_32(spread, mask); return (uint16_t) pinmask_pack_32(spread, mask);
+36 -8
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@@ -61,9 +61,12 @@ static struct callbacks_ {
struct cbslot dma2_7; struct cbslot dma2_7;
struct cbslot dma2_8; struct cbslot dma2_8;
struct cbslot tim2;
struct cbslot tim6; struct cbslot tim6;
struct cbslot tim7; struct cbslot tim7;
struct cbslot tim14;
struct cbslot tim15; struct cbslot tim15;
struct cbslot tim16;
struct cbslot adc1; struct cbslot adc1;
@@ -102,24 +105,32 @@ void irqd_init(void)
HAL_NVIC_SetPriority(ADC1_COMP_IRQn, 1, 0); // ADC group completion - higher prio than DMA to let it handle the last halfword first HAL_NVIC_SetPriority(ADC1_COMP_IRQn, 1, 0); // ADC group completion - higher prio than DMA to let it handle the last halfword first
// NVIC_EnableIRQ(TIM1_IRQn); /*!< TIM1 global Interrupt */ // NVIC_EnableIRQ(TIM1_IRQn); /*!< TIM1 global Interrupt */
// NVIC_EnableIRQ(TIM2_IRQn); /*!< TIM2 global Interrupt */ NVIC_EnableIRQ(TIM2_IRQn); /*!< TIM2 global Interrupt */
HAL_NVIC_SetPriority(TIM2_IRQn, 2, 0); // Used by FCAP
// NVIC_EnableIRQ(TIM3_IRQn); /*!< TIM3 global Interrupt */ // NVIC_EnableIRQ(TIM3_IRQn); /*!< TIM3 global Interrupt */
NVIC_EnableIRQ(TIM6_DAC_IRQn); /*!< TIM6 global and DAC channel underrun error Interrupt */ NVIC_EnableIRQ(TIM6_DAC_IRQn); /*!< TIM6 global and DAC channel underrun error Interrupt */
HAL_NVIC_SetPriority(TIM7_IRQn, 2, 0); // Used for DAC timing HAL_NVIC_SetPriority(TIM7_IRQn, 2, 0); // Used for DAC timing
NVIC_EnableIRQ(TIM7_IRQn); /*!< TIM7 global Interrupt */ NVIC_EnableIRQ(TIM7_IRQn); /*!< TIM7 global Interrupt */
HAL_NVIC_SetPriority(TIM7_IRQn, 2, 0); HAL_NVIC_SetPriority(TIM7_IRQn, 2, 0);// this will be for dac (?)
/* Tim14 is used for HAL timebase, because SysTick is used to time FreeRTOS and has the lowest priority. */ NVIC_EnableIRQ(TIM14_IRQn); /*used by fcap as a time reference for direct capture */ /*!< TIM14 global Interrupt */
/* Tim14's priority is set to 0 in the init routine, which runs early in the startup sequence */ HAL_NVIC_SetPriority(TIM14_IRQn, 2, 0);
// NVIC_EnableIRQ(TIM14_IRQn); /*!< TIM14 global Interrupt */
NVIC_EnableIRQ(TIM15_IRQn); /*!< TIM15 global Interrupt */ NVIC_EnableIRQ(TIM15_IRQn); /*!< TIM15 global Interrupt */
HAL_NVIC_SetPriority(TIM15_IRQn, 2, 0); HAL_NVIC_SetPriority(TIM15_IRQn, 2, 0); // Used by ADC
// NVIC_EnableIRQ(TIM16_IRQn); /*!< TIM16 global Interrupt */ NVIC_EnableIRQ(TIM16_IRQn); /*!< TIM16 global Interrupt */
HAL_NVIC_SetPriority(TIM16_IRQn, 2, 0);
/* Tim17 is used for HAL timebase, because SysTick is used to time FreeRTOS and has the lowest priority. */
/* Tim17's priority is set to 0 in the init routine, which runs early in the startup sequence */
// NVIC_EnableIRQ(TIM17_IRQn); /*!< TIM17 global Interrupt */ // NVIC_EnableIRQ(TIM17_IRQn); /*!< TIM17 global Interrupt */
// NVIC_EnableIRQ(I2C1_IRQn); /*!< I2C1 Event Interrupt & EXTI Line23 Interrupt (I2C1 wakeup) */ // NVIC_EnableIRQ(I2C1_IRQn); /*!< I2C1 Event Interrupt & EXTI Line23 Interrupt (I2C1 wakeup) */
// NVIC_EnableIRQ(I2C2_IRQn); /*!< I2C2 Event Interrupt */ // NVIC_EnableIRQ(I2C2_IRQn); /*!< I2C2 Event Interrupt */
// NVIC_EnableIRQ(SPI1_IRQn); /*!< SPI1 global Interrupt */ // NVIC_EnableIRQ(SPI1_IRQn); /*!< SPI1 global Interrupt */
@@ -159,9 +170,13 @@ static struct cbslot *get_slot_for_periph(void *periph)
else if (periph == USART5) slot = &callbacks.usart5; else if (periph == USART5) slot = &callbacks.usart5;
#endif #endif
else if (periph == TIM2) slot = &callbacks.tim2;
else if (periph == TIM6) slot = &callbacks.tim6; else if (periph == TIM6) slot = &callbacks.tim6;
else if (periph == TIM7) slot = &callbacks.tim7; else if (periph == TIM7) slot = &callbacks.tim7;
else if (periph == TIM14) slot = &callbacks.tim14;
else if (periph == TIM15) slot = &callbacks.tim15; else if (periph == TIM15) slot = &callbacks.tim15;
else if (periph == TIM16) slot = &callbacks.tim16;
// 17 - used by timebase
else if (periph == ADC1) slot = &callbacks.adc1; else if (periph == ADC1) slot = &callbacks.adc1;
@@ -302,7 +317,10 @@ void EXTI4_15_IRQHandler(void)
// ------------ INTERRUPTS ------------- // ------------ INTERRUPTS -------------
// TIM14 is used to generate HAL timebase and its handler is in the file "timebase.c" void TIM2_IRQHandler(void)
{
CALL_IRQ_HANDLER(callbacks.tim2);
}
void TIM6_DAC_IRQHandler(void) void TIM6_DAC_IRQHandler(void)
{ {
@@ -314,11 +332,21 @@ void TIM7_IRQHandler(void)
CALL_IRQ_HANDLER(callbacks.tim7); CALL_IRQ_HANDLER(callbacks.tim7);
} }
void TIM14_IRQHandler(void)
{
CALL_IRQ_HANDLER(callbacks.tim14);
}
void TIM15_IRQHandler(void) void TIM15_IRQHandler(void)
{ {
CALL_IRQ_HANDLER(callbacks.tim15); CALL_IRQ_HANDLER(callbacks.tim15);
} }
void TIM16_IRQHandler(void)
{
CALL_IRQ_HANDLER(callbacks.tim16);
}
void ADC1_COMP_IRQHandler(void) void ADC1_COMP_IRQHandler(void)
{ {
CALL_IRQ_HANDLER(callbacks.adc1); CALL_IRQ_HANDLER(callbacks.adc1);
+38
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@@ -5,6 +5,44 @@
#include "platform.h" #include "platform.h"
#include "ll_extension.h" #include "ll_extension.h"
const uint32_t LL_TIM_IC_FILTERS[] = {
LL_TIM_IC_FILTER_FDIV1,
LL_TIM_IC_FILTER_FDIV1_N2,
LL_TIM_IC_FILTER_FDIV1_N4,
LL_TIM_IC_FILTER_FDIV1_N8,
LL_TIM_IC_FILTER_FDIV2_N6,
LL_TIM_IC_FILTER_FDIV2_N8,
LL_TIM_IC_FILTER_FDIV4_N6,
LL_TIM_IC_FILTER_FDIV4_N8,
LL_TIM_IC_FILTER_FDIV8_N6,
LL_TIM_IC_FILTER_FDIV8_N8,
LL_TIM_IC_FILTER_FDIV16_N5,
LL_TIM_IC_FILTER_FDIV16_N6,
LL_TIM_IC_FILTER_FDIV16_N8,
LL_TIM_IC_FILTER_FDIV32_N5,
LL_TIM_IC_FILTER_FDIV32_N6,
LL_TIM_IC_FILTER_FDIV32_N8,
};
const uint32_t LL_TIM_ETR_FILTERS[] = {
LL_TIM_ETR_FILTER_FDIV1,
LL_TIM_ETR_FILTER_FDIV1_N2,
LL_TIM_ETR_FILTER_FDIV1_N4,
LL_TIM_ETR_FILTER_FDIV1_N8,
LL_TIM_ETR_FILTER_FDIV2_N6,
LL_TIM_ETR_FILTER_FDIV2_N8,
LL_TIM_ETR_FILTER_FDIV4_N6,
LL_TIM_ETR_FILTER_FDIV4_N8,
LL_TIM_ETR_FILTER_FDIV8_N6,
LL_TIM_ETR_FILTER_FDIV8_N8,
LL_TIM_ETR_FILTER_FDIV16_N5,
LL_TIM_ETR_FILTER_FDIV16_N6,
LL_TIM_ETR_FILTER_FDIV16_N8,
LL_TIM_ETR_FILTER_FDIV32_N5,
LL_TIM_ETR_FILTER_FDIV32_N6,
LL_TIM_ETR_FILTER_FDIV32_N8,
};
const uint32_t LL_SYSCFG_EXTI_PORTS[PORTS_COUNT] = { const uint32_t LL_SYSCFG_EXTI_PORTS[PORTS_COUNT] = {
LL_SYSCFG_EXTI_PORTA, LL_SYSCFG_EXTI_PORTA,
LL_SYSCFG_EXTI_PORTB, LL_SYSCFG_EXTI_PORTB,
+2 -1
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@@ -13,7 +13,8 @@ extern GPIO_TypeDef * const GPIO_PERIPHS[PORTS_COUNT];
extern const uint32_t LL_GPIO_PINS[16]; extern const uint32_t LL_GPIO_PINS[16];
extern const uint32_t LL_EXTI_LINES[16]; extern const uint32_t LL_EXTI_LINES[16];
extern const uint32_t LL_ADC_SAMPLETIMES[8]; extern const uint32_t LL_ADC_SAMPLETIMES[8];
extern const uint32_t LL_TIM_IC_FILTERS[16];
extern const uint32_t LL_TIM_ETR_FILTERS[16];
static inline bool LL_DMA_IsActiveFlag_G(uint32_t isr_snapshot, uint8_t channel) static inline bool LL_DMA_IsActiveFlag_G(uint32_t isr_snapshot, uint8_t channel)
{ {
+1 -1
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@@ -51,7 +51,7 @@
#define INI_VALUE_MAX 30 // Ini parser value buffer #define INI_VALUE_MAX 30 // Ini parser value buffer
// -------- Stack buffers ---------- // -------- Stack buffers ----------
#define DBG_BUF_LEN 80 // Size of the snprintf buffer for debug messages #define DBG_BUF_LEN 100 // Size of the snprintf buffer for debug messages
#define ERR_MSG_STR_LEN 64 // Error message buffer size #define ERR_MSG_STR_LEN 64 // Error message buffer size
#define IWBUFFER_LEN 80 // Ini writer buffer for sprintf #define IWBUFFER_LEN 80 // Ini writer buffer for sprintf
+4
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@@ -2,6 +2,7 @@
// Created by MightyPork on 2017/11/26. // Created by MightyPork on 2017/11/26.
// //
#include <units/fcap/unit_fcap.h>
#include "platform.h" #include "platform.h"
#include "usbd_core.h" #include "usbd_core.h"
#include "USB/usb_device.h" #include "USB/usb_device.h"
@@ -17,6 +18,7 @@
#include "units/test/unit_test.h" #include "units/test/unit_test.h"
#include "units/usart/unit_usart.h" #include "units/usart/unit_usart.h"
#include "units/spi/unit_spi.h" #include "units/spi/unit_spi.h"
#include "units/sipo/unit_sipo.h"
#include "hw_utils.h" #include "hw_utils.h"
void plat_init_resources(void) void plat_init_resources(void)
@@ -86,6 +88,8 @@ void plat_init_resources(void)
ureg_add_type(&UNIT_USART); ureg_add_type(&UNIT_USART);
ureg_add_type(&UNIT_1WIRE); ureg_add_type(&UNIT_1WIRE);
ureg_add_type(&UNIT_ADC); ureg_add_type(&UNIT_ADC);
ureg_add_type(&UNIT_SIPO);
ureg_add_type(&UNIT_FCAP);
// Free all present resources // Free all present resources
{ {
+9 -7
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@@ -7,10 +7,12 @@
// ---------------------------- HAL TIMEBASE ----------------------------- // ---------------------------- HAL TIMEBASE -----------------------------
#define TIMEBASE_TIMER TIM14 #define TIMEBASE_TIMER TIM17
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{ {
// EDIT - used 17 instead because 14 was needed for fcap
// TIM14 is a simple 16-bit timer timer with no special features. // TIM14 is a simple 16-bit timer timer with no special features.
// This makes it a good choice for the timebase generation. We set it to generate // This makes it a good choice for the timebase generation. We set it to generate
// an interrupt every 1 ms // an interrupt every 1 ms
@@ -19,9 +21,9 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
// - TIM14 is always up-counting // - TIM14 is always up-counting
// - using APB1 clock // - using APB1 clock
__HAL_RCC_TIM14_CLK_ENABLE(); __HAL_RCC_TIM17_CLK_ENABLE();
NVIC_SetPriority(TIM14_IRQn, TickPriority); // highest possible priority NVIC_SetPriority(TIM17_IRQn, TickPriority); // highest possible priority
NVIC_EnableIRQ(TIM14_IRQn); NVIC_EnableIRQ(TIM17_IRQn);
/* Compute TIM1 clock */ /* Compute TIM1 clock */
uint32_t uwTimclock = HAL_RCC_GetPCLK1Freq(); uint32_t uwTimclock = HAL_RCC_GetPCLK1Freq();
@@ -45,7 +47,7 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
static volatile uint32_t uwUptimeMs = 0; static volatile uint32_t uwUptimeMs = 0;
/* TIMEBASE TIMER ISR */ /* TIMEBASE TIMER ISR */
void TIM14_IRQHandler(void) void TIM17_IRQHandler(void)
{ {
uwUptimeMs++; uwUptimeMs++;
LL_TIM_ClearFlag_UPDATE(TIMEBASE_TIMER); LL_TIM_ClearFlag_UPDATE(TIMEBASE_TIMER);
@@ -89,10 +91,10 @@ uint64_t PTIM_GetMicrotime(void)
uwMicros = TIMEBASE_TIMER->CNT; uwMicros = TIMEBASE_TIMER->CNT;
uwMillis = uwUptimeMs; uwMillis = uwUptimeMs;
if (LL_TIM_IsActiveFlag_UPDATE(TIM14)) { if (LL_TIM_IsActiveFlag_UPDATE(TIMEBASE_TIMER)) {
// This means the timer has overflown after we disabled IRQ // This means the timer has overflown after we disabled IRQ
// Use the last CNT value before the overflow // Use the last CNT value before the overflow
uwMicros = TIM14->ARR; // this is 999us uwMicros = TIMEBASE_TIMER->ARR; // this is 999us
} }
} }
vPortExitCritical(); vPortExitCritical();
+29 -53
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@@ -9,80 +9,56 @@
#define DOUT_INTERNAL #define DOUT_INTERNAL
#include "_dout_internal.h" #include "_dout_internal.h"
error_t UU_DOut_Spread(Unit *unit, uint16_t packed, uint16_t *spread_out)
{
CHECK_TYPE(unit, &UNIT_DOUT);
*spread_out = UU_DOut_Spread_HS(unit, packed);
return E_SUCCESS;
}
uint16_t UU_DOut_Spread_HS(Unit *unit, uint16_t packed)
{
struct priv *priv = unit->data;
uint16_t mask = priv->pins;
return pinmask_spread(packed, mask);
}
void UU_DOut_Write_HS(Unit *unit, uint16_t spread)
{
struct priv *priv = unit->data;
uint16_t mask = priv->pins;
uint16_t set = spread;
uint16_t reset = ((~spread) & mask);
priv->port->BSRR = set | (reset << 16);
}
void UU_DOut_Set_HS(Unit *unit, uint16_t spread)
{
struct priv *priv = unit->data;
priv->port->BSRR = spread;
}
void UU_DOut_Clear_HS(Unit *unit, uint16_t spread)
{
struct priv *priv = unit->data;
priv->port->BSRR = (spread<<16);
}
void UU_DOut_Toggle_HS(Unit *unit, uint16_t spread)
{
struct priv *priv = unit->data;
uint16_t mask = priv->pins;
uint16_t flipped = (uint16_t) (~priv->port->ODR) & mask;
uint16_t set = flipped & spread;
uint16_t reset = ((~flipped) & mask) & spread;
priv->port->BSRR = set | (reset<<16);
}
error_t UU_DOut_Write(Unit *unit, uint16_t packed) error_t UU_DOut_Write(Unit *unit, uint16_t packed)
{ {
CHECK_TYPE(unit, &UNIT_DOUT); CHECK_TYPE(unit, &UNIT_DOUT);
const uint16_t spread = UU_DOut_Spread_HS(unit, packed);
UU_DOut_Write_HS(unit, spread); struct priv *priv = unit->data;
uint16_t mask = priv->pins;
uint16_t spread = pinmask_spread(packed, mask);
uint16_t set = spread;
uint16_t reset = ((~spread) & mask);
priv->port->BSRR = set | (reset << 16);
return E_SUCCESS; return E_SUCCESS;
} }
error_t UU_DOut_Set(Unit *unit, uint16_t packed) error_t UU_DOut_Set(Unit *unit, uint16_t packed)
{ {
CHECK_TYPE(unit, &UNIT_DOUT); CHECK_TYPE(unit, &UNIT_DOUT);
const uint16_t spread = UU_DOut_Spread_HS(unit, packed);
UU_DOut_Set_HS(unit, spread); struct priv *priv = unit->data;
uint16_t mask = priv->pins;
uint16_t spread = pinmask_spread(packed, mask);
priv->port->BSRR = spread;
return E_SUCCESS; return E_SUCCESS;
} }
error_t UU_DOut_Clear(Unit *unit, uint16_t packed) error_t UU_DOut_Clear(Unit *unit, uint16_t packed)
{ {
CHECK_TYPE(unit, &UNIT_DOUT); CHECK_TYPE(unit, &UNIT_DOUT);
const uint16_t spread = UU_DOut_Spread_HS(unit, packed);
UU_DOut_Clear_HS(unit, spread); struct priv *priv = unit->data;
uint16_t mask = priv->pins;
uint16_t spread = pinmask_spread(packed, mask);
priv->port->BSRR = (spread<<16);
return E_SUCCESS; return E_SUCCESS;
} }
error_t UU_DOut_Toggle(Unit *unit, uint16_t packed) error_t UU_DOut_Toggle(Unit *unit, uint16_t packed)
{ {
CHECK_TYPE(unit, &UNIT_DOUT); CHECK_TYPE(unit, &UNIT_DOUT);
const uint16_t spread = UU_DOut_Spread_HS(unit, packed);
UU_DOut_Toggle_HS(unit, spread); struct priv *priv = unit->data;
uint16_t mask = priv->pins;
uint16_t spread = pinmask_spread(packed, mask);
uint16_t flipped = (uint16_t) (~priv->port->ODR) & mask;
uint16_t set = flipped & spread;
uint16_t reset = ((~flipped) & mask) & spread;
priv->port->BSRR = set | (reset<<16);
return E_SUCCESS; return E_SUCCESS;
} }
+3 -3
View File
@@ -47,13 +47,13 @@ error_t DOut_loadIni(Unit *unit, const char *key, const char *value)
suc = parse_port_name(value, &priv->port_name); suc = parse_port_name(value, &priv->port_name);
} }
else if (streq(key, "pins")) { else if (streq(key, "pins")) {
priv->pins = parse_pinmask(value, &suc); priv->pins = (uint16_t) parse_pinmask(value, &suc);
} }
else if (streq(key, "initial")) { else if (streq(key, "initial")) {
priv->initial = parse_pinmask(value, &suc); priv->initial = (uint16_t) parse_pinmask(value, &suc);
} }
else if (streq(key, "open-drain")) { else if (streq(key, "open-drain")) {
priv->open_drain = parse_pinmask(value, &suc); priv->open_drain = (uint16_t) parse_pinmask(value, &suc);
} }
else { else {
return E_BAD_KEY; return E_BAD_KEY;
-13
View File
@@ -56,17 +56,4 @@ error_t UU_DOut_Toggle(Unit *unit, uint16_t packed);
*/ */
error_t UU_DOut_GetPinCount(Unit *unit, uint8_t *count); error_t UU_DOut_GetPinCount(Unit *unit, uint8_t *count);
// --- high-speed variants, without type checking and spreading ---
/** Spread a packed word */
error_t UU_DOut_Spread(Unit *unit, uint16_t packed, uint16_t *spread_out);
// those are like the normal functions, but without driver checking and other verification (where applicable)
// also the argument must be already spread, which saves time if the same value is used repeatedly
uint16_t UU_DOut_Spread_HS(Unit *unit, uint16_t packed);
void UU_DOut_Write_HS(Unit *unit, uint16_t spread);
void UU_DOut_Set_HS(Unit *unit, uint16_t spread);
void UU_DOut_Clear_HS(Unit *unit, uint16_t spread);
void UU_DOut_Toggle_HS(Unit *unit, uint16_t spread);
#endif //U_DOUT_H #endif //U_DOUT_H
+11
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@@ -0,0 +1,11 @@
//
// Created by MightyPork on 2018/02/03.
//
#include "platform.h"
#include "unit_base.h"
#include "unit_fcap.h"
#define FCAP_INTERNAL
#include "_fcap_internal.h"
+462
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@@ -0,0 +1,462 @@
//
// Created by MightyPork on 2018/02/20.
//
#include <stm32f072xb.h>
#include "platform.h"
#define FCAP_INTERNAL
#include "_fcap_internal.h"
static void UFCAP_StopMeasurement(Unit *unit);
static void UFCAP_ConfigureForIndirectCapture(Unit *unit);
static void UFCAP_ConfigureForDirectCapture(Unit *unit, uint16_t msec);
static void UFCAP_ConfigureForFreeCapture(Unit *unit);
uint32_t UFCAP_GetFreeCounterValue(Unit *unit)
{
struct priv * const priv = unit->data;
TIM_TypeDef * const TIMx = priv->TIMx;
return TIMx->CNT;
}
uint32_t UFCAP_FreeCounterClear(Unit *unit)
{
struct priv * const priv = unit->data;
TIM_TypeDef * const TIMx = priv->TIMx;
// this isn't perfect, we can miss one clock
// but it's probably the best we can do here ...
vPortEnterCritical();
uint32_t val = TIMx->CNT;
TIMx->CNT = 0;
vPortExitCritical();
return val;
}
static void UFCAP_IndirectBurstReportJob(Job *job)
{
Unit *unit = job->unit;
struct priv * const priv = unit->data;
uint8_t buf[20];
PayloadBuilder pb = pb_start(buf, 20, NULL);
pb_u16(&pb, PLAT_AHB_MHZ);
pb_u16(&pb, priv->ind_burst.n_count);
pb_u64(&pb, priv->ind_burst.period_acu);
pb_u64(&pb, priv->ind_burst.ontime_acu);
assert_param(pb.ok);
com_respond_pb(priv->request_id, MSG_SUCCESS, &pb);
// timer is already stopped, now in OPMODE_BUSY
priv->opmode = OPMODE_IDLE;
}
static void UFCAP_SinglePulseReportJob(Job *job)
{
Unit *unit = job->unit;
struct priv * const priv = unit->data;
uint8_t buf[6];
PayloadBuilder pb = pb_start(buf, 6, NULL);
pb_u16(&pb, PLAT_AHB_MHZ);
pb_u32(&pb, job->data1);
assert_param(pb.ok);
com_respond_pb(priv->request_id, MSG_SUCCESS, &pb);
// timer is already stopped, now in OPMODE_BUSY
priv->opmode = OPMODE_IDLE;
}
/**
* Count is passed in data1
* @param job
*/
static void UFCAP_DirectBurstReportJob(Job *job)
{
Unit *unit = job->unit;
struct priv * const priv = unit->data;
uint8_t buf[8];
PayloadBuilder pb = pb_start(buf, 8, NULL);
pb_u8(&pb, priv->direct_presc);
pb_u16(&pb, priv->dir_burst.msec);
pb_u32(&pb, job->data1);
assert_param(pb.ok);
com_respond_pb(priv->request_id, MSG_SUCCESS, &pb);
// timer is already stopped, now in OPMODE_BUSY
priv->opmode = OPMODE_IDLE;
}
void UFCAP_TIMxHandler(void *arg)
{
Unit *unit = arg;
assert_param(unit);
struct priv * const priv = unit->data;
assert_param(priv);
TIM_TypeDef * const TIMx = priv->TIMx;
if (priv->opmode == OPMODE_INDIRECT_CONT) {
if (LL_TIM_IsActiveFlag_CC1(TIMx)) {
if (priv->n_skip > 0) {
priv->n_skip--;
} else {
priv->ind_cont.last_period = LL_TIM_IC_GetCaptureCH1(TIMx);
priv->ind_cont.last_ontime = priv->ind_cont.ontime;
}
LL_TIM_ClearFlag_CC1(TIMx);
LL_TIM_ClearFlag_CC1OVR(TIMx);
}
if (LL_TIM_IsActiveFlag_CC2(TIMx)) {
priv->ind_cont.ontime = LL_TIM_IC_GetCaptureCH2(TIMx);
LL_TIM_ClearFlag_CC2(TIMx);
LL_TIM_ClearFlag_CC2OVR(TIMx);
}
}
else if (priv->opmode == OPMODE_SINGLE_PULSE) {
if (LL_TIM_IsActiveFlag_CC2(TIMx)) {
// single pulse - does not wait for the second edge
uint32_t len = LL_TIM_IC_GetCaptureCH2(TIMx);
priv->opmode = OPMODE_BUSY;
UFCAP_StopMeasurement(unit);
Job j = {
.cb = UFCAP_SinglePulseReportJob,
.unit = unit,
.data1 = len,
};
scheduleJob(&j);
}
}
else if (priv->opmode == OPMODE_INDIRECT_BURST) {
if (LL_TIM_IsActiveFlag_CC1(TIMx)) {
const uint32_t period = LL_TIM_IC_GetCaptureCH1(TIMx);
const uint32_t ontime = priv->ind_burst.ontime;
if (priv->n_skip > 0) {
priv->n_skip--;
} else {
priv->ind_burst.ontime_acu += ontime;
priv->ind_burst.period_acu += period;
if (++priv->ind_burst.n_count == priv->ind_burst.n_target) {
priv->opmode = OPMODE_BUSY;
UFCAP_StopMeasurement(unit);
Job j = {
.cb = UFCAP_IndirectBurstReportJob,
.unit = unit,
};
scheduleJob(&j);
}
}
LL_TIM_ClearFlag_CC1(TIMx);
LL_TIM_ClearFlag_CC1OVR(TIMx);
}
if (LL_TIM_IsActiveFlag_CC2(TIMx)) {
priv->ind_burst.ontime = LL_TIM_IC_GetCaptureCH2(TIMx);
LL_TIM_ClearFlag_CC2(TIMx);
LL_TIM_ClearFlag_CC2OVR(TIMx);
}
}
else if (priv->opmode == OPMODE_IDLE) {
// clear everything - in idle it would cycle in the handler forever
TIMx->SR = 0;
}
else {
trap("Unhandled fcap TIMx irq");
}
}
void UFCAP_TIMyHandler(void *arg)
{
Unit *unit = arg;
assert_param(unit);
struct priv *const priv = unit->data;
assert_param(priv);
TIM_TypeDef * const TIMx = priv->TIMx;
TIM_TypeDef * const TIMy = priv->TIMy;
uint32_t cnt = TIMx->CNT; // TIMx should be stopped now
// dbg("> TIMy Handler, TIMx cntr is %d", cnt);
priv->dir_cont.last_count = cnt;
if (priv->opmode == OPMODE_DIRECT_CONT) {
LL_TIM_DisableCounter(TIMx);
LL_TIM_DisableCounter(TIMy);
LL_TIM_SetCounter(TIMx, 0);
LL_TIM_SetCounter(TIMy, 0);
LL_TIM_EnableCounter(TIMy); // next loop
LL_TIM_EnableCounter(TIMx);
}
else if (priv->opmode == OPMODE_DIRECT_BURST) {
priv->opmode = OPMODE_BUSY;
UFCAP_StopMeasurement(unit);
Job j = {
.cb = UFCAP_DirectBurstReportJob,
.unit = unit,
.data1 = cnt,
};
scheduleJob(&j);
}
else if (priv->opmode == OPMODE_IDLE) {
// clear everything - in idle it would cycle in the handler forever
TIMy->SR = 0;
}
else {
trap("Unhandled fcap TIMy irq");
}
LL_TIM_ClearFlag_UPDATE(TIMy);
}
static void UFCAP_ClearTimerConfig(Unit *unit)
{
struct priv * const priv = unit->data;
TIM_TypeDef * const TIMx = priv->TIMx;
// CLEAR CURRENT STATE, STOP
UFCAP_StopMeasurement(unit);
// CONFIGURE TIMER BASIC PARAMS
LL_TIM_SetPrescaler(TIMx, 0);
LL_TIM_SetAutoReload(TIMx, 0xFFFFFFFF);
LL_TIM_EnableARRPreload(TIMx);
LL_TIM_GenerateEvent_UPDATE(TIMx);
}
/**
* Reset all timer registers
*
* @param unit
*/
static void UFCAP_StopMeasurement(Unit *unit)
{
struct priv * const priv = unit->data;
LL_TIM_DeInit(priv->TIMx); // clear all flags and settings
LL_TIM_DeInit(priv->TIMy); // clear all flags and settings
}
/**
* Switch the FCAP module opmode
*
* @param unit
* @param opmode
*/
void UFCAP_SwitchMode(Unit *unit, enum fcap_opmode opmode)
{
struct priv * const priv = unit->data;
if (opmode == priv->opmode) return;
priv->opmode = opmode;
switch (opmode) {
case OPMODE_IDLE:
// XXX maybe we should report the abort to the PC-side listener
UFCAP_StopMeasurement(unit);
break;
case OPMODE_INDIRECT_CONT:
priv->ind_cont.last_ontime = 0;
priv->ind_cont.last_period = 0;
priv->ind_cont.ontime = 0;
priv->n_skip = 1; // discard the first cycle (will be incomplete)
UFCAP_ConfigureForIndirectCapture(unit); // is also stopped and restarted
break;
case OPMODE_INDIRECT_BURST:
priv->ind_burst.ontime = 0;
priv->ind_burst.n_count = 0;
priv->ind_burst.period_acu = 0;
priv->ind_burst.ontime_acu = 0;
priv->n_skip = 1; // discard the first cycle (will be incomplete)
UFCAP_ConfigureForIndirectCapture(unit); // is also stopped and restarted
break;
case OPMODE_SINGLE_PULSE:
priv->n_skip = 0;
UFCAP_ConfigureForIndirectCapture(unit); // is also stopped and restarted
break;
case OPMODE_DIRECT_CONT:
// msec is set by caller
priv->dir_cont.last_count = 0;
priv->n_skip = 1; // discard the first cycle (will be incomplete)
UFCAP_ConfigureForDirectCapture(unit, priv->direct_msec);
break;
case OPMODE_DIRECT_BURST:
// msec is set by caller
priv->n_skip = 0; // no skip here (if there was any)
UFCAP_ConfigureForDirectCapture(unit, (uint16_t) priv->dir_burst.msec);
break;
case OPMODE_FREE_COUNTER:
UFCAP_ConfigureForFreeCapture(unit);
break;
default:
trap("Unhandled opmode %d", (int)opmode);
}
}
/**
* Configure peripherals for an indirect capture (PWM measurement) - continuous or burst
* @param unit
*/
static void UFCAP_ConfigureForIndirectCapture(Unit *unit)
{
struct priv * const priv = unit->data;
TIM_TypeDef * const TIMx = priv->TIMx;
const uint32_t ll_ch_a = priv->ll_ch_a;
const uint32_t ll_ch_b = priv->ll_ch_b;
UFCAP_ClearTimerConfig(unit);
// Enable channels and select mapping to TIx signals
// A - will be used to measure period
// B - will be used to measure the duty cycle
// _________ ______
// _______| |________________|
// A B A
// irq irq,cap irq
// reset
// B irq may be used if we want to measure a pulse width
// Normally TI1 = CH1, TI2 = CH2.
// It's possible to select the other channel, which we use to connect both TIx to the shame CHx.
LL_TIM_IC_SetActiveInput(TIMx, ll_ch_a, priv->a_direct ? LL_TIM_ACTIVEINPUT_DIRECTTI : LL_TIM_ACTIVEINPUT_INDIRECTTI);
LL_TIM_IC_SetActiveInput(TIMx, ll_ch_b, priv->a_direct ? LL_TIM_ACTIVEINPUT_INDIRECTTI : LL_TIM_ACTIVEINPUT_DIRECTTI);
LL_TIM_IC_SetPolarity(TIMx, ll_ch_a, priv->active_level ? LL_TIM_IC_POLARITY_RISING : LL_TIM_IC_POLARITY_FALLING);
LL_TIM_IC_SetPolarity(TIMx, ll_ch_b, priv->active_level ? LL_TIM_IC_POLARITY_FALLING : LL_TIM_IC_POLARITY_RISING);
if (priv->dfilter > 15) priv->dfilter = 15;
uint32_t filter = LL_TIM_IC_FILTERS[priv->dfilter];
LL_TIM_IC_SetFilter(TIMx, ll_ch_a, filter);
LL_TIM_IC_SetFilter(TIMx, ll_ch_b, filter);
LL_TIM_CC_EnableChannel(TIMx, ll_ch_a | ll_ch_b);
LL_TIM_SetSlaveMode(TIMx, LL_TIM_SLAVEMODE_RESET);
LL_TIM_SetTriggerInput(TIMx, LL_TIM_TS_TI1FP1); // Use Filtered Input 1 (TI1)
LL_TIM_EnableMasterSlaveMode(TIMx);
LL_TIM_ClearFlag_CC1(TIMx);
LL_TIM_ClearFlag_CC1OVR(TIMx);
LL_TIM_ClearFlag_CC2(TIMx);
LL_TIM_ClearFlag_CC2OVR(TIMx);
LL_TIM_EnableIT_CC1(TIMx);
LL_TIM_EnableIT_CC2(TIMx);
LL_TIM_EnableCounter(TIMx);
}
/**
* Configure peripherals for an indirect capture (PWM measurement) - continuous or burst
* @param unit
*/
static void UFCAP_ConfigureForDirectCapture(Unit *unit, uint16_t msec)
{
struct priv * const priv = unit->data;
// dbg("Configuring Direct capture...");
UFCAP_ClearTimerConfig(unit);
{
TIM_TypeDef *const TIMy = priv->TIMy;
assert_param(PLAT_AHB_MHZ<=65);
uint16_t presc = PLAT_AHB_MHZ*1000;
uint32_t count = msec+1; // it's one tick longer because we generate OCREF on the exact msec count - it must be at least 1 tick long
LL_TIM_SetPrescaler(TIMy, (uint32_t) (presc - 1));
LL_TIM_SetAutoReload(TIMy, count - 1);
LL_TIM_EnableARRPreload(TIMy);
LL_TIM_GenerateEvent_UPDATE(TIMy);
LL_TIM_SetOnePulseMode(TIMy, LL_TIM_ONEPULSEMODE_SINGLE);
LL_TIM_OC_EnableFast(TIMy, LL_TIM_CHANNEL_CH1);
// dbg("TIMy presc %d, count %d", (int) presc, (int) count);
LL_TIM_SetTriggerOutput(TIMy, LL_TIM_TRGO_OC1REF);
LL_TIM_OC_SetMode(TIMy, LL_TIM_CHANNEL_CH1, LL_TIM_OCMODE_PWM1); // 1 until CC, then 0
LL_TIM_OC_SetCompareCH1(TIMy, count-1);
LL_TIM_CC_EnableChannel(TIMy, LL_TIM_CHANNEL_CH1); // enable the output channel that produces a trigger
LL_TIM_ClearFlag_UPDATE(TIMy);
LL_TIM_EnableIT_UPDATE(TIMy);
}
{
// TIMx - the slave
TIM_TypeDef *const TIMx = priv->TIMx;
LL_TIM_SetSlaveMode(TIMx, LL_TIM_SLAVEMODE_GATED);
LL_TIM_SetTriggerInput(TIMx, LL_TIM_TS_ITR3); // ITR3 is TIM14 which we use as TIMy
LL_TIM_EnableMasterSlaveMode(TIMx);
uint32_t presc = LL_TIM_ETR_PRESCALER_DIV1;
switch (priv->direct_presc) {
case 1: presc = LL_TIM_ETR_PRESCALER_DIV1; break;
case 2: presc = LL_TIM_ETR_PRESCALER_DIV2; break;
case 4: presc = LL_TIM_ETR_PRESCALER_DIV4; break;
case 8: presc = LL_TIM_ETR_PRESCALER_DIV8; break;
default:
priv->direct_presc = 1; // will be sent with the response
}
if (priv->dfilter > 15) priv->dfilter = 15;
uint32_t filter = LL_TIM_ETR_FILTERS[priv->dfilter];
LL_TIM_ConfigETR(TIMx,
priv->active_level ? LL_TIM_ETR_POLARITY_NONINVERTED : LL_TIM_ETR_POLARITY_INVERTED,
presc,
filter);
LL_TIM_EnableExternalClock(TIMx); // TODO must check and deny this mode if the pin is not on CH1 = external trigger input
LL_TIM_SetCounter(TIMx, 0);
LL_TIM_EnableCounter(TIMx);
}
LL_TIM_EnableCounter(priv->TIMy); // XXX this will start the first pulse (maybe)
}
/**
* Freerunning capture (counting pulses - geiger)
* @param unit
*/
static void UFCAP_ConfigureForFreeCapture(Unit *unit)
{
struct priv * const priv = unit->data;
UFCAP_ClearTimerConfig(unit);
TIM_TypeDef *const TIMx = priv->TIMx;
LL_TIM_EnableExternalClock(TIMx);
LL_TIM_SetCounter(TIMx, 0);
LL_TIM_EnableCounter(TIMx);
}
+147
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@@ -0,0 +1,147 @@
//
// Created by MightyPork on 2018/02/03.
//
#include "platform.h"
#include "unit_base.h"
#define FCAP_INTERNAL
#include "_fcap_internal.h"
/** Allocate data structure and set defaults */
error_t UFCAP_preInit(Unit *unit)
{
struct priv *priv = unit->data = calloc_ck(1, sizeof(struct priv));
if (priv == NULL) return E_OUT_OF_MEM;
priv->conf.signal_pname = 'A';
priv->conf.signal_pnum = 0;
priv->conf.active_level = 1;
priv->conf.direct_presc = 1;
priv->conf.dfilter = 0;
priv->conf.direct_msec = 1000;
priv->conf.startmode = OPMODE_IDLE;
return E_SUCCESS;
}
/** Finalize unit set-up */
error_t UFCAP_init(Unit *unit)
{
bool suc = true;
struct priv *priv = unit->data;
// ---- Resolve what to configure ----
TIM_TypeDef * const TIMx = TIM2;
Resource timRsc = R_TIM2;
TIM_TypeDef * const TIMy = TIM14;
Resource tim2Rsc = R_TIM14;
uint32_t ll_ch_a = 0;
uint32_t ll_ch_b = 0;
switch (priv->conf.signal_pname) {
case 'A':
switch (priv->conf.signal_pnum) {
case 5:
case 15:
case 0: ll_ch_a = LL_TIM_CHANNEL_CH1; break;
case 1: ll_ch_a = LL_TIM_CHANNEL_CH2; break;
default:
dbg("Bad signal pin!");
return E_BAD_CONFIG;
}
break;
case 'B':
switch (priv->conf.signal_pnum) {
case 3: ll_ch_a = LL_TIM_CHANNEL_CH2; break;
default:
dbg("Bad signal pin!");
return E_BAD_CONFIG;
}
break;
default:
dbg("Bad signal pin port!");
return E_BAD_CONFIG;
}
const uint32_t ll_timpin_af = LL_GPIO_AF_2;
bool a_direct = true;
switch (ll_ch_a) {
case LL_TIM_CHANNEL_CH1:
ll_ch_b = LL_TIM_CHANNEL_CH2;
break;
case LL_TIM_CHANNEL_CH2:
ll_ch_b = LL_TIM_CHANNEL_CH1;
a_direct = false;
break;
}
// ---- CLAIM ----
TRY(rsc_claim_pin(unit, priv->conf.signal_pname, priv->conf.signal_pnum));
TRY(rsc_claim(unit, timRsc));
TRY(rsc_claim(unit, tim2Rsc));
// ---- INIT ----
assert_param(ll_ch_a != ll_ch_b);
priv->TIMx = TIMx;
priv->TIMy = TIMy;
priv->ll_ch_a = ll_ch_a;
priv->ll_ch_b = ll_ch_b;
priv->a_direct = a_direct;
// Load defaults
priv->active_level = priv->conf.active_level;
priv->direct_presc = priv->conf.direct_presc;
priv->dfilter = priv->conf.dfilter;
priv->direct_msec = priv->conf.direct_msec;
priv->opmode = priv->conf.startmode;
TRY(hw_configure_gpio_af(priv->conf.signal_pname, priv->conf.signal_pnum, ll_timpin_af));
GPIO_TypeDef *gpio = hw_port2periph(priv->conf.signal_pname, &suc);
uint32_t ll_pin = hw_pin2ll(priv->conf.signal_pnum, &suc);
LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_DOWN); // XXX change to pull-up if the polarity is inverted
hw_periph_clock_enable(TIMx);
hw_periph_clock_enable(TIMy);
irqd_attach(TIMx, UFCAP_TIMxHandler, unit);
irqd_attach(TIMy, UFCAP_TIMyHandler, unit);
UFCAP_SwitchMode(unit, priv->opmode); // switch to the default opmode
return E_SUCCESS;
}
/** Tear down the unit */
void UFCAP_deInit(Unit *unit)
{
struct priv *priv = unit->data;
// de-init peripherals
if (unit->status == E_SUCCESS ) {
UFCAP_SwitchMode(unit, OPMODE_IDLE);
TIM_TypeDef *TIMx = priv->TIMx;
TIM_TypeDef *TIMy = priv->TIMy;
LL_TIM_DeInit(TIMx);
LL_TIM_DeInit(TIMy);
irqd_detach(TIMx, UFCAP_TIMxHandler);
irqd_detach(TIMy, UFCAP_TIMyHandler);
hw_periph_clock_disable(TIMx);
hw_periph_clock_disable(TIMy);
}
// Release all resources, deinit pins
rsc_teardown(unit);
// Free memory
free_ck(unit->data);
}
+117
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//
// Created by MightyPork on 2018/02/03.
//
#ifndef GEX_F072_FCAP_INTERNAL_H
#define GEX_F072_FCAP_INTERNAL_H
#ifndef FCAP_INTERNAL
#error bad include!
#endif
#include "unit_base.h"
enum fcap_opmode {
OPMODE_IDLE = 0,
OPMODE_BUSY = 1, // used after capture is done, before it's reported
OPMODE_INDIRECT_CONT = 2,
OPMODE_INDIRECT_BURST = 3, // averaging
OPMODE_DIRECT_CONT = 4,
OPMODE_DIRECT_BURST = 5,
OPMODE_FREE_COUNTER = 6,
OPMODE_SINGLE_PULSE = 7,
};
/** Private data structure */
struct priv {
// settings
struct {
char signal_pname; // the input pin - one of TIM2 channels
uint8_t signal_pnum;
bool active_level;
uint8_t direct_presc;
uint8_t dfilter;
uint16_t direct_msec;
enum fcap_opmode startmode;
} conf;
// internal state
TIM_TypeDef *TIMx;
TIM_TypeDef *TIMy; // used as a timebase source for TIMx in direct mode
uint32_t ll_ch_b;
uint32_t ll_ch_a;
bool a_direct;
enum fcap_opmode opmode;
TF_ID request_id;
uint8_t n_skip; //!< Periods to skip before starting the real capture
bool active_level; // in PWM mode, the first part that is measured. (if 1, HHHLLL, else LLLHHH). In direct mode, clock polarity
uint8_t direct_presc;
uint16_t direct_msec;
uint8_t dfilter;
union {
struct {
uint32_t ontime; // length of the captured positive pulse in the current interval
uint32_t last_period; //!< length of the captured interval between two rising edges
uint32_t last_ontime; //!< length of the last captured ontime
} ind_cont;
struct {
uint32_t ontime; // length of the captured positive pulse in the current interval
uint64_t period_acu; //!< length of the captured interval between two rising edges, sum
uint64_t ontime_acu; //!< length of the last captured ontime, sum
uint16_t n_count; //!< Periods captured
uint16_t n_target; //!< Periods captured - requested count
} ind_burst;
struct {
uint32_t last_count; //!< Pulse count in the last capture window
} dir_cont;
struct {
uint16_t msec; // capture window length (used in the report callback) - different from the cont time, which is a semi-persistent config
} dir_burst;
};
};
/** Allocate data structure and set defaults */
error_t UFCAP_preInit(Unit *unit);
/** Load from a binary buffer stored in Flash */
void UFCAP_loadBinary(Unit *unit, PayloadParser *pp);
/** Write to a binary buffer for storing in Flash */
void UFCAP_writeBinary(Unit *unit, PayloadBuilder *pb);
// ------------------------------------------------------------------------
/** Parse a key-value pair from the INI file */
error_t UFCAP_loadIni(Unit *unit, const char *key, const char *value);
/** Generate INI file section for the unit */
void UFCAP_writeIni(Unit *unit, IniWriter *iw);
// ------------------------------------------------------------------------
/** Finalize unit set-up */
error_t UFCAP_init(Unit *unit);
/** Tear down the unit */
void UFCAP_deInit(Unit *unit);
// ------------------------------------------------------------------------
void UFCAP_SwitchMode(Unit *unit, enum fcap_opmode opmode);
void UFCAP_TIMxHandler(void *arg);
void UFCAP_TIMyHandler(void *arg);
uint32_t UFCAP_GetFreeCounterValue(Unit *unit);
uint32_t UFCAP_FreeCounterClear(Unit *unit);
#endif //GEX_F072_FCAP_INTERNAL_H
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//
// Created by MightyPork on 2018/02/03.
//
#include "platform.h"
#include "unit_base.h"
#define FCAP_INTERNAL
#include "_fcap_internal.h"
/** Load from a binary buffer stored in Flash */
void UFCAP_loadBinary(Unit *unit, PayloadParser *pp)
{
struct priv *priv = unit->data;
uint8_t version = pp_u8(pp);
(void)version;
priv->conf.signal_pname = pp_char(pp);
priv->conf.signal_pnum = pp_u8(pp);
if (version >= 1) {
priv->conf.active_level = pp_bool(pp);
priv->conf.dfilter = pp_u8(pp);
priv->conf.direct_presc = pp_u8(pp);
priv->conf.direct_msec = pp_u16(pp);
priv->conf.startmode = (enum fcap_opmode) pp_u8(pp);
}
}
/** Write to a binary buffer for storing in Flash */
void UFCAP_writeBinary(Unit *unit, PayloadBuilder *pb)
{
struct priv *priv = unit->data;
pb_u8(pb, 1); // version
pb_char(pb, priv->conf.signal_pname);
pb_u8(pb, priv->conf.signal_pnum);
// V1
pb_bool(pb, priv->conf.active_level);
pb_u8(pb, priv->conf.dfilter);
pb_u8(pb, priv->conf.direct_presc);
pb_u16(pb, priv->conf.direct_msec);
pb_u8(pb, priv->conf.startmode);
}
// ------------------------------------------------------------------------
/** Parse a key-value pair from the INI file */
error_t UFCAP_loadIni(Unit *unit, const char *key, const char *value)
{
bool suc = true;
struct priv *priv = unit->data;
if (streq(key, "pin")) {
suc = parse_pin(value, &priv->conf.signal_pname, &priv->conf.signal_pnum);
}
else if (streq(key, "active-level")) {
priv->conf.active_level = (bool) avr_atoi(value);
}
else if (streq(key, "input-filter")) {
priv->conf.dfilter = (uint8_t) avr_atoi(value);
}
else if (streq(key, "direct-presc")) {
priv->conf.direct_presc = (uint8_t) avr_atoi(value);
}
else if (streq(key, "direct-time")) {
priv->conf.direct_msec = (uint16_t) avr_atoi(value);
}
else if (streq(key, "initial-mode")) {
priv->conf.startmode = (enum fcap_opmode) str_parse_4(value,
"N", OPMODE_IDLE,
"I", OPMODE_INDIRECT_CONT,
"D", OPMODE_DIRECT_CONT,
"F", OPMODE_FREE_COUNTER,
&suc);
}
else{
return E_BAD_KEY;
}
if (!suc) return E_BAD_VALUE;
return E_SUCCESS;
}
/** Generate INI file section for the unit */
void UFCAP_writeIni(Unit *unit, IniWriter *iw)
{
struct priv *priv = unit->data;
iw_comment(iw, "Signal input pin - one of:");
iw_comment(iw, " Full support: A0, A5, A15");
iw_comment(iw, " Indirect only: A1, B3");
iw_entry(iw, "pin", "%c%d", priv->conf.signal_pname, priv->conf.signal_pnum);
iw_cmt_newline(iw);
iw_comment(iw, "Active level or edge (0-low,falling; 1-high,rising)");
iw_entry(iw, "active-level", "%d", (int)priv->conf.active_level);
iw_comment(iw, "Input filtering (0-15)");
iw_entry(iw, "input-filter", "%d", (int)priv->conf.dfilter);
iw_comment(iw, "Pulse counter pre-divider (1,2,4,8)");
iw_entry(iw, "direct-presc", "%d", (int)priv->conf.direct_presc);
iw_comment(iw, "Pulse counting interval (ms)");
iw_entry(iw, "direct-time", "%d", (int)priv->conf.direct_msec);
iw_cmt_newline(iw);
iw_comment(iw, "Mode on startup: N-none, I-indirect, D-direct, F-free count");
iw_entry(iw, "initial-mode", "%s", str_4(priv->conf.startmode,
OPMODE_IDLE, "N",
OPMODE_INDIRECT_CONT, "I",
OPMODE_DIRECT_CONT, "D",
OPMODE_FREE_COUNTER, "F"));
}
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//
// Created by MightyPork on 2017/11/25.
//
#include "unit_base.h"
#include "unit_fcap.h"
#define FCAP_INTERNAL
#include "_fcap_internal.h"
// ------------------------------------------------------------------------
enum FcapCmd_ {
CMD_STOP = 0,
// Measuring a waveform
CMD_INDIRECT_CONT_START = 1, // keep measuring, read on demand
CMD_INDIRECT_BURST_START = 2, // wait and reply
// Counting pulses
CMD_DIRECT_CONT_START = 3, // keep measuring, read on demand
CMD_DIRECT_BURST_START = 4, // wait and reply
CMD_FREECOUNT_START = 5, // keep counting pulses until stopped, read on reply
CMD_MEASURE_SINGLE_PULSE = 6, // measure the first incoming pulse of the right polarity. NOTE: can glitch if the signal starts in the active level
CMD_FREECOUNT_CLEAR = 7, // clear the free counter, return last value
// Results readout for continuous modes
CMD_INDIRECT_CONT_READ = 10,
CMD_DIRECT_CONT_READ = 11,
CMD_FREECOUNT_READ = 12,
// configs
CMD_SET_POLARITY = 20,
CMD_SET_DIR_PRESC = 21,
CMD_SET_INPUT_FILTER = 22,
CMD_SET_DIR_MSEC = 23,
// go back to the configured settings
CMD_RESTORE_DEFAULTS = 30,
};
/** Handle a request message */
static error_t UFCAP_handleRequest(Unit *unit, TF_ID frame_id, uint8_t command, PayloadParser *pp)
{
uint8_t presc;
uint16_t msec;
struct priv *priv = unit->data;
PayloadBuilder pb = pb_start(unit_tmp512, UNIT_TMP_LEN, NULL);
const char* msg_denied_on_pin = "Not available on the selected pin!";
switch (command) {
/**
* Stop any ongoing measurement and return to base state.
*/
case CMD_STOP:
UFCAP_SwitchMode(unit, OPMODE_IDLE);
return E_SUCCESS;
// ----------------------- CONFIG --------------------------
/**
* Set the active polarity, or triggering edge (for direct)
*
* pld: pol:u8 (0,1)
*/
case CMD_SET_POLARITY:
{
priv->active_level = pp_bool(pp);
}
return E_SUCCESS;
/**
* Set the direct measurement prescaller 1,2,4,8
*
* pld: presc:u8
*/
case CMD_SET_DIR_PRESC:
{
presc = pp_u8(pp);
if (presc != 1 && presc != 2 && presc != 4 && presc != 8) return E_BAD_VALUE;
priv->direct_presc = presc;
}
return E_SUCCESS;
/**
* Set the input filter for all modes
*
* pld: filter:u8 (0-15)
*/
case CMD_SET_INPUT_FILTER:
{
uint8_t input_filter = pp_u8(pp);
if (input_filter >= 16) return E_BAD_VALUE;
priv->dfilter = input_filter;
}
return E_SUCCESS;
/**
* Set the direct sampling time.
*
* pld: msec:u16
*/
case CMD_SET_DIR_MSEC:
{
msec = pp_u16(pp);
priv->direct_msec = msec;
}
return E_SUCCESS;
/**
* Reset all SET* settings to their default values, stop any ongoing measure.
*/
case CMD_RESTORE_DEFAULTS:
UFCAP_SwitchMode(unit, OPMODE_IDLE);
priv->active_level = priv->conf.active_level;
priv->direct_presc = priv->conf.direct_presc;
priv->direct_msec = priv->conf.direct_msec;
priv->dfilter = priv->conf.dfilter;
return E_SUCCESS;
// ------------------ COMMANDS ------------------------
/**
* Start indirect continuous measurement.
*/
case CMD_INDIRECT_CONT_START:
if (priv->opmode == OPMODE_INDIRECT_CONT) return E_SUCCESS; // no-op
if (priv->opmode != OPMODE_IDLE) return E_BUSY;
UFCAP_SwitchMode(unit, OPMODE_INDIRECT_CONT);
return E_SUCCESS;
/**
* Start a continuous direct measurement (counting pulses in fixed time intervals)
*
* - meas_time_ms 0 = no change
* - prescaller 0 = no change
*
* pld: meas_time_ms:u16, prescaller:u8
* - prescaller is 1,2,4,8; 0 = no change
*/
case CMD_DIRECT_CONT_START:
if (!priv->a_direct) {
// This works only if we use the ETR pin. TIM2 shares CH1 with ETR.
// If CH2 is selected as input, ETR is not available.
com_respond_str(MSG_ERROR, frame_id, msg_denied_on_pin);
return E_FAILURE;
}
if (priv->opmode == OPMODE_DIRECT_CONT) return E_SUCCESS; // no-op
if (priv->opmode != OPMODE_IDLE) return E_BUSY;
msec = pp_u16(pp);
presc = pp_u8(pp);
if (msec != 0) priv->direct_msec = msec;
if (presc != 0) priv->direct_presc = presc;
UFCAP_SwitchMode(unit, OPMODE_DIRECT_CONT);
return E_SUCCESS;
/**
* Start a burst of direct measurements with averaging.
* The measurement is performed on N consecutive pulses.
*
* pld: count:u16
*
* resp: core_mhz:u16, count:u16, period_sum:u64, ontime_sum:u64
*/
case CMD_INDIRECT_BURST_START:
if (priv->opmode != OPMODE_IDLE) return E_BAD_MODE;
priv->ind_burst.n_target = pp_u16(pp);
priv->request_id = frame_id;
UFCAP_SwitchMode(unit, OPMODE_INDIRECT_BURST);
return E_SUCCESS;
/**
* Start a single direct measurement of the given length (pulses in time period)
* If 'prescaller' is not 0, it is changed via the param field.
*
* pld: meas_time_ms:u16, prescaller:u8
* - prescaller is 1,2,4,8; 0 = no change
*
* resp: prescaller:u8, meas_time_ms:u16, pulse_count:u32
*/
case CMD_DIRECT_BURST_START:
if (priv->opmode != OPMODE_IDLE) return E_BAD_MODE;
priv->dir_burst.msec = pp_u16(pp);
presc = pp_u8(pp);
if (presc != 0) priv->direct_presc = presc;
priv->request_id = frame_id;
UFCAP_SwitchMode(unit, OPMODE_DIRECT_BURST);
return E_SUCCESS;
/**
* Measure a single pulse length of the given polarity.
* Measures time from a rising to a falling edge (or falling to rising, if polarity is 0)
*
* resp: core_mhz:u16, ontime:u32
*/
case CMD_MEASURE_SINGLE_PULSE:
if (priv->opmode != OPMODE_IDLE) return E_BAD_MODE;
priv->request_id = frame_id;
UFCAP_SwitchMode(unit, OPMODE_SINGLE_PULSE);
return E_SUCCESS;
/**
* Start a free-running pulse counter.
*
* pld: prescaller:u8
* - prescaller is 1,2,4,8; 0 = no change
*/
case CMD_FREECOUNT_START:
if (priv->opmode != OPMODE_IDLE) return E_BAD_MODE;
presc = pp_u8(pp);
if (presc != 0) priv->direct_presc = presc;
UFCAP_SwitchMode(unit, OPMODE_FREE_COUNTER);
return E_SUCCESS;
/**
* Reset the free-running pulse counter.
*
* resp: last_val:u32
*/
case CMD_FREECOUNT_CLEAR:
if (priv->opmode != OPMODE_FREE_COUNTER) {
return E_BAD_MODE;
}
pb_u32(&pb, UFCAP_FreeCounterClear(unit));
com_respond_pb(frame_id, MSG_SUCCESS, &pb);
return E_SUCCESS;
// ------------------ READING ---------------------
/**
* Read the most recent pulse measurement during continuous indirect measure.
*
* resp: core_mhz:u16, period:u32, ontime:u32
*/
case CMD_INDIRECT_CONT_READ:
if (priv->opmode != OPMODE_INDIRECT_CONT) {
return E_BAD_MODE;
}
if (priv->ind_cont.last_period == 0) {
return E_BUSY;
}
pb_u16(&pb, PLAT_AHB_MHZ);
pb_u32(&pb, priv->ind_cont.last_period);
pb_u32(&pb, priv->ind_cont.last_ontime);
com_respond_pb(frame_id, MSG_SUCCESS, &pb);
return E_SUCCESS;
/**
* Read the most recent result of a continuous direct measurement.
*
* resp: prescaller:u8, meas_time_ms:u16, pulse_count:u32
*/
case CMD_DIRECT_CONT_READ:
if (!priv->a_direct) { // see above
com_respond_str(MSG_ERROR, frame_id, msg_denied_on_pin);
return E_FAILURE;
}
if (priv->opmode != OPMODE_DIRECT_CONT) return E_BAD_MODE;
if (priv->dir_cont.last_count == 0) return E_BUSY;
pb_u8(&pb, priv->direct_presc);
pb_u16(&pb, priv->direct_msec);
pb_u32(&pb, priv->dir_cont.last_count);
com_respond_pb(frame_id, MSG_SUCCESS, &pb);
return E_SUCCESS;
/**
* Read the current value of the free-running pulse counter.
*
* The timing may have a significant jitter, this function is practically useful only for
* slow pulse sources (like a geiger counter, item counting etc)
*
* resp: count:u32
*/
case CMD_FREECOUNT_READ:
if (priv->opmode != OPMODE_FREE_COUNTER) {
return E_BAD_MODE;
}
pb_u32(&pb, UFCAP_GetFreeCounterValue(unit));
com_respond_pb(frame_id, MSG_SUCCESS, &pb);
return E_SUCCESS;
default:
return E_UNKNOWN_COMMAND;
}
}
// ------------------------------------------------------------------------
/** Frequency capture */
const UnitDriver UNIT_FCAP = {
.name = "FCAP",
.description = "Frequency and pulse measurement",
// Settings
.preInit = UFCAP_preInit,
.cfgLoadBinary = UFCAP_loadBinary,
.cfgWriteBinary = UFCAP_writeBinary,
.cfgLoadIni = UFCAP_loadIni,
.cfgWriteIni = UFCAP_writeIni,
// Init
.init = UFCAP_init,
.deInit = UFCAP_deInit,
// Function
.handleRequest = UFCAP_handleRequest,
};
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//
// Created by MightyPork on 2017/11/25.
//
// Digital input unit; single or multiple pin read access on one port (A-F)
//
#ifndef U_FCAP_H
#define U_FCAP_H
#include "unit.h"
extern const UnitDriver UNIT_FCAP;
// UU_ prototypes
#endif //U_FCAP_H
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//
// Created by MightyPork on 2018/02/03.
//
#include "platform.h"
#include "unit_base.h"
#include "unit_sipo.h"
#define SIPO_INTERNAL
#include "_sipo_internal.h"
static void send_pulse(bool pol, GPIO_TypeDef *port, uint32_t ll)
{
if (pol) {
LL_GPIO_SetOutputPin(port, ll);
}
else {
LL_GPIO_ResetOutputPin(port, ll);
}
__asm_loop(2);
if (pol) {
LL_GPIO_ResetOutputPin(port, ll);
}
else {
LL_GPIO_SetOutputPin(port, ll);
}
}
#pragma GCC push_options
#pragma GCC optimize ("O2")
error_t UU_SIPO_Write(Unit *unit, const uint8_t *buffer, uint16_t buflen, uint16_t terminal_data)
{
CHECK_TYPE(unit, &UNIT_SIPO);
struct priv *priv = unit->data;
if (buflen % priv->data_width != 0) {
dbg("Buflen %d vs width %d", (int)buflen, (int)priv->data_width);
return E_BAD_COUNT; // must be a multiple of the channel count
}
// buffer contains data for the individual data pins, back to back as AAA BBB CCC (whole bytes)
const uint8_t data_width = priv->data_width;
const uint16_t bytelen = buflen / data_width;
const uint16_t mask = priv->data_pins;
uint8_t offsets[16];
for (int i=0; i<16; i++) offsets[i] = (uint8_t) (bytelen * i);
for (int32_t bn = bytelen - 1; bn >= 0; bn--) {
// send the byte
for (int32_t i = 0; i < 8; i++) {
uint16_t packed = 0;
for (int32_t j = data_width - 1; j >= 0; j--) {
packed |= (buffer[bn + offsets[j]] >> i) & 1;
if (j > 0) packed <<= 1;
}
uint16_t spread = pinmask_spread(packed, mask);
priv->data_port->BSRR = spread | (((~spread) & mask) << 16);
// Shift clock pulse
send_pulse(priv->shift_pol, priv->shift_port, priv->shift_ll);
}
}
// load the final data - this may be used by some other circuitry or
// simply to rest the lines at a defined known level
uint16_t spread = pinmask_spread(terminal_data, mask);
priv->data_port->BSRR = spread | (((~spread) & mask) << 16);
send_pulse(priv->store_pol, priv->store_port, priv->store_ll);
return E_SUCCESS;
}
#pragma GCC pop_options
error_t UU_SIPO_DirectData(Unit *unit, uint16_t data_packed)
{
CHECK_TYPE(unit, &UNIT_SIPO);
struct priv *priv = unit->data;
uint16_t spread = pinmask_spread(data_packed, priv->data_pins);
priv->data_port->BSRR = spread | (((~spread) & priv->data_pins) << 16);
return E_SUCCESS;
}
error_t UU_SIPO_DirectClear(Unit *unit)
{
CHECK_TYPE(unit, &UNIT_SIPO);
struct priv *priv = unit->data;
send_pulse(priv->clear_pol, priv->clear_port, priv->clear_ll);
return E_SUCCESS;
}
error_t UU_SIPO_DirectShift(Unit *unit)
{
CHECK_TYPE(unit, &UNIT_SIPO);
struct priv *priv = unit->data;
send_pulse(priv->shift_pol, priv->shift_port, priv->shift_ll);
return E_SUCCESS;
}
error_t UU_SIPO_DirectStore(Unit *unit)
{
CHECK_TYPE(unit, &UNIT_SIPO);
struct priv *priv = unit->data;
send_pulse(priv->store_pol, priv->store_port, priv->store_ll);
return E_SUCCESS;
}
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//
// Created by MightyPork on 2018/02/03.
//
#include "platform.h"
#include "unit_base.h"
#define SIPO_INTERNAL
#include "_sipo_internal.h"
/** Allocate data structure and set defaults */
error_t USIPO_preInit(Unit *unit)
{
struct priv *priv = unit->data = calloc_ck(1, sizeof(struct priv));
if (priv == NULL) return E_OUT_OF_MEM;
priv->store_pname = 'A';
priv->store_pnum = 0;
priv->store_pol = true;
priv->shift_pname = 'A';
priv->shift_pnum = 1;
priv->shift_pol = true;
priv->clear_pname = 'A';
priv->clear_pnum = 2;
priv->clear_pol = false;
priv->data_pname = 'A';
priv->data_pins = (1<<3);
return E_SUCCESS;
}
/** Finalize unit set-up */
error_t USIPO_init(Unit *unit)
{
bool suc = true;
struct priv *priv = unit->data;
// --- Parse config ---
priv->store_ll = hw_pin2ll(priv->store_pnum, &suc);
priv->store_port = hw_port2periph(priv->store_pname, &suc);
Resource store_rsc = hw_pin2resource(priv->store_pname, priv->store_pnum, &suc);
if (!suc) return E_BAD_CONFIG;
TRY(rsc_claim(unit, store_rsc));
priv->shift_ll = hw_pin2ll(priv->shift_pnum, &suc);
priv->shift_port = hw_port2periph(priv->shift_pname, &suc);
Resource shift_rsc = hw_pin2resource(priv->shift_pname, priv->shift_pnum, &suc);
if (!suc) return E_BAD_CONFIG;
TRY(rsc_claim(unit, shift_rsc));
priv->clear_ll = hw_pin2ll(priv->clear_pnum, &suc);
priv->clear_port = hw_port2periph(priv->clear_pname, &suc);
Resource clear_rsc = hw_pin2resource(priv->clear_pname, priv->clear_pnum, &suc);
if (!suc) return E_BAD_CONFIG;
TRY(rsc_claim(unit, clear_rsc));
// Claim all needed pins
TRY(rsc_claim_gpios(unit, priv->data_pname, priv->data_pins));
priv->data_port = hw_port2periph(priv->data_pname, &suc);
// --- Init hardware ---
priv->data_width = 0;
for (int i = 0; i < 16; i++) {
if (priv->data_pins & (1 << i)) {
uint32_t ll_pin = hw_pin2ll((uint8_t) i, &suc);
LL_GPIO_SetPinMode(priv->data_port, ll_pin, LL_GPIO_MODE_OUTPUT);
LL_GPIO_SetPinOutputType(priv->data_port, ll_pin, LL_GPIO_OUTPUT_PUSHPULL);
LL_GPIO_SetPinSpeed(priv->data_port, ll_pin, LL_GPIO_SPEED_FREQ_HIGH);
priv->data_width++;
}
}
// Set the initial state - zeros
priv->data_port->ODR &= ~priv->data_pins;
// STORE
LL_GPIO_SetPinMode(priv->store_port, priv->store_ll, LL_GPIO_MODE_OUTPUT);
LL_GPIO_SetPinOutputType(priv->store_port, priv->store_ll, LL_GPIO_OUTPUT_PUSHPULL);
LL_GPIO_SetPinSpeed(priv->store_port, priv->store_ll, LL_GPIO_SPEED_FREQ_HIGH);
if (priv->store_pol)
LL_GPIO_ResetOutputPin(priv->store_port, priv->store_ll);
else
LL_GPIO_SetOutputPin(priv->store_port, priv->store_ll);
// SHIFT
LL_GPIO_SetPinMode(priv->shift_port, priv->shift_ll, LL_GPIO_MODE_OUTPUT);
LL_GPIO_SetPinOutputType(priv->shift_port, priv->shift_ll, LL_GPIO_OUTPUT_PUSHPULL);
LL_GPIO_SetPinSpeed(priv->shift_port, priv->shift_ll, LL_GPIO_SPEED_FREQ_HIGH);
if (priv->shift_pol)
LL_GPIO_ResetOutputPin(priv->shift_port, priv->shift_ll);
else
LL_GPIO_SetOutputPin(priv->shift_port, priv->shift_ll);
// CLEAR
LL_GPIO_SetPinMode(priv->clear_port, priv->clear_ll, LL_GPIO_MODE_OUTPUT);
LL_GPIO_SetPinOutputType(priv->clear_port, priv->clear_ll, LL_GPIO_OUTPUT_PUSHPULL);
LL_GPIO_SetPinSpeed(priv->clear_port, priv->clear_ll, LL_GPIO_SPEED_FREQ_HIGH);
if (priv->clear_pol)
LL_GPIO_ResetOutputPin(priv->clear_port, priv->clear_ll);
else
LL_GPIO_SetOutputPin(priv->clear_port, priv->clear_ll);
// initial clear
UU_SIPO_DirectClear(unit);
return E_SUCCESS;
}
/** Tear down the unit */
void USIPO_deInit(Unit *unit)
{
// Release all resources, deinit pins
rsc_teardown(unit);
// Free memory
free_ck(unit->data);
}
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//
// Created by MightyPork on 2018/02/03.
//
#ifndef GEX_F072_SIPO_INTERNAL_H
#define GEX_F072_SIPO_INTERNAL_H
#ifndef SIPO_INTERNAL
#error bad include!
#endif
#include "unit_base.h"
/** Private data structure */
struct priv {
// settings
char store_pname;
uint8_t store_pnum;
bool store_pol; //!< Store pulse active edge
char shift_pname;
uint8_t shift_pnum;
bool shift_pol; //!< Shift clock active edge
char clear_pname;
uint8_t clear_pnum;
bool clear_pol; //!< Clear signal active level
char data_pname;
uint16_t data_pins;
// live fields
uint32_t store_ll;
uint32_t shift_ll;
uint32_t clear_ll;
GPIO_TypeDef *store_port;
GPIO_TypeDef *shift_port;
GPIO_TypeDef *clear_port;
GPIO_TypeDef *data_port;
uint8_t data_width;
};
/** Allocate data structure and set defaults */
error_t USIPO_preInit(Unit *unit);
/** Load from a binary buffer stored in Flash */
void USIPO_loadBinary(Unit *unit, PayloadParser *pp);
/** Write to a binary buffer for storing in Flash */
void USIPO_writeBinary(Unit *unit, PayloadBuilder *pb);
// ------------------------------------------------------------------------
/** Parse a key-value pair from the INI file */
error_t USIPO_loadIni(Unit *unit, const char *key, const char *value);
/** Generate INI file section for the unit */
void USIPO_writeIni(Unit *unit, IniWriter *iw);
// ------------------------------------------------------------------------
/** Finalize unit set-up */
error_t USIPO_init(Unit *unit);
/** Tear down the unit */
void USIPO_deInit(Unit *unit);
// ------------------------------------------------------------------------
/**
* Write a buffer to the pins.
* Buffer contains data for the individual channels, sequentially (AAAAAA BBBBBB CCCCCC ...)
* The bytes are sent LSB first, from the last byte (e.g. 1,2,3 - 3 is sent first, LSB-first).
*
* The chunks order is from the lowest to the highest bit
*
* @param unit
* @param buffer - buffer of data to send
* @param buflen - number of bytes in the buffer
* @param terminal_data - data to set before sending the store pulse (final data lines state, will not appear in the SIPOs)
* @return success
*/
error_t UU_SIPO_Write(Unit *unit, const uint8_t *buffer, uint16_t buflen, uint16_t terminal_data);
/**
* Direct access to the output data pins (may be useful for debugging, or circuits that use them
* for something else when not loading a new value).
*
* @param unit
* @param data_packed - packed data to set on the output (right-aligned, highest to lowest pin)
* @return success
*/
error_t UU_SIPO_DirectData(Unit *unit, uint16_t data_packed);
/**
* Send a clear pulse.
*
* @param unit
* @return success
*/
error_t UU_SIPO_DirectClear(Unit *unit);
/**
* Send a shift pulse.
*
* @param unit
* @return success
*/
error_t UU_SIPO_DirectShift(Unit *unit);
/**
* Send a store pulse.
*
* @param unit
* @return success
*/
error_t UU_SIPO_DirectStore(Unit *unit);
#endif //GEX_F072_SIPO_INTERNAL_H
+122
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@@ -0,0 +1,122 @@
//
// Created by MightyPork on 2018/02/03.
//
#include "platform.h"
#include "unit_base.h"
#define SIPO_INTERNAL
#include "_sipo_internal.h"
/** Load from a binary buffer stored in Flash */
void USIPO_loadBinary(Unit *unit, PayloadParser *pp)
{
struct priv *priv = unit->data;
uint8_t version = pp_u8(pp);
(void)version;
priv->store_pname = pp_char(pp);
priv->store_pnum = pp_u8(pp);
priv->store_pol = pp_bool(pp);
priv->shift_pname = pp_char(pp);
priv->shift_pnum = pp_u8(pp);
priv->shift_pol = pp_bool(pp);
priv->clear_pname = pp_char(pp);
priv->clear_pnum = pp_u8(pp);
priv->clear_pol = pp_bool(pp);
priv->data_pname = pp_char(pp);
priv->data_pins = pp_u16(pp);
}
/** Write to a binary buffer for storing in Flash */
void USIPO_writeBinary(Unit *unit, PayloadBuilder *pb)
{
struct priv *priv = unit->data;
pb_u8(pb, 0); // version
pb_char(pb, priv->store_pname);
pb_u8(pb, priv->store_pnum);
pb_bool(pb, priv->store_pol);
pb_char(pb, priv->shift_pname);
pb_u8(pb, priv->shift_pnum);
pb_bool(pb, priv->shift_pol);
pb_char(pb, priv->clear_pname);
pb_u8(pb, priv->clear_pnum);
pb_bool(pb, priv->clear_pol);
pb_char(pb, priv->data_pname);
pb_u16(pb, priv->data_pins);
}
// ------------------------------------------------------------------------
/** Parse a key-value pair from the INI file */
error_t USIPO_loadIni(Unit *unit, const char *key, const char *value)
{
bool suc = true;
struct priv *priv = unit->data;
if (streq(key, "store-pin")) {
suc = parse_pin(value, &priv->store_pname, &priv->store_pnum);
}
else if (streq(key, "shift-pin")) {
suc = parse_pin(value, &priv->shift_pname, &priv->shift_pnum);
}
else if (streq(key, "clear-pin")) {
suc = parse_pin(value, &priv->clear_pname, &priv->clear_pnum);
}
else if (streq(key, "store-pol")) {
priv->store_pol = (bool) avr_atoi(value);
}
else if (streq(key, "shift-pol")) {
priv->shift_pol = (bool) avr_atoi(value);
}
else if (streq(key, "clear-pol")) {
priv->clear_pol = (bool) avr_atoi(value);
}
else if (streq(key, "data-port")) {
suc = parse_port_name(value, &priv->data_pname);
}
else if (streq(key, "data-pins")) {
priv->data_pins = (uint16_t) parse_pinmask(value, &suc);
}
else {
return E_BAD_KEY;
}
if (!suc) return E_BAD_VALUE;
return E_SUCCESS;
}
/** Generate INI file section for the unit */
void USIPO_writeIni(Unit *unit, IniWriter *iw)
{
struct priv *priv = unit->data;
iw_comment(iw, "Shift pin & its active edge (1-rising,0-falling)");
iw_entry(iw, "shift-pin", "%c%d", priv->shift_pname, priv->shift_pnum);
iw_entry(iw, "shift-pol", "%d", priv->shift_pol);
iw_comment(iw, "Store pin & its active edge");
iw_entry(iw, "store-pin", "%c%d", priv->store_pname, priv->store_pnum);
iw_entry(iw, "store-pol", "%d", priv->store_pol);
iw_comment(iw, "Clear pin & its active level");
iw_entry(iw, "clear-pin", "%c%d", priv->clear_pname, priv->clear_pnum);
iw_entry(iw, "clear-pol", "%d", priv->clear_pol);
iw_comment(iw, "Data port and pins");
iw_entry(iw, "data-port", "%c", priv->data_pname);
iw_entry(iw, "data-pins", "%s", pinmask2str_up(priv->data_pins, unit_tmp512));
}
+73
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@@ -0,0 +1,73 @@
//
// Created by MightyPork on 2017/11/25.
//
#include "unit_base.h"
#include "unit_sipo.h"
#define SIPO_INTERNAL
#include "_sipo_internal.h"
// ------------------------------------------------------------------------
enum SipoCmd_ {
CMD_WRITE = 0,
CMD_DIRECT_DATA = 1,
CMD_DIRECT_SHIFT = 2,
CMD_DIRECT_CLEAR = 3,
CMD_DIRECT_STORE = 4,
};
/** Handle a request message */
static error_t USIPO_handleRequest(Unit *unit, TF_ID frame_id, uint8_t command, PayloadParser *pp)
{
switch (command) {
case CMD_WRITE:
{
uint32_t len;
uint16_t terminal_packed = pp_u16(pp);
const uint8_t *tail = pp_tail(pp, &len);
TRY(UU_SIPO_Write(unit, (uint8_t *) tail, (uint16_t) len, terminal_packed));
}
return E_SUCCESS;
case CMD_DIRECT_DATA:
TRY(UU_SIPO_DirectData(unit, pp_u16(pp)));
return E_SUCCESS;
case CMD_DIRECT_CLEAR:
TRY(UU_SIPO_DirectClear(unit));
return E_SUCCESS;
case CMD_DIRECT_SHIFT:
TRY(UU_SIPO_DirectShift(unit));
return E_SUCCESS;
case CMD_DIRECT_STORE:
TRY(UU_SIPO_DirectStore(unit));
return E_SUCCESS;
default:
return E_UNKNOWN_COMMAND;
}
}
// ------------------------------------------------------------------------
/** Unit template */
const UnitDriver UNIT_SIPO = {
.name = "SIPO",
.description = "Shift register driver (595, 4094)",
// Settings
.preInit = USIPO_preInit,
.cfgLoadBinary = USIPO_loadBinary,
.cfgWriteBinary = USIPO_writeBinary,
.cfgLoadIni = USIPO_loadIni,
.cfgWriteIni = USIPO_writeIni,
// Init
.init = USIPO_init,
.deInit = USIPO_deInit,
// Function
.handleRequest = USIPO_handleRequest,
};
+16
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@@ -0,0 +1,16 @@
//
// Created by MightyPork on 2017/11/25.
//
// Digital input unit; single or multiple pin read access on one port (A-F)
//
#ifndef U_SIPO_H
#define U_SIPO_H
#include "unit.h"
extern const UnitDriver UNIT_SIPO;
// UU_ prototypes
#endif //U_SIPO_H
+1
View File
@@ -28,6 +28,7 @@
X(CHECKSUM_MISMATCH, NULL) /* bus checksum failed */ \ X(CHECKSUM_MISMATCH, NULL) /* bus checksum failed */ \
X(PROTOCOL_BREACH, NULL) /* eating with the wrong spoon */ \ X(PROTOCOL_BREACH, NULL) /* eating with the wrong spoon */ \
X(BUSY, NULL) /* Unit is busy */ \ X(BUSY, NULL) /* Unit is busy */ \
X(BAD_MODE, NULL) /* Command not permissible in current opmode */ \
\ \
/* VFS user errors (those are meant to be shown to user) */ \ /* VFS user errors (those are meant to be shown to user) */ \
X(VFS_ERROR_DURING_TRANSFER, "Error during transfer") \ X(VFS_ERROR_DURING_TRANSFER, "Error during transfer") \
+2 -1
View File
@@ -119,9 +119,10 @@ void iw_entry(IniWriter *iw, const char *key, const char *format, ...)
iw_newline(iw); // one newline after entry iw_newline(iw); // one newline after entry
} }
uint32_t iw_measure_total(void (*handler)(IniWriter *)) uint32_t iw_measure_total(void (*handler)(IniWriter *), uint32_t tag)
{ {
IniWriter iw = iw_init(NULL, 0xFFFFFFFF, 1); IniWriter iw = iw_init(NULL, 0xFFFFFFFF, 1);
iw.tag = tag;
iw_begin(); iw_begin();
handler(&iw); handler(&iw);
iw_end(); iw_end();
+3 -2
View File
@@ -18,6 +18,7 @@ typedef struct iniwriter_ {
char *ptr; char *ptr;
uint32_t skip; uint32_t skip;
uint32_t count; uint32_t count;
uint32_t tag; // general purpose field (used to identify for which purpose is the file being read)
} IniWriter; } IniWriter;
/** /**
@@ -43,7 +44,7 @@ void iw_end(void);
* @param count - number of bytes to write, truncate rest * @param count - number of bytes to write, truncate rest
* @return structure initializer * @return structure initializer
*/ */
#define iw_init(buffer, skip, count) (IniWriter){buffer, skip, count} #define iw_init(xbuffer, xskip, xcount) (IniWriter){.ptr=(xbuffer), .skip=(xskip), .count=(xcount)}
/** /**
* Try to write a buffer to the file * Try to write a buffer to the file
@@ -131,6 +132,6 @@ void iw_entry(IniWriter *iw, const char *key, const char *format, ...)
* @param handler - function that normally writes to the writer * @param handler - function that normally writes to the writer
* @return byte count * @return byte count
*/ */
uint32_t iw_measure_total(void (*handler)(IniWriter *)); uint32_t iw_measure_total(void (*handler)(IniWriter *), uint32_t tag);
#endif //INIWRITER_H #endif //INIWRITER_H
+12 -12
View File
@@ -74,41 +74,41 @@ const char *str_4(uint32_t n,
return a; return a;
} }
uint32_t str_parse_2(const char *tpl, uint32_t str_parse_2(const char *value,
const char *a, uint32_t na, const char *a, uint32_t na,
const char *b, uint32_t nb, const char *b, uint32_t nb,
bool *suc) bool *suc)
{ {
if (streq(tpl, a)) return na; if (streq(value, a)) return na;
if (streq(tpl, b)) return nb; if (streq(value, b)) return nb;
*suc = false; *suc = false;
return na; return na;
} }
uint32_t str_parse_3(const char *tpl, uint32_t str_parse_3(const char *value,
const char *a, uint32_t na, const char *a, uint32_t na,
const char *b, uint32_t nb, const char *b, uint32_t nb,
const char *c, uint32_t nc, const char *c, uint32_t nc,
bool *suc) bool *suc)
{ {
if (streq(tpl, a)) return na; if (streq(value, a)) return na;
if (streq(tpl, b)) return nb; if (streq(value, b)) return nb;
if (streq(tpl, c)) return nc; if (streq(value, c)) return nc;
*suc = false; *suc = false;
return na; return na;
} }
uint32_t str_parse_4(const char *tpl, uint32_t str_parse_4(const char *value,
const char *a, uint32_t na, const char *a, uint32_t na,
const char *b, uint32_t nb, const char *b, uint32_t nb,
const char *c, uint32_t nc, const char *c, uint32_t nc,
const char *d, uint32_t nd, const char *d, uint32_t nd,
bool *suc) bool *suc)
{ {
if (streq(tpl, a)) return na; if (streq(value, a)) return na;
if (streq(tpl, b)) return nb; if (streq(value, b)) return nb;
if (streq(tpl, c)) return nc; if (streq(value, c)) return nc;
if (streq(tpl, d)) return nd; if (streq(value, d)) return nd;
*suc = false; *suc = false;
return na; return na;
} }
+3 -3
View File
@@ -73,9 +73,9 @@ void vfs_user_build_filesystem(void)
// Setup the filesystem based on target parameters // Setup the filesystem based on target parameters
vfs_init(daplink_drive_name, 0/*unused "disk size"*/); vfs_init(daplink_drive_name, 0/*unused "disk size"*/);
vfs_create_file("UNITS INI", read_file_units_ini, NULL, iw_measure_total(settings_build_units_ini)); vfs_create_file("UNITS INI", read_file_units_ini, NULL, iw_measure_total(settings_build_units_ini, 0));
vfs_create_file("SYSTEM INI", read_file_system_ini, NULL, iw_measure_total(settings_build_system_ini)); vfs_create_file("SYSTEM INI", read_file_system_ini, NULL, iw_measure_total(settings_build_system_ini, 0));
vfs_create_file("PINOUT TXT", read_file_pinout_txt, NULL, iw_measure_total(settings_build_pinout_txt)); vfs_create_file("PINOUT TXT", read_file_pinout_txt, NULL, iw_measure_total(settings_build_pinout_txt, 0));
} }