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@ -9,8 +9,8 @@ |
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#include "_fcap_internal.h" |
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static void UFCAP_StopMeasurement(Unit *unit); |
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static void UFCAP_ConfigureForPWMCapture(Unit *unit); |
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static void UFCAP_ConfigureForDirectCapture(Unit *unit); |
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static void UFCAP_ConfigureForIndirectCapture(Unit *unit); |
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static void UFCAP_ConfigureForDirectCapture(Unit *unit, uint16_t msec); |
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static void UFCAP_ConfigureForFreeCapture(Unit *unit); |
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uint32_t UFCAP_GetFreeCounterValue(Unit *unit) |
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@ -20,7 +20,22 @@ uint32_t UFCAP_GetFreeCounterValue(Unit *unit) |
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return TIMx->CNT; |
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} |
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static void UFCAP_PWMBurstReportJob(Job *job) |
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uint32_t UFCAP_FreeCounterClear(Unit *unit) |
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{ |
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struct priv * const priv = unit->data; |
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TIM_TypeDef * const TIMx = priv->TIMx; |
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// this isn't perfect, we can miss one clock
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// but it's probably the best we can do here ...
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vPortEnterCritical(); |
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uint32_t val = TIMx->CNT; |
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TIMx->CNT = 0; |
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vPortExitCritical(); |
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return val; |
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} |
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static void UFCAP_IndirectBurstReportJob(Job *job) |
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{ |
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Unit *unit = job->unit; |
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struct priv * const priv = unit->data; |
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@ -29,9 +44,9 @@ static void UFCAP_PWMBurstReportJob(Job *job) |
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PayloadBuilder pb = pb_start(buf, 20, NULL); |
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pb_u16(&pb, PLAT_AHB_MHZ); |
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pb_u16(&pb, priv->pwm_burst.n_count); |
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pb_u64(&pb, priv->pwm_burst.period_acu); |
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pb_u64(&pb, priv->pwm_burst.ontime_acu); |
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pb_u16(&pb, priv->ind_burst.n_count); |
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pb_u64(&pb, priv->ind_burst.period_acu); |
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pb_u64(&pb, priv->ind_burst.ontime_acu); |
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assert_param(pb.ok); |
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@ -41,15 +56,38 @@ static void UFCAP_PWMBurstReportJob(Job *job) |
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priv->opmode = OPMODE_IDLE; |
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} |
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static void UFCAP_CountBurstReportJob(Job *job) |
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static void UFCAP_SinglePulseReportJob(Job *job) |
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{ |
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Unit *unit = job->unit; |
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struct priv * const priv = unit->data; |
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uint8_t buf[6]; |
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PayloadBuilder pb = pb_start(buf, 20, NULL); |
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PayloadBuilder pb = pb_start(buf, 6, NULL); |
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pb_u16(&pb, PLAT_AHB_MHZ); |
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pb_u32(&pb, job->data1); |
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assert_param(pb.ok); |
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com_respond_pb(priv->request_id, MSG_SUCCESS, &pb); |
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// timer is already stopped, now in OPMODE_BUSY
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priv->opmode = OPMODE_IDLE; |
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} |
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/**
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* Count is passed in data1 |
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* @param job |
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*/ |
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static void UFCAP_DirectBurstReportJob(Job *job) |
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{ |
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Unit *unit = job->unit; |
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struct priv * const priv = unit->data; |
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uint8_t buf[8]; |
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PayloadBuilder pb = pb_start(buf, 8, NULL); |
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pb_u16(&pb, priv->cnt_burst.msec); |
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pb_u8(&pb, priv->direct_presc); |
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pb_u16(&pb, priv->dir_burst.msec); |
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pb_u32(&pb, job->data1); |
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assert_param(pb.ok); |
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@ -69,40 +107,56 @@ void UFCAP_TIMxHandler(void *arg) |
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TIM_TypeDef * const TIMx = priv->TIMx; |
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if (priv->opmode == OPMODE_PWM_CONT) { |
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if (priv->opmode == OPMODE_INDIRECT_CONT) { |
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if (LL_TIM_IsActiveFlag_CC1(TIMx)) { |
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if (priv->n_skip > 0) { |
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priv->n_skip--; |
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} else { |
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priv->pwm_cont.last_period = LL_TIM_IC_GetCaptureCH1(TIMx); |
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priv->pwm_cont.last_ontime = priv->pwm_cont.ontime; |
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priv->ind_cont.last_period = LL_TIM_IC_GetCaptureCH1(TIMx); |
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priv->ind_cont.last_ontime = priv->ind_cont.ontime; |
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} |
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LL_TIM_ClearFlag_CC1(TIMx); |
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LL_TIM_ClearFlag_CC1OVR(TIMx); |
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} |
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if (LL_TIM_IsActiveFlag_CC2(TIMx)) { |
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priv->pwm_cont.ontime = LL_TIM_IC_GetCaptureCH2(TIMx); |
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priv->ind_cont.ontime = LL_TIM_IC_GetCaptureCH2(TIMx); |
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LL_TIM_ClearFlag_CC2(TIMx); |
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LL_TIM_ClearFlag_CC2OVR(TIMx); |
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} |
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} |
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else if (priv->opmode == OPMODE_PWM_BURST) { |
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else if (priv->opmode == OPMODE_SINGLE_PULSE) { |
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if (LL_TIM_IsActiveFlag_CC2(TIMx)) { |
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// single pulse - does not wait for the second edge
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uint32_t len = LL_TIM_IC_GetCaptureCH2(TIMx); |
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priv->opmode = OPMODE_BUSY; |
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UFCAP_StopMeasurement(unit); |
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Job j = { |
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.cb = UFCAP_SinglePulseReportJob, |
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.unit = unit, |
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.data1 = len, |
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}; |
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scheduleJob(&j); |
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} |
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} |
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else if (priv->opmode == OPMODE_INDIRECT_BURST) { |
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if (LL_TIM_IsActiveFlag_CC1(TIMx)) { |
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const uint32_t period = LL_TIM_IC_GetCaptureCH1(TIMx); |
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const uint32_t ontime = priv->pwm_burst.ontime; |
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const uint32_t ontime = priv->ind_burst.ontime; |
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if (priv->n_skip > 0) { |
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priv->n_skip--; |
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} else { |
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priv->pwm_burst.ontime_acu += ontime; |
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priv->pwm_burst.period_acu += period; |
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if (++priv->pwm_burst.n_count == priv->pwm_burst.n_target) { |
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priv->ind_burst.ontime_acu += ontime; |
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priv->ind_burst.period_acu += period; |
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if (++priv->ind_burst.n_count == priv->ind_burst.n_target) { |
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priv->opmode = OPMODE_BUSY; |
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UFCAP_StopMeasurement(unit); |
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Job j = { |
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.cb = UFCAP_PWMBurstReportJob, |
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.cb = UFCAP_IndirectBurstReportJob, |
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.unit = unit, |
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}; |
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scheduleJob(&j); |
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@ -114,7 +168,7 @@ void UFCAP_TIMxHandler(void *arg) |
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} |
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if (LL_TIM_IsActiveFlag_CC2(TIMx)) { |
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priv->pwm_burst.ontime = LL_TIM_IC_GetCaptureCH2(TIMx); |
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priv->ind_burst.ontime = LL_TIM_IC_GetCaptureCH2(TIMx); |
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LL_TIM_ClearFlag_CC2(TIMx); |
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LL_TIM_ClearFlag_CC2OVR(TIMx); |
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} |
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@ -139,18 +193,23 @@ void UFCAP_TIMyHandler(void *arg) |
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TIM_TypeDef * const TIMy = priv->TIMy; |
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uint32_t cnt = TIMx->CNT; // TIMx should be stopped now
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dbg("> TIMy Handler, TIMx cntr is %d", cnt); |
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priv->cnt_cont.last_count = cnt; |
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// dbg("> TIMy Handler, TIMx cntr is %d", cnt);
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priv->dir_cont.last_count = cnt; |
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if (priv->opmode == OPMODE_COUNTER_CONT) { |
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if (priv->opmode == OPMODE_DIRECT_CONT) { |
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LL_TIM_DisableCounter(TIMx); |
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LL_TIM_DisableCounter(TIMy); |
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LL_TIM_SetCounter(TIMx, 0); |
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LL_TIM_SetCounter(TIMy, 0); |
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LL_TIM_EnableCounter(TIMy); // next loop
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} else if (priv->opmode == OPMODE_COUNTER_BURST) { |
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LL_TIM_EnableCounter(TIMx); |
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} |
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else if (priv->opmode == OPMODE_DIRECT_BURST) { |
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priv->opmode = OPMODE_BUSY; |
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UFCAP_StopMeasurement(unit); |
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Job j = { |
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.cb = UFCAP_CountBurstReportJob, |
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.cb = UFCAP_DirectBurstReportJob, |
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.unit = unit, |
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.data1 = cnt, |
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}; |
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@ -215,35 +274,42 @@ void UFCAP_SwitchMode(Unit *unit, enum fcap_opmode opmode) |
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UFCAP_StopMeasurement(unit); |
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break; |
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case OPMODE_PWM_CONT: |
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priv->pwm_cont.last_ontime = 0; |
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priv->pwm_cont.last_period = 0; |
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priv->pwm_cont.ontime = 0; |
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case OPMODE_INDIRECT_CONT: |
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priv->ind_cont.last_ontime = 0; |
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priv->ind_cont.last_period = 0; |
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priv->ind_cont.ontime = 0; |
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priv->n_skip = 1; // discard the first cycle (will be incomplete)
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UFCAP_ConfigureForPWMCapture(unit); // is also stopped and restarted
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UFCAP_ConfigureForIndirectCapture(unit); // is also stopped and restarted
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break; |
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case OPMODE_PWM_BURST: |
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priv->pwm_burst.ontime = 0; |
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priv->pwm_burst.n_count = 0; |
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priv->pwm_burst.period_acu = 0; |
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priv->pwm_burst.ontime_acu = 0; |
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case OPMODE_INDIRECT_BURST: |
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priv->ind_burst.ontime = 0; |
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priv->ind_burst.n_count = 0; |
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priv->ind_burst.period_acu = 0; |
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priv->ind_burst.ontime_acu = 0; |
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priv->n_skip = 1; // discard the first cycle (will be incomplete)
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UFCAP_ConfigureForPWMCapture(unit); // is also stopped and restarted
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UFCAP_ConfigureForIndirectCapture(unit); // is also stopped and restarted
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break; |
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case OPMODE_SINGLE_PULSE: |
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priv->n_skip = 0; |
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UFCAP_ConfigureForIndirectCapture(unit); // is also stopped and restarted
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break; |
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case OPMODE_COUNTER_CONT: |
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priv->cnt_cont.last_count = 0; |
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case OPMODE_DIRECT_CONT: |
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// msec is set by caller
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priv->dir_cont.last_count = 0; |
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priv->n_skip = 1; // discard the first cycle (will be incomplete)
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UFCAP_ConfigureForDirectCapture(unit); |
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UFCAP_ConfigureForDirectCapture(unit, priv->direct_msec); |
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break; |
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case OPMODE_COUNTER_BURST: |
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case OPMODE_DIRECT_BURST: |
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// msec is set by caller
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priv->n_skip = 0; // no skip here (if there was any)
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UFCAP_ConfigureForDirectCapture(unit); |
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UFCAP_ConfigureForDirectCapture(unit, (uint16_t) priv->dir_burst.msec); |
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break; |
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case OPMODE_COUNTER_FREERUNNING: |
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case OPMODE_FREE_COUNTER: |
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UFCAP_ConfigureForFreeCapture(unit); |
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break; |
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@ -256,7 +322,7 @@ void UFCAP_SwitchMode(Unit *unit, enum fcap_opmode opmode) |
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* Configure peripherals for an indirect capture (PWM measurement) - continuous or burst |
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* @param unit |
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*/ |
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static void UFCAP_ConfigureForPWMCapture(Unit *unit) |
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static void UFCAP_ConfigureForIndirectCapture(Unit *unit) |
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{ |
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struct priv * const priv = unit->data; |
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TIM_TypeDef * const TIMx = priv->TIMx; |
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@ -282,14 +348,26 @@ static void UFCAP_ConfigureForPWMCapture(Unit *unit) |
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// It's possible to select the other channel, which we use to connect both TIx to the shame CHx.
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LL_TIM_IC_SetActiveInput(TIMx, ll_ch_a, priv->a_direct ? LL_TIM_ACTIVEINPUT_DIRECTTI : LL_TIM_ACTIVEINPUT_INDIRECTTI); |
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LL_TIM_IC_SetActiveInput(TIMx, ll_ch_b, priv->a_direct ? LL_TIM_ACTIVEINPUT_INDIRECTTI : LL_TIM_ACTIVEINPUT_DIRECTTI); |
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LL_TIM_IC_SetPolarity(TIMx, ll_ch_a, priv->active_level ? LL_TIM_IC_POLARITY_RISING : LL_TIM_IC_POLARITY_FALLING); |
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LL_TIM_IC_SetPolarity(TIMx, ll_ch_b, priv->active_level ? LL_TIM_IC_POLARITY_FALLING : LL_TIM_IC_POLARITY_RISING); |
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if (priv->dfilter > 15) priv->dfilter = 15; |
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uint32_t filter = LL_TIM_IC_FILTERS[priv->dfilter]; |
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LL_TIM_IC_SetFilter(TIMx, ll_ch_a, filter); |
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LL_TIM_IC_SetFilter(TIMx, ll_ch_b, filter); |
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LL_TIM_CC_EnableChannel(TIMx, ll_ch_a | ll_ch_b); |
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LL_TIM_IC_SetPolarity(TIMx, ll_ch_a, LL_TIM_IC_POLARITY_RISING); |
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LL_TIM_IC_SetPolarity(TIMx, ll_ch_b, LL_TIM_IC_POLARITY_FALLING); |
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LL_TIM_SetSlaveMode(TIMx, LL_TIM_SLAVEMODE_RESET); |
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LL_TIM_SetTriggerInput(TIMx, LL_TIM_TS_TI1FP1); // Use Filtered Input 1 (TI1)
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LL_TIM_EnableMasterSlaveMode(TIMx); |
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LL_TIM_ClearFlag_CC1(TIMx); |
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LL_TIM_ClearFlag_CC1OVR(TIMx); |
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LL_TIM_ClearFlag_CC2(TIMx); |
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LL_TIM_ClearFlag_CC2OVR(TIMx); |
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LL_TIM_EnableIT_CC1(TIMx); |
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LL_TIM_EnableIT_CC2(TIMx); |
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LL_TIM_EnableCounter(TIMx); |
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@ -300,18 +378,19 @@ static void UFCAP_ConfigureForPWMCapture(Unit *unit) |
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* Configure peripherals for an indirect capture (PWM measurement) - continuous or burst |
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* @param unit |
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*/ |
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static void UFCAP_ConfigureForDirectCapture(Unit *unit) |
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static void UFCAP_ConfigureForDirectCapture(Unit *unit, uint16_t msec) |
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{ |
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struct priv * const priv = unit->data; |
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// dbg("Configuring Direct capture...");
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UFCAP_ClearTimerConfig(unit); |
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{ |
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TIM_TypeDef *const TIMy = priv->TIMy; |
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assert_param(PLAT_AHB_MHZ<=65); |
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uint16_t presc = PLAT_AHB_MHZ*1000; |
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uint32_t count = priv->cnt_cont.msec+1; // it's one tick longer because we generate OCREF on the exact msec count - it must be at least 1 tick long
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uint32_t count = msec+1; // it's one tick longer because we generate OCREF on the exact msec count - it must be at least 1 tick long
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LL_TIM_SetPrescaler(TIMy, (uint32_t) (presc - 1)); |
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LL_TIM_SetAutoReload(TIMy, count - 1); |
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@ -327,6 +406,7 @@ static void UFCAP_ConfigureForDirectCapture(Unit *unit) |
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LL_TIM_OC_SetCompareCH1(TIMy, count-1); |
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LL_TIM_CC_EnableChannel(TIMy, LL_TIM_CHANNEL_CH1); // enable the output channel that produces a trigger
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LL_TIM_ClearFlag_UPDATE(TIMy); |
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LL_TIM_EnableIT_UPDATE(TIMy); |
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} |
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@ -337,6 +417,24 @@ static void UFCAP_ConfigureForDirectCapture(Unit *unit) |
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LL_TIM_SetTriggerInput(TIMx, LL_TIM_TS_ITR3); // ITR3 is TIM14 which we use as TIMy
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LL_TIM_EnableMasterSlaveMode(TIMx); |
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uint32_t presc = LL_TIM_ETR_PRESCALER_DIV1; |
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switch (priv->direct_presc) { |
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case 1: presc = LL_TIM_ETR_PRESCALER_DIV1; break; |
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case 2: presc = LL_TIM_ETR_PRESCALER_DIV2; break; |
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case 4: presc = LL_TIM_ETR_PRESCALER_DIV4; break; |
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case 8: presc = LL_TIM_ETR_PRESCALER_DIV8; break; |
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default: |
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priv->direct_presc = 1; // will be sent with the response
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} |
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if (priv->dfilter > 15) priv->dfilter = 15; |
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uint32_t filter = LL_TIM_ETR_FILTERS[priv->dfilter]; |
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LL_TIM_ConfigETR(TIMx, |
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priv->active_level ? LL_TIM_ETR_POLARITY_NONINVERTED : LL_TIM_ETR_POLARITY_INVERTED, |
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presc, |
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filter); |
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LL_TIM_EnableExternalClock(TIMx); // TODO must check and deny this mode if the pin is not on CH1 = external trigger input
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LL_TIM_SetCounter(TIMx, 0); |
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@ -355,6 +453,8 @@ static void UFCAP_ConfigureForFreeCapture(Unit *unit) |
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{ |
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struct priv * const priv = unit->data; |
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UFCAP_ClearTimerConfig(unit); |
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TIM_TypeDef *const TIMx = priv->TIMx; |
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LL_TIM_EnableExternalClock(TIMx); |
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LL_TIM_SetCounter(TIMx, 0); |
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