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possibly improved the rx routine

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This commit is contained in:
MightyPork
2018-04-09 21:49:12 +02:00
parent e4ae8e23fc
commit 2bad5d69e6
2 changed files with 40 additions and 21 deletions
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comm/iface_nordic.c
+5 -2
View File
@@ -48,15 +48,18 @@ static void NrfIrqHandler(void *arg)
LL_EXTI_ClearFlag_0_31(LL_EXTI_LINES[NRF_EXTI_LINENUM]); LL_EXTI_ClearFlag_0_31(LL_EXTI_LINES[NRF_EXTI_LINENUM]);
dbg_nrf("[EXTI] ---"); dbg_nrf("[EXTI] ---");
while (NRF_IsRxPacket()) {
uint8_t pipenum; uint8_t pipenum;
uint8_t count = NRF_ReceivePacket(rx_buffer, &pipenum); uint8_t count = NRF_ReceivePacket(rx_buffer, &pipenum);
if (count > 0) { if (count > 0) {
dbg_nrf("NRF RX %d bytes", (int) count); dbg_nrf("NRF RX %d bytes", (int) count);
rxQuePostMsg(rx_buffer, count); rxQuePostMsg(rx_buffer, count);
} else { }
else {
dbg("IRQ but no Rx"); dbg("IRQ but no Rx");
} }
}
dbg_nrf("--- end [EXTI]"); dbg_nrf("--- end [EXTI]");
} }
comm/nrf.c
+29 -13
View File
@@ -133,6 +133,12 @@ static uint8_t spi(uint8_t tx) {
#define RD_CONFIG_DISABLE_IRQ_TX_DS 0x20 #define RD_CONFIG_DISABLE_IRQ_TX_DS 0x20
#define RD_CONFIG_DISABLE_IRQ_RX_DR 0x40 #define RD_CONFIG_DISABLE_IRQ_RX_DR 0x40
#define RD_FIFO_STATUS_RX_EMPTY 0x01
#define RD_FIFO_STATUS_RX_FULL 0x02
#define RD_FIFO_STATUS_TX_EMPTY 0x10
#define RD_FIFO_STATUS_TX_FULL 0x20
#define RD_FIFO_STATUS_TX_REUSE 0x40
// Config register bits (excluding the bottom two that are changed dynamically) // Config register bits (excluding the bottom two that are changed dynamically)
// enable only Rx IRQ // enable only Rx IRQ
#define ModeBits (RD_CONFIG_DISABLE_IRQ_MAX_RT | \ #define ModeBits (RD_CONFIG_DISABLE_IRQ_MAX_RT | \
@@ -384,21 +390,29 @@ void NRF_SetChannel(uint8_t Ch)
uint8_t NRF_ReceivePacket(uint8_t *Packet, uint8_t *PipeNum) uint8_t NRF_ReceivePacket(uint8_t *Packet, uint8_t *PipeNum)
{ {
uint8_t pw = 0, status; uint8_t pw = 0, status;
if (!NRF_IsRxPacket()) return 0; // if (!NRF_IsRxPacket()) {
// dbg("rx queue empty");
// return 0;
// }
const uint8_t orig_conf = NRF_ReadRegister(RG_CONFIG); // const uint8_t orig_conf = NRF_ReadRegister(RG_CONFIG);
CE(0); // quit Rx mode - go idle // CE(0); // quit Rx mode - go idle
CHIPSELECT { CHIPSELECT {
status = spi(CMD_RD_RX_PL_WIDTH); status = spi(CMD_RD_RX_PL_WIDTH);
pw = spi(0); pw = spi(0);
} }
if (pw == 0) {
dbg("empty pld");
}
if (pw > 32) { if (pw > 32) {
CHIPSELECT { CHIPSELECT {
spi(CMD_FLUSH_RX); spi(CMD_FLUSH_RX);
} }
pw = 0; pw = 0;
dbg("over 32");
} else { } else {
// Read the reception pipe number // Read the reception pipe number
*PipeNum = ((status & RD_STATUS_RX_PNO) >> 1); *PipeNum = ((status & RD_STATUS_RX_PNO) >> 1);
@@ -409,21 +423,23 @@ uint8_t NRF_ReceivePacket(uint8_t *Packet, uint8_t *PipeNum)
} }
NRF_WriteRegister(RG_STATUS, RD_STATUS_RX_DR); // Clear the RX_DR interrupt NRF_WriteRegister(RG_STATUS, RD_STATUS_RX_DR); // Clear the RX_DR interrupt
if ((orig_conf & RD_CONFIG_PWR_UP) == 0) { // if ((orig_conf & RD_CONFIG_PWR_UP) == 0) {
dbg_nrf("going back PwrDn"); // dbg_nrf("going back PwrDn");
NRF_PowerDown(); // NRF_PowerDown();
} // }
else if ((orig_conf & RD_CONFIG_PRIM_RX) == RD_CONFIG_PRIM_RX) { // else if ((orig_conf & RD_CONFIG_PRIM_RX) == RD_CONFIG_PRIM_RX) {
dbg_nrf("going back PwrUp+Rx"); // dbg_nrf("going back PwrUp+Rx");
NRF_ModeRX(); // NRF_ModeRX();
} // }
// CE(1); // back to rx
return pw; return pw;
} }
bool NRF_IsRxPacket(void) bool NRF_IsRxPacket(void)
{ {
uint8_t ret = NRF_ReadRegister(RG_STATUS) & RD_STATUS_RX_DR; return 0 == (NRF_ReadRegister(RG_FIFO_STATUS) & RD_FIFO_STATUS_RX_EMPTY);
return 0 != ret; // uint8_t ret = NRF_ReadRegister(RG_STATUS) & RD_STATUS_RX_DR;
// return 0 != ret;
} }
bool NRF_SendPacket(uint8_t PipeNum, const uint8_t *Packet, uint8_t Length) bool NRF_SendPacket(uint8_t PipeNum, const uint8_t *Packet, uint8_t Length)