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34 lines
1.5 KiB
34 lines
1.5 KiB
9 years ago
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;********************************************************************************
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; SOUBOR : INI_BITS_IWDG.S
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; AUTOR : Petr Dousa, Ondrej Hruska
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; DATUM : 10/2015
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; POPIS : Bitove masky ridicich registru pro IWDG
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;
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; Toto je soucast knihovny pro STM32L100 vyvijene na Katedre mereni FEL CVUT.
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;********************************************************************************
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;****************************************************************************
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;
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; Independent WATCHDOG (IWDG)
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;
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;****************************************************************************
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;****************** Bit definition for IWDG_KR register *******************
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IWDG_KR_KEY EQU 0xFFFF ; Key value (write only, read 0000h)
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;****************** Bit definition for IWDG_PR register *******************
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IWDG_PR_PR EQU 0x07 ; PR[2:0] (Prescaler divider)
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IWDG_PR_PR_0 EQU 0x01 ; Bit 0
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IWDG_PR_PR_1 EQU 0x02 ; Bit 1
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IWDG_PR_PR_2 EQU 0x04 ; Bit 2
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;****************** Bit definition for IWDG_RLR register ******************
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IWDG_RLR_RL EQU 0x0FFF ; Watchdog counter reload value
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;****************** Bit definition for IWDG_SR register *******************
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IWDG_SR_PVU EQU 0x01 ; Watchdog prescaler value update
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IWDG_SR_RVU EQU 0x02 ; Watchdog counter reload value update
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END
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