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esp-geiger/components/esp32-owb
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README.md

esp32-owb

This is a ESP32-compatible C component for the Maxim Integrated "1-Wire" protocol.

It is written and tested for version 3.0-3.3 and 4.1-beta1 of the ESP-IDF environment, using the xtensa-esp32-elf toolchain (gcc version 5.2.0, crosstool-ng-1.22.0-80-g6c4433a).

Support for v2.1 is available on the ESP-IDF_v2.1 branch.

Features

This library includes:

  • External power supply mode.
  • Parasitic power mode.
  • Static (stack-based) or dynamic (malloc-based) memory model.
  • No globals - support any number of 1-Wire buses simultaneously.
  • 1-Wire device detection and validation, including search for multiple devices on a single bus.
  • Addressing optimisation for a single (solo) device on a bus.
  • 1-Wire bus operations including multi-byte read and write operations.
  • CRC checks on ROM code.

This component includes two methods of bus access - delay-driven GPIO and RMT-driven slots. The original implementation used CPU delays to construct the 1-Wire read/write timeslots however this proved to be too unreliable. A second method, using the ESP32's RMT peripheral, results in very accurate read/write timeslots and more reliable operation.

Therefore I highly recommend that you use the RMT driver. The GPIO driver is deprecated and will be removed.

See documentation for esp32-ds18b20 for further information about parasitic power mode, including strong pull-up configuration.

Documentation

Automatically generated API documentation (doxygen) is available here.

Source Code

The source is available from GitHub.

License

The code in this project is licensed under the MIT license - see LICENSE for details.

Links

Acknowledgements

Thank you to Chris Morgan for his contribution of adding RMT peripheral support for more reliable operation.

Parts of this code are based on references provided to the public domain by Maxim Integrated.

"1-Wire" is a registered trademark of Maxim Integrated.