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47 lines
1.4 KiB
47 lines
1.4 KiB
use crsn::asm::data::{Rd, Wr};
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/// A low level instruction
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#[derive(Clone, Debug, Eq, PartialEq)]
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pub enum ArithOp {
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Test { a: Rd },
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Compare { a: Rd, b: Rd },
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RangeTest { val: Rd, a: Rd, b: Rd },
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Rng { dst: Wr, min: Rd, max: Rd },
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Sw32 { dst: Wr, src: Rd },
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Sw16 { dst: Wr, src: Rd },
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Sw8 { dst: Wr, src: Rd },
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Rev { dst: Wr, src: Rd },
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Rbit { dst: Wr, src: Rd },
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Clz { dst: Wr, src: Rd },
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Clz32 { dst: Wr, src: Rd },
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Clz16 { dst: Wr, src: Rd },
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Clz8 { dst: Wr, src: Rd },
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Clo { dst: Wr, src: Rd },
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Clo32 { dst: Wr, src: Rd },
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Clo16 { dst: Wr, src: Rd },
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Clo8 { dst: Wr, src: Rd },
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SignExtend32 { dst: Wr, src: Rd },
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SignExtend16 { dst: Wr, src: Rd },
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SignExtend8 { dst: Wr, src: Rd },
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Add { dst: Wr, a: Rd, b: Rd },
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Sub { dst: Wr, a: Rd, b: Rd },
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Mul { dst: Wr, a: Rd, b: Rd },
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Div { dst: Wr, rem: Wr, a: Rd, div: Rd },
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// "Mod" is functionally equivalent to "Div" with the result discarded,
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// but status flags are updated by the remainder
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Mod { dst: Wr, a: Rd, div: Rd },
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And { dst: Wr, a: Rd, b: Rd },
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Or { dst: Wr, a: Rd, b: Rd },
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Xor { dst: Wr, a: Rd, b: Rd },
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Cpl { dst: Wr, a: Rd },
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Rol { dst: Wr, a: Rd, n: Rd },
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// Rotate (with wrap-around)
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Ror { dst: Wr, a: Rd, n: Rd },
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Lsl { dst: Wr, a: Rd, n: Rd },
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// Shift
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Lsr { dst: Wr, a: Rd, n: Rd },
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Asr { dst: Wr, a: Rd, n: Rd },
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}
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