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@ -1,5 +1,5 @@ |
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use crate::asm::instr::{lower, Op}; |
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use crate::asm::instr::{lower, Op}; |
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use crate::asm::instr::op::OpParser; |
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use crate::asm::instr::op::AsmModule; |
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pub mod data; |
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pub mod data; |
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pub mod error; |
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pub mod error; |
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@ -8,7 +8,7 @@ pub mod parse; |
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pub mod patches; |
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pub mod patches; |
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/// Parse a program from string and assemble a low level instruction sequence from it.
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/// Parse a program from string and assemble a low level instruction sequence from it.
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pub fn assemble(source: &str, parsers: &[Box<dyn OpParser>]) -> Result<Vec<Op>, error::Error> { |
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pub fn assemble(source: &str, parsers: &[Box<dyn AsmModule>]) -> Result<Vec<Op>, error::Error> { |
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let parsed = parse::parse(source, parsers)?; |
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let parsed = parse::parse(source, parsers)?; |
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Ok(lower(parsed)?) |
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Ok(lower(parsed)?) |
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} |
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} |
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@ -19,7 +19,7 @@ mod tests { |
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use crate::asm::data::{DstDisp, Rd, Register, SrcDisp, Wr}; |
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use crate::asm::data::{DstDisp, Rd, Register, SrcDisp, Wr}; |
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use crate::asm::data::literal::{Addr, Label}; |
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use crate::asm::data::literal::{Addr, Label}; |
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use crate::asm::instr::{Flatten, HLOp, Instr, lower, Op}; |
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use crate::asm::instr::{Flatten, OpWrapper, Instr, lower, Op}; |
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use crate::asm::instr::Cond; |
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use crate::asm::instr::Cond; |
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use crate::asm::parse::{parse, parse_instructions}; |
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use crate::asm::parse::{parse, parse_instructions}; |
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@ -28,7 +28,7 @@ mod tests { |
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let parsed = parse(" |
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let parsed = parse(" |
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() |
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() |
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").unwrap(); |
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").unwrap(); |
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assert_eq!(Vec::<HLOp>::new(), parsed); |
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assert_eq!(Vec::<OpWrapper>::new(), parsed); |
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} |
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} |
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#[test] |
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#[test] |
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@ -39,8 +39,8 @@ mod tests { |
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) |
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) |
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").unwrap(); |
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").unwrap(); |
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assert_eq!(vec![ |
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assert_eq!(vec![ |
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HLOp::L(Op::Routine("hello".into())), |
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OpWrapper::Op(Op::Routine("hello".into())), |
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HLOp::L(Op::Barrier(Some("Routine \"hello\" overrun".into()))) |
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OpWrapper::Op(Op::Barrier(Some("Routine \"hello\" overrun".into()))) |
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], parsed); |
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], parsed); |
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let parsed = parse(" |
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let parsed = parse(" |
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@ -50,10 +50,10 @@ mod tests { |
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) |
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) |
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").unwrap(); |
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").unwrap(); |
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assert_eq!(vec![ |
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assert_eq!(vec![ |
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HLOp::L(Op::Routine("hello".into())), |
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OpWrapper::Op(Op::Routine("hello".into())), |
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HLOp::L(Op::Barrier(Some("Routine \"hello\" overrun".into()))), |
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OpWrapper::Op(Op::Barrier(Some("Routine \"hello\" overrun".into()))), |
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HLOp::L(Op::Routine("world".into())), |
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OpWrapper::Op(Op::Routine("world".into())), |
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HLOp::L(Op::Barrier(Some("Routine \"world\" overrun".into()))) |
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OpWrapper::Op(Op::Barrier(Some("Routine \"world\" overrun".into()))) |
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], parsed); |
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], parsed); |
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} |
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} |
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@ -79,73 +79,73 @@ mod tests { |
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) |
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) |
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").unwrap(); |
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").unwrap(); |
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assert_eq!(vec![ |
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assert_eq!(vec![ |
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HLOp::L(Op::Routine("move".into())), |
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OpWrapper::Op(Op::Routine("move".into())), |
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// (mov r0 r1)
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// (mov r0 r1)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(1))), |
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Rd::new(SrcDisp::Register(Register::Gen(1))), |
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)), |
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)), |
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// (mov r15 7)
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// (mov r15 7)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(15))), |
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Wr::new(DstDisp::Register(Register::Gen(15))), |
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Rd::new(SrcDisp::Immediate(7)), |
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Rd::new(SrcDisp::Immediate(7)), |
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)), |
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)), |
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// (mov r15 0xabcd)
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// (mov r15 0xabcd)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(15))), |
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Wr::new(DstDisp::Register(Register::Gen(15))), |
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Rd::new(SrcDisp::Immediate(0xabcd)), |
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Rd::new(SrcDisp::Immediate(0xabcd)), |
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)), |
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)), |
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// (mov r7 0b11110000)
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// (mov r7 0b11110000)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(7))), |
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Wr::new(DstDisp::Register(Register::Gen(7))), |
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Rd::new(SrcDisp::Immediate(0b11110000)), |
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Rd::new(SrcDisp::Immediate(0b11110000)), |
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)), |
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)), |
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// (mov r7 arg1)
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// (mov r7 arg1)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(7))), |
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Wr::new(DstDisp::Register(Register::Gen(7))), |
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Rd::new(SrcDisp::Register(Register::Arg(1))), |
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Rd::new(SrcDisp::Register(Register::Arg(1))), |
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)), |
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)), |
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// (mov r255 arg255)
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// (mov r255 arg255)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(255))), |
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Wr::new(DstDisp::Register(Register::Gen(255))), |
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Rd::new(SrcDisp::Register(Register::Arg(255))), |
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Rd::new(SrcDisp::Register(Register::Arg(255))), |
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)), |
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)), |
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// (mov r7 res0)
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// (mov r7 res0)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(7))), |
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Wr::new(DstDisp::Register(Register::Gen(7))), |
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Rd::new(SrcDisp::Register(Register::Res(0))), |
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Rd::new(SrcDisp::Register(Register::Res(0))), |
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)), |
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)), |
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// (mov r7 res255)
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// (mov r7 res255)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(7))), |
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Wr::new(DstDisp::Register(Register::Gen(7))), |
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Rd::new(SrcDisp::Register(Register::Res(255))), |
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Rd::new(SrcDisp::Register(Register::Res(255))), |
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)), |
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)), |
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// (mov @r0 @r0)
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// (mov @r0 @r0)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::RegisterPtr(Register::Gen(0))), |
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Wr::new(DstDisp::RegisterPtr(Register::Gen(0))), |
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Rd::new(SrcDisp::RegisterPtr(Register::Gen(0))), |
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Rd::new(SrcDisp::RegisterPtr(Register::Gen(0))), |
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)), |
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)), |
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// (mov @r0 @arg0)
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// (mov @r0 @arg0)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::RegisterPtr(Register::Gen(0))), |
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Wr::new(DstDisp::RegisterPtr(Register::Gen(0))), |
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Rd::new(SrcDisp::RegisterPtr(Register::Arg(0))), |
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Rd::new(SrcDisp::RegisterPtr(Register::Arg(0))), |
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)), |
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)), |
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// (mov @r0 @res0)
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// (mov @r0 @res0)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::RegisterPtr(Register::Gen(0))), |
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Wr::new(DstDisp::RegisterPtr(Register::Gen(0))), |
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Rd::new(SrcDisp::RegisterPtr(Register::Res(0))), |
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Rd::new(SrcDisp::RegisterPtr(Register::Res(0))), |
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)), |
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)), |
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// (mov @123456 @0x123456)
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// (mov @123456 @0x123456)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::ImmediatePtr(Addr(123456))), |
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Wr::new(DstDisp::ImmediatePtr(Addr(123456))), |
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Rd::new(SrcDisp::ImmediatePtr(Addr(0x123456))), |
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Rd::new(SrcDisp::ImmediatePtr(Addr(0x123456))), |
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)), |
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)), |
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// (mov @0b010101 @0b010101)
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// (mov @0b010101 @0b010101)
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::ImmediatePtr(Addr(0b010101))), |
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Wr::new(DstDisp::ImmediatePtr(Addr(0b010101))), |
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Rd::new(SrcDisp::ImmediatePtr(Addr(0b010101))), |
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Rd::new(SrcDisp::ImmediatePtr(Addr(0b010101))), |
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)), |
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)), |
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HLOp::L(Op::Barrier(Some("Routine \"move\" overrun".into()))), |
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OpWrapper::Op(Op::Barrier(Some("Routine \"move\" overrun".into()))), |
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], parsed); |
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], parsed); |
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} |
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} |
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@ -153,7 +153,7 @@ mod tests { |
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Ok(parse_instructions(vec![sexp::parse(src)?])?.remove(0)) |
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Ok(parse_instructions(vec![sexp::parse(src)?])?.remove(0)) |
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} |
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} |
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fn parse_single_op(src: &str) -> anyhow::Result<Vec<HLOp>> { |
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fn parse_single_op(src: &str) -> anyhow::Result<Vec<OpWrapper>> { |
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let num = AtomicU32::new(0); |
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let num = AtomicU32::new(0); |
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Ok(parse_single_instr(src)?.flatten(&num)?) |
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Ok(parse_single_instr(src)?.flatten(&num)?) |
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} |
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} |
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@ -162,7 +162,7 @@ mod tests { |
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fn test_parse_single() { |
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fn test_parse_single() { |
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let parsed = parse_single_op("(mov r0 r1)").unwrap(); |
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let parsed = parse_single_op("(mov r0 r1)").unwrap(); |
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assert_eq!(vec![ |
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assert_eq!(vec![ |
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(1))), |
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Rd::new(SrcDisp::Register(Register::Gen(1))), |
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)), |
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)), |
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@ -176,7 +176,7 @@ mod tests { |
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").unwrap(); |
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").unwrap(); |
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assert_eq!( |
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assert_eq!( |
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Instr { |
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Instr { |
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op: HLOp::L(Op::Cmp( |
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op: OpWrapper::Op(Op::Cmp( |
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Rd::new(SrcDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(1))), |
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Rd::new(SrcDisp::Register(Register::Gen(1))), |
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)), |
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)), |
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@ -185,14 +185,14 @@ mod tests { |
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Cond::Equal, |
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Cond::Equal, |
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vec![ |
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vec![ |
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Instr { |
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Instr { |
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op: HLOp::L(Op::Mov( |
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op: OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(0))), |
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)), |
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)), |
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branches: None, |
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branches: None, |
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}, |
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}, |
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Instr { |
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Instr { |
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op: HLOp::L(Op::Mov( |
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op: OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(1))), |
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Wr::new(DstDisp::Register(Register::Gen(1))), |
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Rd::new(SrcDisp::Register(Register::Gen(2))), |
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Rd::new(SrcDisp::Register(Register::Gen(2))), |
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)), |
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)), |
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@ -204,14 +204,14 @@ mod tests { |
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Cond::Greater, |
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Cond::Greater, |
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vec![ |
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vec![ |
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Instr { |
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Instr { |
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op: HLOp::L(Op::Mov( |
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op: OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(0))), |
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)), |
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)), |
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branches: None, |
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branches: None, |
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}, |
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}, |
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Instr { |
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Instr { |
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op: HLOp::L(Op::Mov( |
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op: OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(1))), |
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Wr::new(DstDisp::Register(Register::Gen(1))), |
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Rd::new(SrcDisp::Register(Register::Gen(1))), |
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Rd::new(SrcDisp::Register(Register::Gen(1))), |
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)), |
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)), |
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@ -237,31 +237,31 @@ mod tests { |
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").unwrap(); |
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").unwrap(); |
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assert_eq!( |
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assert_eq!( |
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vec![ |
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vec![ |
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HLOp::L(Op::Cmp( |
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OpWrapper::Op(Op::Cmp( |
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Rd::new(SrcDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(1))), |
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Rd::new(SrcDisp::Register(Register::Gen(1))), |
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)), |
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)), |
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HLOp::JumpIf(Cond::NotEqual, Label::Numbered(1)), |
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OpWrapper::JumpIf(Cond::NotEqual, Label::Numbered(1)), |
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(0))), |
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)), |
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)), |
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(1))), |
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Wr::new(DstDisp::Register(Register::Gen(1))), |
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Rd::new(SrcDisp::Register(Register::Gen(2))), |
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Rd::new(SrcDisp::Register(Register::Gen(2))), |
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)), |
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)), |
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HLOp::Jump(Label::Numbered(0)), |
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OpWrapper::Jump(Label::Numbered(0)), |
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HLOp::Label(Label::Numbered(1)), |
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OpWrapper::Label(Label::Numbered(1)), |
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HLOp::JumpIf(Cond::LowerOrEqual, Label::Numbered(0)), |
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OpWrapper::JumpIf(Cond::LowerOrEqual, Label::Numbered(0)), |
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(0))), |
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Rd::new(SrcDisp::Register(Register::Gen(0))), |
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)), |
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)), |
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HLOp::L(Op::Mov( |
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OpWrapper::Op(Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(1))), |
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Wr::new(DstDisp::Register(Register::Gen(1))), |
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Rd::new(SrcDisp::Register(Register::Gen(1))), |
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Rd::new(SrcDisp::Register(Register::Gen(1))), |
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)), |
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)), |
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HLOp::Label(Label::Numbered(0)), |
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OpWrapper::Label(Label::Numbered(0)), |
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], parsed); |
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], parsed); |
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} |
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} |
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@ -286,15 +286,15 @@ mod tests { |
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assert_eq!( |
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assert_eq!( |
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vec![ |
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vec![ |
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Op::Routine("foo".into()).into(), |
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Op::Routine("foo".into()).into(), |
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HLOp::Label(Label::Named("foo".to_string())), |
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OpWrapper::Label(Label::Named("foo".to_string())), |
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HLOp::Label(Label::Named("unused".to_string())), |
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OpWrapper::Label(Label::Named("unused".to_string())), |
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HLOp::Label(Label::Named("whatever".to_string())), |
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OpWrapper::Label(Label::Named("whatever".to_string())), |
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|
Op::Mov( |
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|
Op::Mov( |
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Wr::new(DstDisp::Register(Register::Gen(0))), |
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|
Wr::new(DstDisp::Register(Register::Gen(0))), |
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|
Rd::new(SrcDisp::Register(Register::Gen(0))), |
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|
Rd::new(SrcDisp::Register(Register::Gen(0))), |
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|
).into(), |
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|
).into(), |
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HLOp::Jump(Label::Named("foo".to_string())), |
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|
OpWrapper::Jump(Label::Named("foo".to_string())), |
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|
HLOp::Jump(Label::Named("foo".to_string())), |
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|
OpWrapper::Jump(Label::Named("foo".to_string())), |
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|
Op::Mov( |
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|
|
Op::Mov( |
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|
|
Wr::new(DstDisp::Register(Register::Gen(0))), |
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|
Wr::new(DstDisp::Register(Register::Gen(0))), |
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|
Rd::new(SrcDisp::Register(Register::Gen(0))), |
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|
Rd::new(SrcDisp::Register(Register::Gen(0))), |
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|
@ -303,8 +303,8 @@ mod tests { |
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|
Wr::new(DstDisp::Register(Register::Gen(0))), |
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|
Wr::new(DstDisp::Register(Register::Gen(0))), |
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|
Rd::new(SrcDisp::Register(Register::Gen(0))), |
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|
Rd::new(SrcDisp::Register(Register::Gen(0))), |
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|
).into(), |
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|
|
).into(), |
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|
HLOp::Jump(Label::Named("whatever".to_string())), |
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|
OpWrapper::Jump(Label::Named("whatever".to_string())), |
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|
HLOp::JumpIf(Cond::Equal, Label::Named("whatever".to_string())), |
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|
OpWrapper::JumpIf(Cond::Equal, Label::Named("whatever".to_string())), |
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|
Op::Barrier(Some("Routine \"foo\" overrun".into())).into(), |
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|
Op::Barrier(Some("Routine \"foo\" overrun".into())).into(), |
|
|
|
], parsed); |
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|
], parsed); |
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