master
Ondřej Hruška 6 years ago
parent 5724d56403
commit 91450c02e7
Signed by: MightyPork
GPG Key ID: 2C5FD5035250423D
  1. 17
      GEX HUB (F072)/README.md
  2. 0
      GEX HUB (F072)/photo.jpg
  3. 0
      GEX HUB (F072)/rev.1/GEX_Dongle.PrjPCB
  4. 0
      GEX HUB (F072)/rev.1/GEX_Dongle.PrjPCBStructure
  5. 0
      GEX HUB (F072)/rev.1/GEX_Dongle.SchDoc
  6. 0
      GEX HUB (F072)/rev.1/GEX_Dongle.pdf
  7. 0
      GEX HUB (F072)/rev.1/GEX_IDC.PcbDoc
  8. 8
      GEX HUB (F072)/rev.1/README.md
  9. 0
      GEX HUB (F072)/rev.1/bugfixes.jpg
  10. 0
      GEX HUB (F072)/rev.1/gerbers_oshpark.zip
  11. 36
      GEX HUB (F072)/rev.2/GEX_IDC.RUL
  12. BIN
      GEX HUB (F072)/rev.2/GEX_IDC.rev2.PcbDoc
  13. BIN
      GEX HUB (F072)/rev.2/GEX_IDC.rev2.SchDoc
  14. 13
      GEX HUB (F072)/rev.2/README.md
  15. BIN
      GEX HUB (F072)/rev.2/gerbers_oshpark.zip
  16. 13
      GEX Radio Dongle (F103 NRF caster)/README.md
  17. BIN
      GEX Radio Dongle (F103 NRF caster)/rev.1/GEX_Radio.PcbDoc
  18. 1096
      GEX Radio Dongle (F103 NRF caster)/rev.1/GEX_Radio.PrjPcb
  19. 1
      GEX Radio Dongle (F103 NRF caster)/rev.1/GEX_Radio.PrjPcbStructure
  20. BIN
      GEX Radio Dongle (F103 NRF caster)/rev.1/GEX_Radio.SchDoc
  21. BIN
      GEX Radio Dongle (F103 NRF caster)/rev.1/gerbers_oshpark.zip
  22. 56
      GEX Zero (F072)/README.md
  23. BIN
      GEX Zero (F072)/gzb.png
  24. BIN
      GEX Zero (F072)/gzrender.png
  25. BIN
      GEX Zero (F072)/gztop.png
  26. BIN
      GEX Zero (F072)/rev.1/GEX_Zero.PcbDoc
  27. 1383
      GEX Zero (F072)/rev.1/GEX_Zero.PrjPcb
  28. 1
      GEX Zero (F072)/rev.1/GEX_Zero.PrjPcbStructure
  29. BIN
      GEX Zero (F072)/rev.1/GEX_Zero.SchDoc
  30. 22
      f072-hub-r.1/README.md
  31. BIN
      panel Zero+Hub+Dongle/GEX_PNL_1b.zip
  32. 8
      panel Zero+Hub+Dongle/README.md
  33. BIN
      panel Zero+Hub+Dongle/panel.png

@ -0,0 +1,17 @@
GEX F072 hub prototype board
============================
This board was the first custom PCB for GEX.
To flash a firmware, remove JP1, reset and flash using DFU. Replace JP1 and reset for normal operation.
Press and hold S1 to enable USB VFS with config files. Same process for locking and persisting to Flash.
Settings (but not system settings) can also be changed via the USB API.
![photo](photo.jpg)
rev.2 changes
-------------
The BOOT jumper is now inside the A connector,
and the function is reversed - insert a jumper between BOOT and 3V3 to enter bootloader.

Before

Width:  |  Height:  |  Size: 196 KiB

After

Width:  |  Height:  |  Size: 196 KiB

@ -0,0 +1,8 @@
Errata
------
- JP1 - bad footprint, too fine pitch. Can be fixed by soldering the header on the bottom, with slightly bent pins
- P1 - the SWD connector, same problem, no fix needed or available. Use DFU for flashing
- Missign NRESET button. Normally not needed, but often missed. You can solder it on the bottom side from one end of R2 to the GND testpoint.
![photo](bugfixes.jpg)

Before

Width:  |  Height:  |  Size: 176 KiB

After

Width:  |  Height:  |  Size: 176 KiB

@ -0,0 +1,36 @@
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=Clearance|NETSCOPE=DifferentNets|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=Clearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=TERASYHR|DEFINEDBYLOGICALDOCUMENT=FALSE|GAP=10mil|GENERICCLEARANCE=10mil|OBJECTCLEARANCES=ClearanceObj_Track-ClearanceObj_Track:70000;ClearanceObj_Track-ClearanceObj_SMDPad:70000;ClearanceObj_SMDPad-ClearanceObj_SMDPad:70000¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=Width|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=(InNet('3V3') OR InNet('3V3A') OR InNet('5V'))|SCOPE2EXPRESSION=All|NAME=ThickSupply|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=FBPKYUYG|DEFINEDBYLOGICALDOCUMENT=FALSE|MAXLIMIT=40mil|MINLIMIT=12mil|PREFEREDWIDTH=40mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=Width|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=Width|ENABLED=TRUE|PRIORITY=2|COMMENT= |UNIQUEID=DJBNSUCE|DEFINEDBYLOGICALDOCUMENT=FALSE|MAXLIMIT=100mil|MINLIMIT=7mil|PREFEREDWIDTH=10mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=PlaneConnect|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=PlaneConnect|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=QIXQFIGC|DEFINEDBYLOGICALDOCUMENT=FALSE|PLANECONNECTSTYLE=Relief|RELIEFEXPANSION=20mil|RELIEFENTRIES=4|RELIEFCONDUCTORWIDTH=10mil|RELIEFAIRGAP=10mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=RoutingTopology|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=RoutingTopology|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=UGAPHTQG|DEFINEDBYLOGICALDOCUMENT=FALSE|TOPOLOGY=Shortest¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=RoutingPriority|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=RoutingPriority|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=FNLULPXR|DEFINEDBYLOGICALDOCUMENT=FALSE|ROUTINGPRIORITY=0¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=RoutingLayers|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=RoutingLayers|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=HXUOQAWR|DEFINEDBYLOGICALDOCUMENT=FALSE|TOP LAYER_V5=TRUE|MID LAYER 1_V5=TRUE|MID LAYER 2_V5=TRUE|MID LAYER 3_V5=TRUE|MID LAYER 4_V5=TRUE|MID LAYER 5_V5=TRUE|MID LAYER 6_V5=TRUE|MID LAYER 7_V5=TRUE|MID LAYER 8_V5=TRUE|MID LAYER 9_V5=TRUE|MID LAYER 10_V5=TRUE|MID LAYER 11_V5=TRUE|MID LAYER 12_V5=TRUE|MID LAYER 13_V5=TRUE|MID LAYER 14_V5=TRUE|MID LAYER 15_V5=TRUE|MID LAYER 16_V5=TRUE|MID LAYER 17_V5=TRUE|MID LAYER 18_V5=TRUE|MID LAYER 19_V5=TRUE|MID LAYER 20_V5=TRUE|MID LAYER 21_V5=TRUE|MID LAYER 22_V5=TRUE|MID LAYER 23_V5=TRUE|MID LAYER 24_V5=TRUE|MID LAYER 25_V5=TRUE|MID LAYER 26_V5=TRUE|MID LAYER 27_V5=TRUE|MID LAYER 28_V5=TRUE|MID LAYER 29_V5=TRUE|MID LAYER 30_V5=TRUE|BOTTOM LAYER_V5=TRUE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=RoutingCorners|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=RoutingCorners|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=AUWPKIHQ|DEFINEDBYLOGICALDOCUMENT=FALSE|CORNERSTYLE=45-Degree|MINSETBACK=100mil|MAXSETBACK=100mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=RoutingVias|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=RoutingVias|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=CALOJAJK|DEFINEDBYLOGICALDOCUMENT=FALSE|HOLEWIDTH=14mil|WIDTH=24mil|VIASTYLE=Through Hole|MINHOLEWIDTH=14mil|MINWIDTH=24mil|MAXHOLEWIDTH=100mil|MAXWIDTH=100mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=PlaneClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=PlaneClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=IOVBUITL|DEFINEDBYLOGICALDOCUMENT=FALSE|CLEARANCE=20mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=SolderMaskExpansion|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=SolderMaskExpansion|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=PXDXORNC|DEFINEDBYLOGICALDOCUMENT=FALSE|EXPANSION=2mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=PasteMaskExpansion|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=PasteMaskExpansion|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=JWJFUWDX|DEFINEDBYLOGICALDOCUMENT=FALSE|EXPANSION=0mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=ShortCircuit|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=ShortCircuit|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=HXCXHPVY|DEFINEDBYLOGICALDOCUMENT=FALSE|ALLOWED=FALSE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=UnRoutedNet|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=UnRoutedNet|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=FPRVQIIJ|DEFINEDBYLOGICALDOCUMENT=FALSE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=PolygonConnect|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=InNet('GND') And IsVia|NAME=PolygonConnect_GND|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=RPQVSLSV|DEFINEDBYLOGICALDOCUMENT=FALSE|CONNECTSTYLE=Direct|RELIEFCONDUCTORWIDTH=10mil|RELIEFENTRIES=4|POLYGONRELIEFANGLE=90 Angle|AIRGAPWIDTH=10mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=PolygonConnect|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=PolygonConnect|ENABLED=TRUE|PRIORITY=2|COMMENT= |UNIQUEID=UUPUHHWW|DEFINEDBYLOGICALDOCUMENT=FALSE|CONNECTSTYLE=Relief|RELIEFCONDUCTORWIDTH=10mil|RELIEFENTRIES=4|POLYGONRELIEFANGLE=90 Angle|AIRGAPWIDTH=10mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=ComponentClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=ComponentClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=RHGRIRCX|DEFINEDBYLOGICALDOCUMENT=FALSE|GAP=10mil|COLLISIONCHECKMODE=3|VERTICALGAP=10mil|SHOWDISTANCES=FALSE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=HoleSize|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=HoleSize|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=LFAOOLYR|DEFINEDBYLOGICALDOCUMENT=FALSE|ABSOLUTEVALUES=TRUE|MAXLIMIT=100mil|MINLIMIT=1mil|MAXPERCENT=80.000|MINPERCENT=20.000¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FabricationTestpoint|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=FabricationTestpoint|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=UOPFEJGR|DEFINEDBYLOGICALDOCUMENT=FALSE|SIDE=3|TESTPOINTUNDERCOMPONENT=TRUE|MINSIZE=40mil|MAXSIZE=100mil|PREFEREDSIZE=60mil|MINHOLESIZE=0mil|MAXHOLESIZE=40mil|PREFEREDHOLESIZE=32mil|TESTPOINTGRID=1mil|ALLOWSIDETOP=TRUE|ALLOWSIDEBOTTOM=TRUE|USEGRID=TRUE|GRIDTOLERANCE=0.01mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FabricationTestPointUsage|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=FabricationTestPointUsage|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=BTRTHSXL|DEFINEDBYLOGICALDOCUMENT=FALSE|VALID=0|ALLOWMULTIPLE=FALSE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=LayerPairs|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=LayerPairs|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=ANCLPJJN|DEFINEDBYLOGICALDOCUMENT=FALSE|ENFORCE=TRUE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsBGA|SCOPE2EXPRESSION=All|NAME=Fanout_BGA|ENABLED=TRUE|PRIORITY=1|COMMENT=Fanout_BGA (Default Rule)|UNIQUEID=EWIMMDHR|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=Alternating|VIAGRID=1mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsLCC|SCOPE2EXPRESSION=All|NAME=Fanout_LCC|ENABLED=TRUE|PRIORITY=2|COMMENT=Fanout_LCC (Default Rule)|UNIQUEID=PGGWUJHD|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=Alternating|VIAGRID=1mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsSOIC|SCOPE2EXPRESSION=All|NAME=Fanout_SOIC|ENABLED=TRUE|PRIORITY=3|COMMENT=Fanout_SOIC (Default Rule)|UNIQUEID=WTVRDXTM|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=Alternating|VIAGRID=1mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=(CompPinCount < 5)|SCOPE2EXPRESSION=All|NAME=Fanout_Small|ENABLED=TRUE|PRIORITY=4|COMMENT=Fanout_Small (Default Rule)|UNIQUEID=NMVPNRXT|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=OutThenIn|VIAGRID=1mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=Fanout_Default|ENABLED=TRUE|PRIORITY=5|COMMENT=Fanout_Default (Default Rule)|UNIQUEID=GELNJKSC|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=Alternating|VIAGRID=1mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=Height|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=Height|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=BCHIAKRY|DEFINEDBYLOGICALDOCUMENT=FALSE|MINHEIGHT=0mil|MAXHEIGHT=1000mil|PREFHEIGHT=500mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=DiffPairsRouting|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=DiffPairsRouting|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=NFYIMYKF|DEFINEDBYLOGICALDOCUMENT=FALSE|MAXLIMIT=10mil|MINLIMIT=10mil|MOSTFREQGAP=10mil|TOPLAYER_MINWIDTH=15mil|TOPLAYER_MAXWIDTH=15mil|TOPLAYER_PREFWIDTH=15mil|MIDLAYER1_MINWIDTH=15mil|MIDLAYER1_MAXWIDTH=15mil|MIDLAYER1_PREFWIDTH=15mil|MIDLAYER2_MINWIDTH=15mil|MIDLAYER2_MAXWIDTH=15mil|MIDLAYER2_PREFWIDTH=15mil|MIDLAYER3_MINWIDTH=15mil|MIDLAYER3_MAXWIDTH=15mil|MIDLAYER3_PREFWIDTH=15mil|MIDLAYER4_MINWIDTH=15mil|MIDLAYER4_MAXWIDTH=15mil|MIDLAYER4_PREFWIDTH=15mil|MIDLAYER5_MINWIDTH=15mil|MIDLAYER5_MAXWIDTH=15mil|MIDLAYER5_PREFWIDTH=15mil|MIDLAYER6_MINWIDTH=15mil|MIDLAYER6_MAXWIDTH=15mil|MIDLAYER6_PREFWIDTH=15mil|MIDLAYER7_MINWIDTH=15mil|MIDLAYER7_MAXWIDTH=15mil|MIDLAYER7_PREFWIDTH=15mil|MIDLAYER8_MINWIDTH=15mil|MIDLAYER8_MAXWIDTH=15mil|MIDLAYER8_PREFWIDTH=15mil|MIDLAYER9_MINWIDTH=15mil|MIDLAYER9_MAXWIDTH=15mil|MIDLAYER9_PREFWIDTH=15mil|MIDLAYER10_MINWIDTH=15mil|MIDLAYER10_MAXWIDTH=15mil|MIDLAYER10_PREFWIDTH=15mil|MIDLAYER11_MINWIDTH=15mil|MIDLAYER11_MAXWIDTH=15mil|MIDLAYER11_PREFWIDTH=15mil|MIDLAYER12_MINWIDTH=15mil|MIDLAYER12_MAXWIDTH=15mil|MIDLAYER12_PREFWIDTH=15mil|MIDLAYER13_MINWIDTH=15mil|MIDLAYER13_MAXWIDTH=15mil|MIDLAYER13_PREFWIDTH=15mil|MIDLAYER14_MINWIDTH=15mil|MIDLAYER14_MAXWIDTH=15mil|MIDLAYER14_PREFWIDTH=15mil|MIDLAYER15_MINWIDTH=15mil|MIDLAYER15_MAXWIDTH=15mil|MIDLAYER15_PREFWIDTH=15mil|MIDLAYER16_MINWIDTH=15mil|MIDLAYER16_MAXWIDTH=15mil|MIDLAYER16_PREFWIDTH=15mil|MIDLAYER17_MINWIDTH=15mil|MIDLAYER17_MAXWIDTH=15mil|MIDLAYER17_PREFWIDTH=15mil|MIDLAYER18_MINWIDTH=15mil|MIDLAYER18_MAXWIDTH=15mil|MIDLAYER18_PREFWIDTH=15mil|MIDLAYER19_MINWIDTH=15mil|MIDLAYER19_MAXWIDTH=15mil|MIDLAYER19_PREFWIDTH=15mil|MIDLAYER20_MINWIDTH=15mil|MIDLAYER20_MAXWIDTH=15mil|MIDLAYER20_PREFWIDTH=15mil|MIDLAYER21_MINWIDTH=15mil|MIDLAYER21_MAXWIDTH=15mil|MIDLAYER21_PREFWIDTH=15mil|MIDLAYER22_MINWIDTH=15mil|MIDLAYER22_MAXWIDTH=15mil|MIDLAYER22_PREFWIDTH=15mil|MIDLAYER23_MINWIDTH=15mil|MIDLAYER23_MAXWIDTH=15mil|MIDLAYER23_PREFWIDTH=15mil|MIDLAYER24_MINWIDTH=15mil|MIDLAYER24_MAXWIDTH=15mil|MIDLAYER24_PREFWIDTH=15mil|MIDLAYER25_MINWIDTH=15mil|MIDLAYER25_MAXWIDTH=15mil|MIDLAYER25_PREFWIDTH=15mil|MIDLAYER26_MINWIDTH=15mil|MIDLAYER26_MAXWIDTH=15mil|MIDLAYER26_PREFWIDTH=15mil|MIDLAYER27_MINWIDTH=15mil|MIDLAYER27_MAXWIDTH=15mil|MIDLAYER27_PREFWIDTH=15mil|MIDLAYER28_MINWIDTH=15mil|MIDLAYER28_MAXWIDTH=15mil|MIDLAYER28_PREFWIDTH=15mil|MIDLAYER29_MINWIDTH=15mil|MIDLAYER29_MAXWIDTH=15mil|MIDLAYER29_PREFWIDTH=15mil|MIDLAYER30_MINWIDTH=15mil|MIDLAYER30_MAXWIDTH=15mil|MIDLAYER30_PREFWIDTH=15mil|BOTTOMLAYER_MINWIDTH=15mil|BOTTOMLAYER_MAXWIDTH=15mil|BOTTOMLAYER_PREFWIDTH=15mil|MAXUNCOUPLEDLENGTH=500mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=HoleToHoleClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=HoleToHoleClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=QACBKLFM|DEFINEDBYLOGICALDOCUMENT=FALSE|GAP=10mil|ALLOWSTACKEDMICROVIAS=TRUE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=MinimumSolderMaskSliver|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=MinimumSolderMaskSliver|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=BTYGJFHO|DEFINEDBYLOGICALDOCUMENT=FALSE|MINSOLDERMASKWIDTH=10mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=SilkToSolderMaskClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsPad|SCOPE2EXPRESSION=All|NAME=SilkToSolderMaskClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=LYRNVRPC|DEFINEDBYLOGICALDOCUMENT=FALSE|MINSILKSCREENTOMASKGAP=10mil|CLEARANCETOEXPOSEDCOPPER=TRUE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=SilkToSilkClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=SilkToSilkClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=HEOBIINN|DEFINEDBYLOGICALDOCUMENT=FALSE|SILKTOSILKCLEARANCE=10mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=NetAntennae|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=NetAntennae|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=FQBRTGGY|DEFINEDBYLOGICALDOCUMENT=FALSE|NETANTENNAETOLERANCE=0mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=AssemblyTestpoint|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=AssemblyTestpoint|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=BFRPUGEJ|DEFINEDBYLOGICALDOCUMENT=FALSE|TESTPOINTUNDERCOMPONENT=TRUE|MINSIZE=40mil|MAXSIZE=100mil|PREFEREDSIZE=60mil|MINHOLESIZE=0mil|MAXHOLESIZE=40mil|PREFEREDHOLESIZE=32mil|TESTPOINTGRID=1mil|USEGRID=TRUE|GRIDTOLERANCE=0.01mil|ALLOWSIDETOP=TRUE|ALLOWSIDEBOTTOM=TRUE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=AssemblyTestPointUsage|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=AssemblyTestPointUsage|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=DNQNNAOU|DEFINEDBYLOGICALDOCUMENT=FALSE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=UnpouredPolygon|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=UnpouredPolygon|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=IVELWTCG|DEFINEDBYLOGICALDOCUMENT=FALSE¶

@ -0,0 +1,13 @@
GEX F072 hub prototype board, rev.2
============================
This revision fixes some issues with the first version.
- Connectors now all have both 3V3 and 5V
- BOOT jumper was moved to the A connector and inverted, so putting on a jumper to short it with 3V3 enables bootloader
- Added the NRST pin to the A connector
- Removed the debug connector footprint (was wrong before anyway, and all pins are in the connectors now)
- Added a position for a reset button on the backside
- Added some useful info to the backside silk layer
This revision should be compatible with the previous HUB firmware without any changes.

@ -0,0 +1,13 @@
GEX Radio Dongle
================
This board is a GEX accessory. It conencts to GEX Zero (or other GEXes with the NRF module)
and provides UART-like connection using a USB virtual comport.
The board is fitted with a USB type A connector, a reset button and a debug header.
A NRF24L01+ is soldered onto the PCb and the flat antenna sticks outside the board for better transmission.
There are no GPIOs broken out due to the limited board size, other than those used for the radio module. This, however,
includes full SPI and 3 other GPIOs, which could be used for other applications if the NRF module is not installed.
This board uses STM32F103C8T6 (same like Bluepill), so the firmware should be bluepill compatible.

File diff suppressed because it is too large Load Diff

@ -0,0 +1 @@
Record=TopLevelDocument|FileName=GEX_Radio.SchDoc

@ -0,0 +1,56 @@
GEX Zero
========
This form factor is designed to be mechanically compatible with the
Raspberry Pi Zero (W). This makes it possible to use PHATs and cases for the Pi Zero.
Pins are mapped to the 20x2 header to maximize compatibility with PHATS.
Functions like UART, SPI and I2C should all be available.
![render](gzrender.png)
![top](gztop.png)
![bot](gzb.png)
## Pin mapping
### Main header
```none
3V3 1 | 2 5V
PB7 3 | 4 5V
PB6 5 | 6 GND
PA8 7 | 8 PB10
GND 9 | 10 PB11
PB1 11 | 12 PB8
PA10 13 | 14 GND
PB9 15 | 16 PA0
3V3 17 | 18 PA1
PB5 19 | 20 GND
PB4 21 | 22 PA2
PB3 23 | 24 PA3
GND 25 | 26 PA4
PB2 27 | 28 PA5
PC10 29 | 30 GND
PC11 31 | 32 PA7
PB0 33 | 34 GND
PB15 35 | 36 PA6
PB12 37 | 38 PB14
GND 39 | 40 PB13
```
### Small header
GND, Debug TX (PA9), PA13, PA14 (SWD)
## Radio interface
This board has a position for NRF24L01+.
The radio module uses one of the SPI ports as alternate functions on some otherwise unused PC pins.
PB12 and PB14 can only be used as regular GPIO when the radio link is enabled, not SPI. PB13 must be
left unconnected, as there is no available remap for the clock line.
The radio module is used for remote control with the GEX Dongle and provides a fast, half duplex connection.

Binary file not shown.

After

Width:  |  Height:  |  Size: 645 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 222 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 664 KiB

File diff suppressed because it is too large Load Diff

@ -0,0 +1 @@
Record=TopLevelDocument|FileName=GEX_Zero.SchDoc

@ -1,22 +0,0 @@
GEX F072 hub prototype board
============================
This board was the first custom PCB for GEX.
To flash a firmware, remove JP1, reset and flash using DFU. Replace JP1 and reset for normal operation.
Press and hold S1 to enable USB VFS with config files. Same process for locking and persisting to Flash.
Settings (but not system settings) can also be changed via the USB API.
![photo](photo.jpg)
Errata
------
*which is an euphemnism for bugs*
- JP1 - bad footprint, too fine pitch. Can be fixed by soldering the header on the bottom, with slightly bent pins
- P1 - the SWD connector, same problem, no fix needed or available. Use DFU for flashing
- Missign NRESET button. Normally not needed, but often missed. You can solder it on the bottom side from one end of R2 to the GND testpoint.
![photo](bugfixes.jpg)

@ -0,0 +1,8 @@
This is a panelized PCB including
- 2x GEX Hub
- 3x GEX Zero
- 3x GEX Radio Dongle
![img](panel.png)

Binary file not shown.

After

Width:  |  Height:  |  Size: 281 KiB

Loading…
Cancel
Save