Compare commits
| Author | SHA1 | Date | |
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4a041485fb
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af70cd7488
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@@ -84,4 +84,3 @@ cmake-build-*
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/main.flash.map
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/disassembly.lst
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/main.ram.map
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build/*
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+1
-1
@@ -1,3 +1,3 @@
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[submodule "User"]
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path = User
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url = git@github.com:gexpander/gex-core
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url = git@github.com:MightyPork/gex-core
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+1
-1
@@ -18,7 +18,7 @@ add_definitions(
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-DVERBOSE_HARDFAULT=1
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-DUSE_STACK_MONITOR=1
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-DUSE_DEBUG_UART=1
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-DGEX_PLAT_F072_ZERO
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-DGEX_PLAT_F072_DISCOVERY
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-DHAL_TSC_MODULE_ENABLED
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)
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@@ -70,12 +70,24 @@
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*/
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/* Includes ------------------------------------------------------------------*/
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#include <utils/hexdump.h>
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#include "stm32f0xx_hal.h"
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#include "stdbool.h"
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/** @addtogroup STM32F0xx_HAL_Driver
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* @{
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*/
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static inline void dbgShowTog(PCD_HandleTypeDef *hpcd, bool strobe)
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{
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PCD_EPTypeDef *ep = &hpcd->IN_ep[2];
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uint32_t v = (GPIOB->ODR & ~0b111);
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if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num)& USB_EP_DTOG_TX) == USB_EP_DTOG_TX) v |= 1;
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if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num)& USB_EP_DTOG_RX) == USB_EP_DTOG_RX) v |= 2;
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GPIOB->ODR = v;
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}
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#ifdef HAL_PCD_MODULE_ENABLED
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#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB)|| defined(STM32F070x6)
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@@ -738,12 +750,16 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint
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/* Clear the data toggle bits for the endpoint IN/OUT*/
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PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num)
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PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num)
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PCD_RX_DTOG(hpcd->Instance, ep->num);
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/* Configure DISABLE status for the Endpoint*/
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PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_DIS)
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PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_DIS)
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}
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}
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}
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dbgShowTog(hpcd, false);
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__HAL_UNLOCK(hpcd);
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return ret;
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@@ -903,12 +919,12 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
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ep->xfer_count = 0U;
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ep->is_in = 1U;
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ep->num = ep_addr & 0x7FU;
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/*Multi packet transfer*/
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if (ep->xfer_len > ep->maxpacket)
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{
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len=ep->maxpacket;
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ep->xfer_len-=len;
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ep->xfer_len-=len;
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}
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else
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{
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@@ -925,23 +941,25 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
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else
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{
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/*Write the data to the USB endpoint*/
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if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num)& USB_EP_DTOG_TX) == USB_EP_DTOG_TX)
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if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num)& USB_EP_DTOG_RX) == USB_EP_DTOG_RX)
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{
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/*Set the Double buffer counter for pmabuffer1*/
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PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len)
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pmabuffer = ep->pmaaddr1;
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/*Set the Double buffer counter for pmabuffer0*/
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PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len)
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pmabuffer = ep->pmaaddr0;
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}
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else
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{
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/*Set the Double buffer counter for pmabuffer0*/
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PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len)
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pmabuffer = ep->pmaaddr0;
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/*Set the Double buffer counter for pmabuffer1*/
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PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len)
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pmabuffer = ep->pmaaddr1;
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}
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PCD_WritePMA(hpcd->Instance, ep->xfer_buff, pmabuffer, len);
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PCD_WritePMA(hpcd->Instance, ep->xfer_buff, pmabuffer, (uint16_t) len);
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PCD_FreeUserBuffer(hpcd->Instance, ep->num, ep->is_in)
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}
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dbgShowTog(hpcd, false);
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PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID)
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return HAL_OK;
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@@ -1121,8 +1139,6 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd)
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* @}
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*/
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#pragma GCC push_options //GEX addition
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#pragma GCC optimize ("O2")
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/** @addtogroup PCD_Private_Functions
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* @{
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*/
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@@ -1181,7 +1197,6 @@ void PCD_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, ui
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*pbUsrBuf++ = ((temp >> 0) & 0xFF);
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}
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}
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#pragma GCC pop_options //GEX addition
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/**
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* @brief This function handles PCD Endpoint interrupt request.
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@@ -1195,10 +1210,14 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
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uint8_t EPindex;
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__IO uint16_t wIstr;
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__IO uint16_t wEPVal = 0U;
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GPIOB->ODR |= 4;
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for(volatile i=0;i<20;i++);
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GPIOB->ODR &= ~4;
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/* stay in loop while pending interrupts */
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while (((wIstr = hpcd->Instance->ISTR) & USB_ISTR_CTR) != 0U)
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{
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/* extract highest priority endpoint number */
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EPindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
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@@ -1338,15 +1357,19 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
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/* clear int flag */
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PCD_CLEAR_TX_EP_CTR(hpcd->Instance, EPindex);
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/* IN double Buffering*/
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// This function is full of strange code that causes the double buffered mode to not work
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#define WANT_HAL_BUGS 0
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#if WANT_HAL_BUGS
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/* IN double Buffering*/
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if (ep->doublebuffer == 0U)
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{
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ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
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// if (ep->xfer_count != 0)
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// {
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// PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, ep->xfer_count); // GEX FIX
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// }
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if (ep->xfer_count != 0)
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{
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PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, ep->xfer_count);
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}
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}
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else
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{
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@@ -1368,13 +1391,50 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
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PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, ep->xfer_count);
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}
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}
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PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_IN)
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PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_IN)
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}
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/*multi-packet on the NON control IN endpoint*/
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// ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); // GEX FIX
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ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
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#else
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uint8_t tmpbuf[64];
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/* IN double Buffering*/
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if (ep->doublebuffer == 0U)
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{
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ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
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}
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else
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{
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// NOTE: DTOG is inverted by the device at the end of a transaction
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if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num)& USB_EP_DTOG_TX) == USB_EP_DTOG_TX)
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{
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/*read from endpoint BUF0Addr buffer*/
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ep->xfer_count = PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
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// PCD_ReadPMA(hpcd->Instance, tmpbuf, ep->pmaaddr0, ep->xfer_count);
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// hexDump("buf0", tmpbuf, ep->xfer_count);
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}
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else
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{
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/*read from endpoint BUF1Addr buffer*/
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ep->xfer_count = PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
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// PCD_ReadPMA(hpcd->Instance, tmpbuf, ep->pmaaddr1, ep->xfer_count);
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// hexDump("buf1", tmpbuf, ep->xfer_count);
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}
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}
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#endif
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// dbg("ISR: ep %02x Xferd %db, remain %d", ep->num, ep->xfer_count, ep->xfer_len);
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ep->xfer_buff+=ep->xfer_count;
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/* Zero Length Packet? */
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if(ep->num==2) dbgShowTog(hpcd, true);
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/* Zero Length Packet? <- what? */
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if (ep->xfer_len == 0U)
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{
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/* TX COMPLETE */
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@@ -1382,6 +1442,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
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}
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else
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{
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trap("multipart!");
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HAL_PCD_EP_Transmit(hpcd, ep->num, ep->xfer_buff, ep->xfer_len);
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}
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}
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@@ -43,7 +43,7 @@
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#include "main.h"
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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#define USBD_NUM_ENDPOINTS 3
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#define USBD_NUM_ENDPOINTS 4
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/* ########################## Module Selection ############################## */
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/**
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@@ -10,28 +10,11 @@
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# 2015-07-22 - first version
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# ------------------------------------------------
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UNIT_NPX = 1
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UNIT_TEST = 1
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UNIT_DO = 1
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UNIT_DI = 1
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UNIT_USART = 1
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UNIT_1WIRE = 1
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UNIT_I2C = 1
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UNIT_SPI = 1
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UNIT_ADC = 1
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UNIT_SIPO = 1
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UNIT_FCAP = 1
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UNIT_TOUCH = 1
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UNIT_PWMDIM = 1
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UNIT_DAC = 1
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DISABLE_DEBUG := 0
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DISABLE_MSC := 0
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CDC_LOOPBACK_TEST := 0
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include User/gex.mk
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#GEX_PLAT=F072_ZERO
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#GEX_PLAT=F072_HUB
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GEX_PLAT=F072_DISCOVERY
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######################################
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@@ -129,7 +112,7 @@ Src/main.c
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#Src/stm32f0xx_hal_timebase_TIM.c \
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#Src/stm32f0xx_it.c \
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C_SOURCES += $(foreach x,$(GEX_SRC_DIR),$(wildcard $(x)/*.c)) $(GEX_SOURCES)
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C_SOURCES += $(foreach sdir,$(GEX_SRC_DIR),$(wildcard $(sdir)/*.c)) $(GEX_SOURCES)
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# ASM sources
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ASM_SOURCES = \
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@@ -259,14 +242,6 @@ flash: $(BUILD_DIR)/$(TARGET).bin
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@printf " FLASH $<\n"
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@st-flash write $< 0x8000000
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$(BUILD_DIR)/$(TARGET).dfu: $(BUILD_DIR)/$(TARGET).hex
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@printf " DFU-GEN $<\n"
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dfu-convert -i $< $@
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dfu: $(BUILD_DIR)/$(TARGET).dfu
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@printf " DFU UPLOAD $<\n"
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dfu-util -a 0 -D $<
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patch:
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@./cubepatch.sh
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+13
-40
@@ -47,10 +47,10 @@
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*/
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/* Includes ------------------------------------------------------------------*/
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#include <stm32f0xx_ll_gpio.h>
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#include "main.h"
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#include "stm32f0xx_hal.h"
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#include "cmsis_os.h"
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#include <stdbool.h>
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/* USER CODE BEGIN Includes */
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#include "gex_hooks.h"
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@@ -150,50 +150,23 @@ void SystemClock_Config(void)
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_Error_Handler(__FILE__, __LINE__);
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}
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#else
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volatile uint32_t counter;
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/* Set FLASH latency */
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
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#if !PLAT_FULL_XTAL
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LL_RCC_HSE_EnableBypass();
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#endif
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LL_RCC_HSE_Enable();
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counter = 0;
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while(LL_RCC_HSE_IsReady() != 1 && counter < 10000) {
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counter++;
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}
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while(LL_RCC_HSE_IsReady() != 1) {}
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bool has_pll = 0;
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if (LL_RCC_HSE_IsReady() == 0) {
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/* Main PLL configuration and activation */
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LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLL_MUL_6, LL_RCC_PREDIV_DIV_1);
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// Looks like HSE xtal doesn't work - use HSI48
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LL_RCC_HSI48_Enable();
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while(LL_RCC_HSI48_IsReady() != 1) {}
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LL_RCC_PLL_Enable();
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while(LL_RCC_PLL_IsReady() != 1) {}
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LL_CRS_EnableAutoTrimming(); // crystalless USB
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI48);
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI48) {}
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} else {
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// external 8 MHz xtal
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/* Main PLL configuration and activation */
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LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLL_MUL_6, LL_RCC_PREDIV_DIV_1);
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LL_RCC_PLL_Enable();
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while(LL_RCC_PLL_IsReady() != 1) {}
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/* Sysclk activation on the main PLL */
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {}
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has_pll = true;
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}
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/* Sysclk activation on the main PLL */
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {}
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/* Set APB1 prescaler */
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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@@ -202,12 +175,12 @@ void SystemClock_Config(void)
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LL_SetSystemCoreClock(48000000);
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#endif
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// TODO this can be rewritten using LL while greatly reducing code size
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/**Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1;
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RCC_ClkInitStruct.SYSCLKSource = has_pll ? RCC_SYSCLKSOURCE_PLLCLK : RCC_SYSCLKSOURCE_HSI48;
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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+1
-1
Submodule User updated: 482a67c5d2...c4efa5ddaa
Reference in New Issue
Block a user