upd 1.0.0

.gitignore

@@ -84,3 +84,4 @@ cmake-build-*
 /main.flash.map
 /disassembly.lst
 /main.ram.map
+build/*

.gitmodules

@@ -1,3 +1,3 @@
 [submodule "User"]
 	path = User
-	url = git@github.com:MightyPork/gex-core
+	url = git@github.com:gexpander/gex-core

CMakeLists.txt

@@ -18,7 +18,8 @@ add_definitions(
         -DVERBOSE_HARDFAULT=1
         -DUSE_STACK_MONITOR=1
         -DUSE_DEBUG_UART=1
-        -DGEX_PLAT_F072_DISCOVERY
+        -DGEX_PLAT_F072_ZERO
+        -DHAL_TSC_MODULE_ENABLED
 )
 
 FILE(GLOB_RECURSE SOURCE_FILES

Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c

@@ -1121,6 +1121,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd)
   * @}
   */
 
+#pragma GCC push_options //GEX addition
+#pragma GCC optimize ("O2")
 /** @addtogroup PCD_Private_Functions
   * @{
   */
@@ -1179,6 +1181,7 @@ void PCD_ReadPMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, ui
     *pbUsrBuf++ = ((temp >> 0) & 0xFF);
   }
 }
+#pragma GCC pop_options //GEX addition
 
 /**
   * @brief  This function handles PCD Endpoint interrupt request.
@@ -1340,10 +1343,10 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
         if (ep->doublebuffer == 0U)
         {
           ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
-          if (ep->xfer_count != 0)
+//          if (ep->xfer_count != 0)
-          {
+//          {
-            PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, ep->xfer_count);
+//            PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, ep->xfer_count); // GEX FIX
-          }
+//          }
         }
         else
         {
@@ -1368,7 +1371,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
           PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_IN) 
         }
         /*multi-packet on the NON control IN endpoint*/
-        ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
+//        ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); // GEX FIX
         ep->xfer_buff+=ep->xfer_count;
        
         /* Zero Length Packet? */

Makefile

@@ -10,11 +10,28 @@
 #   2015-07-22 - first version
 # ------------------------------------------------
 
+UNIT_NPX = 1
+UNIT_TEST = 1
+UNIT_DO = 1
+UNIT_DI = 1
+UNIT_USART = 1
+UNIT_1WIRE = 1
+UNIT_I2C = 1
+UNIT_SPI = 1
+UNIT_ADC = 1
+UNIT_SIPO = 1
+UNIT_FCAP = 1
+UNIT_TOUCH = 1
+UNIT_PWMDIM = 1
+UNIT_DAC = 1
+
 DISABLE_DEBUG := 0
 DISABLE_MSC   := 0
 CDC_LOOPBACK_TEST := 0
 
 include User/gex.mk
+#GEX_PLAT=F072_ZERO
+#GEX_PLAT=F072_HUB
 GEX_PLAT=F072_DISCOVERY
 
 ######################################
@@ -35,6 +52,7 @@ OPT = -Os
 #######################################
 # paths
 #######################################
+#Application/User/Src/stm32f0xx_hal_timebase_TIM.c \
 # source path
 SOURCES_DIR =  \
 Application \
@@ -45,7 +63,6 @@ Application/User/Src/freertos.c \
 Application/User/Src/gpio.c \
 Application/User/Src/main.c \
 Application/User/Src/stm32f0xx_hal_msp.c \
-Application/User/Src/stm32f0xx_hal_timebase_TIM.c \
 Application/User/Src/stm32f0xx_it.c \
 Application/User/Src/usb.c \
 Drivers \
@@ -107,12 +124,12 @@ Middlewares/Third_Party/FreeRTOS/Source/tasks.c \
 Middlewares/Third_Party/FreeRTOS/Source/timers.c \
 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c \
 Src/stm32f0xx_hal_msp.c \
-Src/stm32f0xx_hal_timebase_TIM.c \
-Src/stm32f0xx_it.c \
 Src/system_stm32f0xx.c \
 Src/main.c
+#Src/stm32f0xx_hal_timebase_TIM.c \
+#Src/stm32f0xx_it.c \
 
-C_SOURCES += $(foreach sdir,$(GEX_SRC_DIR),$(wildcard $(sdir)/*.c)) $(GEX_SOURCES)
+C_SOURCES += $(foreach x,$(GEX_SRC_DIR),$(wildcard $(x)/*.c)) $(GEX_SOURCES)
 
 # ASM sources
 ASM_SOURCES =  \
@@ -242,6 +259,14 @@ flash: $(BUILD_DIR)/$(TARGET).bin
 	@printf "  FLASH  $<\n"
 	@st-flash write $< 0x8000000
 
+$(BUILD_DIR)/$(TARGET).dfu: $(BUILD_DIR)/$(TARGET).hex
+	@printf "  DFU-GEN  $<\n"
+	dfu-convert -i $< $@
+
+dfu: $(BUILD_DIR)/$(TARGET).dfu
+	@printf "  DFU UPLOAD  $<\n"
+	dfu-util -a 0 -D $<
+
 patch:
 	@./cubepatch.sh
 

Src/main.c

@@ -47,10 +47,10 @@
   */
 
 /* Includes ------------------------------------------------------------------*/
-#include <stm32f0xx_ll_gpio.h>
 #include "main.h"
 #include "stm32f0xx_hal.h"
 #include "cmsis_os.h"
+#include <stdbool.h>
 
 /* USER CODE BEGIN Includes */
 #include "gex_hooks.h"
@@ -135,6 +135,7 @@ void SystemClock_Config(void)
   RCC_ClkInitTypeDef RCC_ClkInitStruct;
   RCC_PeriphCLKInitTypeDef PeriphClkInit;
 
+#if 0
     /**Initializes the CPU, AHB and APB busses clocks 
     */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
@@ -148,12 +149,65 @@ void SystemClock_Config(void)
   {
     _Error_Handler(__FILE__, __LINE__);
   }
+#else
+  volatile uint32_t counter;
+
+  /* Set FLASH latency */
+  LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
+
+#if !PLAT_FULL_XTAL
+  LL_RCC_HSE_EnableBypass();
+#endif
+
+  LL_RCC_HSE_Enable();
+  counter = 0;
+  while(LL_RCC_HSE_IsReady() != 1 && counter < 10000) {
+    counter++;
+  }
+
+  bool has_pll = 0;
+  if (LL_RCC_HSE_IsReady() == 0) {
+
+    // Looks like HSE xtal doesn't work - use HSI48
+    LL_RCC_HSI48_Enable();
+    while(LL_RCC_HSI48_IsReady() != 1) {}
+
+    LL_CRS_EnableAutoTrimming(); // crystalless USB
+
+    LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+    LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI48);
+    while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI48) {}
+
+  } else {
+    // external 8 MHz xtal
+
+    /* Main PLL configuration and activation */
+    LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLL_MUL_6, LL_RCC_PREDIV_DIV_1);
+
+    LL_RCC_PLL_Enable();
+    while(LL_RCC_PLL_IsReady() != 1) {}
+
+    /* Sysclk activation on the main PLL */
+    LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+    LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
+    while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {}
+
+      has_pll = true;
+  }
+
+  /* Set APB1 prescaler */
+  LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
+
+  /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
+  LL_SetSystemCoreClock(48000000);
+#endif
+
+  // TODO this can be rewritten using LL while greatly reducing code size
 
     /**Initializes the CPU, AHB and APB busses clocks 
     */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1;
-                              |RCC_CLOCKTYPE_PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource = has_pll ? RCC_SYSCLKSOURCE_PLLCLK : RCC_SYSCLKSOURCE_HSI48;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;