7 Commits

Include renames

Author	SHA1	Message	Date
MightyPork	2881c2ff2a	almost finished DMA reception	2018-01-14 21:44:11 +01:00
MightyPork	e2e4d91cf3	Added func for simple periph clock toggling without the horrible if jungle	2018-01-14 12:49:09 +01:00
MightyPork	ace2bd6357	switch to freeRtos malloc + improve malloc_safe utils, fixed memleak	2018-01-14 00:04:53 +01:00
MightyPork	d49081b190	basic work on uart	2018-01-13 19:49:12 +01:00
MightyPork	8852f9f8b4	enable all periph clocks by default on startup, added testing synchronous uart write command	2018-01-13 12:30:17 +01:00
MightyPork	29264540f7	added uart init (untested) and more config option	2018-01-13 01:37:14 +01:00
MightyPork	e88bf84ea1	basic usart skeleton	2018-01-12 12:03:46 +01:00