implemented timebase using TIM14 instead of TIM1

sipo
Ondřej Hruška 7 years ago
parent 1159fef33b
commit 94e87c74d3
Signed by: MightyPork
GPG Key ID: 2C5FD5035250423D
  1. 8
      USB/usbd_conf.c
  2. 8
      USB/usbd_conf.h
  3. 23
      cortex_handlers.c
  4. 3
      platform/irq_dispatcher.c
  5. 3
      platform/plat_init.c
  6. 98
      platform/timebase.c
  7. 22
      platform/timebase.h
  8. 15
      units/digital_in/unit_din.c

@ -629,10 +629,10 @@ void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg)
* @param Delay: Delay in ms * @param Delay: Delay in ms
* @retval None * @retval None
*/ */
void USBD_LL_Delay (uint32_t Delay) //void USBD_LL_Delay (uint32_t Delay)
{ //{
HAL_Delay(Delay); // HAL_Delay(Delay);
} //}
/** /**
* @brief static single allocation. * @brief static single allocation.

@ -109,10 +109,10 @@
/* Memory management macros */ /* Memory management macros */
#define USBD_malloc (uint32_t *)USBD_static_malloc #define USBD_malloc (uint32_t *)USBD_static_malloc
#define USBD_free USBD_static_free #define USBD_free USBD_static_free
#define USBD_memset /* Not used */ //#define USBD_memset /* Not used */
#define USBD_memcpy /* Not used */ //#define USBD_memcpy /* Not used */
//
#define USBD_Delay HAL_Delay //#define USBD_Delay HAL_Delay
/* For footprint reasons and since only one allocation is handled in the HID class /* For footprint reasons and since only one allocation is handled in the HID class
driver, the malloc/free is changed into a static allocation method */ driver, the malloc/free is changed into a static allocation method */

@ -3,28 +3,20 @@
// (moved from the top level project for easier maintenance) // (moved from the top level project for easier maintenance)
// //
/* Includes ------------------------------------------------------------------*/
#include "platform.h" #include "platform.h"
#include <TinyFrame.h> #include <TinyFrame.h>
#include "platform/debug_uart.h" #include "platform/debug_uart.h"
#include "platform/status_led.h" #include "platform/status_led.h"
#include "utils/stacksmon.h" #include "utils/stacksmon.h"
#include "gex_hooks.h"
/* External variables --------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Interruption and Exception Handlers */
/******************************************************************************/
/******************************************************************************/ void SysTick_Handler(void)
/* STM32F1xx Peripheral Interrupt Handlers */ {
/* Add here the Interrupt Handlers for the used peripherals. */ GEX_MsTick();
/* For the available peripheral interrupt handler names, */ osSystickHandler();
/* please refer to the startup file (startup_stm32f1xx.s). */ }
/******************************************************************************/
/* USER CODE BEGIN 1 */
#define tFAULT "\r\n\033[31mSYSTEM FAULT:\033[m" #define tFAULT "\r\n\033[31mSYSTEM FAULT:\033[m"
@ -236,6 +228,3 @@ caddr_t _sbrk(int incr) {
return (caddr_t) prev_heap_end; return (caddr_t) prev_heap_end;
} }
#endif #endif
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

@ -84,11 +84,12 @@ void irqd_init(void)
HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 3, 0); HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 3, 0);
HAL_NVIC_SetPriority(DMA1_Channel4_5_6_7_IRQn, 3, 0); HAL_NVIC_SetPriority(DMA1_Channel4_5_6_7_IRQn, 3, 0);
// NVIC_EnableIRQ(ADC1_COMP_IRQn); /*!< ADC1 and COMP interrupts (ADC interrupt combined with EXTI Lines 21 and 22 */ // NVIC_EnableIRQ(ADC1_COMP_IRQn); /*!< ADC1 and COMP interrupts (ADC interrupt combined with EXTI Lines 21 and 22 */
// NVIC_EnableIRQ(TIM1_IRQn); /*!< TIM1 global Interrupt */
// NVIC_EnableIRQ(TIM2_IRQn); /*!< TIM2 global Interrupt */ // NVIC_EnableIRQ(TIM2_IRQn); /*!< TIM2 global Interrupt */
// NVIC_EnableIRQ(TIM3_IRQn); /*!< TIM3 global Interrupt */ // NVIC_EnableIRQ(TIM3_IRQn); /*!< TIM3 global Interrupt */
// NVIC_EnableIRQ(TIM6_DAC_IRQn); /*!< TIM6 global and DAC channel underrun error Interrupt */ // NVIC_EnableIRQ(TIM6_DAC_IRQn); /*!< TIM6 global and DAC channel underrun error Interrupt */
// NVIC_EnableIRQ(TIM7_IRQn); /*!< TIM7 global Interrupt */ // NVIC_EnableIRQ(TIM7_IRQn); /*!< TIM7 global Interrupt */
// NVIC_EnableIRQ(TIM14_IRQn); /*!< TIM14 global Interrupt */ // --used internally-- NVIC_EnableIRQ(TIM14_IRQn); /*!< TIM14 global Interrupt */
// NVIC_EnableIRQ(TIM15_IRQn); /*!< TIM15 global Interrupt */ // NVIC_EnableIRQ(TIM15_IRQn); /*!< TIM15 global Interrupt */
// NVIC_EnableIRQ(TIM16_IRQn); /*!< TIM16 global Interrupt */ // NVIC_EnableIRQ(TIM16_IRQn); /*!< TIM16 global Interrupt */
// NVIC_EnableIRQ(TIM17_IRQn); /*!< TIM17 global Interrupt */ // NVIC_EnableIRQ(TIM17_IRQn); /*!< TIM17 global Interrupt */

@ -14,6 +14,7 @@
#include "status_led.h" #include "status_led.h"
#include "debug_uart.h" #include "debug_uart.h"
#include "irq_dispatcher.h" #include "irq_dispatcher.h"
#include "timebase.h"
void plat_init(void) void plat_init(void)
{ {
@ -26,7 +27,7 @@ void plat_init(void)
LockJumper_Init(); LockJumper_Init();
Indicator_Init(); Indicator_Init();
DebugUart_Init(); // <- only the resource claim DebugUart_Init(); // resource claim
irqd_init(); irqd_init();

@ -0,0 +1,98 @@
//
// Created by MightyPork on 2018/01/27.
//
#include "platform.h"
#include "timebase.h"
#define TIMEBASE_TIMER TIM14
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
// TIM14 is a simple 16-bit timer timer with no special features.
// This makes it a good choice for the timebase generation. We set it to generate
// an interrupt every 1 ms
// - TIM14 is always up-counting
// - using APB1 clock
__HAL_RCC_TIM14_CLK_ENABLE();
NVIC_SetPriority(TIM14_IRQn, TickPriority); // highest possible priority
NVIC_EnableIRQ(TIM14_IRQn);
/* Compute TIM1 clock */
uint32_t uwTimclock = HAL_RCC_GetPCLK1Freq();
/* Get a 1 MHz clock for the timer */
uint16_t uhPrescalerValue = (uint16_t) ((uwTimclock / 1000000) - 1);
/* Get 1 kHz interrupt */
uint16_t uhPeriod = (1000000 / 1000) - 1;
LL_TIM_SetPrescaler(TIMEBASE_TIMER, uhPrescalerValue);
LL_TIM_SetAutoReload(TIMEBASE_TIMER, uhPeriod);
LL_TIM_EnableARRPreload(TIMEBASE_TIMER);
LL_TIM_EnableIT_UPDATE(TIMEBASE_TIMER);
LL_TIM_GenerateEvent_UPDATE(TIMEBASE_TIMER);
LL_TIM_EnableCounter(TIMEBASE_TIMER);
/* Return function status */
return HAL_OK;
}
static volatile uint32_t uwUptimeMs = 0;
/* TIMEBASE TIMER ISR */
void TIM14_IRQHandler(void)
{
uwUptimeMs++;
LL_TIM_ClearFlag_UPDATE(TIMEBASE_TIMER);
}
void HAL_IncTick(void)
{
uwUptimeMs++;
}
uint32_t HAL_GetTick(void)
{
return uwUptimeMs;
}
void HAL_SuspendTick(void)
{
LL_TIM_DisableIT_UPDATE(TIMEBASE_TIMER);
}
void HAL_ResumeTick(void)
{
LL_TIM_EnableIT_UPDATE(TIMEBASE_TIMER);
}
// -------------------------------------------------------------------------------------
// Timestamping functions ...
/*
* I wanted to freeze time. I wanted to savor that moment, to live in that moment
* for a week. But I couldn't stop it, only slow it. And before I knew it, she was gone.
* -- Ben Willis, "Cashback"
*/
uint64_t PTIM_GetMicrotime(void)
{
uint32_t uwMicros;
uint32_t uwMillis;
vPortEnterCritical();
{
uwMicros = TIMEBASE_TIMER->CNT;
uwMillis = uwUptimeMs;
if (LL_TIM_IsActiveFlag_UPDATE(TIM14)) {
// This means the timer has overflown after we disabled IRQ
// Use the last CNT value before the overflow
uwMicros = TIM14->ARR; // this is 999us
}
}
vPortExitCritical();
return (uint64_t)uwMillis*1000 + uwMicros;
}

@ -0,0 +1,22 @@
//
// Created by MightyPork on 2018/01/27.
//
// Configures and manages the high priority timer used for timeouts and precision delays.
//
// SysTick can't be used for this because, under FreeRTOS, the system tick interrupt
// has the lowest priority to not interfere with more important application processes
// and interrupts.
//
#ifndef GEX_F072_TIMEBASE_H
#define GEX_F072_TIMEBASE_H
/**
* Precision timer: get microtime as uint64_t
* This timestamp should be monotonously increasing with a precision of ±0.5µs
*
* @return time in microseconds
*/
uint64_t PTIM_GetMicrotime(void);
#endif //GEX_F072_TIMEBASE_H

@ -163,6 +163,9 @@ static error_t DI_preInit(Unit *unit)
return E_SUCCESS; return E_SUCCESS;
} }
/**
* Send a trigger event to master (called on the message queue thread)
*/
static void ID_SendTriggerReportToMaster(Job *job) static void ID_SendTriggerReportToMaster(Job *job)
{ {
Unit *unit = job->data1; Unit *unit = job->data1;
@ -179,6 +182,11 @@ static void ID_SendTriggerReportToMaster(Job *job)
com_send_pb(MSG_UNIT_REPORT, &pb); com_send_pb(MSG_UNIT_REPORT, &pb);
} }
/**
* EXTI callback for pin change interrupts
*
* @param arg - the unit is passed here
*/
static void DI_handleExti(void *arg) static void DI_handleExti(void *arg)
{ {
Unit *unit = arg; Unit *unit = arg;
@ -295,18 +303,17 @@ static void DI_deInit(Unit *unit)
// pins are de-inited during teardown // pins are de-inited during teardown
if (unit->status == E_SUCCESS) {
// Detach EXTI handlers and disable interrupts // Detach EXTI handlers and disable interrupts
if (priv->trig_rise | priv->trig_fall) { const uint16_t triggs = priv->trig_rise | priv->trig_fall;
if (unit->status == E_SUCCESS && triggs) {
uint16_t mask = 1; uint16_t mask = 1;
for (int i = 0; i < 16; i++, mask <<= 1) { for (int i = 0; i < 16; i++, mask <<= 1) {
if ((priv->trig_rise | priv->trig_fall) & mask) { if (triggs & mask) {
LL_EXTI_DisableIT_0_31(LL_EXTI_LINES[i]); LL_EXTI_DisableIT_0_31(LL_EXTI_LINES[i]);
irqd_detach(EXTIS[i], DI_handleExti); irqd_detach(EXTIS[i], DI_handleExti);
} }
} }
} }
}
// Release all resources // Release all resources
rsc_teardown(unit); rsc_teardown(unit);

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