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compatibility for F072

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sipo
Ondřej Hruška 7 years ago
parent 4171dd6781
commit 72954c46ce
Signed by: MightyPork
GPG Key ID: 2C5FD5035250423D
9 changed files with 149 additions and 20 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 22
      FreeRTOSConfig.h
  2. 9
      USB/usbd_conf.c
  3. 5
      cortex_handlers.c
  4. 4
      framework/resources.h
  5. 4
      framework/settings.c
  6. 6
      gex.mk
  7. 8
      platform/debug_uart.c
  8. 54
      platform/plat_compat.h
  9. 57
      platform/platform.c

22
FreeRTOSConfig.h
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@ -108,7 +108,7 @@
#define configQUEUE_REGISTRY_SIZE 0
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configENABLE_BACKWARD_COMPATIBILITY 0
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION (__CORTEX_M >= 3) // this fails on CM0+
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
@ -125,14 +125,16 @@ to exclude the API function. */
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 1
/* Cortex-M specific definitions. */
#ifdef __NVIC_PRIO_BITS
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
#define configPRIO_BITS __NVIC_PRIO_BITS
#else
#define configPRIO_BITS 4
#endif
///* Cortex-M specific definitions. */
//#ifdef __NVIC_PRIO_BITS
// /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
// #define configPRIO_BITS __NVIC_PRIO_BITS
//#else
// #define configPRIO_BITS 4
//#endif
#define configPRIO_BITS __NVIC_PRIO_BITS
#if (__CORTEX_M>=3)
/* The lowest interrupt priority that can be used in a call to a "set priority"
function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
@ -142,6 +144,10 @@ routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
#else
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 3
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 3
#endif
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */

9
USB/usbd_conf.c
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@ -82,8 +82,8 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
__HAL_RCC_USB_CLK_ENABLE();
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
HAL_NVIC_SetPriority(USB_IRQn, 3, 0);
HAL_NVIC_EnableIRQ(USB_IRQn);
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
@ -101,7 +101,7 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
__HAL_RCC_USB_CLK_DISABLE();
/* Peripheral interrupt Deinit*/
HAL_NVIC_DisableIRQ(USB_LP_CAN1_RX0_IRQn);
HAL_NVIC_DisableIRQ(USB_IRQn);
/* USER CODE BEGIN USB_MspDeInit 1 */
@ -270,7 +270,8 @@ USBD_StatusTypeDef USBD_LL_Init (USBD_HandleTypeDef *pdev)
hpcd_USB_FS.Instance = USB;
hpcd_USB_FS.Init.dev_endpoints = 8;
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
hpcd_USB_FS.Init.ep0_mps = DEP0CTL_MPS_8;
hpcd_USB_FS.Init.ep0_mps = DEP0CTL_MPS_8; // could be DEP0CTL_MPS_64
hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
hpcd_USB_FS.Init.low_power_enable = DISABLE;
hpcd_USB_FS.Init.lpm_enable = DISABLE;
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;

5
cortex_handlers.c
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@ -32,7 +32,7 @@ void vApplicationStackOverflowHook(TaskHandle_t xTask, signed char *pcTaskName)
while (1);
}
#if VERBOSE_HARDFAULT
#if VERBOSE_HARDFAULT && (__CORTEX_M >= 3)
void prvGetRegistersFromStack( uint32_t *origStack, uint32_t lr_value)
{
/* These are volatile to try and prevent the compiler/linker optimising them
@ -70,7 +70,6 @@ of this function. */
#define BS(reg, pos, str) (((reg)&(1<<(pos)))?(str" "):"")
#define REDPTR(val) (((val)&0xFF000000) != 0x08000000?"\033[31m":"\033[32m")
/* USER CODE BEGIN HardFault_IRQn 0 */
PRINTF(tFAULT" HARD FAULT\r\n\r\n");
PRINTF("- Stack frame:\r\n");
PRINTF(" R0 = \033[35m%"PRIX32"h\033[m\r\n", stacked_r0);
@ -160,7 +159,7 @@ of this function. */
*/
void __attribute__((naked)) HardFault_Handler(void)
{
#if VERBOSE_HARDFAULT
#if VERBOSE_HARDFAULT && (__CORTEX_M >= 3)
__asm volatile
(
" tst lr, #4 \n"

4
framework/resources.h
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@ -23,11 +23,15 @@
X(PD8) X(PD9) X(PD10) X(PD11) X(PD12) X(PD13) X(PD14) X(PD15) \
X(PE0) X(PE1) X(PE2) X(PE3) X(PE4) X(PE5) X(PE6) X(PE7) \
X(PE8) X(PE9) X(PE10) X(PE11) X(PE12) X(PE13) X(PE14) X(PE15) \
X(PF0) X(PF1) X(PF2) X(PF3) X(PF4) X(PF5) X(PF6) X(PF7) \
X(PF8) X(PF9) X(PF10) X(PF11) X(PF12) X(PF13) X(PF14) X(PF15) \
X(SPI1) X(SPI2) X(SPI3) \
X(I2C1) X(I2C2) X(I2C3) \
X(I2S1) X(I2S2) X(I2S3) \
X(ADC1) X(ADC2) X(ADC3) X(ADC4) \
X(DAC1) X(DAC2) \
X(CAN) \
X(COMP1) X(COMP2) X(HDMI_CEC) \
X(USART1) X(USART2) X(USART3) X(USART4) X(USART5) X(USART6) \
X(TIM1) X(TIM2) X(TIM3) X(TIM4) X(TIM5) \
X(TIM6) X(TIM7) X(TIM8) X(TIM9) X(TIM10) X(TIM11) X(TIM12) X(TIM13) X(TIM14) \

4
framework/settings.c
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@ -140,7 +140,11 @@ void settings_save(void)
fls_printf("ERASE flash pages for settings storage...\r\n");
// We have to first erase the pages
FLASH_EraseInitTypeDef erase;
#if PLAT_FLASHBANKS
erase.Banks = FLASH_BANK_1; // TODO ?????
#endif
erase.NbPages = SETTINGS_BLOCK_SIZE/FLASH_PAGE_SIZE;
erase.PageAddress = SETTINGS_FLASH_ADDR;
erase.TypeErase = FLASH_TYPEERASE_PAGES;

6
gex.mk
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@ -1,7 +1,6 @@
GEX_SRC_DIR = \
User \
User/utils \
User/USB \
User/comm \
User/framework \
User/platform \
@ -15,6 +14,11 @@ GEX_SRC_DIR = \
User/tasks
GEX_SOURCES = \
User/USB/usb_device.c \
User/USB/usbd_cdc_if.c \
User/USB/usbd_conf.c \
User/USB/usbd_desc.c \
User/USB/usbd_storage_if.c \
User/USB/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c \
User/USB/STM32_USB_Device_Library/Class/MSC/Src/usbd_msc.c \
User/USB/STM32_USB_Device_Library/Class/MSC/Src/usbd_msc_bot.c \

8
platform/debug_uart.c
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@ -36,7 +36,15 @@ void DebugUart_PreInit(void)
// LL_USART_SetStopBitsLength(USART2, LL_USART_STOPBITS_1);
// LL_USART_SetHWFlowCtrl(USART2, LL_USART_HWCONTROL_NONE);
LL_USART_EnableDirectionTx(USART2);
#if GEX_PLAT_F072_DISCOVERY
LL_USART_SetBaudRate(USART2, SystemCoreClock, LL_USART_OVERSAMPLING_16, 115200); // This is not great, let's hope it's like this on all platforms...
#elif GEX_PLAT_F103_BLUEPILL
LL_USART_SetBaudRate(USART2, SystemCoreClock/2, 115200); // This is not great, let's hope it's like this on all platforms...
#else
#error "BAD PLATFORM!"
#endif
LL_USART_Enable(USART2);
}

54
platform/plat_compat.h
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@ -5,10 +5,14 @@
#ifndef GEX_PLAT_COMPAT_H
#define GEX_PLAT_COMPAT_H
#ifdef GEX_PLAT_F103_BLUEPILL
#if defined(GEX_PLAT_F103_BLUEPILL)
// platform name for the version string
#define GEX_PLATFORM "STM32F103-Bluepill"
// This platform has the Banks field on the Flash config struct for settings save
#define PLAT_FLASHBANKS 1
// platform name for the version string
#define GEX_PLATFORM "STM32F103-Bluepill"
#include <stm32f1xx.h>
#include <stm32f1xx_hal.h>
#include <stm32f1xx_ll_adc.h>
@ -49,6 +53,50 @@
// Status LED config
#define STATUS_LED_PORT 'C'
#define STATUS_LED_PIN 13
#elif defined(GEX_PLAT_F072_DISCOVERY)
// platform name for the version string
#define GEX_PLATFORM "STM32F072-Discovery"
#include <stm32f0xx.h>
#include <stm32f0xx_ll_adc.h>
#include <stm32f0xx_ll_bus.h>
#include <stm32f0xx_ll_comp.h>
#include <stm32f0xx_ll_cortex.h>
#include <stm32f0xx_ll_crc.h>
#include <stm32f0xx_ll_crs.h>
#include <stm32f0xx_ll_dac.h>
#include <stm32f0xx_ll_dma.h>
#include <stm32f0xx_ll_exti.h>
#include <stm32f0xx_ll_gpio.h>
#include <stm32f0xx_ll_i2c.h>
#include <stm32f0xx_ll_iwdg.h>
#include <stm32f0xx_ll_pwr.h>
#include <stm32f0xx_ll_rcc.h>
#include <stm32f0xx_ll_rtc.h>
#include <stm32f0xx_ll_spi.h>
#include <stm32f0xx_ll_system.h>
#include <stm32f0xx_ll_tim.h>
#include <stm32f0xx_ll_usart.h>
#include <stm32f0xx_ll_utils.h>
#include <stm32f0xx_ll_wwdg.h>
// size, determines position of the flash storage
#define FLASH_SIZE (128*1024)
#define SETTINGS_BLOCK_SIZE (1024*2) // this must be a multiple of FLASH pages
#define SETTINGS_FLASH_ADDR (0x08000000 + FLASH_SIZE - SETTINGS_BLOCK_SIZE)
// Number of GPIO ports A,B,C...
#define PORTS_COUNT 6
// Lock jumper config
#define LOCK_JUMPER_PORT 'F'
#define LOCK_JUMPER_PIN 1 // OSC OUT, not used in BYPASS mode (receiving clock from the ST-Link MCO)
// Status LED config
#define STATUS_LED_PORT 'C'
#define STATUS_LED_PIN 6 // RED LED "UP"
#else
#error "BAD PLATFORM! Please select GEX platform using a -DGEX_PLAT_* compile flag"
#endif

57
platform/platform.c
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@ -34,7 +34,7 @@ void plat_init_resources(void)
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
#ifdef GEX_PLAT_F103_BLUEPILL
#if defined(GEX_PLAT_F103_BLUEPILL)
// Platform F103C8T6 - free all present resources
{
@ -77,6 +77,61 @@ void plat_init_resources(void)
assert_param(ok);
}
#elif defined(GEX_PLAT_F072_DISCOVERY)
__HAL_RCC_GPIOF_CLK_ENABLE();
// Platform F073RBT - free all present resources
{
rsc_free(NULL, R_ADC1);
rsc_free(NULL, R_CAN);
rsc_free(NULL, R_COMP1);
rsc_free(NULL, R_COMP2);
rsc_free(NULL, R_DAC1);
rsc_free(NULL, R_HDMI_CEC);
rsc_free(NULL, R_I2C1);
rsc_free(NULL, R_I2C2);
rsc_free(NULL, R_I2S1);
rsc_free(NULL, R_I2S2);
rsc_free(NULL, R_SPI1);
rsc_free(NULL, R_SPI2);
rsc_free(NULL, R_TIM1);
rsc_free(NULL, R_TIM2);
rsc_free(NULL, R_TIM3);
rsc_free(NULL, R_TIM6);
rsc_free(NULL, R_TIM7);
rsc_free_range(NULL, R_TIM14, R_TIM17);
rsc_free(NULL, R_USART1);
rsc_free(NULL, R_USART2);
rsc_free(NULL, R_USART3);
rsc_free(NULL, R_USART4);
rsc_free_range(NULL, R_PA0, R_PA15);
rsc_free_range(NULL, R_PB0, R_PB15);
rsc_free_range(NULL, R_PC0, R_PC15);
rsc_free_range(NULL, R_PF0, R_PF1);
}
// Claim resources not available due to board layout or internal usage
{
bool ok = true;
// HAL timebase
ok &= rsc_claim(&UNIT_SYSTEM, R_TIM1);
// HSE crystal
ok &= rsc_claim(&UNIT_SYSTEM, R_PF0);
//ok &= rsc_claim(&UNIT_SYSTEM, R_PD1); // - not used in BYPASS mode
// SWD
ok &= rsc_claim(&UNIT_SYSTEM, R_PA13);
ok &= rsc_claim(&UNIT_SYSTEM, R_PA14);
// USB
ok &= rsc_claim(&UNIT_SYSTEM, R_PA11);
ok &= rsc_claim(&UNIT_SYSTEM, R_PA12);
// BOOT pin(s)
ok &= rsc_claim(&UNIT_SYSTEM, R_PB2); // BOOT1
assert_param(ok);
}
#else
#error "BAD PLATFORM!"
#endif
}

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