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@ -75,6 +75,8 @@ error_t UTOUCH_init(Unit *unit) |
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__HAL_RCC_TSC_FORCE_RESET(); |
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__HAL_RCC_TSC_RELEASE_RESET(); |
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priv->all_channels_mask = 0; |
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for (int gi = 0; gi < 8; gi++) { |
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const uint8_t cap = priv->cfg.group_scaps[gi]; |
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const uint8_t ch = priv->cfg.group_channels[gi]; |
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@ -132,6 +134,10 @@ error_t UTOUCH_init(Unit *unit) |
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else { |
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dbg_touch("TSC ch @ %s", rsc_get_name(r)); |
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if (priv->cfg.interlaced) { |
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// interlaced - only update the mask beforehand
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priv->all_channels_mask |= bit; |
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} else { |
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// channels are configured individually when read.
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// we prepare bitmaps to use for the read groups (all can be read in at most 3 steps)
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priv->channels_phase[phasenum] |= bit; // this is used for the channel selection register
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@ -140,6 +146,7 @@ error_t UTOUCH_init(Unit *unit) |
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} |
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} |
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} |
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} |
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// common TSC config
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TSC->CR = |
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@ -154,7 +161,9 @@ error_t UTOUCH_init(Unit *unit) |
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TSC->CR |= ((priv->cfg.spread_deviation - 1) << TSC_CR_SSD_Pos) | TSC_CR_SSE; |
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} |
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dbg_touch("CR = %08x, ht is %d, lt is %d", TSC->CR, priv->cfg.charge_time, priv->cfg.drain_time); |
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dbg_touch("CR = %08x, ht is %d, lt is %d", (int)TSC->CR, |
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(int)priv->cfg.charge_time, |
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(int)priv->cfg.drain_time); |
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// iofloat is used for discharging
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@ -162,16 +171,22 @@ error_t UTOUCH_init(Unit *unit) |
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TSC->IER = TSC_IER_EOAIE | TSC_IER_MCEIE; |
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irqd_attach(TSC, UTOUCH_HandleIrq, unit); |
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if (!priv->cfg.interlaced) { |
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dbg_touch("TSC phases:"); |
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priv->all_channels_mask = 0; |
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for (int i = 0; i < 3; i++) { |
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priv->all_channels_mask |= priv->channels_phase[i]; |
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dbg_touch(" %d: ch %08"PRIx32", g %02"PRIx32, i + 1, priv->channels_phase[i], (uint32_t) priv->groups_phase[i]); |
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dbg_touch(" %d: ch %08"PRIx32", g %02"PRIx32, |
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i + 1, |
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priv->channels_phase[i], |
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(uint32_t) priv->groups_phase[i]); |
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} |
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} |
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priv->status = UTSC_STATUS_BUSY; // first loop ...
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priv->next_phase = 0; |
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UTOUCH_updateTick(unit); |
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// starts in the tick callback
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return E_SUCCESS; |
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} |
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