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@ -11,9 +11,6 @@ |
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#define DMA_POS(priv) ((priv)->dma_buffer_itemcount - (priv)->DMA_CHx->CNDTR) |
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volatile bool emergency = false; |
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//#define CRUMB() if(emergency) trap("crumb")
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static void UADC_JobSendBlockChunk(Job *job) |
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{ |
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Unit *unit = job->unit; |
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@ -23,7 +20,8 @@ static void UADC_JobSendBlockChunk(Job *job) |
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uint32_t start = job->data1; |
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uint32_t count = job->data2; |
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bool close = (bool) job->data3; |
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bool close = (bool) (job->data3 & 0x80); |
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bool tc = (bool) (job->data3 & 0x01); |
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// dbg("Send indices [%d -> %d)", (int)start, (int)(start+count));
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@ -40,6 +38,9 @@ static void UADC_JobSendBlockChunk(Job *job) |
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TF_Multipart_Payload(comm, (uint8_t *) (priv->dma_buffer + start), count * sizeof(uint16_t)); |
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TF_Multipart_Close(comm); |
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if (tc) priv->tc_pending = false; |
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else priv->ht_pending = false; |
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priv->stream_serial++; |
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} |
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@ -179,27 +180,36 @@ static void handle_httc(Unit *unit, bool tc) |
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bool close = !m_stream && priv->trig_stream_remain == 0; |
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if ((tc && priv->tc_pending) || (ht && priv->ht_pending)) { |
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dbg("(!) DMA not handled in time, abort capture"); |
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UADC_SwitchMode(unit, ADC_OPMODE_EMERGENCY_SHUTDOWN); |
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return; |
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} |
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Job j = { |
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.unit = unit, |
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.data1 = start, |
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.data2 = sgcount * priv->nb_channels, |
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.data3 = (uint32_t) close, |
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.data3 = (uint32_t) (close*0x80) | (tc*1), |
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.cb = UADC_JobSendBlockChunk |
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}; |
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if (tc) |
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priv->tc_pending = true; |
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else |
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priv->ht_pending = true; |
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if (!scheduleJob(&j)) { |
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// Abort if we can't queue - the stream would tear and we'd hog the system with error messages
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dbg("(!) Buffers overflow, abort capture"); |
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emergency = true; |
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UADC_SwitchMode(unit, ADC_OPMODE_EMERGENCY_SHUTDOWN); |
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return; |
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} |
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if (close) { |
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// dbg("End of capture");
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// If auto-arm enabled, we need to re-arm again.
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// However, EOS irq is disabled during the capture.
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// We have to wait for the next EOS interrupt to occur.
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// TODO verify if keeping the EOS irq enabled during capture has significant performance penalty. If not, we can leave it enabled.
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UADC_SwitchMode(unit, (priv->auto_rearm && m_trigd) ? ADC_OPMODE_REARM_PENDING : ADC_OPMODE_IDLE); |
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} |
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} else { |
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@ -499,6 +509,9 @@ void UADC_SwitchMode(Unit *unit, enum uadc_opmode new_mode) |
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// IDLE and ARMED are identical with the exception that the trigger condition is not checked
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// ARMED can be only entered from IDLE, thus we do the init only here.
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priv->tc_pending = false; |
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priv->ht_pending = false; |
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// In IDLE, we don't need the DMA interrupts
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LL_DMA_ClearFlag_HT(priv->DMAx, priv->dma_chnum); |
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LL_DMA_ClearFlag_TC(priv->DMAx, priv->dma_chnum); |
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