split ll extensions from hw_utils to own file

adc
Ondřej Hruška 7 years ago
parent c5f41819b1
commit 300a6a6e90
Signed by: MightyPork
GPG Key ID: 2C5FD5035250423D
  1. 96
      platform/hw_utils.c
  2. 49
      platform/hw_utils.h
  3. 108
      platform/ll_extension.c
  4. 59
      platform/ll_extension.h
  5. 4
      units/adc/_adc_core.c
  6. 12
      units/adc/_adc_init.c

@ -3,101 +3,9 @@
// //
#include "platform.h" #include "platform.h"
#include <utils/avrlibc.h> #include "utils/avrlibc.h"
#include <math.h>
#include "hw_utils.h" #include "hw_utils.h"
#include "macro.h"
const uint32_t LL_SYSCFG_EXTI_PORTS[PORTS_COUNT] = {
LL_SYSCFG_EXTI_PORTA,
LL_SYSCFG_EXTI_PORTB,
LL_SYSCFG_EXTI_PORTC,
LL_SYSCFG_EXTI_PORTD,
LL_SYSCFG_EXTI_PORTE,
#if PORTS_COUNT>5
LL_SYSCFG_EXTI_PORTF,
#endif
#if PORTS_COUNT>6
LL_SYSCFG_EXTI_PORTG,
#endif
};
const uint32_t LL_SYSCFG_EXTI_LINES[16] = {
LL_SYSCFG_EXTI_LINE0,
LL_SYSCFG_EXTI_LINE1,
LL_SYSCFG_EXTI_LINE2,
LL_SYSCFG_EXTI_LINE3,
LL_SYSCFG_EXTI_LINE4,
LL_SYSCFG_EXTI_LINE5,
LL_SYSCFG_EXTI_LINE6,
LL_SYSCFG_EXTI_LINE7,
LL_SYSCFG_EXTI_LINE8,
LL_SYSCFG_EXTI_LINE9,
LL_SYSCFG_EXTI_LINE10,
LL_SYSCFG_EXTI_LINE11,
LL_SYSCFG_EXTI_LINE12,
LL_SYSCFG_EXTI_LINE13,
LL_SYSCFG_EXTI_LINE14,
LL_SYSCFG_EXTI_LINE15,
};
COMPILER_ASSERT(16 == ELEMENTS_IN_ARRAY(LL_SYSCFG_EXTI_LINES));
const uint32_t LL_EXTI_LINES[16] = {
LL_EXTI_LINE_0,
LL_EXTI_LINE_1,
LL_EXTI_LINE_2,
LL_EXTI_LINE_3,
LL_EXTI_LINE_4,
LL_EXTI_LINE_5,
LL_EXTI_LINE_6,
LL_EXTI_LINE_7,
LL_EXTI_LINE_8,
LL_EXTI_LINE_9,
LL_EXTI_LINE_10,
LL_EXTI_LINE_11,
LL_EXTI_LINE_12,
LL_EXTI_LINE_13,
LL_EXTI_LINE_14,
LL_EXTI_LINE_15,
};
COMPILER_ASSERT(16 == ELEMENTS_IN_ARRAY(LL_EXTI_LINES));
/** Pin number to LL bitfield mapping */
const uint32_t LL_GPIO_PINS[16] = {
LL_GPIO_PIN_0,
LL_GPIO_PIN_1,
LL_GPIO_PIN_2,
LL_GPIO_PIN_3,
LL_GPIO_PIN_4,
LL_GPIO_PIN_5,
LL_GPIO_PIN_6,
LL_GPIO_PIN_7,
LL_GPIO_PIN_8,
LL_GPIO_PIN_9,
LL_GPIO_PIN_10,
LL_GPIO_PIN_11,
LL_GPIO_PIN_12,
LL_GPIO_PIN_13,
LL_GPIO_PIN_14,
LL_GPIO_PIN_15,
};
COMPILER_ASSERT(16 == ELEMENTS_IN_ARRAY(LL_GPIO_PINS));
/** Port number (A=0) to config struct pointer mapping */
GPIO_TypeDef * const GPIO_PERIPHS[PORTS_COUNT] = {
GPIOA,
GPIOB,
GPIOC,
GPIOD,
GPIOE,
#if PORTS_COUNT>5
GPIOF,
#endif
#if PORTS_COUNT>6
GPIOG,
#endif
};
COMPILER_ASSERT(PORTS_COUNT == ELEMENTS_IN_ARRAY(GPIO_PERIPHS));
/** Convert pin number to LL bitfield */ /** Convert pin number to LL bitfield */
uint32_t hw_pin2ll(uint8_t pin_number, bool *suc) uint32_t hw_pin2ll(uint8_t pin_number, bool *suc)

@ -10,12 +10,7 @@
#include "platform.h" #include "platform.h"
#include "resources.h" #include "resources.h"
#include "ll_extension.h"
extern const uint32_t LL_SYSCFG_EXTI_PORTS[PORTS_COUNT];
extern const uint32_t LL_SYSCFG_EXTI_LINES[16];
extern GPIO_TypeDef * const GPIO_PERIPHS[PORTS_COUNT];
extern const uint32_t LL_GPIO_PINS[16];
extern const uint32_t LL_EXTI_LINES[16];
/** /**
* Convert pin number to LL driver bitfield for working with the pin. * Convert pin number to LL driver bitfield for working with the pin.
@ -188,46 +183,4 @@ void hw_periph_clock_disable(void *periph);
bool solve_timer(uint32_t base_freq, uint32_t required_freq, bool is16bit, bool solve_timer(uint32_t base_freq, uint32_t required_freq, bool is16bit,
uint16_t *presc, uint32_t *count, float *real_freq); uint16_t *presc, uint32_t *count, float *real_freq);
// ---------- LL extras ------------
static inline bool LL_DMA_IsActiveFlag_G(uint32_t isr_snapshot, uint8_t channel)
{
return 0 != (isr_snapshot & (DMA_ISR_GIF1 << (uint32_t)((channel-1) * 4)));
}
static inline bool LL_DMA_IsActiveFlag_TC(uint32_t isr_snapshot, uint8_t channel)
{
return 0 != (isr_snapshot & (DMA_ISR_TCIF1 << (uint32_t)((channel-1) * 4)));
}
static inline bool LL_DMA_IsActiveFlag_HT(uint32_t isr_snapshot, uint8_t channel)
{
return 0 != (isr_snapshot & (DMA_ISR_HTIF1 << (uint32_t)((channel-1) * 4)));
}
static inline bool LL_DMA_IsActiveFlag_TE(uint32_t isr_snapshot, uint8_t channel)
{
return 0 != (isr_snapshot & (DMA_ISR_TEIF1 << (uint32_t)((channel-1) * 4)));
}
static inline void LL_DMA_ClearFlag_HT(DMA_TypeDef *DMAx, uint8_t channel)
{
DMAx->IFCR = (DMA_IFCR_CHTIF1 << (uint32_t)((channel-1) * 4));
}
static inline void LL_DMA_ClearFlag_TC(DMA_TypeDef *DMAx, uint8_t channel)
{
DMAx->IFCR = (DMA_IFCR_CTCIF1 << (uint32_t)((channel-1) * 4));
}
static inline void LL_DMA_ClearFlag_TE(DMA_TypeDef *DMAx, uint8_t channel)
{
DMAx->IFCR = (DMA_IFCR_CTEIF1 << (uint32_t)((channel-1) * 4));
}
static inline void LL_DMA_ClearFlags(DMA_TypeDef *DMAx, uint8_t channel)
{
DMAx->IFCR = (DMA_IFCR_CGIF1 << (uint32_t)((channel-1) * 4));
}
#endif //GEX_PIN_UTILS_H #endif //GEX_PIN_UTILS_H

@ -0,0 +1,108 @@
//
// Created by MightyPork on 2018/02/04.
//
#include "platform.h"
#include "ll_extension.h"
const uint32_t LL_SYSCFG_EXTI_PORTS[PORTS_COUNT] = {
LL_SYSCFG_EXTI_PORTA,
LL_SYSCFG_EXTI_PORTB,
LL_SYSCFG_EXTI_PORTC,
LL_SYSCFG_EXTI_PORTD,
LL_SYSCFG_EXTI_PORTE,
#if PORTS_COUNT>5
LL_SYSCFG_EXTI_PORTF,
#endif
#if PORTS_COUNT>6
LL_SYSCFG_EXTI_PORTG,
#endif
};
const uint32_t LL_SYSCFG_EXTI_LINES[16] = {
LL_SYSCFG_EXTI_LINE0,
LL_SYSCFG_EXTI_LINE1,
LL_SYSCFG_EXTI_LINE2,
LL_SYSCFG_EXTI_LINE3,
LL_SYSCFG_EXTI_LINE4,
LL_SYSCFG_EXTI_LINE5,
LL_SYSCFG_EXTI_LINE6,
LL_SYSCFG_EXTI_LINE7,
LL_SYSCFG_EXTI_LINE8,
LL_SYSCFG_EXTI_LINE9,
LL_SYSCFG_EXTI_LINE10,
LL_SYSCFG_EXTI_LINE11,
LL_SYSCFG_EXTI_LINE12,
LL_SYSCFG_EXTI_LINE13,
LL_SYSCFG_EXTI_LINE14,
LL_SYSCFG_EXTI_LINE15,
};
COMPILER_ASSERT(16 == ELEMENTS_IN_ARRAY(LL_SYSCFG_EXTI_LINES));
const uint32_t LL_EXTI_LINES[16] = {
LL_EXTI_LINE_0,
LL_EXTI_LINE_1,
LL_EXTI_LINE_2,
LL_EXTI_LINE_3,
LL_EXTI_LINE_4,
LL_EXTI_LINE_5,
LL_EXTI_LINE_6,
LL_EXTI_LINE_7,
LL_EXTI_LINE_8,
LL_EXTI_LINE_9,
LL_EXTI_LINE_10,
LL_EXTI_LINE_11,
LL_EXTI_LINE_12,
LL_EXTI_LINE_13,
LL_EXTI_LINE_14,
LL_EXTI_LINE_15,
};
COMPILER_ASSERT(16 == ELEMENTS_IN_ARRAY(LL_EXTI_LINES));
/** Pin number to LL bitfield mapping */
const uint32_t LL_GPIO_PINS[16] = {
LL_GPIO_PIN_0,
LL_GPIO_PIN_1,
LL_GPIO_PIN_2,
LL_GPIO_PIN_3,
LL_GPIO_PIN_4,
LL_GPIO_PIN_5,
LL_GPIO_PIN_6,
LL_GPIO_PIN_7,
LL_GPIO_PIN_8,
LL_GPIO_PIN_9,
LL_GPIO_PIN_10,
LL_GPIO_PIN_11,
LL_GPIO_PIN_12,
LL_GPIO_PIN_13,
LL_GPIO_PIN_14,
LL_GPIO_PIN_15,
};
COMPILER_ASSERT(16 == ELEMENTS_IN_ARRAY(LL_GPIO_PINS));
/** Port number (A=0) to config struct pointer mapping */
GPIO_TypeDef * const GPIO_PERIPHS[PORTS_COUNT] = {
GPIOA,
GPIOB,
GPIOC,
GPIOD,
GPIOE,
#if PORTS_COUNT>5
GPIOF,
#endif
#if PORTS_COUNT>6
GPIOG,
#endif
};
COMPILER_ASSERT(PORTS_COUNT == ELEMENTS_IN_ARRAY(GPIO_PERIPHS));
const uint32_t LL_ADC_SAMPLETIMES[8] = {
LL_ADC_SAMPLINGTIME_1CYCLE_5,
LL_ADC_SAMPLINGTIME_7CYCLES_5,
LL_ADC_SAMPLINGTIME_13CYCLES_5,
LL_ADC_SAMPLINGTIME_28CYCLES_5,
LL_ADC_SAMPLINGTIME_41CYCLES_5,
LL_ADC_SAMPLINGTIME_55CYCLES_5,
LL_ADC_SAMPLINGTIME_71CYCLES_5,
LL_ADC_SAMPLINGTIME_239CYCLES_5,
};

@ -0,0 +1,59 @@
//
// Created by MightyPork on 2018/02/04.
//
#ifndef GEX_F072_LL_EXTENSION_H
#define GEX_F072_LL_EXTENSION_H
#include "platform.h"
extern const uint32_t LL_SYSCFG_EXTI_PORTS[PORTS_COUNT];
extern const uint32_t LL_SYSCFG_EXTI_LINES[16];
extern GPIO_TypeDef * const GPIO_PERIPHS[PORTS_COUNT];
extern const uint32_t LL_GPIO_PINS[16];
extern const uint32_t LL_EXTI_LINES[16];
extern const uint32_t LL_ADC_SAMPLETIMES[8];
static inline bool LL_DMA_IsActiveFlag_G(uint32_t isr_snapshot, uint8_t channel)
{
return 0 != (isr_snapshot & (DMA_ISR_GIF1 << (uint32_t)((channel-1) * 4)));
}
static inline bool LL_DMA_IsActiveFlag_TC(uint32_t isr_snapshot, uint8_t channel)
{
return 0 != (isr_snapshot & (DMA_ISR_TCIF1 << (uint32_t)((channel-1) * 4)));
}
static inline bool LL_DMA_IsActiveFlag_HT(uint32_t isr_snapshot, uint8_t channel)
{
return 0 != (isr_snapshot & (DMA_ISR_HTIF1 << (uint32_t)((channel-1) * 4)));
}
static inline bool LL_DMA_IsActiveFlag_TE(uint32_t isr_snapshot, uint8_t channel)
{
return 0 != (isr_snapshot & (DMA_ISR_TEIF1 << (uint32_t)((channel-1) * 4)));
}
static inline void LL_DMA_ClearFlag_HT(DMA_TypeDef *DMAx, uint8_t channel)
{
DMAx->IFCR = (DMA_IFCR_CHTIF1 << (uint32_t)((channel-1) * 4));
}
static inline void LL_DMA_ClearFlag_TC(DMA_TypeDef *DMAx, uint8_t channel)
{
DMAx->IFCR = (DMA_IFCR_CTCIF1 << (uint32_t)((channel-1) * 4));
}
static inline void LL_DMA_ClearFlag_TE(DMA_TypeDef *DMAx, uint8_t channel)
{
DMAx->IFCR = (DMA_IFCR_CTEIF1 << (uint32_t)((channel-1) * 4));
}
static inline void LL_DMA_ClearFlags(DMA_TypeDef *DMAx, uint8_t channel)
{
DMAx->IFCR = (DMA_IFCR_CGIF1 << (uint32_t)((channel-1) * 4));
}
#endif //GEX_F072_LL_EXTENSION_H

@ -0,0 +1,4 @@
//
// Created by MightyPork on 2018/02/04.
//

@ -8,18 +8,6 @@
#define ADC_INTERNAL #define ADC_INTERNAL
#include "_adc_internal.h" #include "_adc_internal.h"
const uint32_t LL_ADC_SAMPLETIMES[] = {
LL_ADC_SAMPLINGTIME_1CYCLE_5,
LL_ADC_SAMPLINGTIME_7CYCLES_5,
LL_ADC_SAMPLINGTIME_13CYCLES_5,
LL_ADC_SAMPLINGTIME_28CYCLES_5,
LL_ADC_SAMPLINGTIME_41CYCLES_5,
LL_ADC_SAMPLINGTIME_55CYCLES_5,
LL_ADC_SAMPLINGTIME_71CYCLES_5,
LL_ADC_SAMPLINGTIME_239CYCLES_5,
};
/** Allocate data structure and set defaults */ /** Allocate data structure and set defaults */
error_t UADC_preInit(Unit *unit) error_t UADC_preInit(Unit *unit)
{ {

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