F407 basic compat (#25)

* work on f407 support

* builds with f407

FreeRTOSConfig.h

@@ -126,7 +126,8 @@ to exclude the API function. */
 
 ///* Cortex-M specific definitions. */
 
-#if defined(GEX_PLAT_F103_BLUEPILL) || defined(GEX_PLAT_F303_DISCOVERY)
+#if defined(GEX_PLAT_F103_BLUEPILL) || defined(GEX_PLAT_F303_DISCOVERY) \
+    || defined(GEX_PLAT_F407_DISCOVERY)
     // This is for F103+
 
     /* The lowest interrupt priority that can be used in a call to a "set priority"

USB/usb_device.c

@@ -95,8 +95,7 @@ static void __attribute__((used)) BASE_USB_IRQHandler(void)
     HAL_PCD_IRQHandler(&hpcd_USB_FS);
 }
 
-
+// Function for F103
-// Function from F103
 /**
 * @brief This function handles USB low priority or CAN RX0 interrupts.
 */
@@ -114,6 +113,12 @@ void USB_LP_CAN_RX0_IRQHandler(void) __attribute__((alias("BASE_USB_IRQHandler")
 */
 void USB_IRQHandler(void) __attribute__((alias("BASE_USB_IRQHandler")));
 
+// Function for F407
+/**
+* @brief This function handles USB On The Go FS global interrupt.
+*/
+void OTG_FS_IRQHandler(void) __attribute__((alias("BASE_USB_IRQHandler")));
+
 /**
   * @}
   */

USB/usbd_conf.c

@@ -73,6 +73,7 @@ void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state);
 /* MSP Init */
 void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
 {
+#if defined(USB)
   if(pcdHandle->Instance==USB)
   {
   /* USER CODE BEGIN USB_MspInit 0 */
@@ -109,10 +110,35 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
 
   /* USER CODE END USB_MspInit 1 */
   }
+#elif defined(USB_OTG_FS)
+  // This is for F407 with USB OTG peripheral
+  if (pcdHandle->Instance==USB_OTG_FS) {
+    /**USB_OTG_FS GPIO Configuration
+      PA11     ------> USB_OTG_FS_DM
+      PA12     ------> USB_OTG_FS_DP
+      */
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+
+    LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_11, LL_GPIO_MODE_ALTERNATE);
+    LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_12, LL_GPIO_MODE_ALTERNATE);
+    LL_GPIO_SetAFPin_8_15(GPIOA, LL_GPIO_PIN_11, LL_GPIO_AF_10);
+    LL_GPIO_SetAFPin_8_15(GPIOA, LL_GPIO_PIN_12, LL_GPIO_AF_10);
+
+    /* Peripheral clock enable */
+    __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
+
+    /* Peripheral interrupt init */
+    HAL_NVIC_SetPriority(OTG_FS_IRQn, 5, 0);
+    HAL_NVIC_EnableIRQ(OTG_FS_IRQn);
+  }
+#else
+  #error "BAD USB!"
+#endif
 }
 
 void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
 {
+#if defined(USB)
   if(pcdHandle->Instance==USB)
   {
   /* USER CODE BEGIN USB_MspDeInit 0 */
@@ -136,6 +162,20 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
 
   /* USER CODE END USB_MspDeInit 1 */
   }
+#elif defined(USB_OTG_FS)
+  // This is for F407 with USB OTG peripheral
+  if (pcdHandle->Instance==USB_OTG_FS) {
+    __HAL_RCC_USB_OTG_FS_CLK_DISABLE();
+
+    LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_11, LL_GPIO_MODE_ANALOG);
+    LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_12, LL_GPIO_MODE_ANALOG);
+
+    /* Peripheral interrupt init */
+    HAL_NVIC_DisableIRQ(OTG_FS_IRQn);
+  }
+#else
+#error "BAD USB!"
+#endif
 }
 
 /**
@@ -216,6 +256,11 @@ void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
 {
   /* Inform USB library that core enters in suspend Mode */
   USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
+
+#if PLAT_USB_PHYCLOCK
+  __HAL_PCD_GATE_PHYCLOCK(hpcd);
+#endif
+
   /*Enter in STOP mode */
   /* USER CODE BEGIN 2 */  
   if (hpcd->Init.low_power_enable)
@@ -290,7 +335,39 @@ void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
   * @retval USBD Status
   */
 USBD_StatusTypeDef  USBD_LL_Init (USBD_HandleTypeDef *pdev)
-{ 
+{
+#if PLAT_USB_OTGFS
+  /* Init USB_IP */
+  if (pdev->id == DEVICE_FS) {
+    /* Link The driver to the stack */
+    hpcd_USB_FS.pData = pdev;
+    pdev->pData = &hpcd_USB_FS;
+
+    hpcd_USB_FS.Instance = USB_OTG_FS;
+    hpcd_USB_FS.Init.dev_endpoints = 4;
+    hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
+    hpcd_USB_FS.Init.dma_enable = DISABLE;
+    hpcd_USB_FS.Init.ep0_mps = DEP0CTL_MPS_8;
+    hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
+    hpcd_USB_FS.Init.Sof_enable = DISABLE;
+    hpcd_USB_FS.Init.low_power_enable = DISABLE;
+    hpcd_USB_FS.Init.lpm_enable = DISABLE;
+    hpcd_USB_FS.Init.vbus_sensing_enable = DISABLE;
+    hpcd_USB_FS.Init.use_dedicated_ep1 = DISABLE;
+    if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
+    {
+      _Error_Handler(__FILE__, __LINE__);
+    }
+
+    // FIXME this is likely wrong
+    HAL_PCDEx_SetRxFiFo(&hpcd_USB_FS, 0x80);
+
+    HAL_PCDEx_SetTxFiFo(&hpcd_USB_FS, 0, 0x40); // EP0
+    HAL_PCDEx_SetTxFiFo(&hpcd_USB_FS, MSC_EPOUT_ADDR, 0x40);
+    HAL_PCDEx_SetTxFiFo(&hpcd_USB_FS, CDC_OUT_EP, 0x40);
+    // EP 3 is Rx only
+  }
+#else
   /* Init USB_IP */
   /* Link The driver to the stack */
   hpcd_USB_FS.pData = pdev;
@@ -322,8 +399,8 @@ USBD_StatusTypeDef  USBD_LL_Init (USBD_HandleTypeDef *pdev)
   HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , CDC_IN_EP , PCD_SNG_BUF, ptr += 64); // 64
   HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , CDC_OUT_EP , PCD_SNG_BUF, ptr += 64); // 64
   HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , CDC_CMD_EP , PCD_SNG_BUF, ptr += 16); // 16
-
   (void)ptr;
+#endif
 
   return USBD_OK;
 }
@@ -509,6 +586,43 @@ uint32_t USBD_LL_GetRxDataSize  (USBD_HandleTypeDef *pdev, uint8_t  ep_addr)
   return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
 }
 
+#if (USBD_LPM_ENABLED == 1)
+/**
+  * @brief  HAL_PCDEx_LPM_Callback : Send LPM message to user layer
+  * @param  hpcd: PCD handle
+  * @param  msg: LPM message
+  * @retval HAL status
+  */
+void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg)
+{
+  switch ( msg)
+  {
+  case PCD_LPM_L0_ACTIVE:
+    if (hpcd->Init.low_power_enable)
+    {
+      SystemClock_Config();
+
+      /* Reset SLEEPDEEP bit of Cortex System Control Register */
+      SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
+    }
+    __HAL_PCD_UNGATE_PHYCLOCK(hpcd);
+    USBD_LL_Resume(hpcd->pData);
+    break;
+
+  case PCD_LPM_L1_ACTIVE:
+    __HAL_PCD_GATE_PHYCLOCK(hpcd);
+    USBD_LL_Suspend(hpcd->pData);
+
+    /*Enter in STOP mode */
+    if (hpcd->Init.low_power_enable)
+    {
+      /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register */
+      SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
+    }
+    break;
+  }
+}
+#endif
 /**
   * @brief  Delays routine for the USB Device Library.
   * @param  Delay: Delay in ms

USB/usbd_desc.c

@@ -247,7 +247,7 @@ uint8_t *  USBD_FS_ManufacturerStrDescriptor( USBD_SpeedTypeDef speed , uint16_t
 uint8_t *  USBD_FS_SerialStrDescriptor( USBD_SpeedTypeDef speed , uint16_t *length)
 {
   char buff[25];
-  fixup_sprintf(buff, "%08"PRIX32"%08"PRIX32"%08"PRIX32,
+  fixup_sprintf(buff, "%08"PRIX32"-%08"PRIX32"-%08"PRIX32,
           LL_GetUID_Word0(),
           LL_GetUID_Word1(),
           LL_GetUID_Word2()

framework/resources.h

@@ -31,8 +31,12 @@
     X(ADC1) X(ADC2) X(ADC3) X(ADC4) \
     X(OPAMP1) X(OPAMP2) X(OPAMP3) X(OPAMP4) \
     X(DAC1) X(DAC2) \
-    X(CAN) \
+    X(CAN1) X(CAN2) \
     X(TSC) \
+    X(DCMI) \
+    X(ETH) \
+    X(FSMC) \
+    X(SDIO) \
     X(COMP1) X(COMP2) X(COMP3) X(COMP4) X(COMP5) X(COMP6) X(COMP7) \
     X(HDMI_CEC) \
     X(USART1) X(USART2) X(USART3) X(USART4) X(USART5) X(USART6) \

framework/settings.c

@@ -145,9 +145,18 @@ void settings_save(void)
         erase.Banks = FLASH_BANK_1; // TODO ?????
 #endif
 
+#if defined(GEX_PLAT_F407_DISCOVERY)
+        // specialty for F4 with too much flash
+        erase.NbSectors = 1;
+        erase.Sector = SETTINGS_FLASH_SECTOR;
+        erase.TypeErase = FLASH_TYPEERASE_SECTORS;
+        erase.VoltageRange = FLASH_VOLTAGE_RANGE_3;
+        erase.Banks = FLASH_BANK_1; // unused for sector erase
+#else
         erase.NbPages = SETTINGS_BLOCK_SIZE/FLASH_PAGE_SIZE;
         erase.PageAddress = SETTINGS_FLASH_ADDR;
         erase.TypeErase = FLASH_TYPEERASE_PAGES;
+#endif
         uint32_t pgerror = 0;
         hst = HAL_FLASHEx_Erase(&erase, &pgerror);
         assert_param(pgerror == 0xFFFFFFFFU);

gex_hooks.c

@@ -18,7 +18,7 @@ void GEX_MsTick(void)
     TF_Tick(comm);
     StatusLed_Tick();
 }
-extern void HardFault_Handler(void);
+
 /**
  * Early init, even before RTOS starts
  */

platform/debug_uart.c

@@ -48,6 +48,12 @@ void DebugUart_PreInit(void)
                          LL_USART_OVERSAMPLING_16,
                          115200);
     LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_2, LL_GPIO_AF_7); // uart2 is AF7 here
+#elif GEX_PLAT_F407_DISCOVERY
+    LL_USART_SetBaudRate(USART2,
+                         SystemCoreClock/4, // if core is at 168 MHz, this is 48 MHz
+                         LL_USART_OVERSAMPLING_16,
+                         115200);
+    LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_2, LL_GPIO_AF_7); // uart2 is AF7 here (same like 303)
 #else
     #error "BAD PLATFORM!"
 #endif
@@ -74,6 +80,8 @@ ssize_t _write_r(struct _reent *rptr, int fd, const void *buf, size_t len)
 
 // No-uart variant
 void DebugUart_Init(void) {}
-ssize_t _write_r(struct _reent *rptr, int fd, const void *buf, size_t len) {}
+ssize_t _write_r(struct _reent *rptr, int fd, const void *buf, size_t len) {
+    return len;
+}
 
 #endif //USE_DEBUG_UART

platform/plat_compat.h

@@ -145,6 +145,56 @@
     #define STATUS_LED_PORT 'E'
     #define STATUS_LED_PIN  13
 
+#elif defined(GEX_PLAT_F407_DISCOVERY)
+
+// platform name for the version string
+    #define GEX_PLATFORM "STM32F407-Discovery"
+
+    #define PLAT_USB_PHYCLOCK 1
+    #define PLAT_USB_OTGFS 1
+
+    #include <stm32f4xx.h>
+    #include <stm32f4xx_hal.h>
+    #include <stm32f4xx_ll_adc.h>
+    #include <stm32f4xx_ll_crc.h>
+    #include <stm32f4xx_ll_dac.h>
+    #include <stm32f4xx_ll_dma.h>
+    #include <stm32f4xx_ll_dma2d.h>
+    #include <stm32f4xx_ll_exti.h>
+    #include <stm32f4xx_ll_fmc.h>
+    #include <stm32f4xx_ll_fsmc.h>
+    #include <stm32f4xx_ll_gpio.h>
+    #include <stm32f4xx_ll_i2c.h>
+    #include <stm32f4xx_ll_lptim.h>
+    #include <stm32f4xx_ll_pwr.h>
+    #include <stm32f4xx_ll_rcc.h>
+    #include <stm32f4xx_ll_rng.h>
+    #include <stm32f4xx_ll_rtc.h>
+    #include <stm32f4xx_ll_sdmmc.h>
+    #include <stm32f4xx_ll_spi.h>
+    #include <stm32f4xx_ll_tim.h>
+    #include <stm32f4xx_ll_usart.h>
+    #include <stm32f4xx_ll_usb.h>
+    #include <stm32f4xx_ll_utils.h>
+
+    // size, determines position of the flash storage
+
+    // we use the first 128kB sector. Unfortunately the whole sector must be erased before writing.
+    #define SETTINGS_FLASH_SECTOR 6
+    #define SETTINGS_BLOCK_SIZE (1024*2)
+    #define SETTINGS_FLASH_ADDR (0x08000000 + (16*4+64)*1024)
+
+    // Number of GPIO ports A,B,C...
+    #define PORTS_COUNT 6
+
+    // Lock jumper config
+    #define LOCK_JUMPER_PORT 'C'
+    #define LOCK_JUMPER_PIN  14 // completely random choice here... TBD
+
+    // Status LED config
+    #define STATUS_LED_PORT 'D' // orange
+    #define STATUS_LED_PIN  13
+
 #else
     #error "BAD PLATFORM! Please select GEX platform using a -DGEX_PLAT_* compile flag"
 #endif

platform/platform.c

@@ -75,7 +75,7 @@ void plat_init_resources(void)
     // Platform F073RBT - free all present resources
     {
         rsc_free(NULL, R_ADC1);
-        rsc_free(NULL, R_CAN);
+        rsc_free(NULL, R_CAN1);
         rsc_free_range(NULL, R_COMP1, R_COMP2);
         rsc_free(NULL, R_DAC1);
         rsc_free(NULL, R_HDMI_CEC);
@@ -121,7 +121,7 @@ void plat_init_resources(void)
     // Platform F303VCT - free all present resources
     {
         rsc_free_range(NULL, R_ADC1, R_ADC4);
-        rsc_free(NULL, R_CAN);
+        rsc_free(NULL, R_CAN1);
         rsc_free_range(NULL, R_COMP1, R_COMP7);
         rsc_free(NULL, R_HDMI_CEC);
         rsc_free(NULL, R_DAC1);
@@ -164,6 +164,55 @@ void plat_init_resources(void)
         // BOOT pin(s)
         ok &= rsc_claim(&UNIT_SYSTEM, R_PB2); // BOOT1
 
+        assert_param(ok);
+    }
+#elif defined(GEX_PLAT_F407_DISCOVERY)
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+
+    // Platform F407VGT - free all present resources
+    {
+        rsc_free_range(NULL, R_ADC1, R_ADC3);
+        rsc_free_range(NULL, R_CAN1, R_CAN2);
+        rsc_free_range(NULL, R_COMP1, R_COMP7);
+        rsc_free(NULL, R_DAC1);
+        rsc_free(NULL, R_DCMI);
+        rsc_free(NULL, R_ETH);
+        rsc_free(NULL, R_FSMC);
+        rsc_free_range(NULL, R_I2C1, R_I2C3);
+        rsc_free_range(NULL, R_I2S2, R_I2S3);
+        rsc_free(NULL, R_SDIO);
+        rsc_free_range(NULL, R_SPI1, R_SPI3);
+        rsc_free_range(NULL, R_TIM1, R_TIM14);
+        rsc_free_range(NULL, R_USART1, R_USART3);
+        rsc_free(NULL, R_USART6);
+
+        rsc_free_range(NULL, R_PA0, R_PA15);
+        rsc_free_range(NULL, R_PB0, R_PB15);
+        rsc_free_range(NULL, R_PC0, R_PC15);
+        rsc_free_range(NULL, R_PD0, R_PD15);
+        rsc_free_range(NULL, R_PE0, R_PE15);
+        // also has 2 PH pins
+
+        // F407 appears to have fewer GPIOs than F303?
+    }
+
+    // Claim resources not available due to board layout or internal usage
+    {
+        bool ok = true;
+
+        // HAL timebase
+        ok &= rsc_claim(&UNIT_SYSTEM, R_TIM1);
+        // HSE crystal
+        // H0 and H1
+        // SWD
+        ok &= rsc_claim(&UNIT_SYSTEM, R_PA13);
+        ok &= rsc_claim(&UNIT_SYSTEM, R_PA14);
+        // USB
+        ok &= rsc_claim(&UNIT_SYSTEM, R_PA11);
+        ok &= rsc_claim(&UNIT_SYSTEM, R_PA12);
+        // BOOT pin(s)
+        ok &= rsc_claim(&UNIT_SYSTEM, R_PB2); // BOOT1
+
         assert_param(ok);
     }
 #else
@@ -179,10 +228,10 @@ void plat_init_resources(void)
  */
 void plat_usb_reconnect(void)
 {
-#ifdef GEX_PLAT_F103_BLUEPILL
+    // TODO add better reset methods available on different chips
+
     // F103 doesn't have pull-up control, this is probably the best we can do
     // This does not seem to trigger descriptors reload.
     USBD_LL_Reset(&hUsbDeviceFS);
-#endif
 }