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Ondřej Hruška 8 years ago
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  1. 7
      .gitignore
  2. 2863
      Library/SPL/stm8s.h
  3. 970
      Library/SPL/stm8s_adc1.h
  4. 318
      Library/SPL/stm8s_awu.h
  5. 241
      Library/SPL/stm8s_beep.h
  6. 1059
      Library/SPL/stm8s_clk.h
  7. 293
      Library/SPL/stm8s_exti.h
  8. 785
      Library/SPL/stm8s_flash.c
  9. 319
      Library/SPL/stm8s_flash.h
  10. 381
      Library/SPL/stm8s_gpio.h
  11. 1463
      Library/SPL/stm8s_i2c.h
  12. 506
      Library/SPL/stm8s_itc.h
  13. 218
      Library/SPL/stm8s_iwdg.h
  14. 138
      Library/SPL/stm8s_rst.h
  15. 734
      Library/SPL/stm8s_spi.h
  16. 2812
      Library/SPL/stm8s_tim1.h
  17. 1553
      Library/SPL/stm8s_tim2.h
  18. 535
      Library/SPL/stm8s_tim4.h
  19. 1137
      Library/SPL/stm8s_uart1.h
  20. 189
      Library/SPL/stm8s_wwdg.h
  21. 71
      Makefile
  22. 12
      README.md
  23. 12
      User/main.c
  24. 116
      User/stm8s_conf.h
  25. 550
      User/stm8s_it.c
  26. 122
      User/stm8s_it.h

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cmake-build-debug/
Build/
CMakeLists.txt
*.o
*.rel
*.a
.idea/

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Library/SPL/stm8s.h
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/**
******************************************************************************
* @file stm8s_adc1.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all the prototypes/macros for the ADC1 peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_ADC1_H
#define __STM8S_ADC1_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/* Exported types ------------------------------------------------------------*/
/** @addtogroup ADC1_Exported_Types
* @{
*/
/**
* @brief ADC1 clock prescaler selection
*/
typedef enum {
ADC1_PRESSEL_FCPU_D2 = (uint8_t) 0x00, /**< Prescaler selection fADC1 = fcpu/2 */
ADC1_PRESSEL_FCPU_D3 = (uint8_t) 0x10, /**< Prescaler selection fADC1 = fcpu/3 */
ADC1_PRESSEL_FCPU_D4 = (uint8_t) 0x20, /**< Prescaler selection fADC1 = fcpu/4 */
ADC1_PRESSEL_FCPU_D6 = (uint8_t) 0x30, /**< Prescaler selection fADC1 = fcpu/6 */
ADC1_PRESSEL_FCPU_D8 = (uint8_t) 0x40, /**< Prescaler selection fADC1 = fcpu/8 */
ADC1_PRESSEL_FCPU_D10 = (uint8_t) 0x50, /**< Prescaler selection fADC1 = fcpu/10 */
ADC1_PRESSEL_FCPU_D12 = (uint8_t) 0x60, /**< Prescaler selection fADC1 = fcpu/12 */
ADC1_PRESSEL_FCPU_D18 = (uint8_t) 0x70 /**< Prescaler selection fADC1 = fcpu/18 */
} ADC1_PresSel_TypeDef;
/**
* @brief ADC1 External conversion trigger event selection
*/
typedef enum {
ADC1_EXTTRIG_TIM = (uint8_t) 0x00, /**< Conversion from Internal TIM1 TRGO event */
ADC1_EXTTRIG_GPIO = (uint8_t) 0x10 /**< Conversion from External interrupt on ADC_ETR pin*/
} ADC1_ExtTrig_TypeDef;
/**
* @brief ADC1 data alignment
*/
typedef enum {
ADC1_ALIGN_LEFT = (uint8_t) 0x00, /**< Data alignment left */
ADC1_ALIGN_RIGHT = (uint8_t) 0x08 /**< Data alignment right */
} ADC1_Align_TypeDef;
/**
* @brief ADC1 Interrupt source
*/
typedef enum {
ADC1_IT_AWDIE = (uint16_t) 0x010, /**< Analog WDG interrupt enable */
ADC1_IT_EOCIE = (uint16_t) 0x020, /**< EOC interrupt enable */
ADC1_IT_AWD = (uint16_t) 0x140, /**< Analog WDG status */
ADC1_IT_AWS0 = (uint16_t) 0x110, /**< Analog channel 0 status */
ADC1_IT_AWS1 = (uint16_t) 0x111, /**< Analog channel 1 status */
ADC1_IT_AWS2 = (uint16_t) 0x112, /**< Analog channel 2 status */
ADC1_IT_AWS3 = (uint16_t) 0x113, /**< Analog channel 3 status */
ADC1_IT_AWS4 = (uint16_t) 0x114, /**< Analog channel 4 status */
ADC1_IT_AWS5 = (uint16_t) 0x115, /**< Analog channel 5 status */
ADC1_IT_AWS6 = (uint16_t) 0x116, /**< Analog channel 6 status */
ADC1_IT_AWS7 = (uint16_t) 0x117, /**< Analog channel 7 status */
ADC1_IT_AWS8 = (uint16_t) 0x118, /**< Analog channel 8 status */
ADC1_IT_AWS9 = (uint16_t) 0x119, /**< Analog channel 9 status */
ADC1_IT_AWS12 = (uint16_t) 0x11C, /**< Analog channel 12 status */
/* refer to product datasheet for channel 12 availability */
ADC1_IT_EOC = (uint16_t) 0x080 /**< EOC pending bit */
} ADC1_IT_TypeDef;
/**
* @brief ADC1 Flags
*/
typedef enum {
ADC1_FLAG_OVR = (uint8_t) 0x41, /**< Overrun status flag */
ADC1_FLAG_AWD = (uint8_t) 0x40, /**< Analog WDG status */
ADC1_FLAG_AWS0 = (uint8_t) 0x10, /**< Analog channel 0 status */
ADC1_FLAG_AWS1 = (uint8_t) 0x11, /**< Analog channel 1 status */
ADC1_FLAG_AWS2 = (uint8_t) 0x12, /**< Analog channel 2 status */
ADC1_FLAG_AWS3 = (uint8_t) 0x13, /**< Analog channel 3 status */
ADC1_FLAG_AWS4 = (uint8_t) 0x14, /**< Analog channel 4 status */
ADC1_FLAG_AWS5 = (uint8_t) 0x15, /**< Analog channel 5 status */
ADC1_FLAG_AWS6 = (uint8_t) 0x16, /**< Analog channel 6 status */
ADC1_FLAG_AWS7 = (uint8_t) 0x17, /**< Analog channel 7 status */
ADC1_FLAG_AWS8 = (uint8_t) 0x18, /**< Analog channel 8 status*/
ADC1_FLAG_AWS9 = (uint8_t) 0x19, /**< Analog channel 9 status */
ADC1_FLAG_AWS12 = (uint8_t) 0x1C, /**< Analog channel 12 status */
/* refer to product datasheet for channel 12 availability */
ADC1_FLAG_EOC = (uint8_t) 0x80 /**< EOC falg */
} ADC1_Flag_TypeDef;
/**
* @brief ADC1 schmitt Trigger
*/
typedef enum {
ADC1_SCHMITTTRIG_CHANNEL0 = (uint8_t) 0x00, /**< Schmitt trigger disable on AIN0 */
ADC1_SCHMITTTRIG_CHANNEL1 = (uint8_t) 0x01, /**< Schmitt trigger disable on AIN1 */
ADC1_SCHMITTTRIG_CHANNEL2 = (uint8_t) 0x02, /**< Schmitt trigger disable on AIN2 */
ADC1_SCHMITTTRIG_CHANNEL3 = (uint8_t) 0x03, /**< Schmitt trigger disable on AIN3 */
ADC1_SCHMITTTRIG_CHANNEL4 = (uint8_t) 0x04, /**< Schmitt trigger disable on AIN4 */
ADC1_SCHMITTTRIG_CHANNEL5 = (uint8_t) 0x05, /**< Schmitt trigger disable on AIN5 */
ADC1_SCHMITTTRIG_CHANNEL6 = (uint8_t) 0x06, /**< Schmitt trigger disable on AIN6 */
ADC1_SCHMITTTRIG_CHANNEL7 = (uint8_t) 0x07, /**< Schmitt trigger disable on AIN7 */
ADC1_SCHMITTTRIG_CHANNEL8 = (uint8_t) 0x08, /**< Schmitt trigger disable on AIN8 */
ADC1_SCHMITTTRIG_CHANNEL9 = (uint8_t) 0x09, /**< Schmitt trigger disable on AIN9 */
ADC1_SCHMITTTRIG_CHANNEL12 = (uint8_t) 0x0C, /**< Schmitt trigger disable on AIN12 */
/* refer to product datasheet for channel 12 availability */
ADC1_SCHMITTTRIG_ALL = (uint8_t) 0xFF /**< Schmitt trigger disable on All channels */
} ADC1_SchmittTrigg_TypeDef;
/**
* @brief ADC1 conversion mode selection
*/
typedef enum {
ADC1_CONVERSIONMODE_SINGLE = (uint8_t) 0x00, /**< Single conversion mode */
ADC1_CONVERSIONMODE_CONTINUOUS = (uint8_t) 0x01 /**< Continuous conversion mode */
} ADC1_ConvMode_TypeDef;
/**
* @brief ADC1 analog channel selection
*/
typedef enum {
ADC1_CHANNEL_0 = (uint8_t) 0x00, /**< Analog channel 0 */
ADC1_CHANNEL_1 = (uint8_t) 0x01, /**< Analog channel 1 */
ADC1_CHANNEL_2 = (uint8_t) 0x02, /**< Analog channel 2 */
ADC1_CHANNEL_3 = (uint8_t) 0x03, /**< Analog channel 3 */
ADC1_CHANNEL_4 = (uint8_t) 0x04, /**< Analog channel 4 */
ADC1_CHANNEL_5 = (uint8_t) 0x05, /**< Analog channel 5 */
ADC1_CHANNEL_6 = (uint8_t) 0x06, /**< Analog channel 6 */
ADC1_CHANNEL_7 = (uint8_t) 0x07, /**< Analog channel 7 */
ADC1_CHANNEL_8 = (uint8_t) 0x08, /**< Analog channel 8 */
ADC1_CHANNEL_9 = (uint8_t) 0x09, /**< Analog channel 9 */
ADC1_CHANNEL_12 = (uint8_t) 0x0C /**< Analog channel 12 */
/* refer to product datasheet for channel 12 availability */
} ADC1_Channel_TypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/* Exported macros ------------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup ADC1_Private_Macros
* @brief Macros used by the assert function to check the different functions parameters.
* @{
*/
/**
* @brief Macro used by the assert function to check the different prescaler's values.
*/
#define IS_ADC1_PRESSEL_OK(PRESCALER) (((PRESCALER) == ADC1_PRESSEL_FCPU_D2) || \
((PRESCALER) == ADC1_PRESSEL_FCPU_D3) || \
((PRESCALER) == ADC1_PRESSEL_FCPU_D4) || \
((PRESCALER) == ADC1_PRESSEL_FCPU_D6) || \
((PRESCALER) == ADC1_PRESSEL_FCPU_D8) || \
((PRESCALER) == ADC1_PRESSEL_FCPU_D10) || \
((PRESCALER) == ADC1_PRESSEL_FCPU_D12) || \
((PRESCALER) == ADC1_PRESSEL_FCPU_D18))
/**
* @brief Macro used by the assert function to check the different external trigger values.
*/
#define IS_ADC1_EXTTRIG_OK(EXTRIG) (((EXTRIG) == ADC1_EXTTRIG_TIM) || \
((EXTRIG) == ADC1_EXTTRIG_GPIO))
/**
* @brief Macro used by the assert function to check the different alignment modes.
*/
#define IS_ADC1_ALIGN_OK(ALIGN) (((ALIGN) == ADC1_ALIGN_LEFT) || \
((ALIGN) == ADC1_ALIGN_RIGHT))
/**
* @brief Macro used by the assert function to check the Interrupt source.
*/
#define IS_ADC1_IT_OK(IT) (((IT) == ADC1_IT_EOCIE) || \
((IT) == ADC1_IT_AWDIE))
/**
* @brief Macro used by the assert function to check the ADC1 Flag.
*/
#define IS_ADC1_FLAG_OK(FLAG) (((FLAG) == ADC1_FLAG_EOC)|| \
((FLAG) == ADC1_FLAG_OVR) || \
((FLAG) == ADC1_FLAG_AWD) || \
((FLAG) == ADC1_FLAG_AWS0) || \
((FLAG) == ADC1_FLAG_AWS1) || \
((FLAG) == ADC1_FLAG_AWS2) || \
((FLAG) == ADC1_FLAG_AWS3) || \
((FLAG) == ADC1_FLAG_AWS4) || \
((FLAG) == ADC1_FLAG_AWS5) || \
((FLAG) == ADC1_FLAG_AWS6) || \
((FLAG) == ADC1_FLAG_AWS7) || \
((FLAG) == ADC1_FLAG_AWS8) || \
((FLAG) == ADC1_FLAG_AWS9))
/**
* @brief Macro used by the assert function to check the ADC1 pending bits.
*/
#define IS_ADC1_ITPENDINGBIT_OK(ITPENDINGBIT) (((ITPENDINGBIT) == ADC1_IT_EOC) || \
((ITPENDINGBIT) == ADC1_IT_AWD) || \
((ITPENDINGBIT) == ADC1_IT_AWS0) || \
((ITPENDINGBIT) == ADC1_IT_AWS1) || \
((ITPENDINGBIT) == ADC1_IT_AWS2) || \
((ITPENDINGBIT) == ADC1_IT_AWS3) || \
((ITPENDINGBIT) == ADC1_IT_AWS4) || \
((ITPENDINGBIT) == ADC1_IT_AWS5) || \
((ITPENDINGBIT) == ADC1_IT_AWS6) || \
((ITPENDINGBIT) == ADC1_IT_AWS7) || \
((ITPENDINGBIT) == ADC1_IT_AWS8) || \
((ITPENDINGBIT) == ADC1_IT_AWS12) || \
((ITPENDINGBIT) == ADC1_IT_AWS9))
/**
* @brief Macro used by the assert function to check the different schmitt trigger values.
*/
#define IS_ADC1_SCHMITTTRIG_OK(SCHMITTTRIG) (((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL0) || \
((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL1) || \
((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL2) || \
((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL3) || \
((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL4) || \
((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL5) || \
((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL6) || \
((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL7) || \
((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL8) || \
((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL12) || \
((SCHMITTTRIG) == ADC1_SCHMITTTRIG_ALL) || \
((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL9))
/**
* @brief Macro used by the assert function to check the different conversion modes.
*/
#define IS_ADC1_CONVERSIONMODE_OK(MODE) (((MODE) == ADC1_CONVERSIONMODE_SINGLE) || \
((MODE) == ADC1_CONVERSIONMODE_CONTINUOUS))
/**
* @brief Macro used by the assert function to check the different channels values.
*/
#define IS_ADC1_CHANNEL_OK(CHANNEL) (((CHANNEL) == ADC1_CHANNEL_0) || \
((CHANNEL) == ADC1_CHANNEL_1) || \
((CHANNEL) == ADC1_CHANNEL_2) || \
((CHANNEL) == ADC1_CHANNEL_3) || \
((CHANNEL) == ADC1_CHANNEL_4) || \
((CHANNEL) == ADC1_CHANNEL_5) || \
((CHANNEL) == ADC1_CHANNEL_6) || \
((CHANNEL) == ADC1_CHANNEL_7) || \
((CHANNEL) == ADC1_CHANNEL_8) || \
((CHANNEL) == ADC1_CHANNEL_12) || \
((CHANNEL) == ADC1_CHANNEL_9))
/**
* @brief Macro used by the assert function to check the possible buffer values.
*/
#define IS_ADC1_BUFFER_OK(BUFFER) ((BUFFER) <= (uint8_t)0x09)
/**
* @}
*/
/* Exported functions ------------------------------------------------------- */
#if 0
/** @addtogroup ADC1_Exported_Functions
* @{
*/
void ADC1_DeInit(void);
void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode,
ADC1_Channel_TypeDef ADC1_Channel,
ADC1_PresSel_TypeDef ADC1_PrescalerSelection,
ADC1_ExtTrig_TypeDef ADC1_ExtTrigger,
FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align,
ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel,
FunctionalState ADC1_SchmittTriggerState);
void ADC1_Cmd(FunctionalState NewState);
void ADC1_ScanModeCmd(FunctionalState NewState);
void ADC1_DataBufferCmd(FunctionalState NewState);
void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState);
void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler);
void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel,
FunctionalState NewState);
void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode,
ADC1_Channel_TypeDef ADC1_Channel,
ADC1_Align_TypeDef ADC1_Align);
void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState);
void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState);
void ADC1_StartConversion(void);
uint16_t ADC1_GetConversionValue(void);
void ADC1_SetHighThreshold(uint16_t Threshold);
void ADC1_SetLowThreshold(uint16_t Threshold);
uint16_t ADC1_GetBufferValue(uint8_t Buffer);
FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel);
FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag);
void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag);
ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit);
void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit);
#endif
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Public functions ----------------------------------------------------------*/
/**
* @addtogroup ADC1_Public_Functions
* @{
*/
/**
* @brief Deinitializes the ADC1 peripheral registers to their default reset values.
* @param None
* @retval None
*/
inline void ADC1_DeInit(void)
{
ADC1->CSR = ADC1_CSR_RESET_VALUE;
ADC1->CR1 = ADC1_CR1_RESET_VALUE;
ADC1->CR2 = ADC1_CR2_RESET_VALUE;
ADC1->CR3 = ADC1_CR3_RESET_VALUE;
ADC1->TDRH = ADC1_TDRH_RESET_VALUE;
ADC1->TDRL = ADC1_TDRL_RESET_VALUE;
ADC1->HTRH = ADC1_HTRH_RESET_VALUE;
ADC1->HTRL = ADC1_HTRL_RESET_VALUE;
ADC1->LTRH = ADC1_LTRH_RESET_VALUE;
ADC1->LTRL = ADC1_LTRL_RESET_VALUE;
ADC1->AWCRH = ADC1_AWCRH_RESET_VALUE;
ADC1->AWCRL = ADC1_AWCRL_RESET_VALUE;
}
/**
* @brief Configure the ADC1 conversion on selected channel.
* @param ADC1_ConversionMode Specifies the conversion type.
* It can be set of the values of @ref ADC1_ConvMode_TypeDef
* @param ADC1_Channel specifies the ADC1 Channel.
* It can be set of the values of @ref ADC1_Channel_TypeDef
* @param ADC1_Align specifies the converted data alignment.
* It can be set of the values of @ref ADC1_Align_TypeDef
* @retval None
*/
inline void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel,
ADC1_Align_TypeDef ADC1_Align)
{
/* Check the parameters */
assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode));
assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel));
assert_param(IS_ADC1_ALIGN_OK(ADC1_Align));
/* Clear the align bit */
ADC1->CR2 &= (uint8_t) (~ADC1_CR2_ALIGN);
/* Configure the data alignment */
ADC1->CR2 |= (uint8_t) (ADC1_Align);
if (ADC1_ConversionMode == ADC1_CONVERSIONMODE_CONTINUOUS) {
/* Set the continuous conversion mode */
ADC1->CR1 |= ADC1_CR1_CONT;
} else /* ADC1_ConversionMode == ADC1_CONVERSIONMODE_SINGLE */
{
/* Set the single conversion mode */
ADC1->CR1 &= (uint8_t) (~ADC1_CR1_CONT);
}
/* Clear the ADC1 channels */
ADC1->CSR &= (uint8_t) (~ADC1_CSR_CH);
/* Select the ADC1 channel */
ADC1->CSR |= (uint8_t) (ADC1_Channel);
}
/**
* @brief Enables or disables the ADC1 Schmitt Trigger on a selected channel.
* @param ADC1_SchmittTriggerChannel specifies the desired Channel.
* It can be set of the values of @ref ADC1_SchmittTrigg_TypeDef.
* @param NewState specifies Channel new status.
* can have one of the values of @ref FunctionalState.
* @retval None
*/
inline void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel));
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (ADC1_SchmittTriggerChannel == ADC1_SCHMITTTRIG_ALL) {
if (NewState != DISABLE) {
ADC1->TDRL &= (uint8_t) 0x0;
ADC1->TDRH &= (uint8_t) 0x0;
} else /* NewState == DISABLE */
{
ADC1->TDRL |= (uint8_t) 0xFF;
ADC1->TDRH |= (uint8_t) 0xFF;
}
} else if (ADC1_SchmittTriggerChannel < ADC1_SCHMITTTRIG_CHANNEL8) {
if (NewState != DISABLE) {
ADC1->TDRL &= (uint8_t) (~(uint8_t) ((uint8_t) 0x01 << (uint8_t) ADC1_SchmittTriggerChannel));
} else /* NewState == DISABLE */
{
ADC1->TDRL |= (uint8_t) ((uint8_t) 0x01 << (uint8_t) ADC1_SchmittTriggerChannel);
}
} else /* ADC1_SchmittTriggerChannel >= ADC1_SCHMITTTRIG_CHANNEL8 */
{
if (NewState != DISABLE) {
ADC1->TDRH &= (uint8_t) (~(uint8_t) ((uint8_t) 0x01
<< ((uint8_t) ADC1_SchmittTriggerChannel - (uint8_t) 8)));
} else /* NewState == DISABLE */
{
ADC1->TDRH |= (uint8_t) ((uint8_t) 0x01 << ((uint8_t) ADC1_SchmittTriggerChannel - (uint8_t) 8));
}
}
}
/**
* @brief Configure the ADC1 prescaler division factor.
* @param ADC1_Prescaler: the selected precaler.
* It can be one of the values of @ref ADC1_PresSel_TypeDef.
* @retval None
*/
inline void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler)
{
/* Check the parameter */
assert_param(IS_ADC1_PRESSEL_OK(ADC1_Prescaler));
/* Clear the SPSEL bits */
ADC1->CR1 &= (uint8_t) (~ADC1_CR1_SPSEL);
/* Select the prescaler division factor according to ADC1_PrescalerSelection values */
ADC1->CR1 |= (uint8_t) (ADC1_Prescaler);
}
/**
* @brief Configure the ADC1 conversion on external trigger event.
* @par Full description:
* The selected external trigger event can be enabled or disabled.
* @param ADC1_ExtTrigger to select the External trigger event.
* can have one of the values of @ref ADC1_ExtTrig_TypeDef.
* @param NewState to enable/disable the selected external trigger
* can have one of the values of @ref FunctionalState.
* @retval None
*/
inline void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger));
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
/* Clear the external trigger selection bits */
ADC1->CR2 &= (uint8_t) (~ADC1_CR2_EXTSEL);
if (NewState != DISABLE) {
/* Enable the selected external Trigger */
ADC1->CR2 |= (uint8_t) (ADC1_CR2_EXTTRIG);
} else /* NewState == DISABLE */
{
/* Disable the selected external trigger */
ADC1->CR2 &= (uint8_t) (~ADC1_CR2_EXTTRIG);
}
/* Set the selected external trigger */
ADC1->CR2 |= (uint8_t) (ADC1_ExtTrigger);
}
/**
* @brief Initializes the ADC1 peripheral according to the specified parameters
* @param ADC1_ConversionMode: specifies the conversion mode
* can be one of the values of @ref ADC1_ConvMode_TypeDef.
* @param ADC1_Channel: specifies the channel to convert
* can be one of the values of @ref ADC1_Channel_TypeDef.
* @param ADC1_PrescalerSelection: specifies the ADC1 prescaler
* can be one of the values of @ref ADC1_PresSel_TypeDef.
* @param ADC1_ExtTrigger: specifies the external trigger
* can be one of the values of @ref ADC1_ExtTrig_TypeDef.
* @param ADC1_ExtTriggerState: specifies the external trigger new state
* can be one of the values of @ref FunctionalState.
* @param ADC1_Align: specifies the converted data alignment
* can be one of the values of @ref ADC1_Align_TypeDef.
* @param ADC1_SchmittTriggerChannel: specifies the schmitt trigger channel
* can be one of the values of @ref ADC1_SchmittTrigg_TypeDef.
* @param ADC1_SchmittTriggerState: specifies the schmitt trigger state
* can be one of the values of @ref FunctionalState.
* @retval None
*/
inline void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel,
ADC1_PresSel_TypeDef ADC1_PrescalerSelection, ADC1_ExtTrig_TypeDef ADC1_ExtTrigger,
FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align,
ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState ADC1_SchmittTriggerState)
{
/* Check the parameters */
assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode));
assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel));
assert_param(IS_ADC1_PRESSEL_OK(ADC1_PrescalerSelection));
assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger));
assert_param(IS_FUNCTIONALSTATE_OK(((ADC1_ExtTriggerState))));
assert_param(IS_ADC1_ALIGN_OK(ADC1_Align));
assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel));
assert_param(IS_FUNCTIONALSTATE_OK(ADC1_SchmittTriggerState));
/*-----------------CR1 & CSR configuration --------------------*/
/* Configure the conversion mode and the channel to convert
respectively according to ADC1_ConversionMode & ADC1_Channel values & ADC1_Align values */
ADC1_ConversionConfig(ADC1_ConversionMode, ADC1_Channel, ADC1_Align);
/* Select the prescaler division factor according to ADC1_PrescalerSelection values */
ADC1_PrescalerConfig(ADC1_PrescalerSelection);
/*-----------------CR2 configuration --------------------*/
/* Configure the external trigger state and event respectively
according to NewState, ADC1_ExtTrigger */
ADC1_ExternalTriggerConfig(ADC1_ExtTrigger, ADC1_ExtTriggerState);
/*------------------TDR configuration ---------------------------*/
/* Configure the schmitt trigger channel and state respectively
according to ADC1_SchmittTriggerChannel & ADC1_SchmittTriggerNewState values */
ADC1_SchmittTriggerConfig(ADC1_SchmittTriggerChannel, ADC1_SchmittTriggerState);
/* Enable the ADC1 peripheral */
ADC1->CR1 |= ADC1_CR1_ADON;
}
/**
* @brief Enables or Disables the ADC1 peripheral.
* @param NewState: specifies the peripheral enabled or disabled state.
* @retval None
*/
inline void ADC1_Cmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE) {
ADC1->CR1 |= ADC1_CR1_ADON;
} else /* NewState == DISABLE */
{
ADC1->CR1 &= (uint8_t) (~ADC1_CR1_ADON);
}
}
/**
* @brief Enables or Disables the ADC1 scan mode.
* @param NewState: specifies the selected mode enabled or disabled state.
* @retval None
*/
inline void ADC1_ScanModeCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE) {
ADC1->CR2 |= ADC1_CR2_SCAN;
} else /* NewState == DISABLE */
{
ADC1->CR2 &= (uint8_t) (~ADC1_CR2_SCAN);
}
}
/**
* @brief Enables or Disables the ADC1 data store into the Data Buffer registers rather than in the Data Register
* @param NewState: specifies the selected mode enabled or disabled state.
* @retval None
*/
inline void ADC1_DataBufferCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE) {
ADC1->CR3 |= ADC1_CR3_DBUF;
} else /* NewState == DISABLE */
{
ADC1->CR3 &= (uint8_t) (~ADC1_CR3_DBUF);
}
}
/**
* @brief Enables or disables the ADC1 interrupt.
* @param ADC1_IT specifies the name of the interrupt to enable or disable.
* This parameter can be one of the following values:
* - ADC1_IT_AWDITEN : Analog WDG interrupt enable
* - ADC1_IT_EOCITEN : EOC iterrupt enable
* @param NewState specifies the state of the interrupt to apply.
* @retval None
*/
inline void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_ADC1_IT_OK(ADC1_IT));
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE) {
/* Enable the ADC1 interrupts */
ADC1->CSR |= (uint8_t) ADC1_IT;
} else /* NewState == DISABLE */
{
/* Disable the ADC1 interrupts */
ADC1->CSR &= (uint8_t) ((uint16_t) ~(uint16_t) ADC1_IT);
}
}
/**
* @brief Start ADC1 conversion
* @par Full description:
* This function triggers the start of conversion, after ADC1 configuration.
* @param None
* @retval None
* @par Required preconditions:
* Enable the ADC1 peripheral before calling this function
*/
inline void ADC1_StartConversion(void)
{
ADC1->CR1 |= ADC1_CR1_ADON;
}
/**
* @brief Get one sample of measured signal.
* @param None
* @retval ConversionValue: value of the measured signal.
* @par Required preconditions:
* ADC1 conversion finished.
*/
inline uint16_t ADC1_GetConversionValue(void)
{
uint16_t temph = 0;
uint8_t templ = 0;
if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */
{
/* Read LSB first */
templ = ADC1->DRL;
/* Then read MSB */
temph = ADC1->DRH;
temph = (uint16_t) (templ | (uint16_t) (temph << (uint8_t) 8));
} else /* Left alignment */
{
/* Read MSB first*/
temph = ADC1->DRH;
/* Then read LSB */
templ = ADC1->DRL;
temph = (uint16_t) ((uint16_t) ((uint16_t) templ << 6) | (uint16_t) ((uint16_t) temph << 8));
}
return ((uint16_t) temph);
}
/**
* @brief Enables or disables the analog watchdog for the given channel.
* @param Channel specifies the desired Channel.
* It can be set of the values of @ref ADC1_Channel_TypeDef.
* @param NewState specifies the analog watchdog new state.
* can have one of the values of @ref FunctionalState.
* @retval None
*/
inline void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
assert_param(IS_ADC1_CHANNEL_OK(Channel));
if (Channel < (uint8_t) 8) {
if (NewState != DISABLE) {
ADC1->AWCRL |= (uint8_t) ((uint8_t) 1 << Channel);
} else /* NewState == DISABLE */
{
ADC1->AWCRL &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << Channel);
}
} else {
if (NewState != DISABLE) {
ADC1->AWCRH |= (uint8_t) ((uint8_t) 1 << (Channel - (uint8_t) 8));
} else /* NewState == DISABLE */
{
ADC1->AWCRH &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << (uint8_t) (Channel - (uint8_t) 8));
}
}
}
/**
* @brief Sets the high threshold of the analog watchdog.
* @param Threshold specifies the high threshold value.
* this value depends on the reference voltage range.
* @retval None
*/
inline void ADC1_SetHighThreshold(uint16_t Threshold)
{
ADC1->HTRH = (uint8_t) (Threshold >> (uint8_t) 2);
ADC1->HTRL = (uint8_t) Threshold;
}
/**
* @brief Sets the low threshold of the analog watchdog.
* @param Threshold specifies the low threshold value.
* this value depends on the reference voltage range.
* @retval None
*/
inline void ADC1_SetLowThreshold(uint16_t Threshold)
{
ADC1->LTRL = (uint8_t) Threshold;
ADC1->LTRH = (uint8_t) (Threshold >> (uint8_t) 2);
}
/**
* @brief Get one sample of measured signal.
* @param Buffer specifies the buffer to read.
* @retval BufferValue: value read from the given buffer.
* @par Required preconditions:
* ADC1 conversion finished.
*/
inline uint16_t ADC1_GetBufferValue(uint8_t Buffer)
{
uint16_t temph = 0;
uint8_t templ = 0;
/* Check the parameters */
assert_param(IS_ADC1_BUFFER_OK(Buffer));
if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */
{
/* Read LSB first */
templ = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1) + 1);
/* Then read MSB */
temph = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1));
temph = (uint16_t) (templ | (uint16_t) (temph << (uint8_t) 8));
} else /* Left alignment */
{
/* Read MSB first*/
temph = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1));
/* Then read LSB */
templ = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1) + 1);
temph = (uint16_t) ((uint16_t) ((uint16_t) templ << 6) | (uint16_t) (temph << 8));
}
return ((uint16_t) temph);
}
/**
* @brief Checks the specified analog watchdog channel status.
* @param Channel: specify the channel of which to check the analog watchdog
* can be one of the values of @ref ADC1_Channel_TypeDef.
* @retval FlagStatus Status of the analog watchdog.
*/
inline FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel)
{
uint8_t status = 0;
/* Check the parameters */
assert_param(IS_ADC1_CHANNEL_OK(Channel));
if (Channel < (uint8_t) 8) {
status = (uint8_t) (ADC1->AWSRL & (uint8_t) ((uint8_t) 1 << Channel));
} else /* Channel = 8 | 9 */
{
status = (uint8_t) (ADC1->AWSRH & (uint8_t) ((uint8_t) 1 << (Channel - (uint8_t) 8)));
}
return ((FlagStatus) status);
}
/**
* @brief Checks the specified ADC1 flag status.
* @param Flag: ADC1 flag.
* can be one of the values of @ref ADC1_Flag_TypeDef.
* @retval FlagStatus Status of the ADC1 flag.
*/
inline FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag)
{
uint8_t flagstatus = 0;
uint8_t temp = 0;
/* Check the parameters */
assert_param(IS_ADC1_FLAG_OK(Flag));
if ((Flag & 0x0F) == 0x01) {
/* Get OVR flag status */
flagstatus = (uint8_t) (ADC1->CR3 & ADC1_CR3_OVR);
} else if ((Flag & 0xF0) == 0x10) {
/* Get analog watchdog channel status */
temp = (uint8_t) (Flag & (uint8_t) 0x0F);
if (temp < 8) {
flagstatus = (uint8_t) (ADC1->AWSRL & (uint8_t) ((uint8_t) 1 << temp));
} else {
flagstatus = (uint8_t) (ADC1->AWSRH & (uint8_t) ((uint8_t) 1 << (temp - 8)));
}
} else /* Get EOC | AWD flag status */
{
flagstatus = (uint8_t) (ADC1->CSR & Flag);
}
return ((FlagStatus) flagstatus);
}
/**
* @brief Clear the specified ADC1 Flag.
* @param Flag: ADC1 flag.
* can be one of the values of @ref ADC1_Flag_TypeDef.
* @retval None
*/
inline void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag)
{
uint8_t temp = 0;
/* Check the parameters */
assert_param(IS_ADC1_FLAG_OK(Flag));
if ((Flag & 0x0F) == 0x01) {
/* Clear OVR flag status */
ADC1->CR3 &= (uint8_t) (~ADC1_CR3_OVR);
} else if ((Flag & 0xF0) == 0x10) {
/* Clear analog watchdog channel status */
temp = (uint8_t) (Flag & (uint8_t) 0x0F);
if (temp < 8) {
ADC1->AWSRL &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << temp);
} else {
ADC1->AWSRH &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << (temp - 8));
}
} else /* Clear EOC | AWD flag status */
{
ADC1->CSR &= (uint8_t) (~Flag);
}
}
/**
* @brief Returns the specified pending bit status
* @param ITPendingBit : the IT pending bit to check.
* This parameter can be one of the following values:
* - ADC1_IT_AWD : Analog WDG IT status
* - ADC1_IT_AWS0 : Analog channel 0 IT status
* - ADC1_IT_AWS1 : Analog channel 1 IT status
* - ADC1_IT_AWS2 : Analog channel 2 IT status
* - ADC1_IT_AWS3 : Analog channel 3 IT status
* - ADC1_IT_AWS4 : Analog channel 4 IT status
* - ADC1_IT_AWS5 : Analog channel 5 IT status
* - ADC1_IT_AWS6 : Analog channel 6 IT status
* - ADC1_IT_AWS7 : Analog channel 7 IT status
* - ADC1_IT_AWS8 : Analog channel 8 IT status
* - ADC1_IT_AWS9 : Analog channel 9 IT status
* - ADC1_IT_EOC : EOC pending bit
* @retval ITStatus: status of the specified pending bit.
*/
inline ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit)
{
ITStatus itstatus = RESET;
uint8_t temp = 0;
/* Check the parameters */
assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit));
if (((uint16_t) ITPendingBit & 0xF0) == 0x10) {
/* Get analog watchdog channel status */
temp = (uint8_t) ((uint16_t) ITPendingBit & 0x0F);
if (temp < 8) {
itstatus = (ITStatus) (ADC1->AWSRL & (uint8_t) ((uint8_t) 1 << temp));
} else {
itstatus = (ITStatus) (ADC1->AWSRH & (uint8_t) ((uint8_t) 1 << (temp - 8)));
}
} else /* Get EOC | AWD flag status */
{
itstatus = (ITStatus) (ADC1->CSR & (uint8_t) ITPendingBit);
}
return ((ITStatus) itstatus);
}
/**
* @brief Clear the ADC1 End of Conversion pending bit.
* @param ITPendingBit : the IT pending bit to clear.
* This parameter can be one of the following values:
* - ADC1_IT_AWD : Analog WDG IT status
* - ADC1_IT_AWS0 : Analog channel 0 IT status
* - ADC1_IT_AWS1 : Analog channel 1 IT status
* - ADC1_IT_AWS2 : Analog channel 2 IT status
* - ADC1_IT_AWS3 : Analog channel 3 IT status
* - ADC1_IT_AWS4 : Analog channel 4 IT status
* - ADC1_IT_AWS5 : Analog channel 5 IT status
* - ADC1_IT_AWS6 : Analog channel 6 IT status
* - ADC1_IT_AWS7 : Analog channel 7 IT status
* - ADC1_IT_AWS8 : Analog channel 8 IT status
* - ADC1_IT_AWS9 : Analog channel 9 IT status
* - ADC1_IT_EOC : EOC pending bit
* @retval None
*/
inline void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit)
{
uint8_t temp = 0;
/* Check the parameters */
assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit));
if (((uint16_t) ITPendingBit & 0xF0) == 0x10) {
/* Clear analog watchdog channel status */
temp = (uint8_t) ((uint16_t) ITPendingBit & 0x0F);
if (temp < 8) {
ADC1->AWSRL &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << temp);
} else {
ADC1->AWSRH &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << (temp - 8));
}
} else /* Clear EOC | AWD flag status */
{
ADC1->CSR &= (uint8_t) ((uint16_t) ~(uint16_t) ITPendingBit);
}
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#endif /* __STM8S_ADC1_H */

318
Library/SPL/stm8s_awu.h
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@ -0,0 +1,318 @@
/**
******************************************************************************
* @file stm8s_awu.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all functions prototype and macros for the AWU peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_AWU_H
#define __STM8S_AWU_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/* Exported types ------------------------------------------------------------*/
/** @addtogroup AWU_Exported_Types
* @{
*/
/**
* @brief AWU TimeBase selection
*/
typedef enum {
AWU_TIMEBASE_NO_IT = (uint8_t) 0, /*!< No AWU interrupt selected */
AWU_TIMEBASE_250US = (uint8_t) 1, /*!< AWU Timebase equals 0.25 ms */
AWU_TIMEBASE_500US = (uint8_t) 2, /*!< AWU Timebase equals 0.5 ms */
AWU_TIMEBASE_1MS = (uint8_t) 3, /*!< AWU Timebase equals 1 ms */
AWU_TIMEBASE_2MS = (uint8_t) 4, /*!< AWU Timebase equals 2 ms */
AWU_TIMEBASE_4MS = (uint8_t) 5, /*!< AWU Timebase equals 4 ms */
AWU_TIMEBASE_8MS = (uint8_t) 6, /*!< AWU Timebase equals 8 ms */
AWU_TIMEBASE_16MS = (uint8_t) 7, /*!< AWU Timebase equals 16 ms */
AWU_TIMEBASE_32MS = (uint8_t) 8, /*!< AWU Timebase equals 32 ms */
AWU_TIMEBASE_64MS = (uint8_t) 9, /*!< AWU Timebase equals 64 ms */
AWU_TIMEBASE_128MS = (uint8_t) 10, /*!< AWU Timebase equals 128 ms */
AWU_TIMEBASE_256MS = (uint8_t) 11, /*!< AWU Timebase equals 256 ms */
AWU_TIMEBASE_512MS = (uint8_t) 12, /*!< AWU Timebase equals 512 ms */
AWU_TIMEBASE_1S = (uint8_t) 13, /*!< AWU Timebase equals 1 s */
AWU_TIMEBASE_2S = (uint8_t) 14, /*!< AWU Timebase equals 2 s */
AWU_TIMEBASE_12S = (uint8_t) 15, /*!< AWU Timebase equals 12 s */
AWU_TIMEBASE_30S = (uint8_t) 16 /*!< AWU Timebase equals 30 s */
} AWU_Timebase_TypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @addtogroup AWU_Exported_Constants
* @{
*/
#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */
#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */
/**
* @}
*/
/* Exported macros ------------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup AWU_Private_Macros
* @{
*/
/**
* @brief Macro used by the assert function to check the different functions parameters.
*/
/**
* @brief Macro used by the assert function to check the AWU timebases
*/
#define IS_AWU_TIMEBASE_OK(TB) \
(((TB) == AWU_TIMEBASE_NO_IT) || \
((TB) == AWU_TIMEBASE_250US) || \
((TB) == AWU_TIMEBASE_500US) || \
((TB) == AWU_TIMEBASE_1MS) || \
((TB) == AWU_TIMEBASE_2MS) || \
((TB) == AWU_TIMEBASE_4MS) || \
((TB) == AWU_TIMEBASE_8MS) || \
((TB) == AWU_TIMEBASE_16MS) || \
((TB) == AWU_TIMEBASE_32MS) || \
((TB) == AWU_TIMEBASE_64MS) || \
((TB) == AWU_TIMEBASE_128MS) || \
((TB) == AWU_TIMEBASE_256MS) || \
((TB) == AWU_TIMEBASE_512MS) || \
((TB) == AWU_TIMEBASE_1S) || \
((TB) == AWU_TIMEBASE_2S) || \
((TB) == AWU_TIMEBASE_12S) || \
((TB) == AWU_TIMEBASE_30S))
/**
* @brief Macro used by the assert function to check the LSI frequency (in Hz)
*/
#define IS_LSI_FREQUENCY_OK(FREQ) \
(((FREQ) >= LSI_FREQUENCY_MIN) && \
((FREQ) <= LSI_FREQUENCY_MAX))
/**
* @}
*/
/* Exported functions ------------------------------------------------------- */
#if 0
/** @addtogroup AWU_Exported_Functions
* @{
*/
void AWU_DeInit(void);
void AWU_Init(AWU_Timebase_TypeDef AWU_TimeBase);
void AWU_Cmd(FunctionalState NewState);
void AWU_LSICalibrationConfig(uint32_t LSIFreqHz);
void AWU_IdleModeEnable(void);
FlagStatus AWU_GetFlagStatus(void);
#endif
/**
* @}
*/
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Public functions ----------------------------------------------------------*/
/**
* @addtogroup AWU_Public_Functions
* @{
*/
/**
* @brief Deinitializes the AWU peripheral registers to their default reset
* values.
* @param None
* @retval None
*/
inline void AWU_DeInit(void)
{
AWU->CSR = AWU_CSR_RESET_VALUE;
AWU->APR = AWU_APR_RESET_VALUE;
AWU->TBR = AWU_TBR_RESET_VALUE;
}
/**
* @brief Initializes the AWU peripheral according to the specified parameters.
* @param AWU_TimeBase : Time base selection (interval between AWU interrupts).
* can be one of the values of @ref AWU_Timebase_TypeDef.
* @retval None
* @par Required preconditions:
* The LS RC calibration must be performed before calling this function.
*/
inline void AWU_Init(AWU_Timebase_TypeDef AWU_TimeBase)
{
/* See also AWU_Timebase_TypeDef structure in stm8s_awu.h file :
N 2 5 1 2 4 8 1 3 6 1 2 5 1 2 1 3
O 5 0 m m m m 6 2 4 2 5 1 s s 2 0
I 0 0 s s s s m m m 8 6 2 s s
T u u s s s m m m
s s s s s
*/
/** Contains the different values to write in the APR register (used by AWU_Init function) */
static CONST uint8_t APR_Array[17] =
{
0, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 61, 23, 23, 62
};
/** Contains the different values to write in the TBR register (used by AWU_Init function) */
static CONST uint8_t TBR_Array[17] =
{
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 12, 14, 15, 15
};
/* Check parameter */
assert_param(IS_AWU_TIMEBASE_OK(AWU_TimeBase));
/* Enable the AWU peripheral */
AWU->CSR |= AWU_CSR_AWUEN;
/* Set the TimeBase */
AWU->TBR &= (uint8_t) (~AWU_TBR_AWUTB);
AWU->TBR |= TBR_Array[(uint8_t) AWU_TimeBase];
/* Set the APR divider */
AWU->APR &= (uint8_t) (~AWU_APR_APR);
AWU->APR |= APR_Array[(uint8_t) AWU_TimeBase];
}
/**
* @brief Enable or disable the AWU peripheral.
* @param NewState Indicates the new state of the AWU peripheral.
* @retval None
* @par Required preconditions:
* Initialisation of AWU and LS RC calibration must be done before.
*/
inline void AWU_Cmd(FunctionalState NewState)
{
if (NewState != DISABLE) {
/* Enable the AWU peripheral */
AWU->CSR |= AWU_CSR_AWUEN;
} else {
/* Disable the AWU peripheral */
AWU->CSR &= (uint8_t) (~AWU_CSR_AWUEN);
}
}
/**
* @brief Update APR register with the measured LSI frequency.
* @par Note on the APR calculation:
* A is the integer part of lsifreqkhz/4 and x the decimal part.
* x <= A/(1+2A) is equivalent to A >= x(1+2A) and also to 4A >= 4x(1+2A) [F1]
* but we know that A + x = lsifreqkhz/4 ==> 4x = lsifreqkhz-4A
* so [F1] can be written :
* 4A >= (lsifreqkhz-4A)(1+2A)
* @param LSIFreqHz Low Speed RC frequency measured by timer (in Hz).
* @retval None
* @par Required preconditions:
* - AWU must be disabled to avoid unwanted interrupts.
*/
inline void AWU_LSICalibrationConfig(uint32_t LSIFreqHz)
{
uint16_t lsifreqkhz = 0x0;
uint16_t A = 0x0;
/* Check parameter */
assert_param(IS_LSI_FREQUENCY_OK(LSIFreqHz));
lsifreqkhz = (uint16_t) (LSIFreqHz / 1000); /* Converts value in kHz */
/* Calculation of AWU calibration value */
A = (uint16_t) (lsifreqkhz >> 2U); /* Division by 4, keep integer part only */
if ((4U * A) >= ((lsifreqkhz - (4U * A)) * (1U + (2U * A)))) {
AWU->APR = (uint8_t) (A - 2U);
} else {
AWU->APR = (uint8_t) (A - 1U);
}
}
/**
* @brief Configures AWU in Idle mode to reduce power consumption.
* @param None
* @retval None
*/
inline void AWU_IdleModeEnable(void)
{
/* Disable AWU peripheral */
AWU->CSR &= (uint8_t) (~AWU_CSR_AWUEN);
/* No AWU timebase */
AWU->TBR = (uint8_t) (~AWU_TBR_AWUTB);
}
/**
* @brief Returns status of the AWU peripheral flag.
* @param None
* @retval FlagStatus : Status of the AWU flag.
* This parameter can be any of the @ref FlagStatus enumeration.
*/
inline FlagStatus AWU_GetFlagStatus(void)
{
return ((FlagStatus) (((uint8_t) (AWU->CSR & AWU_CSR_AWUF) == (uint8_t) 0x00) ? RESET : SET));
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#endif /* __STM8S_AWU_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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Library/SPL/stm8s_beep.h
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/**
******************************************************************************
* @file stm8s_beep.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all functions prototype and macros for the BEEP peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_BEEP_H
#define __STM8S_BEEP_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/* Exported types ------------------------------------------------------------*/
/** @addtogroup BEEP_Exported_Types
* @{
*/
/**
* @brief BEEP Frequency selection
*/
typedef enum {
BEEP_FREQUENCY_1KHZ = (uint8_t) 0x00, /*!< Beep signal output frequency equals to 1 KHz */
BEEP_FREQUENCY_2KHZ = (uint8_t) 0x40, /*!< Beep signal output frequency equals to 2 KHz */
BEEP_FREQUENCY_4KHZ = (uint8_t) 0x80 /*!< Beep signal output frequency equals to 4 KHz */
} BEEP_Frequency_TypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @addtogroup BEEP_Exported_Constants
* @{
*/
#define BEEP_CALIBRATION_DEFAULT ((uint8_t)0x0B) /*!< Default value when calibration is not done */
#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */
#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */
/**
* @}
*/
/* Exported macros -----------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup BEEP_Private_Macros
* @{
*/
/**
* @brief Macro used by the assert function to check the different functions parameters.
*/
/**
* @brief Macro used by the assert function to check the BEEP frequencies.
*/
#define IS_BEEP_FREQUENCY_OK(FREQ) \
(((FREQ) == BEEP_FREQUENCY_1KHZ) || \
((FREQ) == BEEP_FREQUENCY_2KHZ) || \
((FREQ) == BEEP_FREQUENCY_4KHZ))
/**
* @brief Macro used by the assert function to check the LSI frequency (in Hz).
*/
#define IS_LSI_FREQUENCY_OK(FREQ) \
(((FREQ) >= LSI_FREQUENCY_MIN) && \
((FREQ) <= LSI_FREQUENCY_MAX))
/**
* @}
*/
/* Exported functions ------------------------------------------------------- */
/** @addtogroup BEEP_Exported_Functions
* @{
*/
#if 0
void BEEP_DeInit(void);
void BEEP_Init(BEEP_Frequency_TypeDef BEEP_Frequency);
void BEEP_Cmd(FunctionalState NewState);
void BEEP_LSICalibrationConfig(uint32_t LSIFreqHz);
#endif
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Public functions ----------------------------------------------------------*/
/**
* @addtogroup BEEP_Public_Functions
* @{
*/
/**
* @brief Deinitializes the BEEP peripheral registers to their default reset
* values.
* @param None
* @retval None
*/
inline void BEEP_DeInit(void)
{
BEEP->CSR = BEEP_CSR_RESET_VALUE;
}
/**
* @brief Initializes the BEEP function according to the specified parameters.
* @param BEEP_Frequency Frequency selection.
* can be one of the values of @ref BEEP_Frequency_TypeDef.
* @retval None
* @par Required preconditions:
* The LS RC calibration must be performed before calling this function.
*/
inline void BEEP_Init(BEEP_Frequency_TypeDef BEEP_Frequency)
{
/* Check parameter */
assert_param(IS_BEEP_FREQUENCY_OK(BEEP_Frequency));
/* Set a default calibration value if no calibration is done */
if ((BEEP->CSR & BEEP_CSR_BEEPDIV) == BEEP_CSR_BEEPDIV) {
BEEP->CSR &= (uint8_t) (~BEEP_CSR_BEEPDIV); /* Clear bits */
BEEP->CSR |= BEEP_CALIBRATION_DEFAULT;
}
/* Select the output frequency */
BEEP->CSR &= (uint8_t) (~BEEP_CSR_BEEPSEL);
BEEP->CSR |= (uint8_t) (BEEP_Frequency);
}
/**
* @brief Enable or disable the BEEP function.
* @param NewState Indicates the new state of the BEEP function.
* @retval None
* @par Required preconditions:
* Initialisation of BEEP and LS RC calibration must be done before.
*/
inline void BEEP_Cmd(FunctionalState NewState)
{
if (NewState != DISABLE) {
/* Enable the BEEP peripheral */
BEEP->CSR |= BEEP_CSR_BEEPEN;
} else {
/* Disable the BEEP peripheral */
BEEP->CSR &= (uint8_t) (~BEEP_CSR_BEEPEN);
}
}
/**
* @brief Update CSR register with the measured LSI frequency.
* @par Note on the APR calculation:
* A is the integer part of LSIFreqkHz/4 and x the decimal part.
* x <= A/(1+2A) is equivalent to A >= x(1+2A) and also to 4A >= 4x(1+2A) [F1]
* but we know that A + x = LSIFreqkHz/4 ==> 4x = LSIFreqkHz-4A
* so [F1] can be written :
* 4A >= (LSIFreqkHz-4A)(1+2A)
* @param LSIFreqHz Low Speed RC frequency measured by timer (in Hz).
* @retval None
* @par Required preconditions:
* - BEEP must be disabled to avoid unwanted interrupts.
*/
inline void BEEP_LSICalibrationConfig(uint32_t LSIFreqHz)
{
uint16_t lsifreqkhz;
uint16_t A;
/* Check parameter */
assert_param(IS_LSI_FREQUENCY_OK(LSIFreqHz));
lsifreqkhz = (uint16_t) (LSIFreqHz / 1000); /* Converts value in kHz */
/* Calculation of BEEPER calibration value */
BEEP->CSR &= (uint8_t) (~BEEP_CSR_BEEPDIV); /* Clear bits */
A = (uint16_t) (lsifreqkhz >> 3U); /* Division by 8, keep integer part only */
if ((8U * A) >= ((lsifreqkhz - (8U * A)) * (1U + (2U * A)))) {
BEEP->CSR |= (uint8_t) (A - 2U);
} else {
BEEP->CSR |= (uint8_t) (A - 1U);
}
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#endif /* __STM8S_BEEP_H */

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Library/SPL/stm8s_exti.h
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/**
******************************************************************************
* @file stm8s_exti.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all functions prototype and macros for the EXTI peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_EXTI_H
#define __STM8S_EXTI_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/* Exported types ------------------------------------------------------------*/
/** @addtogroup EXTI_Exported_Types
* @{
*/
/**
* @brief EXTI Sensitivity values for PORTA to PORTE
*/
typedef enum {
EXTI_SENSITIVITY_FALL_LOW = (uint8_t) 0x00, /*!< Interrupt on Falling edge and Low level */
EXTI_SENSITIVITY_RISE_ONLY = (uint8_t) 0x01, /*!< Interrupt on Rising edge only */
EXTI_SENSITIVITY_FALL_ONLY = (uint8_t) 0x02, /*!< Interrupt on Falling edge only */
EXTI_SENSITIVITY_RISE_FALL = (uint8_t) 0x03 /*!< Interrupt on Rising and Falling edges */
} EXTI_Sensitivity_TypeDef;
/**
* @brief EXTI Sensitivity values for TLI
*/
typedef enum {
EXTI_TLISENSITIVITY_FALL_ONLY = (uint8_t) 0x00, /*!< Top Level Interrupt on Falling edge only */
EXTI_TLISENSITIVITY_RISE_ONLY = (uint8_t) 0x04 /*!< Top Level Interrupt on Rising edge only */
} EXTI_TLISensitivity_TypeDef;
/**
* @brief EXTI PortNum possible values
*/
typedef enum {
EXTI_PORT_GPIOA = (uint8_t) 0x00, /*!< GPIO Port A */
EXTI_PORT_GPIOB = (uint8_t) 0x01, /*!< GPIO Port B */
EXTI_PORT_GPIOC = (uint8_t) 0x02, /*!< GPIO Port C */
EXTI_PORT_GPIOD = (uint8_t) 0x03, /*!< GPIO Port D */
EXTI_PORT_GPIOE = (uint8_t) 0x04 /*!< GPIO Port E */
} EXTI_Port_TypeDef;
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup EXTI_Private_Macros
* @{
*/
/**
* @brief Macro used by the assert function in order to check the different sensitivity values for PORTA to PORTE.
*/
#define IS_EXTI_SENSITIVITY_OK(SensitivityValue) \
(((SensitivityValue) == EXTI_SENSITIVITY_FALL_LOW) || \
((SensitivityValue) == EXTI_SENSITIVITY_RISE_ONLY) || \
((SensitivityValue) == EXTI_SENSITIVITY_FALL_ONLY) || \
((SensitivityValue) == EXTI_SENSITIVITY_RISE_FALL))
/**
* @brief Macro used by the assert function in order to check the different sensitivity values for TLI.
*/
#define IS_EXTI_TLISENSITIVITY_OK(SensitivityValue) \
(((SensitivityValue) == EXTI_TLISENSITIVITY_FALL_ONLY) || \
((SensitivityValue) == EXTI_TLISENSITIVITY_RISE_ONLY))
/**
* @brief Macro used by the assert function in order to check the different Port values
*/
#define IS_EXTI_PORT_OK(PORT) \
(((PORT) == EXTI_PORT_GPIOA) ||\
((PORT) == EXTI_PORT_GPIOB) ||\
((PORT) == EXTI_PORT_GPIOC) ||\
((PORT) == EXTI_PORT_GPIOD) ||\
((PORT) == EXTI_PORT_GPIOE))
/**
* @brief Macro used by the assert function in order to check the different values of the EXTI PinMask
*/
#define IS_EXTI_PINMASK_OK(PinMask) ((((PinMask) & (uint8_t)0x00) == (uint8_t)0x00) && ((PinMask) != (uint8_t)0x00))
/**
* @}
*/
/* Exported functions ------------------------------------------------------- */
/** @addtogroup EXTI_Exported_Functions
* @{
*/
#if 0
void EXTI_DeInit(void);
void EXTI_SetExtIntSensitivity(EXTI_Port_TypeDef Port, EXTI_Sensitivity_TypeDef SensitivityValue);
void EXTI_SetTLISensitivity(EXTI_TLISensitivity_TypeDef SensitivityValue);
EXTI_Sensitivity_TypeDef EXTI_GetExtIntSensitivity(EXTI_Port_TypeDef Port);
EXTI_TLISensitivity_TypeDef EXTI_GetTLISensitivity(void);
#endif
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Public functions ----------------------------------------------------------*/
/**
* @addtogroup EXTI_Public_Functions
* @{
*/
/**
* @brief Deinitializes the external interrupt control registers to their default reset value.
* @param None
* @retval None
*/
inline void EXTI_DeInit(void)
{
EXTI->CR1 = EXTI_CR1_RESET_VALUE;
EXTI->CR2 = EXTI_CR2_RESET_VALUE;
}
/**
* @brief Set the external interrupt sensitivity of the selected port.
* @warning
* - The modification of external interrupt sensitivity is only possible when the interrupts are disabled.
* - The normal behavior is to disable the interrupts before calling this function, and re-enable them after.
* @param Port The port number to access.
* @param SensitivityValue The external interrupt sensitivity value to set.
* @retval None
* @par Required preconditions:
* Global interrupts must be disabled before calling this function.
*/
inline void EXTI_SetExtIntSensitivity(EXTI_Port_TypeDef Port, EXTI_Sensitivity_TypeDef SensitivityValue)
{
/* Check function parameters */
assert_param(IS_EXTI_PORT_OK(Port));
assert_param(IS_EXTI_SENSITIVITY_OK(SensitivityValue));
/* Set external interrupt sensitivity */
switch (Port) {
case EXTI_PORT_GPIOA:
EXTI->CR1 &= (uint8_t) (~EXTI_CR1_PAIS);
EXTI->CR1 |= (uint8_t) (SensitivityValue);
break;
case EXTI_PORT_GPIOB:
EXTI->CR1 &= (uint8_t) (~EXTI_CR1_PBIS);
EXTI->CR1 |= (uint8_t) ((uint8_t) (SensitivityValue) << 2);
break;
case EXTI_PORT_GPIOC:
EXTI->CR1 &= (uint8_t) (~EXTI_CR1_PCIS);
EXTI->CR1 |= (uint8_t) ((uint8_t) (SensitivityValue) << 4);
break;
case EXTI_PORT_GPIOD:
EXTI->CR1 &= (uint8_t) (~EXTI_CR1_PDIS);
EXTI->CR1 |= (uint8_t) ((uint8_t) (SensitivityValue) << 6);
break;
case EXTI_PORT_GPIOE:
EXTI->CR2 &= (uint8_t) (~EXTI_CR2_PEIS);
EXTI->CR2 |= (uint8_t) (SensitivityValue);
break;
default:
break;
}
}
/**
* @brief Set the TLI interrupt sensitivity.
* @param SensitivityValue The TLI interrupt sensitivity value.
* @retval None
* @par Required preconditions:
* Global interrupts must be disabled before calling this function.
*/
inline void EXTI_SetTLISensitivity(EXTI_TLISensitivity_TypeDef SensitivityValue)
{
/* Check function parameters */
assert_param(IS_EXTI_TLISENSITIVITY_OK(SensitivityValue));
/* Set TLI interrupt sensitivity */
EXTI->CR2 &= (uint8_t) (~EXTI_CR2_TLIS);
EXTI->CR2 |= (uint8_t) (SensitivityValue);
}
/**
* @brief Get the external interrupt sensitivity of the selected port.
* @param Port The port number to access.
* @retval EXTI_Sensitivity_TypeDef The external interrupt sensitivity of the selected port.
*/
inline EXTI_Sensitivity_TypeDef EXTI_GetExtIntSensitivity(EXTI_Port_TypeDef Port)
{
uint8_t value = 0;
/* Check function parameters */
assert_param(IS_EXTI_PORT_OK(Port));
switch (Port) {
case EXTI_PORT_GPIOA:
value = (uint8_t) (EXTI->CR1 & EXTI_CR1_PAIS);
break;
case EXTI_PORT_GPIOB:
value = (uint8_t) ((uint8_t) (EXTI->CR1 & EXTI_CR1_PBIS) >> 2);
break;
case EXTI_PORT_GPIOC:
value = (uint8_t) ((uint8_t) (EXTI->CR1 & EXTI_CR1_PCIS) >> 4);
break;
case EXTI_PORT_GPIOD:
value = (uint8_t) ((uint8_t) (EXTI->CR1 & EXTI_CR1_PDIS) >> 6);
break;
case EXTI_PORT_GPIOE:
value = (uint8_t) (EXTI->CR2 & EXTI_CR2_PEIS);
break;
default:
break;
}
return ((EXTI_Sensitivity_TypeDef) value);
}
/**
* @brief Get the TLI interrupt sensitivity.
* @param None
* @retval EXTI_TLISensitivity_TypeDef The TLI interrupt sensitivity read.
*/
inline EXTI_TLISensitivity_TypeDef EXTI_GetTLISensitivity(void)
{
uint8_t value = 0;
/* Get TLI interrupt sensitivity */
value = (uint8_t) (EXTI->CR2 & EXTI_CR2_TLIS);
return ((EXTI_TLISensitivity_TypeDef) value);
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/**
* @}
*/
#endif /* __STM8S_EXTI_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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Library/SPL/stm8s_flash.c
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/**
******************************************************************************
* @file stm8s_flash.c
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all the functions for the FLASH peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm8s_flash.h"
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/**
@code
This driver provides functions to configure and program the Flash memory of all
STM8S devices.
It includes as well functions that can be either executed from RAM or not, and
other functions that must be executed from RAM otherwise useless.
The table below lists the functions that can be executed from RAM.
+--------------------------------------------------------------------------------|
| Functions prototypes | RAM execution | Comments |
---------------------------------------------------------------------------------|
| | Mandatory in case of block | Can be executed |
| FLASH_WaitForLastOperation | Operation: | from Flash in case |
| | - Block programming | of byte and word |
| | - Block erase | Operations |
|--------------------------------------------------------------------------------|
| FLASH_ProgramBlock | Exclusively | useless from Flash |
|--------------------------------------------------------------------------------|
| FLASH_EraseBlock | Exclusively | useless from Flash |
|--------------------------------------------------------------------------------|
To be able to execute functions from RAM several steps have to be followed.
These steps may differ from one toolchain to another.
A detailed description is available below within this driver.
You can also refer to the FLASH examples provided within the
STM8S_StdPeriph_Lib package.
@endcode
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
#define _FLASH_FLASH_CLEAR_BYTE ((uint8_t)0x00)
#define _FLASH_FLASH_SET_BYTE ((uint8_t)0xFF)
#define _FLASH_OPERATION_TIMEOUT ((uint16_t)0xFFFF)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
// SDCC patch: for passing args to inline ASM (SDCC doesn't support far pointers yet)
#if defined (_SDCC_)
uint32_t asm_addr; // 16b/24b address
uint8_t asm_val; // 1B data for r/w data
#endif // _SDCC_
/* Private function prototypes -----------------------------------------------*/
// SDCC patch: r/w for 16b/24b addresses (SDCC doesn't support far pointers yet)
#if defined (_SDCC_)
void write_byte_address(uint16_t Address, uint8_t Data); // write single byte to 16b/24b address
uint8_t read_byte_address(uint32_t Address); // read single byte from 16b/24b address
#endif // _SDCC_
/* Private Constants ---------------------------------------------------------*/
/** @addtogroup FLASH_Private_functions
* @{
*/
#if defined (_SDCC_)
/**
* @brief write single byte to address
* @note is required for SDCC, which doesn't yet support far pointers.
* For simplicity 16- and 24-bit pointers are treated identically.
* @param Address : Address of the byte to copy
* Data : Value to be copied
* @retval None
*/
void write_byte_address(uint16_t Address, uint8_t Data)
{
/* store address & data globally for assember */
asm_addr = Address;
asm_val = Data;
/* use inline assembler to write to 16b/24b address */
__asm
ld a, _asm_val
ldf[_asm_addr + 1].e, a
__endasm;
}
/**
* @brief Reads any byte from flash memory
* @note is required for SDCC, which doesn't yet support far pointers.
* For simplicity 16- and 24-bit pointers are treated identically.
* @param Address : Address to read
* @retval Value of the byte
*/
uint8_t read_byte_address(uint32_t Address)
{
/* store address globally for assember */
asm_addr = Address;
/* use inline assembler to read from 16b/24b address */
__asm
ldf a,[_asm_addr+1].e
ld _asm_val, a
__endasm;
/* return read byte */
return (asm_val);
}
#endif // _SDCC_
/**
* @}
*/
/** @addtogroup FLASH_Public_functions
* @{
*/
/**
* @brief Unlocks the program or data EEPROM memory
* @param FLASH_MemType : Memory type to unlock
* This parameter can be a value of @ref FLASH_MemType_TypeDef
* @retval None
*/
void FLASH_Unlock(FLASH_MemType_TypeDef FLASH_MemType)
{
/* Check parameter */
assert_param(IS_MEMORY_TYPE_OK(FLASH_MemType));
/* Unlock program memory */
if (FLASH_MemType == FLASH_MEMTYPE_PROG) {
FLASH->PUKR = FLASH_RASS_KEY1;
FLASH->PUKR = FLASH_RASS_KEY2;
}
/* Unlock data memory */
else {
FLASH->DUKR = FLASH_RASS_KEY2; /* Warning: keys are reversed on data memory !!! */
FLASH->DUKR = FLASH_RASS_KEY1;
}
}
/**
* @brief Locks the program or data EEPROM memory
* @param FLASH_MemType : Memory type
* This parameter can be a value of @ref FLASH_MemType_TypeDef
* @retval None
*/
void FLASH_Lock(FLASH_MemType_TypeDef FLASH_MemType)
{
/* Check parameter */
assert_param(IS_MEMORY_TYPE_OK(FLASH_MemType));
/* Lock memory */
FLASH->IAPSR &= (uint8_t) FLASH_MemType;
}
/**
* @brief DeInitializes the FLASH registers to their default reset values.
* @param None
* @retval None
*/
void FLASH_DeInit(void)
{
FLASH->CR1 = FLASH_CR1_RESET_VALUE;
FLASH->CR2 = FLASH_CR2_RESET_VALUE;
FLASH->NCR2 = FLASH_NCR2_RESET_VALUE;
FLASH->IAPSR &= (uint8_t) (~FLASH_IAPSR_DUL);
FLASH->IAPSR &= (uint8_t) (~FLASH_IAPSR_PUL);
(void) FLASH->IAPSR; /* Reading of this register causes the clearing of status flags */
}
/**
* @brief Enables or Disables the Flash interrupt mode
* @param NewState : The new state of the flash interrupt mode
* This parameter can be a value of @ref FunctionalState enumeration.
* @retval None
*/
void FLASH_ITConfig(FunctionalState NewState)
{
/* Check parameter */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE) {
FLASH->CR1 |= FLASH_CR1_IE; /* Enables the interrupt sources */
} else {
FLASH->CR1 &= (uint8_t) (~FLASH_CR1_IE); /* Disables the interrupt sources */
}
}
/**
* @brief Erases one byte in the program or data EEPROM memory
* @note PointerAttr define is declared in the stm8s.h file to select if
* the pointer will be declared as near (2 bytes) or far (3 bytes).
* @param Address : Address of the byte to erase
* @retval None
*/
void FLASH_EraseByte(uint32_t Address)
{
/* Check parameter */
assert_param(IS_FLASH_ADDRESS_OK(Address));
/* Erase byte */
#ifndef _SDCC_
*(PointerAttr uint8_t*) (MemoryAddressCast)Address = _FLASH_FLASH_CLEAR_BYTE;
#else
write_byte_address(Address, _FLASH_FLASH_CLEAR_BYTE); // SDCC patch: required for far pointers
#endif // _SDCC_
}
/**
* @brief Programs one byte in program or data EEPROM memory
* @note PointerAttr define is declared in the stm8s.h file to select if
* the pointer will be declared as near (2 bytes) or far (3 bytes).
* @param Address : Address where the byte will be programmed
* @param Data : Value to be programmed
* @retval None
*/
void FLASH_ProgramByte(uint32_t Address, uint8_t Data)
{
/* Check parameters */
assert_param(IS_FLASH_ADDRESS_OK(Address));
/* Program byte */
#ifndef _SDCC_
*(PointerAttr uint8_t*) (MemoryAddressCast)Address = Data;
#else
write_byte_address(Address, Data); // SDCC patch: required for far pointers
#endif // _SDCC_
}
/**
* @brief Reads any byte from flash memory
* @note PointerAttr define is declared in the stm8s.h file to select if
* the pointer will be declared as near (2 bytes) or far (3 bytes).
* @param Address : Address to read
* @retval Value of the byte
*/
uint8_t FLASH_ReadByte(uint32_t Address)
{
/* Check parameter */
assert_param(IS_FLASH_ADDRESS_OK(Address));
/* Read byte */
#ifndef _SDCC_
return(*(PointerAttr uint8_t *) (MemoryAddressCast)Address);
#else
return (read_byte_address(Address)); // SDCC patch: required for far pointers
#endif // _SDCC_
}
/**
* @brief Programs one word (4 bytes) in program or data EEPROM memory
* @note PointerAttr define is declared in the stm8s.h file to select if
* the pointer will be declared as near (2 bytes) or far (3 bytes).
* @param Address : The address where the data will be programmed
* @param Data : Value to be programmed
* @retval None
*/
void FLASH_ProgramWord(uint32_t Address, uint32_t Data)
{
/* Check parameters */
assert_param(IS_FLASH_ADDRESS_OK(Address));
/* Enable Word Write Once */
FLASH->CR2 |= FLASH_CR2_WPRG;
FLASH->NCR2 &= (uint8_t) (~FLASH_NCR2_NWPRG);
#ifndef _SDCC_
/* Write one byte - from lowest address*/
*((PointerAttr uint8_t*)(MemoryAddressCast)Address) = *((uint8_t*)(&Data));
/* Write one byte*/
*(((PointerAttr uint8_t*)(MemoryAddressCast)Address) + 1) = *((uint8_t*)(&Data)+1);
/* Write one byte*/
*(((PointerAttr uint8_t*)(MemoryAddressCast)Address) + 2) = *((uint8_t*)(&Data)+2);
/* Write one byte - from higher address*/
*(((PointerAttr uint8_t*)(MemoryAddressCast)Address) + 3) = *((uint8_t*)(&Data)+3);
#else
write_byte_address(Address, *((uint8_t *) (&Data))); // SDCC patch: required for far pointers
write_byte_address(Address + 1, *((uint8_t *) (&Data) + 1));
write_byte_address(Address + 2, *((uint8_t *) (&Data) + 2));
write_byte_address(Address + 3, *((uint8_t *) (&Data) + 3));
#endif // _SDCC_
}
/**
* @brief Programs option byte
* @param Address : option byte address to program
* @param Data : Value to write
* @retval None
*/
void FLASH_ProgramOptionByte(uint16_t Address, uint8_t Data)
{
/* Check parameter */
assert_param(IS_OPTION_BYTE_ADDRESS_OK(Address));
/* Enable write access to option bytes */
FLASH->CR2 |= FLASH_CR2_OPT;
FLASH->NCR2 &= (uint8_t) (~FLASH_NCR2_NOPT);
/* check if the option byte to program is ROP*/
if (Address == 0x4800) {
/* Program option byte*/
*((NEAR uint8_t *) Address) = Data;
} else {
/* Program option byte and his complement */
*((NEAR uint8_t *) Address) = Data;
*((NEAR uint8_t *) ((uint16_t) (Address + 1))) = (uint8_t) (~Data);
}
FLASH_WaitForLastOperation(FLASH_MEMTYPE_PROG);
/* Disable write access to option bytes */
FLASH->CR2 &= (uint8_t) (~FLASH_CR2_OPT);
FLASH->NCR2 |= FLASH_NCR2_NOPT;
}
/**
* @brief Erases option byte
* @param Address : Option byte address to erase
* @retval None
*/
void FLASH_EraseOptionByte(uint16_t Address)
{
/* Check parameter */
//assert_param(IS_OPTION_BYTE_ADDRESS_OK(Address));
/* Enable write access to option bytes */
FLASH->CR2 |= FLASH_CR2_OPT;
FLASH->NCR2 &= (uint8_t) (~FLASH_NCR2_NOPT);
/* check if the option byte to erase is ROP */
if (Address == 0x4800) {
/* Erase option byte */
*((NEAR uint8_t *) Address) = _FLASH_FLASH_CLEAR_BYTE;
} else {
/* Erase option byte and his complement */
*((NEAR uint8_t *) Address) = _FLASH_FLASH_CLEAR_BYTE;
*((NEAR uint8_t *) ((uint16_t) (Address + (uint16_t) 1))) = _FLASH_FLASH_SET_BYTE;
}
FLASH_WaitForLastOperation(FLASH_MEMTYPE_PROG);
/* Disable write access to option bytes */
FLASH->CR2 &= (uint8_t) (~FLASH_CR2_OPT);
FLASH->NCR2 |= FLASH_NCR2_NOPT;
}
/**
* @brief Reads one option byte
* @param Address option byte address to read.
* @retval Option byte read value + its complement
*/
uint16_t FLASH_ReadOptionByte(uint16_t Address)
{
uint8_t value_optbyte, value_optbyte_complement = 0;
uint16_t res_value = 0;
/* Check parameter */
assert_param(IS_OPTION_BYTE_ADDRESS_OK(Address));
value_optbyte = *((NEAR uint8_t *) Address); /* Read option byte */
value_optbyte_complement = *(((NEAR uint8_t *) Address) + 1); /* Read option byte complement */
/* Read-out protection option byte */
if (Address == 0x4800) {
res_value = value_optbyte;
} else {
if (value_optbyte == (uint8_t) (~value_optbyte_complement)) {
res_value = (uint16_t) ((uint16_t) value_optbyte << 8);
res_value = res_value | (uint16_t) value_optbyte_complement;
} else {
res_value = FLASH_OPTIONBYTE_ERROR;
}
}
return (res_value);
}
/**
* @brief Select the Flash behaviour in low power mode
* @param FLASH_LPMode Low power mode selection
* This parameter can be any of the @ref FLASH_LPMode_TypeDef values.
* @retval None
*/
void FLASH_SetLowPowerMode(FLASH_LPMode_TypeDef FLASH_LPMode)
{
/* Check parameter */
assert_param(IS_FLASH_LOW_POWER_MODE_OK(FLASH_LPMode));
/* Clears the two bits */
FLASH->CR1 &= (uint8_t) (~(FLASH_CR1_HALT | FLASH_CR1_AHALT));
/* Sets the new mode */
FLASH->CR1 |= (uint8_t) FLASH_LPMode;
}
/**
* @brief Sets the fixed programming time
* @param FLASH_ProgTime Indicates the programming time to be fixed
* This parameter can be any of the @ref FLASH_ProgramTime_TypeDef values.
* @retval None
*/
void FLASH_SetProgrammingTime(FLASH_ProgramTime_TypeDef FLASH_ProgTime)
{
/* Check parameter */
assert_param(IS_FLASH_PROGRAM_TIME_OK(FLASH_ProgTime));
FLASH->CR1 &= (uint8_t) (~FLASH_CR1_FIX);
FLASH->CR1 |= (uint8_t) FLASH_ProgTime;
}
/**
* @brief Returns the Flash behaviour type in low power mode
* @param None
* @retval FLASH_LPMode_TypeDef Flash behaviour type in low power mode
*/
FLASH_LPMode_TypeDef FLASH_GetLowPowerMode(void)
{
return ((FLASH_LPMode_TypeDef) (FLASH->CR1 & (uint8_t) (FLASH_CR1_HALT | FLASH_CR1_AHALT)));
}
/**
* @brief Returns the fixed programming time
* @param None
* @retval FLASH_ProgramTime_TypeDef Fixed programming time value
*/
FLASH_ProgramTime_TypeDef FLASH_GetProgrammingTime(void)
{
return ((FLASH_ProgramTime_TypeDef) (FLASH->CR1 & FLASH_CR1_FIX));
}
/**
* @brief Returns the Boot memory size in bytes
* @param None
* @retval Boot memory size in bytes
*/
uint32_t FLASH_GetBootSize(void)
{
uint32_t temp = 0;
/* Calculates the number of bytes */
temp = (uint32_t) ((uint32_t) FLASH->FPR * (uint32_t) 512);
/* Correction because size of 127.5 kb doesn't exist */
if (FLASH->FPR == 0xFF) {
temp += 512;
}
/* Return value */
return (temp);
}
/**
* @brief Checks whether the specified SPI flag is set or not.
* @param FLASH_FLAG : Specifies the flag to check.
* This parameter can be any of the @ref FLASH_Flag_TypeDef enumeration.
* @retval FlagStatus : Indicates the state of FLASH_FLAG.
* This parameter can be any of the @ref FlagStatus enumeration.
* @note This function can clear the EOP, WR_PG_DIS flags in the IAPSR register.
*/
FlagStatus FLASH_GetFlagStatus(FLASH_Flag_TypeDef FLASH_FLAG)
{
FlagStatus status = RESET;
/* Check parameters */
assert_param(IS_FLASH_FLAGS_OK(FLASH_FLAG));
/* Check the status of the specified FLASH flag */
if ((FLASH->IAPSR & (uint8_t) FLASH_FLAG) != (uint8_t) RESET) {
status = SET; /* FLASH_FLAG is set */
} else {
status = RESET; /* FLASH_FLAG is reset*/
}
/* Return the FLASH_FLAG status */
return status;
}
/**
@code
All the functions defined below must be executed from RAM exclusively, except
for the FLASH_WaitForLastOperation function which can be executed from Flash.
Steps of the execution from RAM differs from one toolchain to another:
- For Cosmic Compiler:
1- Define a segment FLASH_CODE by the mean of " #pragma section (FLASH_CODE)".
This segment is defined in the stm8s_flash.c file.
2- Uncomment the "#define RAM_EXECUTION (1)" line in the stm8s.h file,
or define it in Cosmic compiler preprocessor to enable the FLASH_CODE segment
definition.
3- In STVD Select Project\Settings\Linker\Category "input" and in the RAM section
add the FLASH_CODE segment with "-ic" options.
4- In main.c file call the _fctcpy() function with first segment character as
parameter "_fctcpy('F');" to load the declared moveable code segment
(FLASH_CODE) in RAM before execution.
5- By default the _fctcpy function is packaged in the Cosmic machine library,
so the function prototype "int _fctcopy(char name);" must be added in main.c
file.
- For Raisonance Compiler
1- Use the inram keyword in the function declaration to specify that it can be
executed from RAM.
This is done within the stm8s_flash.c file, and it's conditioned by
RAM_EXECUTION definition.
2- Uncomment the "#define RAM_EXECUTION (1)" line in the stm8s.h file, or
define it in Raisonance compiler preprocessor to enable the access for the
inram functions.
3- An inram function code is copied from Flash to RAM by the C startup code.
In some applications, the RAM area where the code was initially stored may be
erased or corrupted, so it may be desirable to perform the copy again.
Depending on the application memory model, the memcpy() or fmemcpy() functions
should be used to perform the copy.
' In case your project uses the SMALL memory model (code smaller than 64K),
memcpy()function is recommended to perform the copy
' In case your project uses the LARGE memory model, functions can be
everywhere in the 24-bits address space (not limited to the first 64KB of
code), In this case, the use of memcpy() function will not be appropriate,
you need to use the specific fmemcpy() function (which copies objects with
24-bit addresses).
- The linker automatically defines 2 symbols for each inram function:
' __address__functionname is a symbol that holds the Flash address
where the given function code is stored.
' __size__functionname is a symbol that holds the function size in bytes.
And we already have the function address (which is itself a pointer)
4- In main.c file these two steps should be performed for each inram function:
' Import the "__address__functionname" and "__size__functionname" symbols
as global variables:
extern int __address__functionname; // Symbol holding the flash address
extern int __size__functionname; // Symbol holding the function size
' In case of SMALL memory model use, Call the memcpy() function to copy the
inram function to the RAM destination address:
memcpy(functionname, // RAM destination address
(void*)&__address__functionname, // Flash source address
(int)&__size__functionname); // Code size of the function
' In case of LARGE memory model use, call the fmemcpy() function to copy
the inram function to the RAM destination address:
memcpy(functionname, // RAM destination address
(void @far*)&__address__functionname, // Flash source address
(int)&__size__functionname); // Code size of the function
- For IAR Compiler:
1- Use the __ramfunc keyword in the function declaration to specify that it
can be executed from RAM.
This is done within the stm8s_flash.c file, and it's conditioned by
RAM_EXECUTION definition.
2- Uncomment the "#define RAM_EXECUTION (1)" line in the stm8s.h file, or
define it in IAR compiler preprocessor to enable the access for the
__ramfunc functions.
- Note:
1- Ignore the IAR compiler warnings, these warnings don't impact the FLASH Program/Erase
operations.
The code performing the Flash Program/erase must be executed from RAM; the variables
initializations don't necessary require the execution from RAM, only CR2/NCR2 registers
configuration and data programing must be executed from RAM.
2- These warnings depends on IAR compiler: as the code generation is made using many
runtime library functions to keep code size to a minimum.
3- It is recommended to use High Speed Optimization with IAR (-Ohs), in order
to reduce the runtime library calls in the generated code.
The FLASH examples given within the STM8S_StdPeriph_Lib package, details all
the steps described above.
@endcode
*/
/**
* @brief
*******************************************************************************
* Execution from RAM enable
*******************************************************************************
*
* To enable execution from RAM you can either uncomment the following define
* in the stm8s.h file or define it in your toolchain compiler preprocessor
* - #define RAM_EXECUTION (1)
*/
#if defined (_COSMIC_) && defined (RAM_EXECUTION)
#pragma section (FLASH_CODE)
#endif /* _COSMIC_ && RAM_EXECUTION */
/**
* @brief Wait for a Flash operation to complete.
* @note The call and execution of this function must be done from RAM in case
* of Block operation.
* @param FLASH_MemType : Memory type
* This parameter can be a value of @ref FLASH_MemType_TypeDef
* @retval FLASH status
*/
IN_RAM(FLASH_Status_TypeDef FLASH_WaitForLastOperation(FLASH_MemType_TypeDef FLASH_MemType))
{
uint8_t flagstatus = 0x00;
uint16_t timeout = _FLASH_OPERATION_TIMEOUT;
/* Wait until operation completion or write protection page occurred */
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
defined(STM8S005) || defined(STM8AF52Ax) || defined(STM8AF62Ax) || defined(STM8AF626x)
if(FLASH_MemType == FLASH_MEMTYPE_PROG)
{
while((flagstatus == 0x00) && (timeout != 0x00))
{
flagstatus = (uint8_t)(FLASH->IAPSR & (uint8_t)(FLASH_IAPSR_EOP |
FLASH_IAPSR_WR_PG_DIS));
timeout--;
}
}
else
{
while((flagstatus == 0x00) && (timeout != 0x00))
{
flagstatus = (uint8_t)(FLASH->IAPSR & (uint8_t)(FLASH_IAPSR_HVOFF |
FLASH_IAPSR_WR_PG_DIS));
timeout--;
}
}
#else /*STM8S103, STM8S903, STM8AF622x */
while ((flagstatus == 0x00) && (timeout != 0x00)) {
flagstatus = (uint8_t) (FLASH->IAPSR & (FLASH_IAPSR_EOP | FLASH_IAPSR_WR_PG_DIS));
timeout--;
}
#endif /* STM8S208, STM8S207, STM8S105, STM8AF52Ax, STM8AF62Ax, STM8AF262x */
if (timeout == 0x00) {
flagstatus = FLASH_STATUS_TIMEOUT;
}
return ((FLASH_Status_TypeDef) flagstatus);
}
/**
* @brief Erases a block in the program or data memory.
* @note This function should be executed from RAM.
* @param FLASH_MemType : The type of memory to erase
* @param BlockNum : Indicates the block number to erase
* @retval None.
*/
IN_RAM(void FLASH_EraseBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType))
{
uint32_t startaddress = 0;
#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \
defined (STM8S903) || defined (STM8AF626x) || defined (STM8AF622x)
uint32_t PointerAttr *pwFlash;
#elif defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF62Ax) || defined (STM8AF52Ax)
uint8_t PointerAttr *pwFlash;
#endif
/* Check parameters */
assert_param(IS_MEMORY_TYPE_OK(FLASH_MemType));
if (FLASH_MemType == FLASH_MEMTYPE_PROG) {
assert_param(IS_FLASH_PROG_BLOCK_NUMBER_OK(BlockNum));
startaddress = FLASH_PROG_START_PHYSICAL_ADDRESS;
} else {
assert_param(IS_FLASH_DATA_BLOCK_NUMBER_OK(BlockNum));
startaddress = FLASH_DATA_START_PHYSICAL_ADDRESS;
}
/* Point to the first block address */
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF62Ax) || defined (STM8AF52Ax)
pwFlash = (PointerAttr uint8_t *)(MemoryAddressCast)(startaddress + ((uint32_t)BlockNum * FLASH_BLOCK_SIZE));
#elif defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \
defined (STM8S903) || defined (STM8AF626x) || defined (STM8AF622x)
pwFlash = (PointerAttr uint32_t *) (MemoryAddressCast) (startaddress + ((uint32_t) BlockNum * FLASH_BLOCK_SIZE));
#endif /* STM8S208, STM8S207 */
/* Enable erase block mode */
FLASH->CR2 |= FLASH_CR2_ERASE;
FLASH->NCR2 &= (uint8_t) (~FLASH_NCR2_NERASE);
#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \
defined (STM8S903) || defined (STM8AF626x) || defined (STM8AF622x)
*pwFlash = (uint32_t) 0;
#elif defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF62Ax) || \
defined (STM8AF52Ax)
*pwFlash = (uint8_t)0;
*(pwFlash + 1) = (uint8_t)0;
*(pwFlash + 2) = (uint8_t)0;
*(pwFlash + 3) = (uint8_t)0;
#endif
}
/**
* @brief Programs a memory block
* @note This function should be executed from RAM.
* @param FLASH_MemType : The type of memory to program
* @param BlockNum : The block number
* @param FLASH_ProgMode : The programming mode.
* @param Buffer : Pointer to buffer containing source data.
* @retval None.
*/
IN_RAM(void FLASH_ProgramBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType,
FLASH_ProgramMode_TypeDef FLASH_ProgMode, uint8_t
*Buffer))
{
uint16_t Count = 0;
uint32_t startaddress = 0;
/* Check parameters */
assert_param(IS_MEMORY_TYPE_OK(FLASH_MemType));
assert_param(IS_FLASH_PROGRAM_MODE_OK(FLASH_ProgMode));
if (FLASH_MemType == FLASH_MEMTYPE_PROG) {
assert_param(IS_FLASH_PROG_BLOCK_NUMBER_OK(BlockNum));
startaddress = FLASH_PROG_START_PHYSICAL_ADDRESS;
} else {
assert_param(IS_FLASH_DATA_BLOCK_NUMBER_OK(BlockNum));
startaddress = FLASH_DATA_START_PHYSICAL_ADDRESS;
}
/* Point to the first block address */
startaddress = startaddress + ((uint32_t) BlockNum * FLASH_BLOCK_SIZE);
/* Selection of Standard or Fast programming mode */
if (FLASH_ProgMode == FLASH_PROGRAMMODE_STANDARD) {
/* Standard programming mode */ /*No need in standard mode */
FLASH->CR2 |= FLASH_CR2_PRG;
FLASH->NCR2 &= (uint8_t) (~FLASH_NCR2_NPRG);
} else {
/* Fast programming mode */
FLASH->CR2 |= FLASH_CR2_FPRG;
FLASH->NCR2 &= (uint8_t) (~FLASH_NCR2_NFPRG);
}
/* Copy data bytes from RAM to FLASH memory */
for (Count = 0; Count < FLASH_BLOCK_SIZE; Count++) {
#ifndef _SDCC_
*((PointerAttr uint8_t*) (MemoryAddressCast)startaddress + Count) = ((uint8_t)(Buffer[Count]));
#else
write_byte_address(startaddress + Count,
((uint8_t) (Buffer[Count]))); // SDCC patch: required for far pointers
#endif // _SDCC_
}
}
#if defined (_COSMIC_) && defined (RAM_EXECUTION)
/* End of FLASH_CODE section */
#pragma section ()
#endif /* _COSMIC_ && RAM_EXECUTION */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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Library/SPL/stm8s_flash.h
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/**
******************************************************************************
* @file stm8s_flash.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all functions prototype and macros for the FLASH peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_FLASH_H
#define __STM8S_FLASH_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/* Exported constants --------------------------------------------------------*/
/** @addtogroup FLASH_Exported_Constants
* @{
*/
#define FLASH_PROG_START_PHYSICAL_ADDRESS ((uint32_t)0x008000) /*!< Program memory: start address */
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
#define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0x027FFF) /*!< Program memory: end address */
#define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)1024) /*!< Program memory: total number of blocks */
#define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */
#define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x0047FF) /*!< Data EEPROM memory: end address */
#define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)16) /*!< Data EEPROM memory: total number of blocks */
#define FLASH_BLOCK_SIZE ((uint8_t)128) /*!< Number of bytes in a block (common for Program and Data memories) */
#endif /* STM8S208, STM8S207, STM8S007, STM8AF52Ax, STM8AF62Ax */
#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x)
#define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0xFFFF) /*!< Program memory: end address */
#define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)256) /*!< Program memory: total number of blocks */
#define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */
#define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x0043FF) /*!< Data EEPROM memory: end address */
#define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)8) /*!< Data EEPROM memory: total number of blocks */
#define FLASH_BLOCK_SIZE ((uint8_t)128) /*!< Number of bytes in a block (common for Program and Data memories) */
#endif /* STM8S105 or STM8AF626x */
#if defined(STM8S103) || defined(STM8S003) || defined(STM8S903) || defined(STM8AF622x)
#define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0x9FFF) /*!< Program memory: end address */
#define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)128) /*!< Program memory: total number of blocks */
#define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */
#define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x00427F) /*!< Data EEPROM memory: end address */
#define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)10) /*!< Data EEPROM memory: total number of blocks */
#define FLASH_BLOCK_SIZE ((uint8_t)64) /*!< Number of bytes in a block (common for Program and Data memories) */
#endif /* STM8S103 or STM8S003 or STM8S903 or STM8AF622x*/
#define FLASH_RASS_KEY1 ((uint8_t)0x56) /*!< First RASS key */
#define FLASH_RASS_KEY2 ((uint8_t)0xAE) /*!< Second RASS key */
#define OPTION_BYTE_START_PHYSICAL_ADDRESS ((uint16_t)0x4800)
#define OPTION_BYTE_END_PHYSICAL_ADDRESS ((uint16_t)0x487F)
#define FLASH_OPTIONBYTE_ERROR ((uint16_t)0x5555) /*!< Error code option byte
(if value read is not equal to complement value read) */
/**
* @}
*/
/* Exported types ------------------------------------------------------------*/
/** @addtogroup FLASH_Exported_Types
* @{
*/
/**
* @brief FLASH Memory types
*/
typedef enum {
FLASH_MEMTYPE_PROG = (uint8_t) 0xFD, /*!< Program memory */
FLASH_MEMTYPE_DATA = (uint8_t) 0xF7 /*!< Data EEPROM memory */
} FLASH_MemType_TypeDef;
/**
* @brief FLASH programming modes
*/
typedef enum {
FLASH_PROGRAMMODE_STANDARD = (uint8_t) 0x00, /*!< Standard programming mode */
FLASH_PROGRAMMODE_FAST = (uint8_t) 0x10 /*!< Fast programming mode */
} FLASH_ProgramMode_TypeDef;
/**
* @brief FLASH fixed programming time
*/
typedef enum {
FLASH_PROGRAMTIME_STANDARD = (uint8_t) 0x00, /*!< Standard programming time fixed at 1/2 tprog */
FLASH_PROGRAMTIME_TPROG = (uint8_t) 0x01 /*!< Programming time fixed at tprog */
} FLASH_ProgramTime_TypeDef;
/**
* @brief FLASH Low Power mode select
*/
typedef enum {
FLASH_LPMODE_POWERDOWN = (uint8_t) 0x04, /*!< HALT: Power-Down / ACTIVE-HALT: Power-Down */
FLASH_LPMODE_STANDBY = (uint8_t) 0x08, /*!< HALT: Standby / ACTIVE-HALT: Standby */
FLASH_LPMODE_POWERDOWN_STANDBY = (uint8_t) 0x00, /*!< HALT: Power-Down / ACTIVE-HALT: Standby */
FLASH_LPMODE_STANDBY_POWERDOWN = (uint8_t) 0x0C /*!< HALT: Standby / ACTIVE-HALT: Power-Down */
}
FLASH_LPMode_TypeDef;
/**
* @brief FLASH status of the last operation
*/
typedef enum {
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x)
FLASH_STATUS_END_HIGH_VOLTAGE = (uint8_t)0x40, /*!< End of high voltage */
#endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */
FLASH_STATUS_SUCCESSFUL_OPERATION = (uint8_t) 0x04, /*!< End of operation flag */
FLASH_STATUS_TIMEOUT = (uint8_t) 0x02, /*!< Time out error */
FLASH_STATUS_WRITE_PROTECTION_ERROR = (uint8_t) 0x01 /*!< Write attempted to protected page */
} FLASH_Status_TypeDef;
/**
* @brief FLASH flags definition
* - Warning : FLAG value = mapping position register
*/
typedef enum {
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x)
FLASH_FLAG_HVOFF = (uint8_t)0x40, /*!< End of high voltage flag */
#endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */
FLASH_FLAG_DUL = (uint8_t) 0x08, /*!< Data EEPROM unlocked flag */
FLASH_FLAG_EOP = (uint8_t) 0x04, /*!< End of programming (write or erase operation) flag */
FLASH_FLAG_PUL = (uint8_t) 0x02, /*!< Flash Program memory unlocked flag */
FLASH_FLAG_WR_PG_DIS = (uint8_t) 0x01 /*!< Write attempted to protected page flag */
} FLASH_Flag_TypeDef;
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/**
* @brief Macros used by the assert function in order to check the different functions parameters.
* @addtogroup FLASH_Private_Macros
* @{
*/
/**
* @brief Macro used by the assert function in order to check the different sensitivity values for the flash program Address
*/
#define IS_FLASH_PROG_ADDRESS_OK(ADDRESS) (((ADDRESS) >= FLASH_PROG_START_PHYSICAL_ADDRESS) && \
((ADDRESS) <= FLASH_PROG_END_PHYSICAL_ADDRESS))
/**
* @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom Address
*/
#define IS_FLASH_DATA_ADDRESS_OK(ADDRESS) (((ADDRESS) >= FLASH_DATA_START_PHYSICAL_ADDRESS) && \
((ADDRESS) <= FLASH_DATA_END_PHYSICAL_ADDRESS))
/**
* @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom and flash program Address
*/
#define IS_FLASH_ADDRESS_OK(ADDRESS)((((ADDRESS) >= FLASH_PROG_START_PHYSICAL_ADDRESS) && ((ADDRESS) <= FLASH_PROG_END_PHYSICAL_ADDRESS)) || \
(((ADDRESS) >= FLASH_DATA_START_PHYSICAL_ADDRESS) && ((ADDRESS) <= FLASH_DATA_END_PHYSICAL_ADDRESS)))
/**
* @brief Macro used by the assert function in order to check the different sensitivity values for the flash program Block number
*/
#define IS_FLASH_PROG_BLOCK_NUMBER_OK(BLOCKNUM) ((BLOCKNUM) < FLASH_PROG_BLOCKS_NUMBER)
/**
* @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom Block number
*/
#define IS_FLASH_DATA_BLOCK_NUMBER_OK(BLOCKNUM) ((BLOCKNUM) < FLASH_DATA_BLOCKS_NUMBER)
/**
* @brief Macro used by the assert function in order to check the different sensitivity values for the flash memory type
*/
#define IS_MEMORY_TYPE_OK(MEMTYPE) (((MEMTYPE) == FLASH_MEMTYPE_PROG) || \
((MEMTYPE) == FLASH_MEMTYPE_DATA))
/**
* @brief Macro used by the assert function in order to check the different sensitivity values for the flash program mode
*/
#define IS_FLASH_PROGRAM_MODE_OK(MODE) (((MODE) == FLASH_PROGRAMMODE_STANDARD) || \
((MODE) == FLASH_PROGRAMMODE_FAST))
/**
* @brief Macro used by the assert function in order to check the program time mode
*/
#define IS_FLASH_PROGRAM_TIME_OK(TIME) (((TIME) == FLASH_PROGRAMTIME_STANDARD) || \
((TIME) == FLASH_PROGRAMTIME_TPROG))
/**
* @brief Macro used by the assert function in order to check the different
* sensitivity values for the low power mode
*/
#define IS_FLASH_LOW_POWER_MODE_OK(LPMODE) (((LPMODE) == FLASH_LPMODE_POWERDOWN) || \
((LPMODE) == FLASH_LPMODE_STANDBY) || \
((LPMODE) == FLASH_LPMODE_POWERDOWN_STANDBY) || \
((LPMODE) == FLASH_LPMODE_STANDBY_POWERDOWN))
/**
* @brief Macro used by the assert function in order to check the different
* sensitivity values for the option bytes Address
*/
#define IS_OPTION_BYTE_ADDRESS_OK(ADDRESS) (((ADDRESS) >= OPTION_BYTE_START_PHYSICAL_ADDRESS) && \
((ADDRESS) <= OPTION_BYTE_END_PHYSICAL_ADDRESS))
/**
* @brief Macro used by the assert function in order to check the different flags values
*/
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x)
#define IS_FLASH_FLAGS_OK(FLAG) (((FLAG) == FLASH_FLAG_HVOFF) || \
((FLAG) == FLASH_FLAG_DUL) || \
((FLAG) == FLASH_FLAG_EOP) || \
((FLAG) == FLASH_FLAG_PUL) || \
((FLAG) == FLASH_FLAG_WR_PG_DIS))
#else /* STM8S103, STM8S903, STM8AF622x */
#define IS_FLASH_FLAGS_OK(FLAG) (((FLAG) == FLASH_FLAG_DUL) || \
((FLAG) == FLASH_FLAG_EOP) || \
((FLAG) == FLASH_FLAG_PUL) || \
((FLAG) == FLASH_FLAG_WR_PG_DIS))
#endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */
/**
* @}
*/
/* Exported functions ------------------------------------------------------- */
/** @addtogroup FLASH_Exported_Functions
* @{
*/
void FLASH_Unlock(FLASH_MemType_TypeDef FLASH_MemType);
void FLASH_Lock(FLASH_MemType_TypeDef FLASH_MemType);
void FLASH_DeInit(void);
void FLASH_ITConfig(FunctionalState NewState);
void FLASH_EraseByte(uint32_t Address);
void FLASH_ProgramByte(uint32_t Address, uint8_t Data);
uint8_t FLASH_ReadByte(uint32_t Address);
void FLASH_ProgramWord(uint32_t Address, uint32_t Data);
uint16_t FLASH_ReadOptionByte(uint16_t Address);
void FLASH_ProgramOptionByte(uint16_t Address, uint8_t Data);
void FLASH_EraseOptionByte(uint16_t Address);
void FLASH_SetLowPowerMode(FLASH_LPMode_TypeDef FLASH_LPMode);
void FLASH_SetProgrammingTime(FLASH_ProgramTime_TypeDef FLASH_ProgTime);
FLASH_LPMode_TypeDef FLASH_GetLowPowerMode(void);
FLASH_ProgramTime_TypeDef FLASH_GetProgrammingTime(void);
uint32_t FLASH_GetBootSize(void);
FlagStatus FLASH_GetFlagStatus(FLASH_Flag_TypeDef FLASH_FLAG);
/**
@code
All the functions declared below must be executed from RAM exclusively, except
for the FLASH_WaitForLastOperation function which can be executed from Flash.
Steps of the execution from RAM differs from one toolchain to another.
for more details refer to stm8s_flash.c file.
To enable execution from RAM you can either uncomment the following define
in the stm8s.h file or define it in your toolchain compiler preprocessor
- #define RAM_EXECUTION (1)
@endcode
*/
IN_RAM(void FLASH_EraseBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType));
IN_RAM(void FLASH_ProgramBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType,
FLASH_ProgramMode_TypeDef FLASH_ProgMode, uint8_t
*Buffer));
IN_RAM(FLASH_Status_TypeDef FLASH_WaitForLastOperation(FLASH_MemType_TypeDef FLASH_MemType));
/**
* @}
*/
#endif /*__STM8S_FLASH_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file stm8s_gpio.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all functions prototype and macros for the GPIO peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_GPIO_H
#define __STM8S_GPIO_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/* Exported variables ------------------------------------------------------- */
/* Exported types ------------------------------------------------------------*/
/** @addtogroup GPIO_Exported_Types
* @{
*/
/**
* @brief GPIO modes
*
* Bits definitions:
* - Bit 7: 0 = INPUT mode
* 1 = OUTPUT mode
* 1 = PULL-UP (input) or PUSH-PULL (output)
* - Bit 5: 0 = No external interrupt (input) or No slope control (output)
* 1 = External interrupt (input) or Slow control enabled (output)
* - Bit 4: 0 = Low level (output)
* 1 = High level (output push-pull) or HI-Z (output open-drain)
*/
typedef enum {
GPIO_MODE_IN_FL_NO_IT = (uint8_t) 0x00, /*!< Input floating, no external interrupt */
GPIO_MODE_IN_PU_NO_IT = (uint8_t) 0x40, /*!< Input pull-up, no external interrupt */
GPIO_MODE_IN_FL_IT = (uint8_t) 0x20, /*!< Input floating, external interrupt */
GPIO_MODE_IN_PU_IT = (uint8_t) 0x60, /*!< Input pull-up, external interrupt */
GPIO_MODE_OUT_OD_LOW_FAST = (uint8_t) 0xA0, /*!< Output open-drain, low level, 10MHz */
GPIO_MODE_OUT_PP_LOW_FAST = (uint8_t) 0xE0, /*!< Output push-pull, low level, 10MHz */
GPIO_MODE_OUT_OD_LOW_SLOW = (uint8_t) 0x80, /*!< Output open-drain, low level, 2MHz */
GPIO_MODE_OUT_PP_LOW_SLOW = (uint8_t) 0xC0, /*!< Output push-pull, low level, 2MHz */
GPIO_MODE_OUT_OD_HIZ_FAST = (uint8_t) 0xB0, /*!< Output open-drain, high-impedance level,10MHz */
GPIO_MODE_OUT_PP_HIGH_FAST = (uint8_t) 0xF0, /*!< Output push-pull, high level, 10MHz */
GPIO_MODE_OUT_OD_HIZ_SLOW = (uint8_t) 0x90, /*!< Output open-drain, high-impedance level, 2MHz */
GPIO_MODE_OUT_PP_HIGH_SLOW = (uint8_t) 0xD0 /*!< Output push-pull, high level, 2MHz */
} GPIO_Mode_TypeDef;
/**
* @brief Definition of the GPIO pins. Used by the @ref GPIO_Init function in
* order to select the pins to be initialized.
*/
typedef enum {
GPIO_PIN_0 = ((uint8_t) 0x01), /*!< Pin 0 selected */
GPIO_PIN_1 = ((uint8_t) 0x02), /*!< Pin 1 selected */
GPIO_PIN_2 = ((uint8_t) 0x04), /*!< Pin 2 selected */
GPIO_PIN_3 = ((uint8_t) 0x08), /*!< Pin 3 selected */
GPIO_PIN_4 = ((uint8_t) 0x10), /*!< Pin 4 selected */
GPIO_PIN_5 = ((uint8_t) 0x20), /*!< Pin 5 selected */
GPIO_PIN_6 = ((uint8_t) 0x40), /*!< Pin 6 selected */
GPIO_PIN_7 = ((uint8_t) 0x80), /*!< Pin 7 selected */
GPIO_PIN_LNIB = ((uint8_t) 0x0F), /*!< Low nibble pins selected */
GPIO_PIN_HNIB = ((uint8_t) 0xF0), /*!< High nibble pins selected */
GPIO_PIN_ALL = ((uint8_t) 0xFF) /*!< All pins selected */
} GPIO_Pin_TypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/* Exported macros -----------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup GPIO_Private_Macros
* @{
*/
/**
* @brief Macro used by the assert function to check the different functions parameters.
*/
/**
* @brief Macro used by the assert function in order to check the different
* values of GPIOMode_TypeDef.
*/
#define IS_GPIO_MODE_OK(MODE) \
(((MODE) == GPIO_MODE_IN_FL_NO_IT) || \
((MODE) == GPIO_MODE_IN_PU_NO_IT) || \
((MODE) == GPIO_MODE_IN_FL_IT) || \
((MODE) == GPIO_MODE_IN_PU_IT) || \
((MODE) == GPIO_MODE_OUT_OD_LOW_FAST) || \
((MODE) == GPIO_MODE_OUT_PP_LOW_FAST) || \
((MODE) == GPIO_MODE_OUT_OD_LOW_SLOW) || \
((MODE) == GPIO_MODE_OUT_PP_LOW_SLOW) || \
((MODE) == GPIO_MODE_OUT_OD_HIZ_FAST) || \
((MODE) == GPIO_MODE_OUT_PP_HIGH_FAST) || \
((MODE) == GPIO_MODE_OUT_OD_HIZ_SLOW) || \
((MODE) == GPIO_MODE_OUT_PP_HIGH_SLOW))
/**
* @brief Macro used by the assert function in order to check the different
* values of GPIO_Pins.
*/
#define IS_GPIO_PIN_OK(PIN) ((PIN) != (uint8_t)0x00)
/**
* @}
*/
/* Exported functions ------------------------------------------------------- */
/** @addtogroup GPIO_Exported_Functions
* @{
*/
#if 0
void GPIO_DeInit(GPIO_TypeDef *GPIOx);
void GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode);
void GPIO_Write(GPIO_TypeDef *GPIOx, uint8_t PortVal);
void GPIO_WriteHigh(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef PortPins);
void GPIO_WriteLow(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef PortPins);
void GPIO_WriteReverse(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef PortPins);
uint8_t GPIO_ReadInputData(GPIO_TypeDef *GPIOx);
uint8_t GPIO_ReadOutputData(GPIO_TypeDef *GPIOx);
BitStatus GPIO_ReadInputPin(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef GPIO_Pin);
void GPIO_ExternalPullUpConfig(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef GPIO_Pin, FunctionalState NewState);
#endif
/**
* @}
*/
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Public functions ----------------------------------------------------------*/
/**
* @addtogroup GPIO_Public_Functions
* @{
*/
/**
* @brief Deinitializes the GPIOx peripheral registers to their default reset values.
* @param GPIOx: Select the GPIO peripheral number (x = A to I).
* @retval None
*/
inline void GPIO_DeInit(GPIO_TypeDef *GPIOx)
{
GPIOx->ODR = GPIO_ODR_RESET_VALUE; /* Reset Output Data Register */
GPIOx->DDR = GPIO_DDR_RESET_VALUE; /* Reset Data Direction Register */
GPIOx->CR1 = GPIO_CR1_RESET_VALUE; /* Reset Control Register 1 */
GPIOx->CR2 = GPIO_CR2_RESET_VALUE; /* Reset Control Register 2 */
}
/**
* @brief Initializes the GPIOx according to the specified parameters.
* @param GPIOx : Select the GPIO peripheral number (x = A to I).
* @param GPIO_Pin : This parameter contains the pin number, it can be any value
* of the @ref GPIO_Pin_TypeDef enumeration.
* @param GPIO_Mode : This parameter can be a value of the
* @Ref GPIO_Mode_TypeDef enumeration.
* @retval None
*/
inline void GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode)
{
/*----------------------*/
/* Check the parameters */
/*----------------------*/
assert_param(IS_GPIO_MODE_OK(GPIO_Mode));
assert_param(IS_GPIO_PIN_OK(GPIO_Pin));
/* Reset corresponding bit to GPIO_Pin in CR2 register */
GPIOx->CR2 &= (uint8_t) (~(GPIO_Pin));
/*-----------------------------*/
/* Input/Output mode selection */
/*-----------------------------*/
if ((((uint8_t) (GPIO_Mode)) & (uint8_t) 0x80) != (uint8_t) 0x00) /* Output mode */
{
if ((((uint8_t) (GPIO_Mode)) & (uint8_t) 0x10) != (uint8_t) 0x00) /* High level */
{
GPIOx->ODR |= (uint8_t) GPIO_Pin;
} else /* Low level */
{
GPIOx->ODR &= (uint8_t) (~(GPIO_Pin));
}
/* Set Output mode */
GPIOx->DDR |= (uint8_t) GPIO_Pin;
} else /* Input mode */
{
/* Set Input mode */
GPIOx->DDR &= (uint8_t) (~(GPIO_Pin));
}
/*------------------------------------------------------------------------*/
/* Pull-Up/Float (Input) or Push-Pull/Open-Drain (Output) modes selection */
/*------------------------------------------------------------------------*/
if ((((uint8_t) (GPIO_Mode)) & (uint8_t) 0x40) != (uint8_t) 0x00) /* Pull-Up or Push-Pull */
{
GPIOx->CR1 |= (uint8_t) GPIO_Pin;
} else /* Float or Open-Drain */
{
GPIOx->CR1 &= (uint8_t) (~(GPIO_Pin));
}
/*-----------------------------------------------------*/
/* Interrupt (Input) or Slope (Output) modes selection */
/*-----------------------------------------------------*/
if ((((uint8_t) (GPIO_Mode)) & (uint8_t) 0x20) != (uint8_t) 0x00) /* Interrupt or Slow slope */
{
GPIOx->CR2 |= (uint8_t) GPIO_Pin;
} else /* No external interrupt or No slope control */
{
GPIOx->CR2 &= (uint8_t) (~(GPIO_Pin));
}
}
/**
* @brief Writes data to the specified GPIO data port.
* @note The port must be configured in output mode.
* @param GPIOx : Select the GPIO peripheral number (x = A to I).
* @param GPIO_PortVal : Specifies the value to be written to the port output
* data register.
* @retval None
*/
inline void GPIO_Write(GPIO_TypeDef *GPIOx, uint8_t PortVal)
{
GPIOx->ODR = PortVal;
}
/**
* @brief Writes high level to the specified GPIO pins.
* @note The port must be configured in output mode.
* @param GPIOx : Select the GPIO peripheral number (x = A to I).
* @param PortPins : Specifies the pins to be turned high to the port output.
* data register.
* @retval None
*/
inline void GPIO_WriteHigh(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef PortPins)
{
GPIOx->ODR |= (uint8_t) PortPins;
}
/**
* @brief Writes low level to the specified GPIO pins.
* @note The port must be configured in output mode.
* @param GPIOx : Select the GPIO peripheral number (x = A to I).
* @param PortPins : Specifies the pins to be turned low to the port output.
* data register.
* @retval None
*/
inline void GPIO_WriteLow(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef PortPins)
{
GPIOx->ODR &= (uint8_t) (~PortPins);
}
/**
* @brief Writes reverse level to the specified GPIO pins.
* @note The port must be configured in output mode.
* @param GPIOx : Select the GPIO peripheral number (x = A to I).
* @param PortPins : Specifies the pins to be reversed to the port output.
* data register.
* @retval None
*/
inline void GPIO_WriteReverse(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef PortPins)
{
GPIOx->ODR ^= (uint8_t) PortPins;
}
/**
* @brief Reads the specified GPIO output data port.
* @note The port must be configured in input mode.
* @param GPIOx : Select the GPIO peripheral number (x = A to I).
* @retval GPIO output data port value.
*/
inline uint8_t GPIO_ReadOutputData(GPIO_TypeDef *GPIOx)
{
return ((uint8_t) GPIOx->ODR);
}
/**
* @brief Reads the specified GPIO input data port.
* @note The port must be configured in input mode.
* @param GPIOx : Select the GPIO peripheral number (x = A to I).
* @retval GPIO input data port value.
*/
inline uint8_t GPIO_ReadInputData(GPIO_TypeDef *GPIOx)
{
return ((uint8_t) GPIOx->IDR);
}
/**
* @brief Reads the specified GPIO input data pin.
* @param GPIOx : Select the GPIO peripheral number (x = A to I).
* @param GPIO_Pin : Specifies the pin number.
* @retval BitStatus : GPIO input pin status.
*/
inline BitStatus GPIO_ReadInputPin(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
{
return ((BitStatus) (GPIOx->IDR & (uint8_t) GPIO_Pin));
}
/**
* @brief Configures the external pull-up on GPIOx pins.
* @param GPIOx : Select the GPIO peripheral number (x = A to I).
* @param GPIO_Pin : Specifies the pin number
* @param NewState : The new state of the pull up pin.
* @retval None
*/
inline void GPIO_ExternalPullUpConfig(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef GPIO_Pin, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_GPIO_PIN_OK(GPIO_Pin));
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE) /* External Pull-Up Set*/
{
GPIOx->CR1 |= (uint8_t) GPIO_Pin;
} else /* External Pull-Up Reset*/
{
GPIOx->CR1 &= (uint8_t) (~(GPIO_Pin));
}
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#endif /* __STM8L_GPIO_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file stm8s_itc.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all functions prototype and macros for the ITC peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_ITC_H
#define __STM8S_ITC_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/* Exported types ------------------------------------------------------------*/
/** @addtogroup ITC_Exported_Types
* @{
*/
/**
* @brief ITC Interrupt Lines selection
*/
typedef enum {
ITC_IRQ_TLI = (uint8_t) 0, /*!< Software interrupt */
ITC_IRQ_AWU = (uint8_t) 1, /*!< Auto wake up from halt interrupt */
ITC_IRQ_CLK = (uint8_t) 2, /*!< Clock controller interrupt */
ITC_IRQ_PORTA = (uint8_t) 3, /*!< Port A external interrupts */
ITC_IRQ_PORTB = (uint8_t) 4, /*!< Port B external interrupts */
ITC_IRQ_PORTC = (uint8_t) 5, /*!< Port C external interrupts */
ITC_IRQ_PORTD = (uint8_t) 6, /*!< Port D external interrupts */
ITC_IRQ_PORTE = (uint8_t) 7, /*!< Port E external interrupts */
#if defined(STM8S208) || defined(STM8AF52Ax)
ITC_IRQ_CAN_RX = (uint8_t)8, /*!< beCAN RX interrupt */
ITC_IRQ_CAN_TX = (uint8_t)9, /*!< beCAN TX/ER/SC interrupt */
#endif /*STM8S208 or STM8AF52Ax */
#if defined(STM8S903) || defined(STM8AF622x)
ITC_IRQ_PORTF = (uint8_t)8, /*!< Port F external interrupts */
#endif /*STM8S903 or STM8AF622x */
ITC_IRQ_SPI = (uint8_t) 10, /*!< SPI interrupt */
ITC_IRQ_TIM1_OVF = (uint8_t) 11, /*!< TIM1 update/overflow/underflow/trigger/
break interrupt*/
ITC_IRQ_TIM1_CAPCOM = (uint8_t) 12, /*!< TIM1 capture/compare interrupt */
#if defined(STM8S903) || defined(STM8AF622x)
ITC_IRQ_TIM5_OVFTRI = (uint8_t)13, /*!< TIM5 update/overflow/underflow/trigger/
interrupt */
ITC_IRQ_TIM5_CAPCOM = (uint8_t)14, /*!< TIM5 capture/compare interrupt */
#else
ITC_IRQ_TIM2_OVF = (uint8_t) 13, /*!< TIM2 update /overflow interrupt */
ITC_IRQ_TIM2_CAPCOM = (uint8_t) 14, /*!< TIM2 capture/compare interrupt */
#endif /*STM8S903 or STM8AF622x */
ITC_IRQ_TIM3_OVF = (uint8_t) 15, /*!< TIM3 update /overflow interrupt*/
ITC_IRQ_TIM3_CAPCOM = (uint8_t) 16, /*!< TIM3 update /overflow interrupt */
#if defined(STM8S208) || defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \
defined(STM8S003) || defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
ITC_IRQ_UART1_TX = (uint8_t) 17, /*!< UART1 TX interrupt */
ITC_IRQ_UART1_RX = (uint8_t) 18, /*!< UART1 RX interrupt */
#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S903 or STM8AF52Ax or STM8AF62Ax */
#if defined(STM8AF622x)
ITC_IRQ_UART4_TX = (uint8_t)17, /*!< UART4 TX interrupt */
ITC_IRQ_UART4_RX = (uint8_t)18, /*!< UART4 RX interrupt */
#endif /*STM8AF622x */
ITC_IRQ_I2C = (uint8_t) 19, /*!< I2C interrupt */
#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x)
ITC_IRQ_UART2_TX = (uint8_t)20, /*!< USART2 TX interrupt */
ITC_IRQ_UART2_RX = (uint8_t)21, /*!< USART2 RX interrupt */
#endif /*STM8S105 or STM8AF626x */
#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax)
ITC_IRQ_UART3_TX = (uint8_t)20, /*!< USART3 TX interrupt */
ITC_IRQ_UART3_RX = (uint8_t)21, /*!< USART3 RX interrupt */
ITC_IRQ_ADC2 = (uint8_t)22, /*!< ADC2 interrupt */
#endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */
#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || defined(STM8S903) || defined(STM8AF626x) || defined(STM8AF622x)
ITC_IRQ_ADC1 = (uint8_t) 22, /*!< ADC2 interrupt */
#endif /*STM8S105 or STM8S005 or STM8S003 or STM8S103 or STM8S903 or STM8AF626x or STM8AF622x */
#if defined(STM8S903) || defined(STM8AF622x)
ITC_IRQ_TIM6_OVFTRI = (uint8_t)23, /*!< TIM6 update/overflow/underflow/trigger/
interrupt */
#else
ITC_IRQ_TIM4_OVF = (uint8_t) 23, /*!< TIM4 update /overflow interrupt */
#endif /*STM8S903 or STM8AF622x */
ITC_IRQ_EEPROM_EEC = (uint8_t) 24 /*!< Flash interrupt */
} ITC_Irq_TypeDef;
/**
* @brief ITC Priority Levels selection
*/
typedef enum {
ITC_PRIORITYLEVEL_0 = (uint8_t) 0x02, /*!< Software priority level 0 (cannot be written) */
ITC_PRIORITYLEVEL_1 = (uint8_t) 0x01, /*!< Software priority level 1 */
ITC_PRIORITYLEVEL_2 = (uint8_t) 0x00, /*!< Software priority level 2 */
ITC_PRIORITYLEVEL_3 = (uint8_t) 0x03 /*!< Software priority level 3 */
} ITC_PriorityLevel_TypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @addtogroup ITC_Exported_Constants
* @{
*/
#define CPU_SOFT_INT_DISABLED ((uint8_t)0x28) /*!< Mask for I1 and I0 bits in CPU_CC register */
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/**
* @brief Macros used by the assert function in order to check the different functions parameters.
* @addtogroup ITC_Private_Macros
* @{
*/
/* Used by assert function */
#define IS_ITC_IRQ_OK(IRQ) ((IRQ) <= (uint8_t)24)
/* Used by assert function */
#define IS_ITC_PRIORITY_OK(PriorityValue) \
(((PriorityValue) == ITC_PRIORITYLEVEL_0) || \
((PriorityValue) == ITC_PRIORITYLEVEL_1) || \
((PriorityValue) == ITC_PRIORITYLEVEL_2) || \
((PriorityValue) == ITC_PRIORITYLEVEL_3))
/* Used by assert function */
#define IS_ITC_INTERRUPTS_DISABLED (ITC_GetSoftIntStatus() == CPU_SOFT_INT_DISABLED)
/**
* @}
*/
/* Exported functions ------------------------------------------------------- */
/** @addtogroup ITC_Exported_Functions
* @{
*/
#if 0
uint8_t ITC_GetCPUCC(void);
void ITC_DeInit(void);
uint8_t ITC_GetSoftIntStatus(void);
void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef PriorityValue);
ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum);
#endif
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @addtogroup ITC_Private_Functions
* @{
*/
/**
* @brief Utility function used to read CC register.
* @param None
* @retval CPU CC register value
*/
inline uint8_t ITC_GetCPUCC(void)
{
#ifdef _COSMIC_
_asm("push cc");
_asm("pop a");
return; /* Ignore compiler warning, the returned value is in A register */
#elif defined _RAISONANCE_ /* _RAISONANCE_ */
return _getCC_();
#else /* _IAR_ */
__asm__("push cc");
__asm__("pop a"); /* Ignore compiler warning, the returned value is in A register */
#endif /* _COSMIC_*/
}
/**
* @}
*/
/* Public functions ----------------------------------------------------------*/
/** @addtogroup ITC_Public_Functions
* @{
*/
/**
* @brief Deinitializes the ITC registers to their default reset value.
* @param None
* @retval None
*/
inline void ITC_DeInit(void)
{
ITC->ISPR1 = ITC_SPRX_RESET_VALUE;
ITC->ISPR2 = ITC_SPRX_RESET_VALUE;
ITC->ISPR3 = ITC_SPRX_RESET_VALUE;
ITC->ISPR4 = ITC_SPRX_RESET_VALUE;
ITC->ISPR5 = ITC_SPRX_RESET_VALUE;
ITC->ISPR6 = ITC_SPRX_RESET_VALUE;
ITC->ISPR7 = ITC_SPRX_RESET_VALUE;
ITC->ISPR8 = ITC_SPRX_RESET_VALUE;
}
/**
* @brief Gets the interrupt software priority bits (I1, I0) value from CPU CC register.
* @param None
* @retval The interrupt software priority bits value.
*/
inline uint8_t ITC_GetSoftIntStatus(void)
{
return (uint8_t) (ITC_GetCPUCC() & CPU_CC_I1I0);
}
/**
* @brief Gets the software priority of the specified interrupt source.
* @param IrqNum : Specifies the peripheral interrupt source.
* @retval ITC_PriorityLevel_TypeDef : Specifies the software priority of the interrupt source.
*/
inline ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum)
{
uint8_t Value = 0;
uint8_t Mask = 0;
/* Check function parameters */
assert_param(IS_ITC_IRQ_OK((uint8_t) IrqNum));
/* Define the mask corresponding to the bits position in the SPR register */
Mask = (uint8_t) (0x03U << (((uint8_t) IrqNum % 4U) * 2U));
switch (IrqNum) {
case ITC_IRQ_TLI: /* TLI software priority can be read but has no meaning */
case ITC_IRQ_AWU:
case ITC_IRQ_CLK:
case ITC_IRQ_PORTA:
Value = (uint8_t) (ITC->ISPR1 & Mask); /* Read software priority */
break;
case ITC_IRQ_PORTB:
case ITC_IRQ_PORTC:
case ITC_IRQ_PORTD:
case ITC_IRQ_PORTE:
Value = (uint8_t) (ITC->ISPR2 & Mask); /* Read software priority */
break;
#if defined(STM8S208) || defined(STM8AF52Ax)
case ITC_IRQ_CAN_RX:
case ITC_IRQ_CAN_TX:
#endif /*STM8S208 or STM8AF52Ax */
#if defined(STM8S903) || defined(STM8AF622x)
case ITC_IRQ_PORTF:
#endif /*STM8S903 or STM8AF622x */
case ITC_IRQ_SPI:
case ITC_IRQ_TIM1_OVF:
Value = (uint8_t) (ITC->ISPR3 & Mask); /* Read software priority */
break;
case ITC_IRQ_TIM1_CAPCOM:
#if defined (STM8S903) || defined (STM8AF622x)
case ITC_IRQ_TIM5_OVFTRI:
case ITC_IRQ_TIM5_CAPCOM:
#else
case ITC_IRQ_TIM2_OVF:
case ITC_IRQ_TIM2_CAPCOM:
#endif /* STM8S903 or STM8AF622x*/
case ITC_IRQ_TIM3_OVF:
Value = (uint8_t) (ITC->ISPR4 & Mask); /* Read software priority */
break;
case ITC_IRQ_TIM3_CAPCOM:
#if defined(STM8S208) || defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \
defined(STM8S003) || defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
case ITC_IRQ_UART1_TX:
case ITC_IRQ_UART1_RX:
#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S903 or STM8AF52Ax or STM8AF62Ax */
#if defined(STM8AF622x)
case ITC_IRQ_UART4_TX:
case ITC_IRQ_UART4_RX:
#endif /*STM8AF622x */
case ITC_IRQ_I2C:
Value = (uint8_t) (ITC->ISPR5 & Mask); /* Read software priority */
break;
#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x)
case ITC_IRQ_UART2_TX:
case ITC_IRQ_UART2_RX:
#endif /*STM8S105 or STM8AF626x*/
#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || \
defined(STM8AF62Ax)
case ITC_IRQ_UART3_TX:
case ITC_IRQ_UART3_RX:
case ITC_IRQ_ADC2:
#endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */
#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \
defined(STM8S903) || defined(STM8AF626x) || defined(STM8AF622x)
case ITC_IRQ_ADC1:
#endif /*STM8S105, STM8S005, STM8S103 or STM8S003 or STM8S903 or STM8AF626x or STM8AF622x */
#if defined (STM8S903) || defined (STM8AF622x)
case ITC_IRQ_TIM6_OVFTRI:
#else
case ITC_IRQ_TIM4_OVF:
#endif /*STM8S903 or STM8AF622x */
Value = (uint8_t) (ITC->ISPR6 & Mask); /* Read software priority */
break;
case ITC_IRQ_EEPROM_EEC:
Value = (uint8_t) (ITC->ISPR7 & Mask); /* Read software priority */
break;
default:
break;
}
Value >>= (uint8_t) (((uint8_t) IrqNum % 4u) * 2u);
return ((ITC_PriorityLevel_TypeDef) Value);
}
/**
* @brief Sets the software priority of the specified interrupt source.
* @note - The modification of the software priority is only possible when
* the interrupts are disabled.
* - The normal behavior is to disable the interrupt before calling
* this function, and re-enable it after.
* - The priority level 0 cannot be set (see product specification
* for more details).
* @param IrqNum : Specifies the peripheral interrupt source.
* @param PriorityValue : Specifies the software priority value to set,
* can be a value of @ref ITC_PriorityLevel_TypeDef .
* @retval None
*/
inline void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef PriorityValue)
{
uint8_t Mask = 0;
uint8_t NewPriority = 0;
/* Check function parameters */
assert_param(IS_ITC_IRQ_OK((uint8_t) IrqNum));
assert_param(IS_ITC_PRIORITY_OK(PriorityValue));
/* Check if interrupts are disabled */
assert_param(IS_ITC_INTERRUPTS_DISABLED);
/* Define the mask corresponding to the bits position in the SPR register */
/* The mask is reversed in order to clear the 2 bits after more easily */
Mask = (uint8_t) (~(uint8_t) (0x03U << (((uint8_t) IrqNum % 4U) * 2U)));
/* Define the new priority to write */
NewPriority = (uint8_t) ((uint8_t) (PriorityValue) << (((uint8_t) IrqNum % 4U) * 2U));
switch (IrqNum) {
case ITC_IRQ_TLI: /* TLI software priority can be written but has no meaning */
case ITC_IRQ_AWU:
case ITC_IRQ_CLK:
case ITC_IRQ_PORTA:
ITC->ISPR1 &= Mask;
ITC->ISPR1 |= NewPriority;
break;
case ITC_IRQ_PORTB:
case ITC_IRQ_PORTC:
case ITC_IRQ_PORTD:
case ITC_IRQ_PORTE:
ITC->ISPR2 &= Mask;
ITC->ISPR2 |= NewPriority;
break;
#if defined(STM8S208) || defined(STM8AF52Ax)
case ITC_IRQ_CAN_RX:
case ITC_IRQ_CAN_TX:
#endif /*STM8S208 or STM8AF52Ax */
#if defined(STM8S903) || defined(STM8AF622x)
case ITC_IRQ_PORTF:
#endif /*STM8S903 or STM8AF622x */
case ITC_IRQ_SPI:
case ITC_IRQ_TIM1_OVF:
ITC->ISPR3 &= Mask;
ITC->ISPR3 |= NewPriority;
break;
case ITC_IRQ_TIM1_CAPCOM:
#if defined(STM8S903) || defined(STM8AF622x)
case ITC_IRQ_TIM5_OVFTRI:
case ITC_IRQ_TIM5_CAPCOM:
#else
case ITC_IRQ_TIM2_OVF:
case ITC_IRQ_TIM2_CAPCOM:
#endif /*STM8S903 or STM8AF622x */
case ITC_IRQ_TIM3_OVF:
ITC->ISPR4 &= Mask;
ITC->ISPR4 |= NewPriority;
break;
case ITC_IRQ_TIM3_CAPCOM:
#if defined(STM8S208) || defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \
defined(STM8S003) || defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
case ITC_IRQ_UART1_TX:
case ITC_IRQ_UART1_RX:
#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S903 or STM8AF52Ax or STM8AF62Ax */
#if defined(STM8AF622x)
case ITC_IRQ_UART4_TX:
case ITC_IRQ_UART4_RX:
#endif /*STM8AF622x */
case ITC_IRQ_I2C:
ITC->ISPR5 &= Mask;
ITC->ISPR5 |= NewPriority;
break;
#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x)
case ITC_IRQ_UART2_TX:
case ITC_IRQ_UART2_RX:
#endif /*STM8S105 or STM8AF626x */
#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || \
defined(STM8AF62Ax)
case ITC_IRQ_UART3_TX:
case ITC_IRQ_UART3_RX:
case ITC_IRQ_ADC2:
#endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */
#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \
defined(STM8S903) || defined(STM8AF626x) || defined (STM8AF622x)
case ITC_IRQ_ADC1:
#endif /*STM8S105, STM8S005, STM8S103 or STM8S003 or STM8S903 or STM8AF626x or STM8AF622x */
#if defined (STM8S903) || defined (STM8AF622x)
case ITC_IRQ_TIM6_OVFTRI:
#else
case ITC_IRQ_TIM4_OVF:
#endif /* STM8S903 or STM8AF622x */
ITC->ISPR6 &= Mask;
ITC->ISPR6 |= NewPriority;
break;
case ITC_IRQ_EEPROM_EEC:
ITC->ISPR7 &= Mask;
ITC->ISPR7 |= NewPriority;
break;
default:
break;
}
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/**
* @}
*/
#endif /* __STM8S_ITC_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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Library/SPL/stm8s_iwdg.h
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/**
******************************************************************************
* @file stm8s_iwdg.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all functions prototypes and macros for the IWDG peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_IWDG_H
#define __STM8S_IWDG_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/** @addtogroup IWDG_Private_Define
* @{
*/
/**
* @brief Define used to prevent watchdog reset
*/
#define IWDG_KEY_REFRESH ((uint8_t)0xAA) /*!< This value written in the Key register prevent the watchdog reset */
/**
* @brief Define used to start the watchdog counter down
*/
#define IWDG_KEY_ENABLE ((uint8_t)0xCC) /*!< This value written in the Key register start the watchdog counting down*/
/**
* @}
*/
/** @addtogroup IWDG_Private_Macros
* @{
*/
/**
* @brief Macro used by the assert function in order to check the different
* values of the prescaler.
*/
#define IS_IWDG_PRESCALER_OK(VALUE) (((VALUE) == IWDG_Prescaler_4 ) || \
((VALUE) == IWDG_Prescaler_8 ) || \
((VALUE) == IWDG_Prescaler_16 ) || \
((VALUE) == IWDG_Prescaler_32 ) || \
((VALUE) == IWDG_Prescaler_64 ) || \
((VALUE) == IWDG_Prescaler_128 ) || \
((VALUE) == IWDG_Prescaler_256))
/**
* @brief Macro used by the assert function in order to check the different
* values of the counter register.
*/
#define IS_IWDG_WRITEACCESS_MODE_OK(MODE) (((MODE) == IWDG_WriteAccess_Enable) || ((MODE) == IWDG_WriteAccess_Disable))
/**
* @}
*/
/** @addtogroup IWDG_Exported_Types
* @{
*/
/** IWDG write access enumeration */
typedef enum {
IWDG_WriteAccess_Enable = (uint8_t) 0x55, /*!< Code 0x55 in Key register, allow write access to Prescaler and Reload registers */
IWDG_WriteAccess_Disable = (uint8_t) 0x00 /*!< Code 0x00 in Key register, not allow write access to Prescaler and Reload registers */
} IWDG_WriteAccess_TypeDef;
/** IWDG prescaler enumaration */
typedef enum {
IWDG_Prescaler_4 = (uint8_t) 0x00, /*!< Used to set prescaler register to 4 */
IWDG_Prescaler_8 = (uint8_t) 0x01, /*!< Used to set prescaler register to 8 */
IWDG_Prescaler_16 = (uint8_t) 0x02, /*!< Used to set prescaler register to 16 */
IWDG_Prescaler_32 = (uint8_t) 0x03, /*!< Used to set prescaler register to 32 */
IWDG_Prescaler_64 = (uint8_t) 0x04, /*!< Used to set prescaler register to 64 */
IWDG_Prescaler_128 = (uint8_t) 0x05, /*!< Used to set prescaler register to 128 */
IWDG_Prescaler_256 = (uint8_t) 0x06 /*!< Used to set prescaler register to 256 */
} IWDG_Prescaler_TypeDef;
/**
* @}
*/
/** @addtogroup IWDG_Exported_Functions
* @{
*/
#if 0
void IWDG_WriteAccessCmd(IWDG_WriteAccess_TypeDef IWDG_WriteAccess);
void IWDG_SetPrescaler(IWDG_Prescaler_TypeDef IWDG_Prescaler);
void IWDG_SetReload(uint8_t IWDG_Reload);
void IWDG_ReloadCounter(void);
void IWDG_Enable(void);
#endif
/**
* @}
*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Public functions ----------------------------------------------------------*/
/** @addtogroup IWDG_Public_Functions
* @{
*/
/**
* @brief Enables or disables write access to Prescaler and Reload registers.
* @param IWDG_WriteAccess : New state of write access to Prescaler and Reload
* registers. This parameter can be a value of @ref IWDG_WriteAccess_TypeDef.
* @retval None
*/
inline void IWDG_WriteAccessCmd(IWDG_WriteAccess_TypeDef IWDG_WriteAccess)
{
/* Check the parameters */
assert_param(IS_IWDG_WRITEACCESS_MODE_OK(IWDG_WriteAccess));
IWDG->KR = (uint8_t) IWDG_WriteAccess; /* Write Access */
}
/**
* @brief Sets IWDG Prescaler value.
* @note Write access should be enabled
* @param IWDG_Prescaler : Specifies the IWDG Prescaler value.
* This parameter can be a value of @ref IWDG_Prescaler_TypeDef.
* @retval None
*/
inline void IWDG_SetPrescaler(IWDG_Prescaler_TypeDef IWDG_Prescaler)
{
/* Check the parameters */
assert_param(IS_IWDG_PRESCALER_OK(IWDG_Prescaler));
IWDG->PR = (uint8_t) IWDG_Prescaler;
}
/**
* @brief Sets IWDG Reload value.
* @note Write access should be enabled
* @param IWDG_Reload : Reload register value.
* This parameter must be a number between 0 and 0xFF.
* @retval None
*/
inline void IWDG_SetReload(uint8_t IWDG_Reload)
{
IWDG->RLR = IWDG_Reload;
}
/**
* @brief Reloads IWDG counter
* @note Write access should be enabled
* @param None
* @retval None
*/
inline void IWDG_ReloadCounter(void)
{
IWDG->KR = IWDG_KEY_REFRESH;
}
/**
* @brief Enables IWDG.
* @param None
* @retval None
*/
inline void IWDG_Enable(void)
{
IWDG->KR = IWDG_KEY_ENABLE;
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#endif /* __STM8S_IWDG_H */
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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Library/SPL/stm8s_rst.h
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/**
******************************************************************************
* @file stm8s_rst.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all functions prototype and macros for the RST peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_RST_H
#define __STM8S_RST_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/** @addtogroup RST_Exported_Types
* @{
*/
typedef enum {
RST_FLAG_EMCF = (uint8_t) 0x10, /*!< EMC reset flag */
RST_FLAG_SWIMF = (uint8_t) 0x08, /*!< SWIM reset flag */
RST_FLAG_ILLOPF = (uint8_t) 0x04, /*!< Illigal opcode reset flag */
RST_FLAG_IWDGF = (uint8_t) 0x02, /*!< Independent watchdog reset flag */
RST_FLAG_WWDGF = (uint8_t) 0x01 /*!< Window watchdog reset flag */
} RST_Flag_TypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/* Exported macros -----------------------------------------------------------*/
/** @addtogroup RST_Private_Macros
* @{
*/
/**
* @brief Macro used by the assert function to check the different functions parameters.
*/
/**
* @brief Macro used by the assert function to check the different RST flags.
*/
#define IS_RST_FLAG_OK(FLAG) (((FLAG) == RST_FLAG_EMCF) || \
((FLAG) == RST_FLAG_SWIMF) ||\
((FLAG) == RST_FLAG_ILLOPF) ||\
((FLAG) == RST_FLAG_IWDGF) ||\
((FLAG) == RST_FLAG_WWDGF))
/**
* @}
*/
/** @addtogroup RST_Exported_functions
* @{
*/
#if 0
FlagStatus RST_GetFlagStatus(RST_Flag_TypeDef RST_Flag);
void RST_ClearFlag(RST_Flag_TypeDef RST_Flag);
#endif
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private Constants ---------------------------------------------------------*/
/* Public functions ----------------------------------------------------------*/
/**
* @addtogroup RST_Public_Functions
* @{
*/
/**
* @brief Checks whether the specified RST flag is set or not.
* @param RST_Flag : specify the reset flag to check.
* This parameter can be a value of @ref RST_FLAG_TypeDef.
* @retval FlagStatus: status of the given RST flag.
*/
inline FlagStatus RST_GetFlagStatus(RST_Flag_TypeDef RST_Flag)
{
/* Check the parameters */
assert_param(IS_RST_FLAG_OK(RST_Flag));
/* Get flag status */
return ((FlagStatus) (((uint8_t) (RST->SR & RST_Flag) == (uint8_t) 0x00) ? RESET : SET));
}
/**
* @brief Clears the specified RST flag.
* @param RST_Flag : specify the reset flag to clear.
* This parameter can be a value of @ref RST_FLAG_TypeDef.
* @retval None
*/
inline void RST_ClearFlag(RST_Flag_TypeDef RST_Flag)
{
/* Check the parameters */
assert_param(IS_RST_FLAG_OK(RST_Flag));
RST->SR = (uint8_t) RST_Flag;
}
/**
* @}
*/
#endif /* __STM8S_RST_H */
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file stm8s_spi.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all functions prototype and macros for the SPI peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_SPI_H
#define __STM8S_SPI_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/** @addtogroup SPI_Exported_Types
* @{
*/
/**
* @brief SPI data direction mode
* Warning: element values correspond to BDM, BDOE, RXONLY bits position
*/
typedef enum {
SPI_DATADIRECTION_2LINES_FULLDUPLEX = (uint8_t) 0x00, /*!< 2-line uni-directional data mode enable */
SPI_DATADIRECTION_2LINES_RXONLY = (uint8_t) 0x04, /*!< Receiver only in 2 line uni-directional data mode */
SPI_DATADIRECTION_1LINE_RX = (uint8_t) 0x80, /*!< Receiver only in 1 line bi-directional data mode */
SPI_DATADIRECTION_1LINE_TX = (uint8_t) 0xC0 /*!< Transmit only in 1 line bi-directional data mode */
} SPI_DataDirection_TypeDef;
/**
* @brief SPI Slave Select management
* Warning: element values correspond to LSBFIRST bit position
*/
typedef enum {
SPI_NSS_SOFT = (uint8_t) 0x02, /*!< Software slave management disabled */
SPI_NSS_HARD = (uint8_t) 0x00 /*!< Software slave management enabled */
} SPI_NSS_TypeDef;
/**
* @brief SPI direction transmit/receive
*/
typedef enum {
SPI_DIRECTION_RX = (uint8_t) 0x00, /*!< Selects Rx receive direction in bi-directional mode */
SPI_DIRECTION_TX = (uint8_t) 0x01 /*!< Selects Tx transmission direction in bi-directional mode */
} SPI_Direction_TypeDef;
/**
* @brief SPI master/slave mode
* Warning: element values correspond to MSTR bit position
*/
typedef enum {
SPI_MODE_MASTER = (uint8_t) 0x04, /*!< SPI Master configuration */
SPI_MODE_SLAVE = (uint8_t) 0x00 /*!< SPI Slave configuration */
} SPI_Mode_TypeDef;
/**
* @brief SPI BaudRate Prescaler
* Warning: element values correspond to BR bits position
*/
typedef enum {
SPI_BAUDRATEPRESCALER_2 = (uint8_t) 0x00, /*!< SPI frequency = frequency(CPU)/2 */
SPI_BAUDRATEPRESCALER_4 = (uint8_t) 0x08, /*!< SPI frequency = frequency(CPU)/4 */
SPI_BAUDRATEPRESCALER_8 = (uint8_t) 0x10, /*!< SPI frequency = frequency(CPU)/8 */
SPI_BAUDRATEPRESCALER_16 = (uint8_t) 0x18, /*!< SPI frequency = frequency(CPU)/16 */
SPI_BAUDRATEPRESCALER_32 = (uint8_t) 0x20, /*!< SPI frequency = frequency(CPU)/32 */
SPI_BAUDRATEPRESCALER_64 = (uint8_t) 0x28, /*!< SPI frequency = frequency(CPU)/64 */
SPI_BAUDRATEPRESCALER_128 = (uint8_t) 0x30, /*!< SPI frequency = frequency(CPU)/128 */
SPI_BAUDRATEPRESCALER_256 = (uint8_t) 0x38 /*!< SPI frequency = frequency(CPU)/256 */
} SPI_BaudRatePrescaler_TypeDef;
/**
* @brief SPI Clock Polarity
* Warning: element values correspond to CPOL bit position
*/
typedef enum {
SPI_CLOCKPOLARITY_LOW = (uint8_t) 0x00, /*!< Clock to 0 when idle */
SPI_CLOCKPOLARITY_HIGH = (uint8_t) 0x02 /*!< Clock to 1 when idle */
} SPI_ClockPolarity_TypeDef;
/**
* @brief SPI Clock Phase
* Warning: element values correspond to CPHA bit position
*/
typedef enum {
SPI_CLOCKPHASE_1EDGE = (uint8_t) 0x00, /*!< The first clock transition is the first data capture edge */
SPI_CLOCKPHASE_2EDGE = (uint8_t) 0x01 /*!< The second clock transition is the first data capture edge */
} SPI_ClockPhase_TypeDef;
/**
* @brief SPI Frame Format: MSB or LSB transmitted first
* Warning: element values correspond to LSBFIRST bit position
*/
typedef enum {
SPI_FIRSTBIT_MSB = (uint8_t) 0x00, /*!< MSB bit will be transmitted first */
SPI_FIRSTBIT_LSB = (uint8_t) 0x80 /*!< LSB bit will be transmitted first */
} SPI_FirstBit_TypeDef;
/**
* @brief SPI CRC Transmit/Receive
*/
typedef enum {
SPI_CRC_RX = (uint8_t) 0x00, /*!< Select Tx CRC register */
SPI_CRC_TX = (uint8_t) 0x01 /*!< Select Rx CRC register */
} SPI_CRC_TypeDef;
/**
* @brief SPI flags definition - Warning : FLAG value = mapping position register
*/
typedef enum {
SPI_FLAG_BSY = (uint8_t) 0x80, /*!< Busy flag */
SPI_FLAG_OVR = (uint8_t) 0x40, /*!< Overrun flag */
SPI_FLAG_MODF = (uint8_t) 0x20, /*!< Mode fault */
SPI_FLAG_CRCERR = (uint8_t) 0x10, /*!< CRC error flag */
SPI_FLAG_WKUP = (uint8_t) 0x08, /*!< Wake-up flag */
SPI_FLAG_TXE = (uint8_t) 0x02, /*!< Transmit buffer empty */
SPI_FLAG_RXNE = (uint8_t) 0x01 /*!< Receive buffer empty */
} SPI_Flag_TypeDef;
/**
* @brief SPI_IT possible values
* Elements values convention: 0xYX
* X: Position of the corresponding Interrupt
* Y: ITPENDINGBIT position
*/
typedef enum {
SPI_IT_WKUP = (uint8_t) 0x34, /*!< Wake-up interrupt*/
SPI_IT_OVR = (uint8_t) 0x65, /*!< Overrun interrupt*/
SPI_IT_MODF = (uint8_t) 0x55, /*!< Mode fault interrupt*/
SPI_IT_CRCERR = (uint8_t) 0x45, /*!< CRC error interrupt*/
SPI_IT_TXE = (uint8_t) 0x17, /*!< Transmit buffer empty interrupt*/
SPI_IT_RXNE = (uint8_t) 0x06, /*!< Receive buffer not empty interrupt*/
SPI_IT_ERR = (uint8_t) 0x05 /*!< Error interrupt*/
} SPI_IT_TypeDef;
/**
* @}
*/
/* Private define ------------------------------------------------------------*/
/** @addtogroup SPI_Private_Macros
* @brief Macros used by the assert_param function to check the different functions parameters.
* @{
*/
/**
* @brief Macro used by the assert_param function in order to check the data direction mode values
*/
#define IS_SPI_DATA_DIRECTION_OK(MODE) (((MODE) == SPI_DATADIRECTION_2LINES_FULLDUPLEX) || \
((MODE) == SPI_DATADIRECTION_2LINES_RXONLY) || \
((MODE) == SPI_DATADIRECTION_1LINE_RX) || \
((MODE) == SPI_DATADIRECTION_1LINE_TX))
/**
* @brief Macro used by the assert_param function in order to check the mode
* half duplex data direction values
*/
#define IS_SPI_DIRECTION_OK(DIRECTION) (((DIRECTION) == SPI_DIRECTION_RX) || \
((DIRECTION) == SPI_DIRECTION_TX))
/**
* @brief Macro used by the assert_param function in order to check the NSS
* management values
*/
#define IS_SPI_SLAVEMANAGEMENT_OK(NSS) (((NSS) == SPI_NSS_SOFT) || \
((NSS) == SPI_NSS_HARD))
/**
* @brief Macro used by the assert_param function in order to check the different
* sensitivity values for the CRC polynomial
*/
#define IS_SPI_CRC_POLYNOMIAL_OK(POLYNOMIAL) ((POLYNOMIAL) > (uint8_t)0x00)
/**
* @brief Macro used by the assert_param function in order to check the SPI Mode values
*/
#define IS_SPI_MODE_OK(MODE) (((MODE) == SPI_MODE_MASTER) || \
((MODE) == SPI_MODE_SLAVE))
/**
* @brief Macro used by the assert_param function in order to check the baudrate values
*/
#define IS_SPI_BAUDRATE_PRESCALER_OK(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
/**
* @brief Macro used by the assert_param function in order to check the polarity values
*/
#define IS_SPI_POLARITY_OK(CLKPOL) (((CLKPOL) == SPI_CLOCKPOLARITY_LOW) || \
((CLKPOL) == SPI_CLOCKPOLARITY_HIGH))
/**
* @brief Macro used by the assert_param function in order to check the phase values
*/
#define IS_SPI_PHASE_OK(CLKPHA) (((CLKPHA) == SPI_CLOCKPHASE_1EDGE) || \
((CLKPHA) == SPI_CLOCKPHASE_2EDGE))
/**
* @brief Macro used by the assert_param function in order to check the first
* bit to be transmited values
*/
#define IS_SPI_FIRSTBIT_OK(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
((BIT) == SPI_FIRSTBIT_LSB))
/**
* @brief Macro used by the assert_param function in order to check the CRC
* Transmit/Receive
*/
#define IS_SPI_CRC_OK(CRC) (((CRC) == SPI_CRC_TX) || \
((CRC) == SPI_CRC_RX))
/**
* @brief Macro used by the assert_param function in order to check the
* different flags values
*/
#define IS_SPI_FLAGS_OK(FLAG) (((FLAG) == SPI_FLAG_OVR) || \
((FLAG) == SPI_FLAG_MODF) || \
((FLAG) == SPI_FLAG_CRCERR) || \
((FLAG) == SPI_FLAG_WKUP) || \
((FLAG) == SPI_FLAG_TXE) || \
((FLAG) == SPI_FLAG_RXNE) || \
((FLAG) == SPI_FLAG_BSY))
/**
* @brief Macro used by the assert_param function in order to check the
* different sensitivity values for the flag that can be cleared
* by writing 0
*/
#define IS_SPI_CLEAR_FLAGS_OK(FLAG) (((FLAG) == SPI_FLAG_CRCERR) || \
((FLAG) == SPI_FLAG_WKUP))
/**
* @brief Macro used by the assert_param function in order to check the
* different sensitivity values for the Interrupts
*/
#define IS_SPI_CONFIG_IT_OK(Interrupt) (((Interrupt) == SPI_IT_TXE) || \
((Interrupt) == SPI_IT_RXNE) || \
((Interrupt) == SPI_IT_ERR) || \
((Interrupt) == SPI_IT_WKUP))
/**
* @brief Macro used by the assert_param function in order to check the
* different sensitivity values for the pending bit
*/
#define IS_SPI_GET_IT_OK(ITPendingBit) (((ITPendingBit) == SPI_IT_OVR) || \
((ITPendingBit) == SPI_IT_MODF) || \
((ITPendingBit) == SPI_IT_CRCERR) || \
((ITPendingBit) == SPI_IT_WKUP) || \
((ITPendingBit) == SPI_IT_TXE) || \
((ITPendingBit) == SPI_IT_RXNE))
/**
* @brief Macro used by the assert_param function in order to check the
* different sensitivity values for the pending bit that can be cleared
* by writing 0
*/
#define IS_SPI_CLEAR_IT_OK(ITPendingBit) (((ITPendingBit) == SPI_IT_CRCERR) || \
((ITPendingBit) == SPI_IT_WKUP))
/**
* @}
*/
#if 0
/** @addtogroup SPI_Exported_Functions
* @{
*/
void SPI_DeInit(void);
void SPI_Init(SPI_FirstBit_TypeDef FirstBit,
SPI_BaudRatePrescaler_TypeDef BaudRatePrescaler,
SPI_Mode_TypeDef Mode, SPI_ClockPolarity_TypeDef ClockPolarity,
SPI_ClockPhase_TypeDef ClockPhase,
SPI_DataDirection_TypeDef Data_Direction,
SPI_NSS_TypeDef Slave_Management, uint8_t CRCPolynomial);
void SPI_Cmd(FunctionalState NewState);
void SPI_ITConfig(SPI_IT_TypeDef SPI_IT, FunctionalState NewState);
void SPI_SendData(uint8_t Data);
uint8_t SPI_ReceiveData(void);
void SPI_NSSInternalSoftwareCmd(FunctionalState NewState);
void SPI_TransmitCRC(void);
void SPI_CalculateCRCCmd(FunctionalState NewState);
uint8_t SPI_GetCRC(SPI_CRC_TypeDef SPI_CRC);
void SPI_ResetCRC(void);
uint8_t SPI_GetCRCPolynomial(void);
void SPI_BiDirectionalLineConfig(SPI_Direction_TypeDef SPI_Direction);
FlagStatus SPI_GetFlagStatus(SPI_Flag_TypeDef SPI_FLAG);
void SPI_ClearFlag(SPI_Flag_TypeDef SPI_FLAG);
ITStatus SPI_GetITStatus(SPI_IT_TypeDef SPI_IT);
void SPI_ClearITPendingBit(SPI_IT_TypeDef SPI_IT);
#endif
/**
* @}
*/
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @addtogroup SPI_Public_Functions
* @{
*/
/**
* @brief Deinitializes the SPI peripheral registers to their default reset values.
* @param None
* @retval None
*/
inline void SPI_DeInit(void)
{
SPI->CR1 = SPI_CR1_RESET_VALUE;
SPI->CR2 = SPI_CR2_RESET_VALUE;
SPI->ICR = SPI_ICR_RESET_VALUE;
SPI->SR = SPI_SR_RESET_VALUE;
SPI->CRCPR = SPI_CRCPR_RESET_VALUE;
}
/**
* @brief Initializes the SPI according to the specified parameters.
* @param FirstBit : This parameter can be any of the
* @ref SPI_FirstBit_TypeDef enumeration.
* @param BaudRatePrescaler : This parameter can be any of the
* @ref SPI_BaudRatePrescaler_TypeDef enumeration.
* @param Mode : This parameter can be any of the
* @ref SPI_Mode_TypeDef enumeration.
* @param ClockPolarity : This parameter can be any of the
* @ref SPI_ClockPolarity_TypeDef enumeration.
* @param ClockPhase : This parameter can be any of the
* @ref SPI_ClockPhase_TypeDef enumeration.
* @param Data_Direction : This parameter can be any of the
* @ref SPI_DataDirection_TypeDef enumeration.
* @param Slave_Management : This parameter can be any of the
* @ref SPI_NSS_TypeDef enumeration.
* @param CRCPolynomial : Configures the CRC polynomial.
* @retval None
*/
inline void
SPI_Init(SPI_FirstBit_TypeDef FirstBit, SPI_BaudRatePrescaler_TypeDef BaudRatePrescaler, SPI_Mode_TypeDef Mode,
SPI_ClockPolarity_TypeDef ClockPolarity, SPI_ClockPhase_TypeDef ClockPhase,
SPI_DataDirection_TypeDef Data_Direction, SPI_NSS_TypeDef Slave_Management, uint8_t CRCPolynomial)
{
/* Check structure elements */
assert_param(IS_SPI_FIRSTBIT_OK(FirstBit));
assert_param(IS_SPI_BAUDRATE_PRESCALER_OK(BaudRatePrescaler));
assert_param(IS_SPI_MODE_OK(Mode));
assert_param(IS_SPI_POLARITY_OK(ClockPolarity));
assert_param(IS_SPI_PHASE_OK(ClockPhase));
assert_param(IS_SPI_DATA_DIRECTION_OK(Data_Direction));
assert_param(IS_SPI_SLAVEMANAGEMENT_OK(Slave_Management));
assert_param(IS_SPI_CRC_POLYNOMIAL_OK(CRCPolynomial));
/* Frame Format, BaudRate, Clock Polarity and Phase configuration */
SPI->CR1 = (uint8_t) ((uint8_t) ((uint8_t) FirstBit | BaudRatePrescaler) |
(uint8_t) ((uint8_t) ClockPolarity | ClockPhase));
/* Data direction configuration: BDM, BDOE and RXONLY bits */
SPI->CR2 = (uint8_t) ((uint8_t) (Data_Direction) | (uint8_t) (Slave_Management));
if (Mode == SPI_MODE_MASTER) {
SPI->CR2 |= (uint8_t) SPI_CR2_SSI;
} else {
SPI->CR2 &= (uint8_t) ~(SPI_CR2_SSI);
}
/* Master/Slave mode configuration */
SPI->CR1 |= (uint8_t) (Mode);
/* CRC configuration */
SPI->CRCPR = (uint8_t) CRCPolynomial;
}
/**
* @brief Enables or disables the SPI peripheral.
* @param NewState New state of the SPI peripheral.
* This parameter can be: ENABLE or DISABLE
* @retval None
*/
inline void SPI_Cmd(FunctionalState NewState)
{
/* Check function parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE) {
SPI->CR1 |= SPI_CR1_SPE; /* Enable the SPI peripheral*/
} else {
SPI->CR1 &= (uint8_t) (~SPI_CR1_SPE); /* Disable the SPI peripheral*/
}
}
/**
* @brief Enables or disables the specified interrupts.
* @param SPI_IT Specifies the SPI interrupts sources to be enabled or disabled.
* @param NewState: The new state of the specified SPI interrupts.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
inline void SPI_ITConfig(SPI_IT_TypeDef SPI_IT, FunctionalState NewState)
{
uint8_t itpos = 0;
/* Check function parameters */
assert_param(IS_SPI_CONFIG_IT_OK(SPI_IT));
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
/* Get the SPI IT index */
itpos = (uint8_t) ((uint8_t) 1 << (uint8_t) ((uint8_t) SPI_IT & (uint8_t) 0x0F));
if (NewState != DISABLE) {
SPI->ICR |= itpos; /* Enable interrupt*/
} else {
SPI->ICR &= (uint8_t) (~itpos); /* Disable interrupt*/
}
}
/**
* @brief Transmits a Data through the SPI peripheral.
* @param Data : Byte to be transmitted.
* @retval None
*/
inline void SPI_SendData(uint8_t Data)
{
SPI->DR = Data; /* Write in the DR register the data to be sent*/
}
/**
* @brief Returns the most recent received data by the SPI peripheral.
* @param None
* @retval The value of the received data.
*/
inline uint8_t SPI_ReceiveData(void)
{
return ((uint8_t) SPI->DR); /* Return the data in the DR register*/
}
/**
* @brief Configures internally by software the NSS pin.
* @param NewState Indicates the new state of the SPI Software slave management.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
inline void SPI_NSSInternalSoftwareCmd(FunctionalState NewState)
{
/* Check function parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE) {
SPI->CR2 |= SPI_CR2_SSI; /* Set NSS pin internally by software*/
} else {
SPI->CR2 &= (uint8_t) (~SPI_CR2_SSI); /* Reset NSS pin internally by software*/
}
}
/**
* @brief Enables the transmit of the CRC value.
* @param None
* @retval None
*/
inline void SPI_TransmitCRC(void)
{
SPI->CR2 |= SPI_CR2_CRCNEXT; /* Enable the CRC transmission*/
}
/**
* @brief Enables or disables the CRC value calculation of the transferred bytes.
* @param NewState Indicates the new state of the SPI CRC value calculation.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
inline void SPI_CalculateCRCCmd(FunctionalState NewState)
{
/* Check function parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE) {
SPI->CR2 |= SPI_CR2_CRCEN; /* Enable the CRC calculation*/
} else {
SPI->CR2 &= (uint8_t) (~SPI_CR2_CRCEN); /* Disable the CRC calculation*/
}
}
/**
* @brief Returns the transmit or the receive CRC register value.
* @param SPI_CRC Specifies the CRC register to be read.
* @retval The selected CRC register value.
*/
inline uint8_t SPI_GetCRC(SPI_CRC_TypeDef SPI_CRC)
{
uint8_t crcreg = 0;
/* Check function parameters */
assert_param(IS_SPI_CRC_OK(SPI_CRC));
if (SPI_CRC != SPI_CRC_RX) {
crcreg = SPI->TXCRCR; /* Get the Tx CRC register*/
} else {
crcreg = SPI->RXCRCR; /* Get the Rx CRC register*/
}
/* Return the selected CRC register status*/
return crcreg;
}
/**
* @brief Reset the Rx CRCR and Tx CRCR registers.
* @param None
* @retval None
*/
inline void SPI_ResetCRC(void)
{
/* Rx CRCR & Tx CRCR registers are reset when CRCEN (hardware calculation)
bit in SPI_CR2 is written to 1 (enable) */
SPI_CalculateCRCCmd(ENABLE);
/* Previous function disable the SPI */
SPI_Cmd(ENABLE);
}
/**
* @brief Returns the CRC Polynomial register value.
* @param None
* @retval The CRC Polynomial register value.
*/
inline uint8_t SPI_GetCRCPolynomial(void)
{
return SPI->CRCPR; /* Return the CRC polynomial register */
}
/**
* @brief Selects the data transfer direction in bi-directional mode.
* @param SPI_Direction Specifies the data transfer direction in bi-directional mode.
* @retval None
*/
inline void SPI_BiDirectionalLineConfig(SPI_Direction_TypeDef SPI_Direction)
{
/* Check function parameters */
assert_param(IS_SPI_DIRECTION_OK(SPI_Direction));
if (SPI_Direction != SPI_DIRECTION_RX) {
SPI->CR2 |= SPI_CR2_BDOE; /* Set the Tx only mode*/
} else {
SPI->CR2 &= (uint8_t) (~SPI_CR2_BDOE); /* Set the Rx only mode*/
}
}
/**
* @brief Checks whether the specified SPI flag is set or not.
* @param SPI_FLAG : Specifies the flag to check.
* This parameter can be any of the @ref SPI_FLAG_TypeDef enumeration.
* @retval FlagStatus : Indicates the state of SPI_FLAG.
* This parameter can be any of the @ref FlagStatus enumeration.
*/
inline FlagStatus SPI_GetFlagStatus(SPI_Flag_TypeDef SPI_FLAG)
{
FlagStatus status = RESET;
/* Check parameters */
assert_param(IS_SPI_FLAGS_OK(SPI_FLAG));
/* Check the status of the specified SPI flag */
if ((SPI->SR & (uint8_t) SPI_FLAG) != (uint8_t) RESET) {
status = SET; /* SPI_FLAG is set */
} else {
status = RESET; /* SPI_FLAG is reset*/
}
/* Return the SPI_FLAG status */
return status;
}
/**
* @brief Clears the SPI flags.
* @param SPI_FLAG : Specifies the flag to clear.
* This parameter can be one of the following values:
* - SPI_FLAG_CRCERR
* - SPI_FLAG_WKUP
* @note - OVR (OverRun Error) interrupt pending bit is cleared by software
* sequence:
* a read operation to SPI_DR register (SPI_ReceiveData()) followed by
* a read operation to SPI_SR register (SPI_GetFlagStatus()).
* - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
* a read/write operation to SPI_SR register (SPI_GetFlagStatus()) followed by
* a write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
* @retval None
*/
inline void SPI_ClearFlag(SPI_Flag_TypeDef SPI_FLAG)
{
assert_param(IS_SPI_CLEAR_FLAGS_OK(SPI_FLAG));
/* Clear the flag bit */
SPI->SR = (uint8_t) (~SPI_FLAG);
}
/**
* @brief Checks whether the specified interrupt has occurred or not.
* @param SPI_IT: Specifies the SPI interrupt pending bit to check.
* This parameter can be one of the following values:
* - SPI_IT_CRCERR
* - SPI_IT_WKUP
* - SPI_IT_OVR
* - SPI_IT_MODF
* - SPI_IT_RXNE
* - SPI_IT_TXE
* @retval ITStatus : Indicates the state of the SPI_IT.
* This parameter can be any of the @ref ITStatus enumeration.
*/
inline ITStatus SPI_GetITStatus(SPI_IT_TypeDef SPI_IT)
{
ITStatus pendingbitstatus = RESET;
uint8_t itpos = 0;
uint8_t itmask1 = 0;
uint8_t itmask2 = 0;
uint8_t enablestatus = 0;
assert_param(IS_SPI_GET_IT_OK(SPI_IT));
/* Get the SPI IT index */
itpos = (uint8_t) ((uint8_t) 1 << ((uint8_t) SPI_IT & (uint8_t) 0x0F));
/* Get the SPI IT mask */
itmask1 = (uint8_t) ((uint8_t) SPI_IT >> (uint8_t) 4);
/* Set the IT mask */
itmask2 = (uint8_t) ((uint8_t) 1 << itmask1);
/* Get the SPI_ITPENDINGBIT enable bit status */
enablestatus = (uint8_t) ((uint8_t) SPI->SR & itmask2);
/* Check the status of the specified SPI interrupt */
if (((SPI->ICR & itpos) != RESET) && enablestatus) {
/* SPI_ITPENDINGBIT is set */
pendingbitstatus = SET;
} else {
/* SPI_ITPENDINGBIT is reset */
pendingbitstatus = RESET;
}
/* Return the SPI_ITPENDINGBIT status */
return pendingbitstatus;
}
/**
* @brief Clears the interrupt pending bits.
* @param SPI_IT: Specifies the interrupt pending bit to clear.
* This parameter can be one of the following values:
* - SPI_IT_CRCERR
* - SPI_IT_WKUP
* @note - OVR (OverRun Error) interrupt pending bit is cleared by software sequence:
* a read operation to SPI_DR register (SPI_ReceiveData()) followed by
* a read operation to SPI_SR register (SPI_GetITStatus()).
* - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
* a read/write operation to SPI_SR register (SPI_GetITStatus()) followed by
* a write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
* @retval None
*/
inline void SPI_ClearITPendingBit(SPI_IT_TypeDef SPI_IT)
{
uint8_t itpos = 0;
assert_param(IS_SPI_CLEAR_IT_OK(SPI_IT));
/* Clear SPI_IT_CRCERR or SPI_IT_WKUP interrupt pending bits */
/* Get the SPI pending bit index */
itpos = (uint8_t) ((uint8_t) 1 << (uint8_t) ((uint8_t) (SPI_IT & (uint8_t) 0xF0) >> 4));
/* Clear the pending bit */
SPI->SR = (uint8_t) (~itpos);
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#endif /* __STM8S_SPI_H */
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file stm8s_tim4.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all functions prototype and macros for the TIM4 peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_TIM4_H
#define __STM8S_TIM4_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @addtogroup TIM4_Exported_Types
* @{
*/
/** TIM4 Prescaler */
typedef enum {
TIM4_PRESCALER_1 = ((uint8_t) 0x00),
TIM4_PRESCALER_2 = ((uint8_t) 0x01),
TIM4_PRESCALER_4 = ((uint8_t) 0x02),
TIM4_PRESCALER_8 = ((uint8_t) 0x03),
TIM4_PRESCALER_16 = ((uint8_t) 0x04),
TIM4_PRESCALER_32 = ((uint8_t) 0x05),
TIM4_PRESCALER_64 = ((uint8_t) 0x06),
TIM4_PRESCALER_128 = ((uint8_t) 0x07)
} TIM4_Prescaler_TypeDef;
#define IS_TIM4_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM4_PRESCALER_1 ) || \
((PRESCALER) == TIM4_PRESCALER_2 ) || \
((PRESCALER) == TIM4_PRESCALER_4 ) || \
((PRESCALER) == TIM4_PRESCALER_8 ) || \
((PRESCALER) == TIM4_PRESCALER_16 ) || \
((PRESCALER) == TIM4_PRESCALER_32 ) || \
((PRESCALER) == TIM4_PRESCALER_64 ) || \
((PRESCALER) == TIM4_PRESCALER_128 ) )
/** TIM4 One Pulse Mode */
typedef enum {
TIM4_OPMODE_SINGLE = ((uint8_t) 0x01),
TIM4_OPMODE_REPETITIVE = ((uint8_t) 0x00)
} TIM4_OPMode_TypeDef;
#define IS_TIM4_OPM_MODE_OK(MODE) (((MODE) == TIM4_OPMODE_SINGLE) || \
((MODE) == TIM4_OPMODE_REPETITIVE))
/** TIM4 Prescaler Reload Mode */
typedef enum {
TIM4_PSCRELOADMODE_UPDATE = ((uint8_t) 0x00),
TIM4_PSCRELOADMODE_IMMEDIATE = ((uint8_t) 0x01)
} TIM4_PSCReloadMode_TypeDef;
#define IS_TIM4_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM4_PSCRELOADMODE_UPDATE) || \
((RELOAD) == TIM4_PSCRELOADMODE_IMMEDIATE))
/** TIM4 Update Source */
typedef enum {
TIM4_UPDATESOURCE_GLOBAL = ((uint8_t) 0x00),
TIM4_UPDATESOURCE_REGULAR = ((uint8_t) 0x01)
} TIM4_UpdateSource_TypeDef;
#define IS_TIM4_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM4_UPDATESOURCE_GLOBAL) || \
((SOURCE) == TIM4_UPDATESOURCE_REGULAR))
/** TIM4 Event Source */
typedef enum {
TIM4_EVENTSOURCE_UPDATE = ((uint8_t) 0x01)
} TIM4_EventSource_TypeDef;
#define IS_TIM4_EVENT_SOURCE_OK(SOURCE) (((SOURCE) == 0x01))
/** TIM4 Flags */
typedef enum {
TIM4_FLAG_UPDATE = ((uint8_t) 0x01)
} TIM4_FLAG_TypeDef;
#define IS_TIM4_GET_FLAG_OK(FLAG) ((FLAG) == TIM4_FLAG_UPDATE)
/** TIM4 interrupt sources */
typedef enum {
TIM4_IT_UPDATE = ((uint8_t) 0x01)
} TIM4_IT_TypeDef;
#define IS_TIM4_IT_OK(IT) ((IT) == TIM4_IT_UPDATE)
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup TIM4_Exported_Functions
* @{
*/
#if 0
void TIM4_DeInit(void);
void TIM4_TimeBaseInit(TIM4_Prescaler_TypeDef TIM4_Prescaler, uint8_t TIM4_Period);
void TIM4_Cmd(FunctionalState NewState);
void TIM4_ITConfig(TIM4_IT_TypeDef TIM4_IT, FunctionalState NewState);
void TIM4_UpdateDisableConfig(FunctionalState NewState);
void TIM4_UpdateRequestConfig(TIM4_UpdateSource_TypeDef TIM4_UpdateSource);
void TIM4_SelectOnePulseMode(TIM4_OPMode_TypeDef TIM4_OPMode);
void TIM4_PrescalerConfig(TIM4_Prescaler_TypeDef Prescaler, TIM4_PSCReloadMode_TypeDef TIM4_PSCReloadMode);
void TIM4_ARRPreloadConfig(FunctionalState NewState);
void TIM4_GenerateEvent(TIM4_EventSource_TypeDef TIM4_EventSource);
void TIM4_SetCounter(uint8_t Counter);
void TIM4_SetAutoreload(uint8_t Autoreload);
uint8_t TIM4_GetCounter(void);
TIM4_Prescaler_TypeDef TIM4_GetPrescaler(void);
FlagStatus TIM4_GetFlagStatus(TIM4_FLAG_TypeDef TIM4_FLAG);
void TIM4_ClearFlag(TIM4_FLAG_TypeDef TIM4_FLAG);
ITStatus TIM4_GetITStatus(TIM4_IT_TypeDef TIM4_IT);
void TIM4_ClearITPendingBit(TIM4_IT_TypeDef TIM4_IT);
#endif
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/**
* @addtogroup TIM4_Public_Functions
* @{
*/
/**
* @brief Deinitializes the TIM4 peripheral registers to their default reset values.
* @param None
* @retval None
*/
inline void TIM4_DeInit(void)
{
TIM4->CR1 = TIM4_CR1_RESET_VALUE;
TIM4->IER = TIM4_IER_RESET_VALUE;
TIM4->CNTR = TIM4_CNTR_RESET_VALUE;
TIM4->PSCR = TIM4_PSCR_RESET_VALUE;
TIM4->ARR = TIM4_ARR_RESET_VALUE;
TIM4->SR1 = TIM4_SR1_RESET_VALUE;
}
/**
* @brief Initializes the TIM4 Time Base Unit according to the specified parameters.
* @param TIM4_Prescaler specifies the Prescaler from TIM4_Prescaler_TypeDef.
* @param TIM4_Period specifies the Period value.
* @retval None
*/
inline void TIM4_TimeBaseInit(TIM4_Prescaler_TypeDef TIM4_Prescaler, uint8_t TIM4_Period)
{
/* Check TIM4 prescaler value */
assert_param(IS_TIM4_PRESCALER_OK(TIM4_Prescaler));
/* Set the Prescaler value */
TIM4->PSCR = (uint8_t) (TIM4_Prescaler);
/* Set the Autoreload value */
TIM4->ARR = (uint8_t) (TIM4_Period);
}
/**
* @brief Enables or disables the TIM4 peripheral.
* @param NewState new state of the TIM4 peripheral. This parameter can
* be ENABLE or DISABLE.
* @retval None
*/
inline void TIM4_Cmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
/* set or Reset the CEN Bit */
if (NewState != DISABLE) {
TIM4->CR1 |= TIM4_CR1_CEN;
} else {
TIM4->CR1 &= (uint8_t) (~TIM4_CR1_CEN);
}
}
/**
* @brief Enables or disables the specified TIM4 interrupts.
* @param NewState new state of the TIM4 peripheral.
* This parameter can be: ENABLE or DISABLE.
* @param TIM4_IT specifies the TIM4 interrupts sources to be enabled or disabled.
* This parameter can be any combination of the following values:
* - TIM4_IT_UPDATE: TIM4 update Interrupt source
* @param NewState new state of the TIM4 peripheral.
* @retval None
*/
inline void TIM4_ITConfig(TIM4_IT_TypeDef TIM4_IT, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_TIM4_IT_OK(TIM4_IT));
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (NewState != DISABLE) {
/* Enable the Interrupt sources */
TIM4->IER |= (uint8_t) TIM4_IT;
} else {
/* Disable the Interrupt sources */
TIM4->IER &= (uint8_t) (~TIM4_IT);
}
}
/**
* @brief Enables or Disables the TIM4 Update event.
* @param NewState new state of the TIM4 peripheral Preload register. This parameter can
* be ENABLE or DISABLE.
* @retval None
*/
inline void TIM4_UpdateDisableConfig(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
/* Set or Reset the UDIS Bit */
if (NewState != DISABLE) {
TIM4->CR1 |= TIM4_CR1_UDIS;
} else {
TIM4->CR1 &= (uint8_t) (~TIM4_CR1_UDIS);
}
}
/**
* @brief Selects the TIM4 Update Request Interrupt source.
* @param TIM4_UpdateSource specifies the Update source.
* This parameter can be one of the following values
* - TIM4_UPDATESOURCE_REGULAR
* - TIM4_UPDATESOURCE_GLOBAL
* @retval None
*/
inline void TIM4_UpdateRequestConfig(TIM4_UpdateSource_TypeDef TIM4_UpdateSource)
{
/* Check the parameters */
assert_param(IS_TIM4_UPDATE_SOURCE_OK(TIM4_UpdateSource));
/* Set or Reset the URS Bit */
if (TIM4_UpdateSource != TIM4_UPDATESOURCE_GLOBAL) {
TIM4->CR1 |= TIM4_CR1_URS;
} else {
TIM4->CR1 &= (uint8_t) (~TIM4_CR1_URS);
}
}
/**
* @brief Selects the TIM4's One Pulse Mode.
* @param TIM4_OPMode specifies the OPM Mode to be used.
* This parameter can be one of the following values
* - TIM4_OPMODE_SINGLE
* - TIM4_OPMODE_REPETITIVE
* @retval None
*/
inline void TIM4_SelectOnePulseMode(TIM4_OPMode_TypeDef TIM4_OPMode)
{
/* Check the parameters */
assert_param(IS_TIM4_OPM_MODE_OK(TIM4_OPMode));
/* Set or Reset the OPM Bit */
if (TIM4_OPMode != TIM4_OPMODE_REPETITIVE) {
TIM4->CR1 |= TIM4_CR1_OPM;
} else {
TIM4->CR1 &= (uint8_t) (~TIM4_CR1_OPM);
}
}
/**
* @brief Configures the TIM4 Prescaler.
* @param Prescaler specifies the Prescaler Register value
* This parameter can be one of the following values
* - TIM4_PRESCALER_1
* - TIM4_PRESCALER_2
* - TIM4_PRESCALER_4
* - TIM4_PRESCALER_8
* - TIM4_PRESCALER_16
* - TIM4_PRESCALER_32
* - TIM4_PRESCALER_64
* - TIM4_PRESCALER_128
* @param TIM4_PSCReloadMode specifies the TIM4 Prescaler Reload mode.
* This parameter can be one of the following values
* - TIM4_PSCRELOADMODE_IMMEDIATE: The Prescaler is loaded
* immediately.
* - TIM4_PSCRELOADMODE_UPDATE: The Prescaler is loaded at
* the update event.
* @retval None
*/
inline void TIM4_PrescalerConfig(TIM4_Prescaler_TypeDef Prescaler, TIM4_PSCReloadMode_TypeDef TIM4_PSCReloadMode)
{
/* Check the parameters */
assert_param(IS_TIM4_PRESCALER_RELOAD_OK(TIM4_PSCReloadMode));
assert_param(IS_TIM4_PRESCALER_OK(Prescaler));
/* Set the Prescaler value */
TIM4->PSCR = (uint8_t) Prescaler;
/* Set or reset the UG Bit */
TIM4->EGR = (uint8_t) TIM4_PSCReloadMode;
}
/**
* @brief Enables or disables TIM4 peripheral Preload register on ARR.
* @param NewState new state of the TIM4 peripheral Preload register.
* This parameter can be ENABLE or DISABLE.
* @retval None
*/
inline void TIM4_ARRPreloadConfig(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
/* Set or Reset the ARPE Bit */
if (NewState != DISABLE) {
TIM4->CR1 |= TIM4_CR1_ARPE;
} else {
TIM4->CR1 &= (uint8_t) (~TIM4_CR1_ARPE);
}
}
/**
* @brief Configures the TIM4 event to be generated by software.
* @param TIM4_EventSource specifies the event source.
* This parameter can be one of the following values:
* - TIM4_EVENTSOURCE_UPDATE: TIM4 update Event source
* @retval None
*/
inline void TIM4_GenerateEvent(TIM4_EventSource_TypeDef TIM4_EventSource)
{
/* Check the parameters */
assert_param(IS_TIM4_EVENT_SOURCE_OK(TIM4_EventSource));
/* Set the event sources */
TIM4->EGR = (uint8_t) (TIM4_EventSource);
}
/**
* @brief Sets the TIM4 Counter Register value.
* @param Counter specifies the Counter register new value.
* This parameter is between 0x00 and 0xFF.
* @retval None
*/
inline void TIM4_SetCounter(uint8_t Counter)
{
/* Set the Counter Register value */
TIM4->CNTR = (uint8_t) (Counter);
}
/**
* @brief Sets the TIM4 Autoreload Register value.
* @param Autoreload specifies the Autoreload register new value.
* This parameter is between 0x00 and 0xFF.
* @retval None
*/
inline void TIM4_SetAutoreload(uint8_t Autoreload)
{
/* Set the Autoreload Register value */
TIM4->ARR = (uint8_t) (Autoreload);
}
/**
* @brief Gets the TIM4 Counter value.
* @param None
* @retval Counter Register value.
*/
inline uint8_t TIM4_GetCounter(void)
{
/* Get the Counter Register value */
return (uint8_t) (TIM4->CNTR);
}
/**
* @brief Gets the TIM4 Prescaler value.
* @param None
* @retval Prescaler Register configuration value.
*/
inline TIM4_Prescaler_TypeDef TIM4_GetPrescaler(void)
{
/* Get the Prescaler Register value */
return (TIM4_Prescaler_TypeDef) (TIM4->PSCR);
}
/**
* @brief Checks whether the specified TIM4 flag is set or not.
* @param TIM4_FLAG specifies the flag to check.
* This parameter can be one of the following values:
* - TIM4_FLAG_UPDATE: TIM4 update Flag
* @retval FlagStatus The new state of TIM4_FLAG (SET or RESET).
*/
inline FlagStatus TIM4_GetFlagStatus(TIM4_FLAG_TypeDef TIM4_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_TIM4_GET_FLAG_OK(TIM4_FLAG));
if ((TIM4->SR1 & (uint8_t) TIM4_FLAG) != 0) {
bitstatus = SET;
} else {
bitstatus = RESET;
}
return ((FlagStatus) bitstatus);
}
/**
* @brief Clears the TIM4's pending flags.
* @param TIM4_FLAG specifies the flag to clear.
* This parameter can be one of the following values:
* - TIM4_FLAG_UPDATE: TIM4 update Flag
* @retval None.
*/
inline void TIM4_ClearFlag(TIM4_FLAG_TypeDef TIM4_FLAG)
{
/* Check the parameters */
assert_param(IS_TIM4_GET_FLAG_OK(TIM4_FLAG));
/* Clear the flags (rc_w0) clear this bit by writing 0. Writing '1' has no effect*/
TIM4->SR1 = (uint8_t) (~TIM4_FLAG);
}
/**
* @brief Checks whether the TIM4 interrupt has occurred or not.
* @param TIM4_IT specifies the TIM4 interrupt source to check.
* This parameter can be one of the following values:
* - TIM4_IT_UPDATE: TIM4 update Interrupt source
* @retval ITStatus The new state of the TIM4_IT (SET or RESET).
*/
inline ITStatus TIM4_GetITStatus(TIM4_IT_TypeDef TIM4_IT)
{
ITStatus bitstatus = RESET;
uint8_t itstatus = 0x0, itenable = 0x0;
/* Check the parameters */
assert_param(IS_TIM4_IT_OK(TIM4_IT));
itstatus = (uint8_t) (TIM4->SR1 & (uint8_t) TIM4_IT);
itenable = (uint8_t) (TIM4->IER & (uint8_t) TIM4_IT);
if ((itstatus != (uint8_t) RESET) && (itenable != (uint8_t) RESET)) {
bitstatus = (ITStatus) SET;
} else {
bitstatus = (ITStatus) RESET;
}
return ((ITStatus) bitstatus);
}
/**
* @brief Clears the TIM4's interrupt pending bits.
* @param TIM4_IT specifies the pending bit to clear.
* This parameter can be one of the following values:
* - TIM4_IT_UPDATE: TIM4 update Interrupt source
* @retval None.
*/
inline void TIM4_ClearITPendingBit(TIM4_IT_TypeDef TIM4_IT)
{
/* Check the parameters */
assert_param(IS_TIM4_IT_OK(TIM4_IT));
/* Clear the IT pending Bit */
TIM4->SR1 = (uint8_t) (~TIM4_IT);
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* __STM8S_TIM4_H */
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
********************************************************************************
* @file stm8s_wwdg.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains all functions prototype and macros for the WWDG peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_WWDG_H
#define __STM8S_WWDG_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup WWDG_Private_Macros
* @{
*/
/**
* @brief Macro used by the assert function in order to check the
* values of the window register.
*/
#define IS_WWDG_WINDOWLIMITVALUE_OK(WindowLimitValue) ((WindowLimitValue) <= 0x7F)
/**
* @brief Macro used by the assert function in order to check the different
* values of the counter register.
*/
#define IS_WWDG_COUNTERVALUE_OK(CounterValue) ((CounterValue) <= 0x7F)
/**
* @}
*/
/* Exported types ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/** @addtogroup WWDG_Exported_Functions
* @{
*/
#if 0
void WWDG_Init(uint8_t Counter, uint8_t WindowValue);
void WWDG_SetCounter(uint8_t Counter);
uint8_t WWDG_GetCounter(void);
void WWDG_SWReset(void);
void WWDG_SetWindowValue(uint8_t WindowValue);
#endif
/** @addtogroup STM8S_StdPeriph_Driver
* @{
*/
/* Private define ------------------------------------------------------------*/
#define _WWDG_BIT_MASK ((uint8_t)0x7F)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @addtogroup WWDG_Public_Functions
* @{
*/
/**
* @brief Initializes the WWDG peripheral.
* This function set Window Register = WindowValue, Counter Register
* according to Counter and \b ENABLE \b WWDG
* @param Counter : WWDG counter value
* @param WindowValue : specifies the WWDG Window Register, range is 0x00 to 0x7F.
* @retval None
*/
inline void WWDG_Init(uint8_t Counter, uint8_t WindowValue)
{
/* Check the parameters */
assert_param(IS_WWDG_WINDOWLIMITVALUE_OK(WindowValue));
WWDG->WR = WWDG_WR_RESET_VALUE;
WWDG->CR = (uint8_t) ((uint8_t) (WWDG_CR_WDGA | WWDG_CR_T6) | (uint8_t) Counter);
WWDG->WR = (uint8_t) ((uint8_t) (~WWDG_CR_WDGA) & (uint8_t) (WWDG_CR_T6 | WindowValue));
}
/**
* @brief Refreshes the WWDG peripheral.
* @param Counter : WWDG Counter Value
* This parameter must be a number between 0x40 and 0x7F.
* @retval None
*/
inline void WWDG_SetCounter(uint8_t Counter)
{
/* Check the parameters */
assert_param(IS_WWDG_COUNTERVALUE_OK(Counter));
/* Write to T[6:0] bits to configure the counter value, no need to do
a read-modify-write; writing a 0 to WDGA bit does nothing */
WWDG->CR = (uint8_t) (Counter & (uint8_t) _WWDG_BIT_MASK);
}
/**
* @brief Gets the WWDG Counter Value.
* This value could be used to check if WWDG is in the window, where
* refresh is allowed.
* @param None
* @retval WWDG Counter Value
*/
inline uint8_t WWDG_GetCounter(void)
{
return (WWDG->CR);
}
/**
* @brief Generates immediate WWDG RESET.
* @param None
* @retval None
*/
inline void WWDG_SWReset(void)
{
WWDG->CR = WWDG_CR_WDGA; /* Activate WWDG, with clearing T6 */
}
/**
* @brief Sets the WWDG window value.
* @param WindowValue: specifies the window value to be compared to the
* downcounter.
* This parameter value must be lower than 0x80.
* @retval None
*/
inline void WWDG_SetWindowValue(uint8_t WindowValue)
{
/* Check the parameters */
assert_param(IS_WWDG_WINDOWLIMITVALUE_OK(WindowValue));
WWDG->WR = (uint8_t) ((uint8_t) (~WWDG_CR_WDGA) & (uint8_t) (WWDG_CR_T6 | WindowValue));
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/**
* @}
*/
#endif /* __STM8S_WWDG_H */
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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Makefile
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#######
# makefile for STM8S_StdPeriph_Lib and SDCC compiler
#
# Customized by MightyPork 1/2017
#
# usage:
# 1. if SDCC not in PATH set path -> CC_ROOT
# 2. set correct STM8 device -> DEVICE
# 3. set project paths -> PRJ_ROOT, PRJ_SRC_DIR, PRJ_INC_DIR
# 4. set SPL root path -> SPL_ROOT
# 5. include required SPL modules -> SPL_SOURCE
#
#######
# STM8 device (default is STM8 discovery board)
DEVICE=STM8S103
DEVICE_FLASH=stm8s103f3
# set compiler path & parameters
CC_ROOT =
CC = sdcc
CFLAGS = -mstm8 -lstm8 --opt-code-size --disable-warning 126 --disable-warning 110
# -DUSE_FULL_ASSERT=1
# set output folder and target name
OUTPUT_DIR = ./Build
TARGET = $(OUTPUT_DIR)/$(DEVICE).hex
# set project folder and files (all *.c)
PRJ_ROOT = .
PRJ_SRC_DIR = $(PRJ_ROOT)/User
PRJ_INC_DIR = $(PRJ_ROOT)/User
# all project sources included by default
PRJ_SOURCE = $(notdir $(wildcard $(PRJ_SRC_DIR)/*.c))
PRJ_OBJECTS := $(addprefix $(OUTPUT_DIR)/, $(PRJ_SOURCE:.c=.rel))
# set SPL paths
#SPL_SRC_DIR = /usr/share/sdcc/lib/src/stm8/
#SPL_INC_DIR = /usr/share/sdcc/include/stm8/
#SPL_SRC_DIR = Libraries/SPL/src/
SPL_INC_DIR = Library/SPL/
# add all library sources used here
SPL_SOURCE =
#stm8s_flash.c
SPL_OBJECTS := $(addprefix $(OUTPUT_DIR)/, $(SPL_SOURCE:.c=.rel))
# collect all include folders
INCLUDE = -I$(PRJ_SRC_DIR) -I$(SPL_INC_DIR)
# collect all source directories
VPATH=$(PRJ_SRC_DIR):$(SPL_SRC_DIR)
.PHONY: clean
all: $(TARGET)
$(OUTPUT_DIR)/%.rel: %.c
$(CC) $(CFLAGS) -D$(DEVICE) $(INCLUDE) -c $?
$(OUTPUT_DIR)/%.rel: %.c
$(CC) $(CFLAGS) -D$(DEVICE) $(INCLUDE) -c $? -o $@
$(TARGET): $(PRJ_OBJECTS) $(SPL_OBJECTS)
$(CC) $(CFLAGS) -o $(TARGET) $^
flash: $(TARGET)
stm8flash -c stlinkv2 -p $(DEVICE_FLASH) -s flash -w $(TARGET)
clean:
rm $(OUTPUT_DIR)/*

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README.md
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# stm8s_inline_spl # stm8s_inline_spl
Inlined STM8S SPL (STM8S103) for use with SDCC Inlined STM8S SPL (STM8S103) for use with SDCC
This is probably against the license, but who cares.
SDCC does not support --gc-sections, so we have to either use #ifdef's
and compile switches to remove unused crap, or inline it.
Here I inlined all of the SPL that's useful for stm8s103 (except the flash file -
there's lots of crap I don't understand, so you'll do better just keeping it
intact or re-implementing it).
This is intended to be used with SDCC on linux.

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#include <stdio.h>
#include <stm8s.h>
#include "stm8s_it.h"
void main(void)
{
CLK_HSIPrescalerConfig(CLK_PRESCALER_HSIDIV1);
UART_SimpleInit(UART_BAUD_115200);
while(1);
}

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/**
******************************************************************************
* @file stm8s_conf.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file is used to configure the Library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_CONF_H
#define __STM8S_CONF_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/* Uncomment the line below to enable peripheral header file inclusion */
#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) ||\
defined(STM8S903) || defined (STM8AF626x) || defined (STM8AF622x)
#include "stm8s_adc1.h"
#endif /* (STM8S105) ||(STM8S103) || (STM8S903) || (STM8AF626x) || (STM8AF622x) */
#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF52Ax) ||\
defined (STM8AF62Ax)
#include "stm8s_adc2.h"
#endif /* (STM8S208) || (STM8S207) || (STM8AF62Ax) || (STM8AF52Ax) */
//#include "stm8s_awu.h"
#include "stm8s_beep.h"
#if defined (STM8S208) || defined (STM8AF52Ax)
#include "stm8s_can.h"
#endif /* (STM8S208) || (STM8AF52Ax) */
#include "stm8s_clk.h"
#include "stm8s_exti.h"
//#include "stm8s_flash.h" // Flash commented out
#include "stm8s_gpio.h"
#include "stm8s_i2c.h"
#include "stm8s_itc.h"
#include "stm8s_iwdg.h"
#include "stm8s_rst.h"
#include "stm8s_spi.h"
#include "stm8s_tim1.h"
#if !defined(STM8S903) || !defined(STM8AF622x)
#include "stm8s_tim2.h"
#endif /* (STM8S903) || (STM8AF622x) */
#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) ||defined(STM8S105) ||\
defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined (STM8AF626x)
#include "stm8s_tim3.h"
#endif /* (STM8S208) ||defined(STM8S207) || defined(STM8S007) ||defined(STM8S105) */
#if !defined(STM8S903) || !defined(STM8AF622x)
#include "stm8s_tim4.h"
#endif /* (STM8S903) || (STM8AF622x) */
#if defined(STM8S903) || defined(STM8AF622x)
#include "stm8s_tim5.h"
#include "stm8s_tim6.h"
#endif /* (STM8S903) || (STM8AF622x) */
#if defined(STM8S208) ||defined(STM8S207) || defined(STM8S007) ||defined(STM8S103) ||\
defined(STM8S003) || defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
#include "stm8s_uart1.h"
#endif /* (STM8S208) || (STM8S207) || (STM8S103) || (STM8S903) || (STM8AF52Ax) || (STM8AF62Ax) */
#if defined(STM8S105) || defined(STM8S005) || defined (STM8AF626x)
#include "stm8s_uart2.h"
#endif /* (STM8S105) || (STM8AF626x) */
#if defined(STM8S208) ||defined(STM8S207) || defined(STM8S007) || defined (STM8AF52Ax) ||\
defined (STM8AF62Ax)
#include "stm8s_uart3.h"
#endif /* STM8S208 || STM8S207 || STM8AF52Ax || STM8AF62Ax */
#if defined(STM8AF622x)
#include "stm8s_uart4.h"
#endif /* (STM8AF622x) */
#include "stm8s_wwdg.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Uncomment the line below to expanse the "assert_param" macro in the
Standard Peripheral Library drivers code */
//#define USE_FULL_ASSERT (1)
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval : None
*/
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0)
#endif /* USE_FULL_ASSERT */
#endif /* __STM8S_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file stm8s_it.c
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief Main Interrupt Service Routines.
* This file provides template for all peripherals interrupt service
* routine.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm8s_it.h"
/** @addtogroup Template_Project
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Public functions ----------------------------------------------------------*/
#ifdef _COSMIC_
/**
* @brief Dummy Interrupt routine
* @par Parameters:
* None
* @retval
* None
*/
INTERRUPT_HANDLER(NonHandledInterrupt, 25)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#endif /*_COSMIC_*/
/**
* @brief TRAP Interrupt routine
* @param None
* @retval None
*/
#if !defined(_SDCC_) || (SKIP_TRAPS!=1) // SDCC patch: trap handling requires SDCC >=v3.4.3
INTERRUPT_HANDLER_TRAP(TRAP_IRQHandler)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#endif
/**
* @brief Top Level Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(TLI_IRQHandler, 0)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief Auto Wake Up Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(AWU_IRQHandler, 1)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief Clock Controller Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(CLK_IRQHandler, 2)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief External Interrupt PORTA Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(EXTI_PORTA_IRQHandler, 3)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief External Interrupt PORTB Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(EXTI_PORTB_IRQHandler, 4)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief External Interrupt PORTC Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(EXTI_PORTC_IRQHandler, 5)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief External Interrupt PORTD Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(EXTI_PORTD_IRQHandler, 6)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief External Interrupt PORTE Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(EXTI_PORTE_IRQHandler, 7)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#if defined (STM8S903) || defined (STM8AF622x)
/**
* @brief External Interrupt PORTF Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(EXTI_PORTF_IRQHandler, 8)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#endif /* (STM8S903) || (STM8AF622x) */
#if defined (STM8S208) || defined (STM8AF52Ax)
/**
* @brief CAN RX Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(CAN_RX_IRQHandler, 8)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief CAN TX Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(CAN_TX_IRQHandler, 9)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#endif /* (STM8S208) || (STM8AF52Ax) */
/**
* @brief SPI Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(SPI_IRQHandler, 10)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief Timer1 Update/Overflow/Trigger/Break Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_BRK_IRQHandler, 11)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief Timer1 Capture/Compare Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(TIM1_CAP_COM_IRQHandler, 12)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#if defined (STM8S903) || defined (STM8AF622x)
/**
* @brief Timer5 Update/Overflow/Break/Trigger Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(TIM5_UPD_OVF_BRK_TRG_IRQHandler, 13)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief Timer5 Capture/Compare Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(TIM5_CAP_COM_IRQHandler, 14)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#else /* (STM8S208) || (STM8S207) || (STM8S105) || (STM8S103) || (STM8AF62Ax) || (STM8AF52Ax) || (STM8AF626x) */
/**
* @brief Timer2 Update/Overflow/Break Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(TIM2_UPD_OVF_BRK_IRQHandler, 13)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief Timer2 Capture/Compare Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(TIM2_CAP_COM_IRQHandler, 14)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#endif /* (STM8S903) || (STM8AF622x) */
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
defined(STM8S005) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8AF626x)
/**
* @brief Timer3 Update/Overflow/Break Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(TIM3_UPD_OVF_BRK_IRQHandler, 15)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief Timer3 Capture/Compare Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(TIM3_CAP_COM_IRQHandler, 16)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#endif /* (STM8S208) || (STM8S207) || (STM8S105) || (STM8AF62Ax) || (STM8AF52Ax) || (STM8AF626x) */
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S103) || \
defined(STM8S003) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8S903)
/**
* @brief UART1 TX Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(UART1_TX_IRQHandler, 17)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief UART1 RX Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(UART1_RX_IRQHandler, 18)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#endif /* (STM8S208) || (STM8S207) || (STM8S103) || (STM8S903) || (STM8AF62Ax) || (STM8AF52Ax) */
#if defined(STM8AF622x)
/**
* @brief UART4 TX Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(UART4_TX_IRQHandler, 17)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief UART4 RX Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(UART4_RX_IRQHandler, 18)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#endif /* (STM8AF622x) */
/**
* @brief I2C Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(I2C_IRQHandler, 19)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#if defined(STM8S105) || defined(STM8S005) || defined (STM8AF626x)
/**
* @brief UART2 TX interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(UART2_TX_IRQHandler, 20)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief UART2 RX interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(UART2_RX_IRQHandler, 21)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#endif /* (STM8S105) || (STM8AF626x) */
#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
/**
* @brief UART3 TX interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(UART3_TX_IRQHandler, 20)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @brief UART3 RX interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(UART3_RX_IRQHandler, 21)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#endif /* (STM8S208) || (STM8S207) || (STM8AF52Ax) || (STM8AF62Ax) */
#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
/**
* @brief ADC2 interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(ADC2_IRQHandler, 22)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#else /* STM8S105 or STM8S103 or STM8S903 or STM8AF626x or STM8AF622x */
/**
* @brief ADC1 interrupt routine.
* @par Parameters:
* None
* @retval
* None
*/
INTERRUPT_HANDLER(ADC1_IRQHandler, 22)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#endif /* (STM8S208) || (STM8S207) || (STM8AF52Ax) || (STM8AF62Ax) */
#if defined (STM8S903) || defined (STM8AF622x)
/**
* @brief Timer6 Update/Overflow/Trigger Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(TIM6_UPD_OVF_TRG_IRQHandler, 23)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#else /* STM8S208 or STM8S207 or STM8S105 or STM8S103 or STM8AF52Ax or STM8AF62Ax or STM8AF626x */
/**
* @brief Timer4 Update/Overflow Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(TIM4_UPD_OVF_IRQHandler, 23)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
#endif /* (STM8S903) || (STM8AF622x)*/
/**
* @brief Eeprom EEC Interrupt routine.
* @param None
* @retval None
*/
INTERRUPT_HANDLER(EEPROM_EEC_IRQHandler, 24)
{
/* In order to detect unexpected events during development,
it is recommended to set a breakpoint on the following instruction.
*/
return;
}
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file stm8s_it.h
* @author MCD Application Team
* @version V2.2.0
* @date 30-September-2014
* @brief This file contains the headers of the interrupt handlers
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_IT_H
#define __STM8S_IT_H
/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
#ifdef _COSMIC_
void _stext(void); /* RESET startup routine */
INTERRUPT void NonHandledInterrupt(void);
#endif /* _COSMIC_ */
#if !defined(_RAISONANCE_) // SDCC patch: interrupt keyword required after function
// INTERRUPT void TRAP_IRQHandler(void); /* TRAP */
void TLI_IRQHandler(void) INTERRUPT 0; /* TLI */
void AWU_IRQHandler(void) INTERRUPT 1; /* AWU */
void CLK_IRQHandler(void) INTERRUPT 2; /* CLOCK */
void EXTI_PORTA_IRQHandler(void) INTERRUPT 3; /* EXTI PORTA */
void EXTI_PORTB_IRQHandler(void) INTERRUPT 4; /* EXTI PORTB */
void EXTI_PORTC_IRQHandler(void) INTERRUPT 5; /* EXTI PORTC */
void EXTI_PORTD_IRQHandler(void) INTERRUPT 6; /* EXTI PORTD */
void EXTI_PORTE_IRQHandler(void) INTERRUPT 7; /* EXTI PORTE */
#if defined(STM8S903) || defined(STM8AF622x)
void EXTI_PORTF_IRQHandler(void) INTERRUPT 8; /* EXTI PORTF */
#endif /* (STM8S903) || (STM8AF622x) */
#if defined (STM8S208) || defined (STM8AF52Ax)
void CAN_RX_IRQHandler(void) INTERRUPT 8; /* CAN RX */
void CAN_TX_IRQHandler(void) INTERRUPT 9; /* CAN TX/ER/SC */
#endif /* (STM8S208) || (STM8AF52Ax) */
void SPI_IRQHandler(void) INTERRUPT 10; /* SPI */
void TIM1_CAP_COM_IRQHandler(void) INTERRUPT 12; /* TIM1 CAP/COM */
void TIM1_UPD_OVF_TRG_BRK_IRQHandler(void) INTERRUPT 11; /* TIM1 UPD/OVF/TRG/BRK */
#if defined(STM8S903) || defined(STM8AF622x)
void TIM5_UPD_OVF_BRK_TRG_IRQHandler(void) INTERRUPT 13; /* TIM5 UPD/OVF/BRK/TRG */
void TIM5_CAP_COM_IRQHandler(void) INTERRUPT 14; /* TIM5 CAP/COM */
#else /* (STM8S208) || (STM8S207) || (STM8S105) || (STM8S103) || (STM8AF52Ax) || (STM8AF62Ax) || (STM8A626x) */
void TIM2_UPD_OVF_BRK_IRQHandler(void) INTERRUPT 13; /* TIM2 UPD/OVF/BRK */
void TIM2_CAP_COM_IRQHandler(void) INTERRUPT 14; /* TIM2 CAP/COM */
#endif /* (STM8S903) || (STM8AF622x) */
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined (STM8AF626x)
void TIM3_UPD_OVF_BRK_IRQHandler(void) INTERRUPT 15; /* TIM3 UPD/OVF/BRK */
void TIM3_CAP_COM_IRQHandler(void) INTERRUPT 16; /* TIM3 CAP/COM */
#endif /* (STM8S208) || (STM8S207) || (STM8S105) || (STM8AF52Ax) || (STM8AF62Ax) || (STM8A626x) */
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S103) || \
defined(STM8S003) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined (STM8S903)
void UART1_TX_IRQHandler(void) INTERRUPT 17; /* UART1 TX */
void UART1_RX_IRQHandler(void) INTERRUPT 18; /* UART1 RX */
#endif /* (STM8S208) || (STM8S207) || (STM8S903) || (STM8S103) || (STM8AF52Ax) || (STM8AF62Ax) */
#if defined (STM8AF622x)
void UART4_TX_IRQHandler(void) INTERRUPT 17; /* UART4 TX */
void UART4_RX_IRQHandler(void) INTERRUPT 18; /* UART4 RX */
#endif /* (STM8AF622x) */
void I2C_IRQHandler(void) INTERRUPT 19; /* I2C */
#if defined(STM8S105) || defined(STM8S005) || defined (STM8AF626x)
void UART2_RX_IRQHandler(void) INTERRUPT 20; /* UART2 RX */
void UART2_TX_IRQHandler(void) INTERRUPT 21; /* UART2 TX */
#endif /* (STM8S105) || (STM8AF626x) */
#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
void UART3_RX_IRQHandler(void) INTERRUPT 20; /* UART3 RX */
void UART3_TX_IRQHandler(void) INTERRUPT 21; /* UART3 TX */
#endif /* (STM8S207) || (STM8S208) || (STM8AF62Ax) || (STM8AF52Ax) */
#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
void ADC2_IRQHandler(void) INTERRUPT 22; /* ADC2 */
#else /* (STM8S105) || (STM8S103) || (STM8S903) || (STM8AF622x) */
void ADC1_IRQHandler(void) INTERRUPT 22; /* ADC1 */
#endif /* (STM8S207) || (STM8S208) || (STM8AF62Ax) || (STM8AF52Ax) */
#if defined(STM8S903) || defined(STM8AF622x)
void TIM6_UPD_OVF_TRG_IRQHandler(void) INTERRUPT 23; /* TIM6 UPD/OVF/TRG */
#else /* (STM8S208) || (STM8S207) || (STM8S105) || (STM8S103) || (STM8AF62Ax) || (STM8AF52Ax) || (STM8AF626x) */
void TIM4_UPD_OVF_IRQHandler(void) INTERRUPT 23; /* TIM4 UPD/OVF */
#endif /* (STM8S903) || (STM8AF622x) */
void EEPROM_EEC_IRQHandler(void) INTERRUPT 24; /* EEPROM ECC CORRECTION */
#endif /* _RAISONANCE_ */
#endif /* __STM8S_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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