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Ondřej Hruška 3 years ago
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.gitignore View File

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+cmake-build-debug/
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+Build/
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+CMakeLists.txt
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+*.o
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+*.rel
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+*.a
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+.idea/

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Library/SPL/stm8s.h


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Library/SPL/stm8s_adc1.h View File

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+/**
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+  ******************************************************************************
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+  * @file    stm8s_adc1.h
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+  * @author  MCD Application Team
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+  * @version V2.2.0
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+  * @date    30-September-2014
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+  * @brief   This file contains all the prototypes/macros for the ADC1 peripheral.
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+   ******************************************************************************
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+  * @attention
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+  *
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+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
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+  *
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+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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+  * You may not use this file except in compliance with the License.
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+  * You may obtain a copy of the License at:
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+  *
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+  *        http://www.st.com/software_license_agreement_liberty_v2
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+  *
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+  * Unless required by applicable law or agreed to in writing, software 
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+  * distributed under the License is distributed on an "AS IS" BASIS, 
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+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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+  * See the License for the specific language governing permissions and
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+  * limitations under the License.
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+  *
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+  ******************************************************************************
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+  */
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+/* Define to prevent recursive inclusion -------------------------------------*/
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+#ifndef __STM8S_ADC1_H
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+#define __STM8S_ADC1_H
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+
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+/* Includes ------------------------------------------------------------------*/
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+#include "stm8s.h"
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+
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+/* Exported types ------------------------------------------------------------*/
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+
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+/** @addtogroup ADC1_Exported_Types
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+  * @{
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+  */
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+
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+/**
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+  * @brief  ADC1 clock prescaler selection
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+  */
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+
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+typedef enum {
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+	ADC1_PRESSEL_FCPU_D2 = (uint8_t) 0x00, /**< Prescaler selection fADC1 = fcpu/2 */
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+	ADC1_PRESSEL_FCPU_D3 = (uint8_t) 0x10, /**< Prescaler selection fADC1 = fcpu/3 */
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+	ADC1_PRESSEL_FCPU_D4 = (uint8_t) 0x20, /**< Prescaler selection fADC1 = fcpu/4 */
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+	ADC1_PRESSEL_FCPU_D6 = (uint8_t) 0x30, /**< Prescaler selection fADC1 = fcpu/6 */
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+	ADC1_PRESSEL_FCPU_D8 = (uint8_t) 0x40, /**< Prescaler selection fADC1 = fcpu/8 */
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+	ADC1_PRESSEL_FCPU_D10 = (uint8_t) 0x50, /**< Prescaler selection fADC1 = fcpu/10 */
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+	ADC1_PRESSEL_FCPU_D12 = (uint8_t) 0x60, /**< Prescaler selection fADC1 = fcpu/12 */
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+	ADC1_PRESSEL_FCPU_D18 = (uint8_t) 0x70  /**< Prescaler selection fADC1 = fcpu/18 */
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+} ADC1_PresSel_TypeDef;
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+
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+/**
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+  * @brief   ADC1 External conversion trigger event selection
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+  */
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+typedef enum {
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+	ADC1_EXTTRIG_TIM = (uint8_t) 0x00, /**< Conversion from Internal TIM1 TRGO event */
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+	ADC1_EXTTRIG_GPIO = (uint8_t) 0x10  /**< Conversion from External interrupt on ADC_ETR pin*/
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+} ADC1_ExtTrig_TypeDef;
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+
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+/**
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+  * @brief  ADC1 data alignment
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+  */
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+typedef enum {
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+	ADC1_ALIGN_LEFT = (uint8_t) 0x00, /**< Data alignment left */
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+	ADC1_ALIGN_RIGHT = (uint8_t) 0x08  /**< Data alignment right */
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+} ADC1_Align_TypeDef;
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+
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+/**
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+  * @brief  ADC1 Interrupt source
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+  */
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+typedef enum {
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+	ADC1_IT_AWDIE = (uint16_t) 0x010, /**< Analog WDG interrupt enable */
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+	ADC1_IT_EOCIE = (uint16_t) 0x020, /**< EOC interrupt enable */
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+	ADC1_IT_AWD = (uint16_t) 0x140, /**< Analog WDG status */
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+	ADC1_IT_AWS0 = (uint16_t) 0x110, /**< Analog channel 0 status */
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+	ADC1_IT_AWS1 = (uint16_t) 0x111, /**< Analog channel 1 status */
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+	ADC1_IT_AWS2 = (uint16_t) 0x112, /**< Analog channel 2 status */
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+	ADC1_IT_AWS3 = (uint16_t) 0x113, /**< Analog channel 3 status */
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+	ADC1_IT_AWS4 = (uint16_t) 0x114, /**< Analog channel 4 status */
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+	ADC1_IT_AWS5 = (uint16_t) 0x115, /**< Analog channel 5 status */
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+	ADC1_IT_AWS6 = (uint16_t) 0x116, /**< Analog channel 6 status */
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+	ADC1_IT_AWS7 = (uint16_t) 0x117, /**< Analog channel 7 status */
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+	ADC1_IT_AWS8 = (uint16_t) 0x118, /**< Analog channel 8 status */
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+	ADC1_IT_AWS9 = (uint16_t) 0x119, /**< Analog channel 9 status */
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+	ADC1_IT_AWS12 = (uint16_t) 0x11C, /**< Analog channel 12 status */
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+	/* refer to product datasheet for channel 12 availability */
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+		ADC1_IT_EOC = (uint16_t) 0x080  /**< EOC pending bit */
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+
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+} ADC1_IT_TypeDef;
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+
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+/**
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+  * @brief  ADC1 Flags
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+  */
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+typedef enum {
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+	ADC1_FLAG_OVR = (uint8_t) 0x41, /**< Overrun status flag */
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+	ADC1_FLAG_AWD = (uint8_t) 0x40, /**< Analog WDG status */
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+	ADC1_FLAG_AWS0 = (uint8_t) 0x10, /**< Analog channel 0 status */
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+	ADC1_FLAG_AWS1 = (uint8_t) 0x11, /**< Analog channel 1 status */
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+	ADC1_FLAG_AWS2 = (uint8_t) 0x12, /**< Analog channel 2 status */
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+	ADC1_FLAG_AWS3 = (uint8_t) 0x13, /**< Analog channel 3 status */
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+	ADC1_FLAG_AWS4 = (uint8_t) 0x14, /**< Analog channel 4 status */
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+	ADC1_FLAG_AWS5 = (uint8_t) 0x15, /**< Analog channel 5 status */
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+	ADC1_FLAG_AWS6 = (uint8_t) 0x16, /**< Analog channel 6 status */
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+	ADC1_FLAG_AWS7 = (uint8_t) 0x17, /**< Analog channel 7 status */
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+	ADC1_FLAG_AWS8 = (uint8_t) 0x18, /**< Analog channel 8  status*/
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+	ADC1_FLAG_AWS9 = (uint8_t) 0x19, /**< Analog channel 9 status */
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+	ADC1_FLAG_AWS12 = (uint8_t) 0x1C, /**< Analog channel 12 status */
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+	/* refer to product datasheet for channel 12 availability */
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+		ADC1_FLAG_EOC = (uint8_t) 0x80  /**< EOC falg */
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+} ADC1_Flag_TypeDef;
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+
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+
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+/**
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+  * @brief  ADC1 schmitt Trigger
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+  */
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+typedef enum {
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+	ADC1_SCHMITTTRIG_CHANNEL0 = (uint8_t) 0x00, /**< Schmitt trigger disable on AIN0 */
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+	ADC1_SCHMITTTRIG_CHANNEL1 = (uint8_t) 0x01, /**< Schmitt trigger disable on AIN1 */
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+	ADC1_SCHMITTTRIG_CHANNEL2 = (uint8_t) 0x02, /**< Schmitt trigger disable on AIN2 */
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+	ADC1_SCHMITTTRIG_CHANNEL3 = (uint8_t) 0x03, /**< Schmitt trigger disable on AIN3 */
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+	ADC1_SCHMITTTRIG_CHANNEL4 = (uint8_t) 0x04, /**< Schmitt trigger disable on AIN4 */
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+	ADC1_SCHMITTTRIG_CHANNEL5 = (uint8_t) 0x05, /**< Schmitt trigger disable on AIN5 */
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+	ADC1_SCHMITTTRIG_CHANNEL6 = (uint8_t) 0x06, /**< Schmitt trigger disable on AIN6 */
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+	ADC1_SCHMITTTRIG_CHANNEL7 = (uint8_t) 0x07, /**< Schmitt trigger disable on AIN7 */
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+	ADC1_SCHMITTTRIG_CHANNEL8 = (uint8_t) 0x08, /**< Schmitt trigger disable on AIN8 */
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+	ADC1_SCHMITTTRIG_CHANNEL9 = (uint8_t) 0x09, /**< Schmitt trigger disable on AIN9 */
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+	ADC1_SCHMITTTRIG_CHANNEL12 = (uint8_t) 0x0C, /**< Schmitt trigger disable on AIN12 */
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+	/* refer to product datasheet for channel 12 availability */
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+		ADC1_SCHMITTTRIG_ALL = (uint8_t) 0xFF /**< Schmitt trigger disable on All channels */
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+} ADC1_SchmittTrigg_TypeDef;
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+
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+/**
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+  * @brief  ADC1 conversion mode selection
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+  */
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+
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+typedef enum {
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+	ADC1_CONVERSIONMODE_SINGLE = (uint8_t) 0x00, /**< Single conversion mode */
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+	ADC1_CONVERSIONMODE_CONTINUOUS = (uint8_t) 0x01  /**< Continuous conversion mode */
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+} ADC1_ConvMode_TypeDef;
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+
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+/**
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+  * @brief  ADC1 analog channel selection
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+  */
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+
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+typedef enum {
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+	ADC1_CHANNEL_0 = (uint8_t) 0x00, /**< Analog channel 0 */
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+	ADC1_CHANNEL_1 = (uint8_t) 0x01, /**< Analog channel 1 */
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+	ADC1_CHANNEL_2 = (uint8_t) 0x02, /**< Analog channel 2 */
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+	ADC1_CHANNEL_3 = (uint8_t) 0x03, /**< Analog channel 3 */
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+	ADC1_CHANNEL_4 = (uint8_t) 0x04, /**< Analog channel 4 */
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+	ADC1_CHANNEL_5 = (uint8_t) 0x05, /**< Analog channel 5 */
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+	ADC1_CHANNEL_6 = (uint8_t) 0x06, /**< Analog channel 6 */
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+	ADC1_CHANNEL_7 = (uint8_t) 0x07, /**< Analog channel 7 */
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+	ADC1_CHANNEL_8 = (uint8_t) 0x08, /**< Analog channel 8 */
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+	ADC1_CHANNEL_9 = (uint8_t) 0x09, /**< Analog channel 9 */
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+	ADC1_CHANNEL_12 = (uint8_t) 0x0C /**< Analog channel 12 */
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+	/* refer to product datasheet for channel 12 availability */
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+} ADC1_Channel_TypeDef;
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+
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+/**
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+  * @}
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+  */
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+
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+/* Exported constants --------------------------------------------------------*/
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+
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+/* Exported macros ------------------------------------------------------------*/
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+
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+/* Private macros ------------------------------------------------------------*/
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+
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+/** @addtogroup ADC1_Private_Macros
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+  * @brief  Macros used by the assert function to check the different functions parameters.
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+  * @{
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+  */
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+
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+/**
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+  * @brief  Macro used by the assert function to check the different prescaler's values.
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+  */
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+#define IS_ADC1_PRESSEL_OK(PRESCALER) (((PRESCALER) == ADC1_PRESSEL_FCPU_D2) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D3) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D4) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D6) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D8) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D10) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D12) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D18))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the different external trigger values.
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+  */
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+#define IS_ADC1_EXTTRIG_OK(EXTRIG) (((EXTRIG) == ADC1_EXTTRIG_TIM) || \
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+                                   ((EXTRIG) == ADC1_EXTTRIG_GPIO))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the different alignment modes.
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+  */
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+#define IS_ADC1_ALIGN_OK(ALIGN) (((ALIGN) == ADC1_ALIGN_LEFT) || \
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+                                ((ALIGN) == ADC1_ALIGN_RIGHT))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the Interrupt source.
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+  */
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+#define IS_ADC1_IT_OK(IT) (((IT) == ADC1_IT_EOCIE) || \
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+                          ((IT) == ADC1_IT_AWDIE))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the ADC1 Flag.
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+  */
211
+#define IS_ADC1_FLAG_OK(FLAG) (((FLAG) == ADC1_FLAG_EOC)|| \
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+                              ((FLAG) == ADC1_FLAG_OVR) || \
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+                              ((FLAG) == ADC1_FLAG_AWD) || \
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+                              ((FLAG) == ADC1_FLAG_AWS0) || \
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+                              ((FLAG) == ADC1_FLAG_AWS1) || \
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+                              ((FLAG) == ADC1_FLAG_AWS2) || \
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+                              ((FLAG) == ADC1_FLAG_AWS3) || \
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+                              ((FLAG) == ADC1_FLAG_AWS4) || \
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+                              ((FLAG) == ADC1_FLAG_AWS5) || \
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+                              ((FLAG) == ADC1_FLAG_AWS6) || \
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+                              ((FLAG) == ADC1_FLAG_AWS7) || \
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+                              ((FLAG) == ADC1_FLAG_AWS8) || \
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+                              ((FLAG) == ADC1_FLAG_AWS9))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the ADC1 pending bits.
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+  */
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+#define IS_ADC1_ITPENDINGBIT_OK(ITPENDINGBIT) (((ITPENDINGBIT) == ADC1_IT_EOC) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWD) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS0) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS1) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS2) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS3) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS4) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS5) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS6) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS7) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS8) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS12) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS9))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the different schmitt trigger values.
244
+  */
245
+#define IS_ADC1_SCHMITTTRIG_OK(SCHMITTTRIG) (((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL0) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL1) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL2) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL3) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL4) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL5) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL6) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL7) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL8) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL12) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_ALL) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL9))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the different conversion modes.
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+  */
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+#define IS_ADC1_CONVERSIONMODE_OK(MODE) (((MODE) == ADC1_CONVERSIONMODE_SINGLE) || \
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+                                        ((MODE) == ADC1_CONVERSIONMODE_CONTINUOUS))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the different channels values.
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+  */
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+#define IS_ADC1_CHANNEL_OK(CHANNEL) (((CHANNEL) == ADC1_CHANNEL_0) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_1) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_2) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_3) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_4) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_5) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_6) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_7) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_8) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_12) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_9))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the possible buffer values.
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+  */
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+#define IS_ADC1_BUFFER_OK(BUFFER) ((BUFFER) <= (uint8_t)0x09)
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+
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+/**
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+  * @}
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+  */
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+
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+/* Exported functions ------------------------------------------------------- */
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+
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+#if 0
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+/** @addtogroup ADC1_Exported_Functions
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+  * @{
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+  */
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+void ADC1_DeInit(void);
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+
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+void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode,
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+			   ADC1_Channel_TypeDef ADC1_Channel,
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+			   ADC1_PresSel_TypeDef ADC1_PrescalerSelection,
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+			   ADC1_ExtTrig_TypeDef ADC1_ExtTrigger,
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+			   FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align,
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+			   ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel,
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+			   FunctionalState ADC1_SchmittTriggerState);
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+
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+void ADC1_Cmd(FunctionalState NewState);
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+
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+void ADC1_ScanModeCmd(FunctionalState NewState);
307
+
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+void ADC1_DataBufferCmd(FunctionalState NewState);
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+
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+void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState);
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+
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+void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler);
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+
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+void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel,
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+							   FunctionalState NewState);
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+
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+void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode,
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+						   ADC1_Channel_TypeDef ADC1_Channel,
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+						   ADC1_Align_TypeDef ADC1_Align);
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+
321
+void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState);
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+
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+void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState);
324
+
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+void ADC1_StartConversion(void);
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+
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+uint16_t ADC1_GetConversionValue(void);
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+
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+void ADC1_SetHighThreshold(uint16_t Threshold);
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+
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+void ADC1_SetLowThreshold(uint16_t Threshold);
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+
333
+uint16_t ADC1_GetBufferValue(uint8_t Buffer);
334
+
335
+FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel);
336
+
337
+FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag);
338
+
339
+void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag);
340
+
341
+ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit);
342
+
343
+void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit);
344
+#endif
345
+/**
346
+  * @}
347
+  */
348
+
349
+
350
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
351
+
352
+
353
+/** @addtogroup STM8S_StdPeriph_Driver
354
+  * @{
355
+  */
356
+/* Private typedef -----------------------------------------------------------*/
357
+/* Private define ------------------------------------------------------------*/
358
+/* Private macro -------------------------------------------------------------*/
359
+/* Private variables ---------------------------------------------------------*/
360
+/* Private function prototypes -----------------------------------------------*/
361
+/* Private functions ---------------------------------------------------------*/
362
+/* Public functions ----------------------------------------------------------*/
363
+
364
+/**
365
+  * @addtogroup ADC1_Public_Functions
366
+  * @{
367
+  */
368
+
369
+/**
370
+  * @brief  Deinitializes the ADC1 peripheral registers to their default reset values.
371
+  * @param  None
372
+  * @retval None
373
+  */
374
+inline void ADC1_DeInit(void)
375
+{
376
+	ADC1->CSR = ADC1_CSR_RESET_VALUE;
377
+	ADC1->CR1 = ADC1_CR1_RESET_VALUE;
378
+	ADC1->CR2 = ADC1_CR2_RESET_VALUE;
379
+	ADC1->CR3 = ADC1_CR3_RESET_VALUE;
380
+	ADC1->TDRH = ADC1_TDRH_RESET_VALUE;
381
+	ADC1->TDRL = ADC1_TDRL_RESET_VALUE;
382
+	ADC1->HTRH = ADC1_HTRH_RESET_VALUE;
383
+	ADC1->HTRL = ADC1_HTRL_RESET_VALUE;
384
+	ADC1->LTRH = ADC1_LTRH_RESET_VALUE;
385
+	ADC1->LTRL = ADC1_LTRL_RESET_VALUE;
386
+	ADC1->AWCRH = ADC1_AWCRH_RESET_VALUE;
387
+	ADC1->AWCRL = ADC1_AWCRL_RESET_VALUE;
388
+}
389
+/**
390
+  * @brief  Configure the ADC1 conversion on selected channel.
391
+  * @param   ADC1_ConversionMode Specifies the conversion type.
392
+  * It can be set of the values of @ref ADC1_ConvMode_TypeDef
393
+  * @param   ADC1_Channel specifies the ADC1 Channel.
394
+  * It can be set of the values of @ref ADC1_Channel_TypeDef
395
+  * @param   ADC1_Align specifies the converted data alignment.
396
+  * It can be set of the values of @ref ADC1_Align_TypeDef
397
+  * @retval None
398
+  */
399
+inline void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel,
400
+								  ADC1_Align_TypeDef ADC1_Align)
401
+{
402
+	/* Check the parameters */
403
+	assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode));
404
+	assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel));
405
+	assert_param(IS_ADC1_ALIGN_OK(ADC1_Align));
406
+
407
+	/* Clear the align bit */
408
+	ADC1->CR2 &= (uint8_t) (~ADC1_CR2_ALIGN);
409
+	/* Configure the data alignment */
410
+	ADC1->CR2 |= (uint8_t) (ADC1_Align);
411
+
412
+	if (ADC1_ConversionMode == ADC1_CONVERSIONMODE_CONTINUOUS) {
413
+		/* Set the continuous conversion mode */
414
+		ADC1->CR1 |= ADC1_CR1_CONT;
415
+	} else /* ADC1_ConversionMode == ADC1_CONVERSIONMODE_SINGLE */
416
+	{
417
+		/* Set the single conversion mode */
418
+		ADC1->CR1 &= (uint8_t) (~ADC1_CR1_CONT);
419
+	}
420
+
421
+	/* Clear the ADC1 channels */
422
+	ADC1->CSR &= (uint8_t) (~ADC1_CSR_CH);
423
+	/* Select the ADC1 channel */
424
+	ADC1->CSR |= (uint8_t) (ADC1_Channel);
425
+}
426
+
427
+/**
428
+  * @brief  Enables or disables the ADC1 Schmitt Trigger on a selected channel.
429
+  * @param   ADC1_SchmittTriggerChannel specifies the desired Channel.
430
+  * It can be set of the values of @ref ADC1_SchmittTrigg_TypeDef.
431
+  * @param   NewState specifies Channel new status.
432
+  * can have one of the values of @ref FunctionalState.
433
+  * @retval None
434
+  */
435
+inline void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState NewState)
436
+{
437
+	/* Check the parameters */
438
+	assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel));
439
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
440
+
441
+	if (ADC1_SchmittTriggerChannel == ADC1_SCHMITTTRIG_ALL) {
442
+		if (NewState != DISABLE) {
443
+			ADC1->TDRL &= (uint8_t) 0x0;
444
+			ADC1->TDRH &= (uint8_t) 0x0;
445
+		} else /* NewState == DISABLE */
446
+		{
447
+			ADC1->TDRL |= (uint8_t) 0xFF;
448
+			ADC1->TDRH |= (uint8_t) 0xFF;
449
+		}
450
+	} else if (ADC1_SchmittTriggerChannel < ADC1_SCHMITTTRIG_CHANNEL8) {
451
+		if (NewState != DISABLE) {
452
+			ADC1->TDRL &= (uint8_t) (~(uint8_t) ((uint8_t) 0x01 << (uint8_t) ADC1_SchmittTriggerChannel));
453
+		} else /* NewState == DISABLE */
454
+		{
455
+			ADC1->TDRL |= (uint8_t) ((uint8_t) 0x01 << (uint8_t) ADC1_SchmittTriggerChannel);
456
+		}
457
+	} else /* ADC1_SchmittTriggerChannel >= ADC1_SCHMITTTRIG_CHANNEL8 */
458
+	{
459
+		if (NewState != DISABLE) {
460
+			ADC1->TDRH &= (uint8_t) (~(uint8_t) ((uint8_t) 0x01
461
+				<< ((uint8_t) ADC1_SchmittTriggerChannel - (uint8_t) 8)));
462
+		} else /* NewState == DISABLE */
463
+		{
464
+			ADC1->TDRH |= (uint8_t) ((uint8_t) 0x01 << ((uint8_t) ADC1_SchmittTriggerChannel - (uint8_t) 8));
465
+		}
466
+	}
467
+}
468
+
469
+/**
470
+  * @brief  Configure the ADC1 prescaler division factor.
471
+  * @param   ADC1_Prescaler: the selected precaler.
472
+  * It can be one of the values of @ref ADC1_PresSel_TypeDef.
473
+  * @retval None
474
+  */
475
+inline void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler)
476
+{
477
+	/* Check the parameter */
478
+	assert_param(IS_ADC1_PRESSEL_OK(ADC1_Prescaler));
479
+
480
+	/* Clear the SPSEL bits */
481
+	ADC1->CR1 &= (uint8_t) (~ADC1_CR1_SPSEL);
482
+	/* Select the prescaler division factor according to ADC1_PrescalerSelection values */
483
+	ADC1->CR1 |= (uint8_t) (ADC1_Prescaler);
484
+}
485
+
486
+/**
487
+  * @brief  Configure the ADC1 conversion on external trigger event.
488
+  * @par Full description:
489
+  * The selected external trigger event can be enabled or disabled.
490
+  * @param   ADC1_ExtTrigger to select the External trigger event.
491
+  * can have one of the values of @ref ADC1_ExtTrig_TypeDef.
492
+  * @param   NewState to enable/disable the selected external trigger
493
+  * can have one of the values of @ref FunctionalState.
494
+  * @retval None
495
+  */
496
+inline void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState)
497
+{
498
+	/* Check the parameters */
499
+	assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger));
500
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
501
+
502
+	/* Clear the external trigger selection bits */
503
+	ADC1->CR2 &= (uint8_t) (~ADC1_CR2_EXTSEL);
504
+
505
+	if (NewState != DISABLE) {
506
+		/* Enable the selected external Trigger */
507
+		ADC1->CR2 |= (uint8_t) (ADC1_CR2_EXTTRIG);
508
+	} else /* NewState == DISABLE */
509
+	{
510
+		/* Disable the selected external trigger */
511
+		ADC1->CR2 &= (uint8_t) (~ADC1_CR2_EXTTRIG);
512
+	}
513
+
514
+	/* Set the selected external trigger */
515
+	ADC1->CR2 |= (uint8_t) (ADC1_ExtTrigger);
516
+}
517
+
518
+/**
519
+  * @brief  Initializes the ADC1 peripheral according to the specified parameters
520
+  * @param   ADC1_ConversionMode: specifies the conversion mode
521
+  * can be one of the values of @ref ADC1_ConvMode_TypeDef.
522
+  * @param   ADC1_Channel: specifies the channel to convert
523
+  * can be one of the values of @ref ADC1_Channel_TypeDef.
524
+  * @param   ADC1_PrescalerSelection: specifies the ADC1 prescaler
525
+  * can be one of the values of @ref ADC1_PresSel_TypeDef.
526
+  * @param   ADC1_ExtTrigger: specifies the external trigger
527
+  * can be one of the values of @ref ADC1_ExtTrig_TypeDef.
528
+  * @param   ADC1_ExtTriggerState: specifies the external trigger new state
529
+  * can be one of the values of @ref FunctionalState.
530
+  * @param   ADC1_Align: specifies the converted data alignment
531
+  * can be one of the values of @ref ADC1_Align_TypeDef.
532
+  * @param   ADC1_SchmittTriggerChannel: specifies the schmitt trigger channel
533
+  * can be one of the values of @ref ADC1_SchmittTrigg_TypeDef.
534
+  * @param   ADC1_SchmittTriggerState: specifies the schmitt trigger state
535
+  * can be one of the values of @ref FunctionalState.
536
+  * @retval None
537
+  */
538
+inline void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel,
539
+					  ADC1_PresSel_TypeDef ADC1_PrescalerSelection, ADC1_ExtTrig_TypeDef ADC1_ExtTrigger,
540
+					  FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align,
541
+					  ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState ADC1_SchmittTriggerState)
542
+{
543
+	/* Check the parameters */
544
+	assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode));
545
+	assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel));
546
+	assert_param(IS_ADC1_PRESSEL_OK(ADC1_PrescalerSelection));
547
+	assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger));
548
+	assert_param(IS_FUNCTIONALSTATE_OK(((ADC1_ExtTriggerState))));
549
+	assert_param(IS_ADC1_ALIGN_OK(ADC1_Align));
550
+	assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel));
551
+	assert_param(IS_FUNCTIONALSTATE_OK(ADC1_SchmittTriggerState));
552
+
553
+	/*-----------------CR1 & CSR configuration --------------------*/
554
+	/* Configure the conversion mode and the channel to convert
555
+	respectively according to ADC1_ConversionMode & ADC1_Channel values  &  ADC1_Align values */
556
+	ADC1_ConversionConfig(ADC1_ConversionMode, ADC1_Channel, ADC1_Align);
557
+	/* Select the prescaler division factor according to ADC1_PrescalerSelection values */
558
+	ADC1_PrescalerConfig(ADC1_PrescalerSelection);
559
+
560
+	/*-----------------CR2 configuration --------------------*/
561
+	/* Configure the external trigger state and event respectively
562
+	according to NewState, ADC1_ExtTrigger */
563
+	ADC1_ExternalTriggerConfig(ADC1_ExtTrigger, ADC1_ExtTriggerState);
564
+
565
+	/*------------------TDR configuration ---------------------------*/
566
+	/* Configure the schmitt trigger channel and state respectively
567
+	according to ADC1_SchmittTriggerChannel & ADC1_SchmittTriggerNewState  values */
568
+	ADC1_SchmittTriggerConfig(ADC1_SchmittTriggerChannel, ADC1_SchmittTriggerState);
569
+
570
+	/* Enable the ADC1 peripheral */
571
+	ADC1->CR1 |= ADC1_CR1_ADON;
572
+}
573
+
574
+/**
575
+  * @brief  Enables or Disables the ADC1 peripheral.
576
+  * @param  NewState: specifies the peripheral enabled or disabled state.
577
+  * @retval None
578
+  */
579
+inline void ADC1_Cmd(FunctionalState NewState)
580
+{
581
+	/* Check the parameters */
582
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
583
+
584
+	if (NewState != DISABLE) {
585
+		ADC1->CR1 |= ADC1_CR1_ADON;
586
+	} else /* NewState == DISABLE */
587
+	{
588
+		ADC1->CR1 &= (uint8_t) (~ADC1_CR1_ADON);
589
+	}
590
+}
591
+
592
+/**
593
+  * @brief  Enables or Disables the ADC1 scan mode.
594
+  * @param  NewState: specifies the selected mode enabled or disabled state.
595
+  * @retval None
596
+  */
597
+inline void ADC1_ScanModeCmd(FunctionalState NewState)
598
+{
599
+	/* Check the parameters */
600
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
601
+
602
+	if (NewState != DISABLE) {
603
+		ADC1->CR2 |= ADC1_CR2_SCAN;
604
+	} else /* NewState == DISABLE */
605
+	{
606
+		ADC1->CR2 &= (uint8_t) (~ADC1_CR2_SCAN);
607
+	}
608
+}
609
+
610
+/**
611
+  * @brief  Enables or Disables the ADC1 data store into the Data Buffer registers rather than in the Data Register
612
+  * @param   NewState: specifies the selected mode enabled or disabled state.
613
+  * @retval None
614
+  */
615
+inline void ADC1_DataBufferCmd(FunctionalState NewState)
616
+{
617
+	/* Check the parameters */
618
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
619
+
620
+	if (NewState != DISABLE) {
621
+		ADC1->CR3 |= ADC1_CR3_DBUF;
622
+	} else /* NewState == DISABLE */
623
+	{
624
+		ADC1->CR3 &= (uint8_t) (~ADC1_CR3_DBUF);
625
+	}
626
+}
627
+
628
+/**
629
+  * @brief  Enables or disables the ADC1 interrupt.
630
+  * @param   ADC1_IT specifies the name of the interrupt to enable or disable.
631
+  * This parameter can be one of the following values:
632
+  *    - ADC1_IT_AWDITEN : Analog WDG interrupt enable
633
+  *    - ADC1_IT_EOCITEN  : EOC iterrupt enable
634
+  * @param   NewState specifies the state of the interrupt to apply.
635
+  * @retval None
636
+  */
637
+inline void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState)
638
+{
639
+	/* Check the parameters */
640
+	assert_param(IS_ADC1_IT_OK(ADC1_IT));
641
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
642
+
643
+	if (NewState != DISABLE) {
644
+		/* Enable the ADC1 interrupts */
645
+		ADC1->CSR |= (uint8_t) ADC1_IT;
646
+	} else  /* NewState == DISABLE */
647
+	{
648
+		/* Disable the ADC1 interrupts */
649
+		ADC1->CSR &= (uint8_t) ((uint16_t) ~(uint16_t) ADC1_IT);
650
+	}
651
+}
652
+
653
+
654
+/**
655
+  * @brief  Start ADC1 conversion
656
+  * @par Full description:
657
+  * This function  triggers the start of conversion, after ADC1 configuration.
658
+  * @param  None
659
+  * @retval None
660
+  * @par Required preconditions:
661
+  * Enable the ADC1 peripheral before calling this function
662
+  */
663
+inline void ADC1_StartConversion(void)
664
+{
665
+	ADC1->CR1 |= ADC1_CR1_ADON;
666
+}
667
+
668
+/**
669
+  * @brief  Get one sample of measured signal.
670
+  * @param  None
671
+  * @retval ConversionValue:  value of the measured signal.
672
+  * @par Required preconditions:
673
+  * ADC1 conversion finished.
674
+  */
675
+inline uint16_t ADC1_GetConversionValue(void)
676
+{
677
+	uint16_t temph = 0;
678
+	uint8_t templ = 0;
679
+
680
+	if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */
681
+	{
682
+		/* Read LSB first */
683
+		templ = ADC1->DRL;
684
+		/* Then read MSB */
685
+		temph = ADC1->DRH;
686
+
687
+		temph = (uint16_t) (templ | (uint16_t) (temph << (uint8_t) 8));
688
+	} else /* Left alignment */
689
+	{
690
+		/* Read MSB first*/
691
+		temph = ADC1->DRH;
692
+		/* Then read LSB */
693
+		templ = ADC1->DRL;
694
+
695
+		temph = (uint16_t) ((uint16_t) ((uint16_t) templ << 6) | (uint16_t) ((uint16_t) temph << 8));
696
+	}
697
+
698
+	return ((uint16_t) temph);
699
+}
700
+
701
+/**
702
+  * @brief  Enables or disables the analog watchdog for the given channel.
703
+  * @param   Channel specifies the desired Channel.
704
+  * It can be set of the values of @ref ADC1_Channel_TypeDef.
705
+  * @param   NewState specifies the analog watchdog new state.
706
+  * can have one of the values of @ref FunctionalState.
707
+  * @retval None
708
+  */
709
+inline void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState)
710
+{
711
+	/* Check the parameters */
712
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
713
+	assert_param(IS_ADC1_CHANNEL_OK(Channel));
714
+
715
+	if (Channel < (uint8_t) 8) {
716
+		if (NewState != DISABLE) {
717
+			ADC1->AWCRL |= (uint8_t) ((uint8_t) 1 << Channel);
718
+		} else /* NewState == DISABLE */
719
+		{
720
+			ADC1->AWCRL &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << Channel);
721
+		}
722
+	} else {
723
+		if (NewState != DISABLE) {
724
+			ADC1->AWCRH |= (uint8_t) ((uint8_t) 1 << (Channel - (uint8_t) 8));
725
+		} else /* NewState == DISABLE */
726
+		{
727
+			ADC1->AWCRH &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << (uint8_t) (Channel - (uint8_t) 8));
728
+		}
729
+	}
730
+}
731
+
732
+/**
733
+  * @brief  Sets the high threshold of the analog watchdog.
734
+  * @param   Threshold specifies the high threshold value.
735
+  * this value depends on the reference voltage range.
736
+  * @retval None
737
+  */
738
+inline void ADC1_SetHighThreshold(uint16_t Threshold)
739
+{
740
+	ADC1->HTRH = (uint8_t) (Threshold >> (uint8_t) 2);
741
+	ADC1->HTRL = (uint8_t) Threshold;
742
+}
743
+
744
+/**
745
+  * @brief  Sets the low threshold of the analog watchdog.
746
+  * @param   Threshold specifies the low threshold value.
747
+  * this value depends on the reference voltage range.
748
+  * @retval None
749
+  */
750
+inline void ADC1_SetLowThreshold(uint16_t Threshold)
751
+{
752
+	ADC1->LTRL = (uint8_t) Threshold;
753
+	ADC1->LTRH = (uint8_t) (Threshold >> (uint8_t) 2);
754
+}
755
+
756
+/**
757
+  * @brief  Get one sample of measured signal.
758
+  * @param   Buffer specifies the buffer to read.
759
+  * @retval BufferValue:  value read from the given buffer.
760
+  * @par Required preconditions:
761
+  * ADC1 conversion finished.
762
+  */
763
+inline uint16_t ADC1_GetBufferValue(uint8_t Buffer)
764
+{
765
+	uint16_t temph = 0;
766
+	uint8_t templ = 0;
767
+
768
+	/* Check the parameters */
769
+	assert_param(IS_ADC1_BUFFER_OK(Buffer));
770
+
771
+	if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */
772
+	{
773
+		/* Read LSB first */
774
+		templ = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1) + 1);
775
+		/* Then read MSB */
776
+		temph = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1));
777
+
778
+		temph = (uint16_t) (templ | (uint16_t) (temph << (uint8_t) 8));
779
+	} else /* Left alignment */
780
+	{
781
+		/* Read MSB first*/
782
+		temph = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1));
783
+		/* Then read LSB */
784
+		templ = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1) + 1);
785
+
786
+		temph = (uint16_t) ((uint16_t) ((uint16_t) templ << 6) | (uint16_t) (temph << 8));
787
+	}
788
+
789
+	return ((uint16_t) temph);
790
+}
791
+
792
+/**
793
+  * @brief  Checks the specified analog watchdog channel status.
794
+  * @param   Channel: specify the channel of which to check the analog watchdog
795
+  * can be one of the values of @ref ADC1_Channel_TypeDef.
796
+  * @retval FlagStatus Status of the analog watchdog.
797
+  */
798
+inline FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel)
799
+{
800
+	uint8_t status = 0;
801
+
802
+	/* Check the parameters */
803
+	assert_param(IS_ADC1_CHANNEL_OK(Channel));
804
+
805
+	if (Channel < (uint8_t) 8) {
806
+		status = (uint8_t) (ADC1->AWSRL & (uint8_t) ((uint8_t) 1 << Channel));
807
+	} else /* Channel = 8 | 9 */
808
+	{
809
+		status = (uint8_t) (ADC1->AWSRH & (uint8_t) ((uint8_t) 1 << (Channel - (uint8_t) 8)));
810
+	}
811
+
812
+	return ((FlagStatus) status);
813
+}
814
+
815
+/**
816
+  * @brief  Checks the specified ADC1 flag status.
817
+  * @param   Flag: ADC1 flag.
818
+  * can be one of the values of @ref ADC1_Flag_TypeDef.
819
+  * @retval FlagStatus Status of the ADC1 flag.
820
+  */
821
+inline FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag)
822
+{
823
+	uint8_t flagstatus = 0;
824
+	uint8_t temp = 0;
825
+
826
+	/* Check the parameters */
827
+	assert_param(IS_ADC1_FLAG_OK(Flag));
828
+
829
+	if ((Flag & 0x0F) == 0x01) {
830
+		/* Get OVR flag status */
831
+		flagstatus = (uint8_t) (ADC1->CR3 & ADC1_CR3_OVR);
832
+	} else if ((Flag & 0xF0) == 0x10) {
833
+		/* Get analog watchdog channel status */
834
+		temp = (uint8_t) (Flag & (uint8_t) 0x0F);
835
+		if (temp < 8) {
836
+			flagstatus = (uint8_t) (ADC1->AWSRL & (uint8_t) ((uint8_t) 1 << temp));
837
+		} else {
838
+			flagstatus = (uint8_t) (ADC1->AWSRH & (uint8_t) ((uint8_t) 1 << (temp - 8)));
839
+		}
840
+	} else  /* Get EOC | AWD flag status */
841
+	{
842
+		flagstatus = (uint8_t) (ADC1->CSR & Flag);
843
+	}
844
+	return ((FlagStatus) flagstatus);
845
+
846
+}
847
+
848
+/**
849
+  * @brief  Clear the specified ADC1 Flag.
850
+  * @param   Flag: ADC1 flag.
851
+  * can be one of the values of @ref ADC1_Flag_TypeDef.
852
+  * @retval None
853
+  */
854
+inline void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag)
855
+{
856
+	uint8_t temp = 0;
857
+
858
+	/* Check the parameters */
859
+	assert_param(IS_ADC1_FLAG_OK(Flag));
860
+
861
+	if ((Flag & 0x0F) == 0x01) {
862
+		/* Clear OVR flag status */
863
+		ADC1->CR3 &= (uint8_t) (~ADC1_CR3_OVR);
864
+	} else if ((Flag & 0xF0) == 0x10) {
865
+		/* Clear analog watchdog channel status */
866
+		temp = (uint8_t) (Flag & (uint8_t) 0x0F);
867
+		if (temp < 8) {
868
+			ADC1->AWSRL &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << temp);
869
+		} else {
870
+			ADC1->AWSRH &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << (temp - 8));
871
+		}
872
+	} else  /* Clear EOC | AWD flag status */
873
+	{
874
+		ADC1->CSR &= (uint8_t) (~Flag);
875
+	}
876
+}
877
+
878
+/**
879
+  * @brief  Returns the specified pending bit status
880
+  * @param   ITPendingBit : the IT pending bit to check.
881
+  * This parameter can be one of the following values:
882
+  *    - ADC1_IT_AWD   : Analog WDG IT status
883
+  *    - ADC1_IT_AWS0 : Analog channel 0 IT status
884
+  *    - ADC1_IT_AWS1 : Analog channel 1 IT status
885
+  *    - ADC1_IT_AWS2 : Analog channel 2 IT status
886
+  *    - ADC1_IT_AWS3 : Analog channel 3 IT status
887
+  *    - ADC1_IT_AWS4 : Analog channel 4 IT status
888
+  *    - ADC1_IT_AWS5 : Analog channel 5 IT status
889
+  *    - ADC1_IT_AWS6 : Analog channel 6 IT status
890
+  *    - ADC1_IT_AWS7 : Analog channel 7 IT status
891
+  *    - ADC1_IT_AWS8 : Analog channel 8 IT status
892
+  *    - ADC1_IT_AWS9 : Analog channel 9 IT status
893
+  *    - ADC1_IT_EOC    : EOC pending bit
894
+  * @retval ITStatus: status of the specified pending bit.
895
+  */
896
+inline ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit)
897
+{
898
+	ITStatus itstatus = RESET;
899
+	uint8_t temp = 0;
900
+
901
+	/* Check the parameters */
902
+	assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit));
903
+
904
+	if (((uint16_t) ITPendingBit & 0xF0) == 0x10) {
905
+		/* Get analog watchdog channel status */
906
+		temp = (uint8_t) ((uint16_t) ITPendingBit & 0x0F);
907
+		if (temp < 8) {
908
+			itstatus = (ITStatus) (ADC1->AWSRL & (uint8_t) ((uint8_t) 1 << temp));
909
+		} else {
910
+			itstatus = (ITStatus) (ADC1->AWSRH & (uint8_t) ((uint8_t) 1 << (temp - 8)));
911
+		}
912
+	} else  /* Get EOC | AWD flag status */
913
+	{
914
+		itstatus = (ITStatus) (ADC1->CSR & (uint8_t) ITPendingBit);
915
+	}
916
+	return ((ITStatus) itstatus);
917
+}
918
+
919
+/**
920
+  * @brief  Clear the ADC1 End of Conversion pending bit.
921
+  * @param   ITPendingBit : the IT pending bit to clear.
922
+  * This parameter can be one of the following values:
923
+  *    - ADC1_IT_AWD   : Analog WDG IT status
924
+  *    - ADC1_IT_AWS0 : Analog channel 0 IT status
925
+  *    - ADC1_IT_AWS1 : Analog channel 1 IT status
926
+  *    - ADC1_IT_AWS2 : Analog channel 2 IT status
927
+  *    - ADC1_IT_AWS3 : Analog channel 3 IT status
928
+  *    - ADC1_IT_AWS4 : Analog channel 4 IT status
929
+  *    - ADC1_IT_AWS5 : Analog channel 5 IT status
930
+  *    - ADC1_IT_AWS6 : Analog channel 6 IT status
931
+  *    - ADC1_IT_AWS7 : Analog channel 7 IT status
932
+  *    - ADC1_IT_AWS8 : Analog channel 8 IT status
933
+  *    - ADC1_IT_AWS9 : Analog channel 9 IT status
934
+  *    - ADC1_IT_EOC  : EOC pending bit
935
+  * @retval None
936
+  */
937
+inline void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit)
938
+{
939
+	uint8_t temp = 0;
940
+
941
+	/* Check the parameters */
942
+	assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit));
943
+
944
+	if (((uint16_t) ITPendingBit & 0xF0) == 0x10) {
945
+		/* Clear analog watchdog channel status */
946
+		temp = (uint8_t) ((uint16_t) ITPendingBit & 0x0F);
947
+		if (temp < 8) {
948
+			ADC1->AWSRL &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << temp);
949
+		} else {
950
+			ADC1->AWSRH &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << (temp - 8));
951
+		}
952
+	} else  /* Clear EOC | AWD flag status */
953
+	{
954
+		ADC1->CSR &= (uint8_t) ((uint16_t) ~(uint16_t) ITPendingBit);
955
+	}
956
+}
957
+
958
+/**
959
+  * @}
960
+  */
961
+
962
+/**
963
+  * @}
964
+  */
965
+
966
+
967
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
968
+
969
+
970
+#endif /* __STM8S_ADC1_H */

+ 318 - 0
Library/SPL/stm8s_awu.h View File

@@ -0,0 +1,318 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm8s_awu.h
4
+  * @author  MCD Application Team
5
+  * @version V2.2.0
6
+  * @date    30-September-2014
7
+  * @brief   This file contains all functions prototype and macros for the AWU peripheral.
8
+   ******************************************************************************
9
+  * @attention
10
+  *
11
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
12
+  *
13
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14
+  * You may not use this file except in compliance with the License.
15
+  * You may obtain a copy of the License at:
16
+  *
17
+  *        http://www.st.com/software_license_agreement_liberty_v2
18
+  *
19
+  * Unless required by applicable law or agreed to in writing, software 
20
+  * distributed under the License is distributed on an "AS IS" BASIS, 
21
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22
+  * See the License for the specific language governing permissions and
23
+  * limitations under the License.
24
+  *
25
+  ******************************************************************************
26
+  */
27
+
28
+/* Define to prevent recursive inclusion -------------------------------------*/
29
+#ifndef __STM8S_AWU_H
30
+#define __STM8S_AWU_H
31
+
32
+/* Includes ------------------------------------------------------------------*/
33
+#include "stm8s.h"
34
+
35
+/* Exported types ------------------------------------------------------------*/
36
+
37
+/** @addtogroup AWU_Exported_Types
38
+  * @{
39
+  */
40
+
41
+/**
42
+  * @brief  AWU TimeBase selection
43
+  */
44
+
45
+typedef enum {
46
+	AWU_TIMEBASE_NO_IT = (uint8_t) 0,    /*!< No AWU interrupt selected */
47
+	AWU_TIMEBASE_250US = (uint8_t) 1,    /*!< AWU Timebase equals 0.25 ms */
48
+	AWU_TIMEBASE_500US = (uint8_t) 2,    /*!< AWU Timebase equals 0.5 ms */
49
+	AWU_TIMEBASE_1MS = (uint8_t) 3,    /*!< AWU Timebase equals 1 ms */
50
+	AWU_TIMEBASE_2MS = (uint8_t) 4,    /*!< AWU Timebase equals 2 ms */
51
+	AWU_TIMEBASE_4MS = (uint8_t) 5,    /*!< AWU Timebase equals 4 ms */
52
+	AWU_TIMEBASE_8MS = (uint8_t) 6,    /*!< AWU Timebase equals 8 ms */
53
+	AWU_TIMEBASE_16MS = (uint8_t) 7,    /*!< AWU Timebase equals 16 ms */
54
+	AWU_TIMEBASE_32MS = (uint8_t) 8,    /*!< AWU Timebase equals 32 ms */
55
+	AWU_TIMEBASE_64MS = (uint8_t) 9,    /*!< AWU Timebase equals 64 ms */
56
+	AWU_TIMEBASE_128MS = (uint8_t) 10,   /*!< AWU Timebase equals 128 ms */
57
+	AWU_TIMEBASE_256MS = (uint8_t) 11,   /*!< AWU Timebase equals 256 ms */
58
+	AWU_TIMEBASE_512MS = (uint8_t) 12,   /*!< AWU Timebase equals 512 ms */
59
+	AWU_TIMEBASE_1S = (uint8_t) 13,   /*!< AWU Timebase equals 1 s */
60
+	AWU_TIMEBASE_2S = (uint8_t) 14,   /*!< AWU Timebase equals 2 s */
61
+	AWU_TIMEBASE_12S = (uint8_t) 15,   /*!< AWU Timebase equals 12 s */
62
+	AWU_TIMEBASE_30S = (uint8_t) 16    /*!< AWU Timebase equals 30 s */
63
+} AWU_Timebase_TypeDef;
64
+
65
+/**
66
+  * @}
67
+  */
68
+
69
+/* Exported constants --------------------------------------------------------*/
70
+
71
+/** @addtogroup AWU_Exported_Constants
72
+  * @{
73
+  */
74
+
75
+#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */
76
+#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */
77
+
78
+/**
79
+  * @}
80
+  */
81
+
82
+/* Exported macros ------------------------------------------------------------*/
83
+
84
+/* Private macros ------------------------------------------------------------*/
85
+
86
+/** @addtogroup AWU_Private_Macros
87
+  * @{
88
+  */
89
+
90
+/**
91
+  * @brief  Macro used by the assert function to check the different functions parameters.
92
+  */
93
+
94
+/**
95
+  * @brief   Macro used by the assert function to check the AWU timebases
96
+  */
97
+#define IS_AWU_TIMEBASE_OK(TB) \
98
+  (((TB) == AWU_TIMEBASE_NO_IT) || \
99
+   ((TB) == AWU_TIMEBASE_250US) || \
100
+   ((TB) == AWU_TIMEBASE_500US) || \
101
+   ((TB) == AWU_TIMEBASE_1MS)   || \
102
+   ((TB) == AWU_TIMEBASE_2MS)   || \
103
+   ((TB) == AWU_TIMEBASE_4MS)   || \
104
+   ((TB) == AWU_TIMEBASE_8MS)   || \
105
+   ((TB) == AWU_TIMEBASE_16MS)  || \
106
+   ((TB) == AWU_TIMEBASE_32MS)  || \
107
+   ((TB) == AWU_TIMEBASE_64MS)  || \
108
+   ((TB) == AWU_TIMEBASE_128MS) || \
109
+   ((TB) == AWU_TIMEBASE_256MS) || \
110
+   ((TB) == AWU_TIMEBASE_512MS) || \
111
+   ((TB) == AWU_TIMEBASE_1S)    || \
112
+   ((TB) == AWU_TIMEBASE_2S)    || \
113
+   ((TB) == AWU_TIMEBASE_12S)   || \
114
+   ((TB) == AWU_TIMEBASE_30S))
115
+
116
+/**
117
+  * @brief    Macro used by the assert function to check the LSI frequency (in Hz)
118
+  */
119
+#define IS_LSI_FREQUENCY_OK(FREQ) \
120
+  (((FREQ) >= LSI_FREQUENCY_MIN) && \
121
+   ((FREQ) <= LSI_FREQUENCY_MAX))
122
+
123
+/**
124
+  * @}
125
+  */
126
+
127
+/* Exported functions ------------------------------------------------------- */
128
+
129
+#if 0
130
+/** @addtogroup AWU_Exported_Functions
131
+  * @{
132
+  */
133
+void AWU_DeInit(void);
134
+
135
+void AWU_Init(AWU_Timebase_TypeDef AWU_TimeBase);
136
+
137
+void AWU_Cmd(FunctionalState NewState);
138
+
139
+void AWU_LSICalibrationConfig(uint32_t LSIFreqHz);
140
+
141
+void AWU_IdleModeEnable(void);
142
+
143
+FlagStatus AWU_GetFlagStatus(void);
144
+
145
+#endif
146
+/**
147
+  * @}
148
+  */
149
+
150
+/** @addtogroup STM8S_StdPeriph_Driver
151
+  * @{
152
+  */
153
+/* Private typedef -----------------------------------------------------------*/
154
+/* Private define ------------------------------------------------------------*/
155
+/* Private macro -------------------------------------------------------------*/
156
+/* Private variables ---------------------------------------------------------*/
157
+/* Private function prototypes -----------------------------------------------*/
158
+/* Private functions ---------------------------------------------------------*/
159
+
160
+/* Public functions ----------------------------------------------------------*/
161
+
162
+/**
163
+  * @addtogroup AWU_Public_Functions
164
+  * @{
165
+  */
166
+
167
+/**
168
+  * @brief  Deinitializes the AWU peripheral registers to their default reset
169
+  * values.
170
+  * @param  None
171
+  * @retval None
172
+  */
173
+inline void AWU_DeInit(void)
174
+{
175
+	AWU->CSR = AWU_CSR_RESET_VALUE;
176
+	AWU->APR = AWU_APR_RESET_VALUE;
177
+	AWU->TBR = AWU_TBR_RESET_VALUE;
178
+}
179
+
180
+/**
181
+  * @brief  Initializes the AWU peripheral according to the specified parameters.
182
+  * @param   AWU_TimeBase : Time base selection (interval between AWU interrupts).
183
+  * can be one of the values of @ref AWU_Timebase_TypeDef.
184
+  * @retval None
185
+  * @par Required preconditions:
186
+  * The LS RC calibration must be performed before calling this function.
187
+  */
188
+inline void AWU_Init(AWU_Timebase_TypeDef AWU_TimeBase)
189
+{
190
+/* See also AWU_Timebase_TypeDef structure in stm8s_awu.h file :
191
+                          N   2   5   1   2   4   8   1   3   6   1   2   5   1   2   1   3
192
+                          O   5   0   m   m   m   m   6   2   4   2   5   1   s   s   2   0
193
+                          I   0   0   s   s   s   s   m   m   m   8   6   2           s   s
194
+                          T   u   u                   s   s   s   m   m   m
195
+                              s   s                               s   s   s
196
+*/
197
+/** Contains the different values to write in the APR register (used by AWU_Init function) */
198
+	static CONST uint8_t APR_Array[17] =
199
+		{
200
+			0, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 61, 23, 23, 62
201
+		};
202
+
203
+/** Contains the different values to write in the TBR register (used by AWU_Init function) */
204
+	static CONST uint8_t TBR_Array[17] =
205
+		{
206
+			0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 12, 14, 15, 15
207
+		};
208
+
209
+	/* Check parameter */
210
+	assert_param(IS_AWU_TIMEBASE_OK(AWU_TimeBase));
211
+
212
+	/* Enable the AWU peripheral */
213
+	AWU->CSR |= AWU_CSR_AWUEN;
214
+
215
+	/* Set the TimeBase */
216
+	AWU->TBR &= (uint8_t) (~AWU_TBR_AWUTB);
217
+	AWU->TBR |= TBR_Array[(uint8_t) AWU_TimeBase];
218
+
219
+	/* Set the APR divider */
220
+	AWU->APR &= (uint8_t) (~AWU_APR_APR);
221
+	AWU->APR |= APR_Array[(uint8_t) AWU_TimeBase];
222
+}
223
+
224
+/**
225
+  * @brief  Enable or disable the AWU peripheral.
226
+  * @param   NewState Indicates the new state of the AWU peripheral.
227
+  * @retval None
228
+  * @par Required preconditions:
229
+  * Initialisation of AWU and LS RC calibration must be done before.
230
+  */
231
+inline void AWU_Cmd(FunctionalState NewState)
232
+{
233
+	if (NewState != DISABLE) {
234
+		/* Enable the AWU peripheral */
235
+		AWU->CSR |= AWU_CSR_AWUEN;
236
+	} else {
237
+		/* Disable the AWU peripheral */
238
+		AWU->CSR &= (uint8_t) (~AWU_CSR_AWUEN);
239
+	}
240
+}
241
+
242
+/**
243
+  * @brief  Update APR register with the measured LSI frequency.
244
+  * @par Note on the APR calculation:
245
+  * A is the integer part of lsifreqkhz/4 and x the decimal part.
246
+  * x <= A/(1+2A) is equivalent to A >= x(1+2A) and also to 4A >= 4x(1+2A) [F1]
247
+  * but we know that A + x = lsifreqkhz/4 ==> 4x = lsifreqkhz-4A
248
+  * so [F1] can be written :
249
+  * 4A >= (lsifreqkhz-4A)(1+2A)
250
+  * @param   LSIFreqHz Low Speed RC frequency measured by timer (in Hz).
251
+  * @retval None
252
+  * @par Required preconditions:
253
+  * - AWU must be disabled to avoid unwanted interrupts.
254
+  */
255
+inline void AWU_LSICalibrationConfig(uint32_t LSIFreqHz)
256
+{
257
+	uint16_t lsifreqkhz = 0x0;
258
+	uint16_t A = 0x0;
259
+
260
+	/* Check parameter */
261
+	assert_param(IS_LSI_FREQUENCY_OK(LSIFreqHz));
262
+
263
+	lsifreqkhz = (uint16_t) (LSIFreqHz / 1000); /* Converts value in kHz */
264
+
265
+	/* Calculation of AWU calibration value */
266
+
267
+	A = (uint16_t) (lsifreqkhz >> 2U); /* Division by 4, keep integer part only */
268
+
269
+	if ((4U * A) >= ((lsifreqkhz - (4U * A)) * (1U + (2U * A)))) {
270
+		AWU->APR = (uint8_t) (A - 2U);
271
+	} else {
272
+		AWU->APR = (uint8_t) (A - 1U);
273
+	}
274
+}
275
+
276
+/**
277
+  * @brief  Configures AWU in Idle mode to reduce power consumption.
278
+  * @param  None
279
+  * @retval None
280
+  */
281
+inline void AWU_IdleModeEnable(void)
282
+{
283
+	/* Disable AWU peripheral */
284
+	AWU->CSR &= (uint8_t) (~AWU_CSR_AWUEN);
285
+
286
+	/* No AWU timebase */
287
+	AWU->TBR = (uint8_t) (~AWU_TBR_AWUTB);
288
+}
289
+
290
+/**
291
+  * @brief  Returns status of the AWU peripheral flag.
292
+  * @param  None
293
+  * @retval FlagStatus : Status of the AWU flag.
294
+  * This parameter can be any of the @ref FlagStatus enumeration.
295
+  */
296
+inline FlagStatus AWU_GetFlagStatus(void)
297
+{
298
+	return ((FlagStatus) (((uint8_t) (AWU->CSR & AWU_CSR_AWUF) == (uint8_t) 0x00) ? RESET : SET));
299
+}
300
+
301
+
302
+/**
303
+  * @}
304
+  */
305
+
306
+/**
307
+  * @}
308
+  */
309
+
310
+
311
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
312
+
313
+
314
+
315
+#endif /* __STM8S_AWU_H */
316
+
317
+
318
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 241 - 0
Library/SPL/stm8s_beep.h View File

@@ -0,0 +1,241 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm8s_beep.h
4
+  * @author  MCD Application Team
5
+  * @version V2.2.0
6
+  * @date    30-September-2014
7
+  * @brief   This file contains all functions prototype and macros for the BEEP peripheral.
8
+   ******************************************************************************
9
+  * @attention
10
+  *
11
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
12
+  *
13
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14
+  * You may not use this file except in compliance with the License.
15
+  * You may obtain a copy of the License at:
16
+  *
17
+  *        http://www.st.com/software_license_agreement_liberty_v2
18
+  *
19
+  * Unless required by applicable law or agreed to in writing, software 
20
+  * distributed under the License is distributed on an "AS IS" BASIS, 
21
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22
+  * See the License for the specific language governing permissions and
23
+  * limitations under the License.
24
+  *
25
+  ******************************************************************************
26
+  */
27
+
28
+
29
+/* Define to prevent recursive inclusion -------------------------------------*/
30
+#ifndef __STM8S_BEEP_H
31
+#define __STM8S_BEEP_H
32
+
33
+/* Includes ------------------------------------------------------------------*/
34
+#include "stm8s.h"
35
+
36
+/* Exported types ------------------------------------------------------------*/
37
+
38
+/** @addtogroup BEEP_Exported_Types
39
+  * @{
40
+  */
41
+
42
+/**
43
+  * @brief  BEEP Frequency selection
44
+  */
45
+typedef enum {
46
+	BEEP_FREQUENCY_1KHZ = (uint8_t) 0x00,  /*!< Beep signal output frequency equals to 1 KHz */
47
+	BEEP_FREQUENCY_2KHZ = (uint8_t) 0x40,  /*!< Beep signal output frequency equals to 2 KHz */
48
+	BEEP_FREQUENCY_4KHZ = (uint8_t) 0x80   /*!< Beep signal output frequency equals to 4 KHz */
49
+} BEEP_Frequency_TypeDef;
50
+
51
+/**
52
+  * @}
53
+  */
54
+
55
+/* Exported constants --------------------------------------------------------*/
56
+
57
+/** @addtogroup BEEP_Exported_Constants
58
+  * @{
59
+  */
60
+
61
+#define BEEP_CALIBRATION_DEFAULT ((uint8_t)0x0B) /*!< Default value when calibration is not done */
62
+
63
+#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */
64
+#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */
65
+
66
+/**
67
+  * @}
68
+  */
69
+
70
+/* Exported macros -----------------------------------------------------------*/
71
+/* Private macros ------------------------------------------------------------*/
72
+
73
+/** @addtogroup BEEP_Private_Macros
74
+  * @{
75
+  */
76
+
77
+/**
78
+  * @brief  Macro used by the assert function to check the different functions parameters.
79
+  */
80
+
81
+/**
82
+  * @brief  Macro used by the assert function to check the BEEP frequencies.
83
+  */
84
+#define IS_BEEP_FREQUENCY_OK(FREQ) \
85
+  (((FREQ) == BEEP_FREQUENCY_1KHZ) || \
86
+   ((FREQ) == BEEP_FREQUENCY_2KHZ) || \
87
+   ((FREQ) == BEEP_FREQUENCY_4KHZ))
88
+
89
+/**
90
+  * @brief   Macro used by the assert function to check the LSI frequency (in Hz).
91
+  */
92
+#define IS_LSI_FREQUENCY_OK(FREQ) \
93
+  (((FREQ) >= LSI_FREQUENCY_MIN) && \
94
+   ((FREQ) <= LSI_FREQUENCY_MAX))
95
+
96
+/**
97
+  * @}
98
+  */
99
+
100
+/* Exported functions ------------------------------------------------------- */
101
+
102
+/** @addtogroup BEEP_Exported_Functions
103
+  * @{
104
+  */
105
+
106
+#if 0
107
+void BEEP_DeInit(void);
108
+
109
+void BEEP_Init(BEEP_Frequency_TypeDef BEEP_Frequency);
110
+
111
+void BEEP_Cmd(FunctionalState NewState);
112
+
113
+void BEEP_LSICalibrationConfig(uint32_t LSIFreqHz);
114
+#endif
115
+
116
+/**
117
+  * @}
118
+  */
119
+
120
+
121
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
122
+
123
+/** @addtogroup STM8S_StdPeriph_Driver
124
+  * @{
125
+  */
126
+/* Private typedef -----------------------------------------------------------*/
127
+/* Private define ------------------------------------------------------------*/
128
+/* Private macro -------------------------------------------------------------*/
129
+/* Private variables ---------------------------------------------------------*/
130
+/* Private function prototypes -----------------------------------------------*/
131
+/* Private functions ---------------------------------------------------------*/
132
+
133
+/* Public functions ----------------------------------------------------------*/
134
+
135
+/**
136
+  * @addtogroup BEEP_Public_Functions
137
+  * @{
138
+  */
139
+
140
+/**
141
+  * @brief  Deinitializes the BEEP peripheral registers to their default reset
142
+  * values.
143
+  * @param  None
144
+  * @retval None
145
+  */
146
+inline void BEEP_DeInit(void)
147
+{
148
+	BEEP->CSR = BEEP_CSR_RESET_VALUE;
149
+}
150
+
151
+/**
152
+  * @brief  Initializes the BEEP function according to the specified parameters.
153
+  * @param   BEEP_Frequency Frequency selection.
154
+  * can be one of the values of @ref BEEP_Frequency_TypeDef.
155
+  * @retval None
156
+  * @par Required preconditions:
157
+  * The LS RC calibration must be performed before calling this function.
158
+  */
159
+inline void BEEP_Init(BEEP_Frequency_TypeDef BEEP_Frequency)
160
+{
161
+	/* Check parameter */
162
+	assert_param(IS_BEEP_FREQUENCY_OK(BEEP_Frequency));
163
+
164
+	/* Set a default calibration value if no calibration is done */
165
+	if ((BEEP->CSR & BEEP_CSR_BEEPDIV) == BEEP_CSR_BEEPDIV) {
166
+		BEEP->CSR &= (uint8_t) (~BEEP_CSR_BEEPDIV); /* Clear bits */
167
+		BEEP->CSR |= BEEP_CALIBRATION_DEFAULT;
168
+	}
169
+
170
+	/* Select the output frequency */
171
+	BEEP->CSR &= (uint8_t) (~BEEP_CSR_BEEPSEL);
172
+	BEEP->CSR |= (uint8_t) (BEEP_Frequency);
173
+}
174
+
175
+/**
176
+  * @brief  Enable or disable the BEEP function.
177
+  * @param   NewState Indicates the new state of the BEEP function.
178
+  * @retval None
179
+  * @par Required preconditions:
180
+  * Initialisation of BEEP and LS RC calibration must be done before.
181
+  */
182
+inline void BEEP_Cmd(FunctionalState NewState)
183
+{
184
+	if (NewState != DISABLE) {
185
+		/* Enable the BEEP peripheral */
186
+		BEEP->CSR |= BEEP_CSR_BEEPEN;
187
+	} else {
188
+		/* Disable the BEEP peripheral */
189
+		BEEP->CSR &= (uint8_t) (~BEEP_CSR_BEEPEN);
190
+	}
191
+}
192
+
193
+/**
194
+  * @brief  Update CSR register with the measured LSI frequency.
195
+  * @par Note on the APR calculation:
196
+  * A is the integer part of LSIFreqkHz/4 and x the decimal part.
197
+  * x <= A/(1+2A) is equivalent to A >= x(1+2A) and also to 4A >= 4x(1+2A) [F1]
198
+  * but we know that A + x = LSIFreqkHz/4 ==> 4x = LSIFreqkHz-4A
199
+  * so [F1] can be written :
200
+  * 4A >= (LSIFreqkHz-4A)(1+2A)
201
+  * @param   LSIFreqHz Low Speed RC frequency measured by timer (in Hz).
202
+  * @retval None
203
+  * @par Required preconditions:
204
+  * - BEEP must be disabled to avoid unwanted interrupts.
205
+  */
206
+inline void BEEP_LSICalibrationConfig(uint32_t LSIFreqHz)
207
+{
208
+	uint16_t lsifreqkhz;
209
+	uint16_t A;
210
+
211
+	/* Check parameter */
212
+	assert_param(IS_LSI_FREQUENCY_OK(LSIFreqHz));
213
+
214
+	lsifreqkhz = (uint16_t) (LSIFreqHz / 1000); /* Converts value in kHz */
215
+
216
+	/* Calculation of BEEPER calibration value */
217
+
218
+	BEEP->CSR &= (uint8_t) (~BEEP_CSR_BEEPDIV); /* Clear bits */
219
+
220
+	A = (uint16_t) (lsifreqkhz >> 3U); /* Division by 8, keep integer part only */
221
+
222
+	if ((8U * A) >= ((lsifreqkhz - (8U * A)) * (1U + (2U * A)))) {
223
+		BEEP->CSR |= (uint8_t) (A - 2U);
224
+	} else {
225
+		BEEP->CSR |= (uint8_t) (A - 1U);
226
+	}
227
+}
228
+
229
+/**
230
+  * @}
231
+  */
232
+
233
+/**
234
+  * @}
235
+  */
236
+
237
+
238
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
239
+
240
+
241
+#endif /* __STM8S_BEEP_H */

File diff suppressed because it is too large
+ 1059 - 0
Library/SPL/stm8s_clk.h


+ 293 - 0
Library/SPL/stm8s_exti.h View File

@@ -0,0 +1,293 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm8s_exti.h
4
+  * @author  MCD Application Team
5
+  * @version V2.2.0
6
+  * @date    30-September-2014
7
+  * @brief   This file contains all functions prototype and macros for the EXTI peripheral.
8
+   ******************************************************************************
9
+  * @attention
10
+  *
11
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
12
+  *
13
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14
+  * You may not use this file except in compliance with the License.
15
+  * You may obtain a copy of the License at:
16
+  *
17
+  *        http://www.st.com/software_license_agreement_liberty_v2
18
+  *
19
+  * Unless required by applicable law or agreed to in writing, software 
20
+  * distributed under the License is distributed on an "AS IS" BASIS, 
21
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22
+  * See the License for the specific language governing permissions and
23
+  * limitations under the License.
24
+  *
25
+  ******************************************************************************
26
+  */
27
+
28
+/* Define to prevent recursive inclusion -------------------------------------*/
29
+#ifndef __STM8S_EXTI_H
30
+#define __STM8S_EXTI_H
31
+
32
+/* Includes ------------------------------------------------------------------*/
33
+#include "stm8s.h"
34
+
35
+/* Exported types ------------------------------------------------------------*/
36
+
37
+/** @addtogroup EXTI_Exported_Types
38
+  * @{
39
+  */
40
+
41
+/**
42
+  * @brief  EXTI Sensitivity values for PORTA to PORTE
43
+  */
44
+typedef enum {
45
+	EXTI_SENSITIVITY_FALL_LOW = (uint8_t) 0x00, /*!< Interrupt on Falling edge and Low level */
46
+	EXTI_SENSITIVITY_RISE_ONLY = (uint8_t) 0x01, /*!< Interrupt on Rising edge only */
47
+	EXTI_SENSITIVITY_FALL_ONLY = (uint8_t) 0x02, /*!< Interrupt on Falling edge only */
48
+	EXTI_SENSITIVITY_RISE_FALL = (uint8_t) 0x03  /*!< Interrupt on Rising and Falling edges */
49
+} EXTI_Sensitivity_TypeDef;
50
+
51
+/**
52
+  * @brief  EXTI Sensitivity values for TLI
53
+  */
54
+typedef enum {
55
+	EXTI_TLISENSITIVITY_FALL_ONLY = (uint8_t) 0x00, /*!< Top Level Interrupt on Falling edge only */
56
+	EXTI_TLISENSITIVITY_RISE_ONLY = (uint8_t) 0x04  /*!< Top Level Interrupt on Rising edge only */
57
+} EXTI_TLISensitivity_TypeDef;
58
+
59
+/**
60
+  * @brief  EXTI PortNum possible values
61
+  */
62
+typedef enum {
63
+	EXTI_PORT_GPIOA = (uint8_t) 0x00, /*!< GPIO Port A */
64
+	EXTI_PORT_GPIOB = (uint8_t) 0x01, /*!< GPIO Port B */
65
+	EXTI_PORT_GPIOC = (uint8_t) 0x02, /*!< GPIO Port C */
66
+	EXTI_PORT_GPIOD = (uint8_t) 0x03, /*!< GPIO Port D */
67
+	EXTI_PORT_GPIOE = (uint8_t) 0x04  /*!< GPIO Port E */
68
+} EXTI_Port_TypeDef;
69
+
70
+/**
71
+  * @}
72
+  */
73
+
74
+/* Private macros ------------------------------------------------------------*/
75
+
76
+/** @addtogroup EXTI_Private_Macros
77
+  * @{
78
+  */
79
+
80
+/**
81
+  * @brief  Macro used by the assert function in order to check the different sensitivity values for PORTA to PORTE.
82
+  */
83
+#define IS_EXTI_SENSITIVITY_OK(SensitivityValue) \
84
+  (((SensitivityValue) == EXTI_SENSITIVITY_FALL_LOW) || \
85
+   ((SensitivityValue) == EXTI_SENSITIVITY_RISE_ONLY) || \
86
+   ((SensitivityValue) == EXTI_SENSITIVITY_FALL_ONLY) || \
87
+   ((SensitivityValue) == EXTI_SENSITIVITY_RISE_FALL))
88
+
89
+/**
90
+  * @brief  Macro used by the assert function in order to check the different sensitivity values for TLI.
91
+  */
92
+#define IS_EXTI_TLISENSITIVITY_OK(SensitivityValue) \
93
+  (((SensitivityValue) == EXTI_TLISENSITIVITY_FALL_ONLY) || \
94
+   ((SensitivityValue) == EXTI_TLISENSITIVITY_RISE_ONLY))
95
+
96
+/**
97
+  * @brief  Macro used by the assert function in order to check the different Port values
98
+  */
99
+#define IS_EXTI_PORT_OK(PORT) \
100
+  (((PORT) == EXTI_PORT_GPIOA) ||\
101
+   ((PORT) == EXTI_PORT_GPIOB) ||\
102
+   ((PORT) == EXTI_PORT_GPIOC) ||\
103
+   ((PORT) == EXTI_PORT_GPIOD) ||\
104
+   ((PORT) == EXTI_PORT_GPIOE))
105
+
106
+/**
107
+  * @brief  Macro used by the assert function in order to check the different values of the EXTI PinMask
108
+  */
109
+#define IS_EXTI_PINMASK_OK(PinMask) ((((PinMask) & (uint8_t)0x00) == (uint8_t)0x00) && ((PinMask) != (uint8_t)0x00))
110
+
111
+/**
112
+  * @}
113
+  */
114
+
115
+/* Exported functions ------------------------------------------------------- */
116
+
117
+/** @addtogroup EXTI_Exported_Functions
118
+  * @{
119
+  */
120
+
121
+#if 0
122
+void EXTI_DeInit(void);
123
+
124
+void EXTI_SetExtIntSensitivity(EXTI_Port_TypeDef Port, EXTI_Sensitivity_TypeDef SensitivityValue);
125
+
126
+void EXTI_SetTLISensitivity(EXTI_TLISensitivity_TypeDef SensitivityValue);
127
+
128
+EXTI_Sensitivity_TypeDef EXTI_GetExtIntSensitivity(EXTI_Port_TypeDef Port);
129
+
130
+EXTI_TLISensitivity_TypeDef EXTI_GetTLISensitivity(void);
131
+
132
+#endif
133
+
134
+
135
+/** @addtogroup STM8S_StdPeriph_Driver
136
+  * @{
137
+  */
138
+/* Private typedef -----------------------------------------------------------*/
139
+/* Private define ------------------------------------------------------------*/
140
+/* Private macro -------------------------------------------------------------*/
141
+/* Private variables ---------------------------------------------------------*/
142
+/* Private function prototypes -----------------------------------------------*/
143
+/* Private functions ---------------------------------------------------------*/
144
+
145
+/* Public functions ----------------------------------------------------------*/
146
+
147
+/**
148
+  * @addtogroup EXTI_Public_Functions
149
+  * @{
150
+  */
151
+
152
+/**
153
+  * @brief  Deinitializes the external interrupt control registers to their default reset value.
154
+  * @param  None
155
+  * @retval None
156
+  */
157
+inline void EXTI_DeInit(void)
158
+{
159
+	EXTI->CR1 = EXTI_CR1_RESET_VALUE;
160
+	EXTI->CR2 = EXTI_CR2_RESET_VALUE;
161
+}
162
+
163
+/**
164
+  * @brief  Set the external interrupt sensitivity of the selected port.
165
+  * @warning
166
+  * - The modification of external interrupt sensitivity is only possible when the interrupts are disabled.
167
+  * - The normal behavior is to disable the interrupts before calling this function, and re-enable them after.
168
+  * @param   Port The port number to access.
169
+  * @param   SensitivityValue The external interrupt sensitivity value to set.
170
+  * @retval None
171
+  * @par Required preconditions:
172
+  * Global interrupts must be disabled before calling this function.
173
+  */
174
+inline void EXTI_SetExtIntSensitivity(EXTI_Port_TypeDef Port, EXTI_Sensitivity_TypeDef SensitivityValue)
175
+{
176
+	/* Check function parameters */
177
+	assert_param(IS_EXTI_PORT_OK(Port));
178
+	assert_param(IS_EXTI_SENSITIVITY_OK(SensitivityValue));
179
+
180
+	/* Set external interrupt sensitivity */
181
+	switch (Port) {
182
+		case EXTI_PORT_GPIOA:
183
+			EXTI->CR1 &= (uint8_t) (~EXTI_CR1_PAIS);
184
+			EXTI->CR1 |= (uint8_t) (SensitivityValue);
185
+			break;
186
+		case EXTI_PORT_GPIOB:
187
+			EXTI->CR1 &= (uint8_t) (~EXTI_CR1_PBIS);
188
+			EXTI->CR1 |= (uint8_t) ((uint8_t) (SensitivityValue) << 2);
189
+			break;
190
+		case EXTI_PORT_GPIOC:
191
+			EXTI->CR1 &= (uint8_t) (~EXTI_CR1_PCIS);
192
+			EXTI->CR1 |= (uint8_t) ((uint8_t) (SensitivityValue) << 4);
193
+			break;
194
+		case EXTI_PORT_GPIOD:
195
+			EXTI->CR1 &= (uint8_t) (~EXTI_CR1_PDIS);
196
+			EXTI->CR1 |= (uint8_t) ((uint8_t) (SensitivityValue) << 6);
197
+			break;
198
+		case EXTI_PORT_GPIOE:
199
+			EXTI->CR2 &= (uint8_t) (~EXTI_CR2_PEIS);
200
+			EXTI->CR2 |= (uint8_t) (SensitivityValue);
201
+			break;
202
+		default:
203
+			break;
204
+	}
205
+}
206
+
207
+/**
208
+  * @brief  Set the TLI interrupt sensitivity.
209
+  * @param   SensitivityValue The TLI interrupt sensitivity value.
210
+  * @retval None
211
+  * @par Required preconditions:
212
+  * Global interrupts must be disabled before calling this function.
213
+  */
214
+inline void EXTI_SetTLISensitivity(EXTI_TLISensitivity_TypeDef SensitivityValue)
215
+{
216
+	/* Check function parameters */
217
+	assert_param(IS_EXTI_TLISENSITIVITY_OK(SensitivityValue));
218
+
219
+	/* Set TLI interrupt sensitivity */
220
+	EXTI->CR2 &= (uint8_t) (~EXTI_CR2_TLIS);
221
+	EXTI->CR2 |= (uint8_t) (SensitivityValue);
222
+}
223
+
224
+/**
225
+  * @brief  Get the external interrupt sensitivity of the selected port.
226
+  * @param   Port The port number to access.
227
+  * @retval EXTI_Sensitivity_TypeDef The external interrupt sensitivity of the selected port.
228
+  */
229
+inline EXTI_Sensitivity_TypeDef EXTI_GetExtIntSensitivity(EXTI_Port_TypeDef Port)
230
+{
231
+	uint8_t value = 0;
232
+
233
+	/* Check function parameters */
234
+	assert_param(IS_EXTI_PORT_OK(Port));
235
+
236
+	switch (Port) {
237
+		case EXTI_PORT_GPIOA:
238
+			value = (uint8_t) (EXTI->CR1 & EXTI_CR1_PAIS);
239
+			break;
240
+		case EXTI_PORT_GPIOB:
241
+			value = (uint8_t) ((uint8_t) (EXTI->CR1 & EXTI_CR1_PBIS) >> 2);
242
+			break;
243
+		case EXTI_PORT_GPIOC:
244
+			value = (uint8_t) ((uint8_t) (EXTI->CR1 & EXTI_CR1_PCIS) >> 4);
245
+			break;
246
+		case EXTI_PORT_GPIOD:
247
+			value = (uint8_t) ((uint8_t) (EXTI->CR1 & EXTI_CR1_PDIS) >> 6);
248
+			break;
249
+		case EXTI_PORT_GPIOE:
250
+			value = (uint8_t) (EXTI->CR2 & EXTI_CR2_PEIS);
251
+			break;
252
+		default:
253
+			break;
254
+	}
255
+
256
+	return ((EXTI_Sensitivity_TypeDef) value);
257
+}
258
+
259
+/**
260
+  * @brief  Get the TLI interrupt sensitivity.
261
+  * @param  None
262
+  * @retval EXTI_TLISensitivity_TypeDef The TLI interrupt sensitivity read.
263
+  */
264
+inline EXTI_TLISensitivity_TypeDef EXTI_GetTLISensitivity(void)
265
+{
266
+	uint8_t value = 0;
267
+
268
+	/* Get TLI interrupt sensitivity */
269
+	value = (uint8_t) (EXTI->CR2 & EXTI_CR2_TLIS);
270
+
271
+	return ((EXTI_TLISensitivity_TypeDef) value);
272
+}
273
+
274
+/**
275
+  * @}
276
+  */
277
+
278
+/**
279
+  * @}
280
+  */
281
+
282
+
283
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
284
+
285
+
286
+/**
287
+  * @}
288
+  */
289
+
290
+#endif /* __STM8S_EXTI_H */
291
+
292
+
293
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 785 - 0
Library/SPL/stm8s_flash.c View File

@@ -0,0 +1,785 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm8s_flash.c
4
+  * @author  MCD Application Team
5
+  * @version V2.2.0
6
+  * @date    30-September-2014
7
+  * @brief   This file contains all the functions for the FLASH peripheral.
8
+   ******************************************************************************
9
+  * @attention
10
+  *
11
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
12
+  *
13
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14
+  * You may not use this file except in compliance with the License.
15
+  * You may obtain a copy of the License at:
16
+  *
17
+  *        http://www.st.com/software_license_agreement_liberty_v2
18
+  *
19
+  * Unless required by applicable law or agreed to in writing, software 
20
+  * distributed under the License is distributed on an "AS IS" BASIS, 
21
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22
+  * See the License for the specific language governing permissions and
23
+  * limitations under the License.
24
+  *
25
+  ******************************************************************************
26
+  */
27
+
28
+/* Includes ------------------------------------------------------------------*/
29
+#include "stm8s_flash.h"
30
+
31
+/** @addtogroup STM8S_StdPeriph_Driver
32
+  * @{
33
+  */
34
+/**
35
+@code
36
+ This driver provides functions to configure and program the Flash memory of all
37
+ STM8S devices.
38
+
39
+ It includes as well functions that can be either executed from RAM or not, and
40
+ other functions that must be executed from RAM otherwise useless.
41
+
42
+ The table below lists the functions that can be executed from RAM.
43
+
44
+ +--------------------------------------------------------------------------------|
45
+ |   Functions prototypes      |    RAM execution            |     Comments       |
46
+ ---------------------------------------------------------------------------------|
47
+ |                             | Mandatory in case of block  | Can be executed    |
48
+ | FLASH_WaitForLastOperation  | Operation:                  | from Flash in case |
49
+ |                             | - Block programming         | of byte and word   |
50
+ |                             | - Block erase               | Operations         |
51
+ |--------------------------------------------------------------------------------|
52
+ | FLASH_ProgramBlock          |       Exclusively           | useless from Flash |
53
+ |--------------------------------------------------------------------------------|
54
+ | FLASH_EraseBlock            |       Exclusively           | useless from Flash |
55
+ |--------------------------------------------------------------------------------|
56
+
57
+ To be able to execute functions from RAM several steps have to be followed.
58
+ These steps may differ from one toolchain to another.
59
+ A detailed description is available below within this driver.
60
+ You can also refer to the FLASH examples provided within the
61
+ STM8S_StdPeriph_Lib package.
62
+
63
+@endcode
64
+*/
65
+
66
+
67
+/* Private typedef -----------------------------------------------------------*/
68
+/* Private define ------------------------------------------------------------*/
69
+#define _FLASH_FLASH_CLEAR_BYTE    ((uint8_t)0x00)
70
+#define _FLASH_FLASH_SET_BYTE      ((uint8_t)0xFF)
71
+#define _FLASH_OPERATION_TIMEOUT   ((uint16_t)0xFFFF)
72
+/* Private macro -------------------------------------------------------------*/
73
+/* Private variables ---------------------------------------------------------*/
74
+
75
+// SDCC patch: for passing args to inline ASM (SDCC doesn't support far pointers yet)
76
+#if defined (_SDCC_)
77
+uint32_t asm_addr;      // 16b/24b address
78
+uint8_t asm_val;       // 1B data for r/w data
79
+#endif // _SDCC_
80
+
81
+/* Private function prototypes -----------------------------------------------*/
82
+
83
+// SDCC patch: r/w for 16b/24b addresses (SDCC doesn't support far pointers yet)
84
+#if defined (_SDCC_)
85
+
86
+void write_byte_address(uint16_t Address, uint8_t Data);   // write single byte to 16b/24b address
87
+uint8_t read_byte_address(uint32_t Address);                  // read single byte from 16b/24b address
88
+#endif // _SDCC_
89
+
90
+/* Private Constants ---------------------------------------------------------*/
91
+
92
+/** @addtogroup FLASH_Private_functions
93
+  * @{
94
+  */
95
+
96
+#if defined (_SDCC_)
97
+
98
+/**
99
+  * @brief  write single byte to address
100
+  * @note   is required for SDCC, which doesn't yet support far pointers.
101
+  *         For simplicity 16- and 24-bit pointers are treated identically.
102
+  * @param  Address : Address of the byte to copy
103
+  *         Data :    Value to be copied
104
+  * @retval None
105
+  */
106
+void write_byte_address(uint16_t Address, uint8_t Data)
107
+{
108
+	/* store address & data globally for assember */
109
+	asm_addr = Address;
110
+	asm_val = Data;
111
+
112
+	/* use inline assembler to write to 16b/24b address */
113
+	__asm
114
+	ld    a, _asm_val
115
+	ldf[_asm_addr + 1].e, a
116
+	__endasm;
117
+
118
+}
119
+
120
+
121
+/**
122
+  * @brief  Reads any byte from flash memory
123
+  * @note   is required for SDCC, which doesn't yet support far pointers.
124
+  *         For simplicity 16- and 24-bit pointers are treated identically.
125
+  * @param  Address : Address to read
126
+  * @retval Value of the byte
127
+  */
128
+uint8_t read_byte_address(uint32_t Address)
129
+{
130
+	/* store address globally for assember */
131
+	asm_addr = Address;
132
+
133
+	/* use inline assembler to read from 16b/24b address */
134
+	__asm
135
+	ldf    a,[_asm_addr+1].e
136
+	ld _asm_val, a
137
+	__endasm;
138
+
139
+	/* return read byte */
140
+	return (asm_val);
141
+
142
+}
143
+
144
+#endif // _SDCC_
145
+
146
+/**
147
+  * @}
148
+  */
149
+
150
+
151
+
152
+/** @addtogroup FLASH_Public_functions
153
+  * @{
154
+  */
155
+
156
+/**
157
+  * @brief  Unlocks the program or data EEPROM memory
158
+  * @param  FLASH_MemType : Memory type to unlock
159
+  *         This parameter can be a value of @ref FLASH_MemType_TypeDef
160
+  * @retval None
161
+  */
162
+void FLASH_Unlock(FLASH_MemType_TypeDef FLASH_MemType)
163
+{
164
+	/* Check parameter */
165
+	assert_param(IS_MEMORY_TYPE_OK(FLASH_MemType));
166
+
167
+	/* Unlock program memory */
168
+	if (FLASH_MemType == FLASH_MEMTYPE_PROG) {
169
+		FLASH->PUKR = FLASH_RASS_KEY1;
170
+		FLASH->PUKR = FLASH_RASS_KEY2;
171
+	}
172
+		/* Unlock data memory */
173
+	else {
174
+		FLASH->DUKR = FLASH_RASS_KEY2; /* Warning: keys are reversed on data memory !!! */
175
+		FLASH->DUKR = FLASH_RASS_KEY1;
176
+	}
177
+}
178
+
179
+/**
180
+  * @brief  Locks the program or data EEPROM memory
181
+  * @param  FLASH_MemType : Memory type
182
+  *         This parameter can be a value of @ref FLASH_MemType_TypeDef
183
+  * @retval None
184
+  */
185
+void FLASH_Lock(FLASH_MemType_TypeDef FLASH_MemType)
186
+{
187
+	/* Check parameter */
188
+	assert_param(IS_MEMORY_TYPE_OK(FLASH_MemType));
189
+
190
+	/* Lock memory */
191
+	FLASH->IAPSR &= (uint8_t) FLASH_MemType;
192
+}
193
+
194
+/**
195
+  * @brief  DeInitializes the FLASH registers to their default reset values.
196
+  * @param  None
197
+  * @retval None
198
+  */
199
+void FLASH_DeInit(void)
200
+{
201
+	FLASH->CR1 = FLASH_CR1_RESET_VALUE;
202
+	FLASH->CR2 = FLASH_CR2_RESET_VALUE;
203
+	FLASH->NCR2 = FLASH_NCR2_RESET_VALUE;
204
+	FLASH->IAPSR &= (uint8_t) (~FLASH_IAPSR_DUL);
205
+	FLASH->IAPSR &= (uint8_t) (~FLASH_IAPSR_PUL);
206
+	(void) FLASH->IAPSR; /* Reading of this register causes the clearing of status flags */
207
+}
208
+
209
+/**
210
+  * @brief  Enables or Disables the Flash interrupt mode
211
+  * @param  NewState : The new state of the flash interrupt mode
212
+  *         This parameter can be a value of @ref FunctionalState enumeration.
213
+  * @retval None
214
+  */
215
+void FLASH_ITConfig(FunctionalState NewState)
216
+{
217
+	/* Check parameter */
218
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
219
+
220
+	if (NewState != DISABLE) {
221
+		FLASH->CR1 |= FLASH_CR1_IE; /* Enables the interrupt sources */
222
+	} else {
223
+		FLASH->CR1 &= (uint8_t) (~FLASH_CR1_IE); /* Disables the interrupt sources */
224
+	}
225
+}
226
+
227
+/**
228
+  * @brief  Erases one byte in the program or data EEPROM memory
229
+  * @note   PointerAttr define is declared in the stm8s.h file to select if 
230
+  *         the pointer will be declared as near (2 bytes) or far (3 bytes).
231
+  * @param  Address : Address of the byte to erase
232
+  * @retval None
233
+  */
234
+void FLASH_EraseByte(uint32_t Address)
235
+{
236
+	/* Check parameter */
237
+	assert_param(IS_FLASH_ADDRESS_OK(Address));
238
+
239
+	/* Erase byte */
240
+#ifndef _SDCC_
241
+	*(PointerAttr uint8_t*) (MemoryAddressCast)Address = _FLASH_FLASH_CLEAR_BYTE;
242
+#else
243
+	write_byte_address(Address, _FLASH_FLASH_CLEAR_BYTE);    // SDCC patch: required for far pointers
244
+#endif // _SDCC_
245
+
246
+}
247
+
248
+/**
249
+  * @brief  Programs one byte in program or data EEPROM memory
250
+  * @note   PointerAttr define is declared in the stm8s.h file to select if 
251
+  *         the pointer will be declared as near (2 bytes) or far (3 bytes).
252
+  * @param  Address : Address where the byte will be programmed
253
+  * @param  Data : Value to be programmed
254
+  * @retval None
255
+  */
256
+void FLASH_ProgramByte(uint32_t Address, uint8_t Data)
257
+{
258
+	/* Check parameters */
259
+	assert_param(IS_FLASH_ADDRESS_OK(Address));
260
+
261
+	/* Program byte */
262
+#ifndef _SDCC_
263
+	*(PointerAttr uint8_t*) (MemoryAddressCast)Address = Data;
264
+#else
265
+	write_byte_address(Address, Data);    // SDCC patch: required for far pointers
266
+#endif // _SDCC_
267
+
268
+}
269
+
270
+/**
271
+  * @brief  Reads any byte from flash memory
272
+  * @note   PointerAttr define is declared in the stm8s.h file to select if 
273
+  *         the pointer will be declared as near (2 bytes) or far (3 bytes).
274
+  * @param  Address : Address to read
275
+  * @retval Value of the byte
276
+  */
277
+uint8_t FLASH_ReadByte(uint32_t Address)
278
+{
279
+	/* Check parameter */
280
+	assert_param(IS_FLASH_ADDRESS_OK(Address));
281
+
282
+	/* Read byte */
283
+#ifndef _SDCC_
284
+	return(*(PointerAttr uint8_t *) (MemoryAddressCast)Address);
285
+#else
286
+	return (read_byte_address(Address));    // SDCC patch: required for far pointers
287
+#endif // _SDCC_
288
+}
289
+
290
+/**
291
+  * @brief  Programs one word (4 bytes) in program or data EEPROM memory
292
+  * @note   PointerAttr define is declared in the stm8s.h file to select if 
293
+  *         the pointer will be declared as near (2 bytes) or far (3 bytes).
294
+  * @param  Address : The address where the data will be programmed
295
+  * @param  Data : Value to be programmed
296
+  * @retval None
297
+  */
298
+void FLASH_ProgramWord(uint32_t Address, uint32_t Data)
299
+{
300
+	/* Check parameters */
301
+	assert_param(IS_FLASH_ADDRESS_OK(Address));
302
+
303
+	/* Enable Word Write Once */
304
+	FLASH->CR2 |= FLASH_CR2_WPRG;
305
+	FLASH->NCR2 &= (uint8_t) (~FLASH_NCR2_NWPRG);
306
+
307
+#ifndef _SDCC_
308
+	/* Write one byte - from lowest address*/
309
+	*((PointerAttr uint8_t*)(MemoryAddressCast)Address)       = *((uint8_t*)(&Data));
310
+	/* Write one byte*/
311
+	*(((PointerAttr uint8_t*)(MemoryAddressCast)Address) + 1) = *((uint8_t*)(&Data)+1);
312
+	/* Write one byte*/
313
+	*(((PointerAttr uint8_t*)(MemoryAddressCast)Address) + 2) = *((uint8_t*)(&Data)+2);
314
+	/* Write one byte - from higher address*/
315
+	*(((PointerAttr uint8_t*)(MemoryAddressCast)Address) + 3) = *((uint8_t*)(&Data)+3);
316
+#else
317
+	write_byte_address(Address, *((uint8_t *) (&Data)));    // SDCC patch: required for far pointers
318
+	write_byte_address(Address + 1, *((uint8_t *) (&Data) + 1));
319
+	write_byte_address(Address + 2, *((uint8_t *) (&Data) + 2));
320
+	write_byte_address(Address + 3, *((uint8_t *) (&Data) + 3));
321
+#endif // _SDCC_
322
+}
323
+
324
+/**
325
+  * @brief  Programs option byte
326
+  * @param  Address : option byte address to program
327
+  * @param  Data : Value to write
328
+  * @retval None
329
+  */
330
+void FLASH_ProgramOptionByte(uint16_t Address, uint8_t Data)
331
+{
332
+	/* Check parameter */
333
+	assert_param(IS_OPTION_BYTE_ADDRESS_OK(Address));
334
+
335
+	/* Enable write access to option bytes */
336
+	FLASH->CR2 |= FLASH_CR2_OPT;
337
+	FLASH->NCR2 &= (uint8_t) (~FLASH_NCR2_NOPT);
338
+
339
+	/* check if the option byte to program is ROP*/
340
+	if (Address == 0x4800) {
341
+		/* Program option byte*/
342
+		*((NEAR uint8_t *) Address) = Data;
343
+	} else {
344
+		/* Program option byte and his complement */
345
+		*((NEAR uint8_t *) Address) = Data;
346
+		*((NEAR uint8_t *) ((uint16_t) (Address + 1))) = (uint8_t) (~Data);
347
+	}
348
+	FLASH_WaitForLastOperation(FLASH_MEMTYPE_PROG);
349
+
350
+	/* Disable write access to option bytes */
351
+	FLASH->CR2 &= (uint8_t) (~FLASH_CR2_OPT);
352
+	FLASH->NCR2 |= FLASH_NCR2_NOPT;
353
+}
354
+
355
+/**
356
+  * @brief  Erases option byte
357
+  * @param  Address : Option byte address to erase
358
+  * @retval None
359
+  */
360
+void FLASH_EraseOptionByte(uint16_t Address)
361
+{
362
+	/* Check parameter */
363
+	//assert_param(IS_OPTION_BYTE_ADDRESS_OK(Address));
364
+
365
+	/* Enable write access to option bytes */
366
+	FLASH->CR2 |= FLASH_CR2_OPT;
367
+	FLASH->NCR2 &= (uint8_t) (~FLASH_NCR2_NOPT);
368
+
369
+	/* check if the option byte to erase is ROP */
370
+	if (Address == 0x4800) {
371
+		/* Erase option byte */
372
+		*((NEAR uint8_t *) Address) = _FLASH_FLASH_CLEAR_BYTE;
373
+	} else {
374
+		/* Erase option byte and his complement */
375
+		*((NEAR uint8_t *) Address) = _FLASH_FLASH_CLEAR_BYTE;
376
+		*((NEAR uint8_t *) ((uint16_t) (Address + (uint16_t) 1))) = _FLASH_FLASH_SET_BYTE;
377
+	}
378
+	FLASH_WaitForLastOperation(FLASH_MEMTYPE_PROG);
379
+
380
+	/* Disable write access to option bytes */
381
+	FLASH->CR2 &= (uint8_t) (~FLASH_CR2_OPT);
382
+	FLASH->NCR2 |= FLASH_NCR2_NOPT;
383
+}
384
+
385
+/**
386
+  * @brief  Reads one option byte
387
+  * @param  Address  option byte address to read.
388
+  * @retval Option byte read value + its complement
389
+  */
390
+uint16_t FLASH_ReadOptionByte(uint16_t Address)
391
+{
392
+	uint8_t value_optbyte, value_optbyte_complement = 0;
393
+	uint16_t res_value = 0;
394
+
395
+	/* Check parameter */
396
+	assert_param(IS_OPTION_BYTE_ADDRESS_OK(Address));
397
+
398
+	value_optbyte = *((NEAR uint8_t *) Address); /* Read option byte */
399
+	value_optbyte_complement = *(((NEAR uint8_t *) Address) + 1); /* Read option byte complement */
400
+
401
+	/* Read-out protection option byte */
402
+	if (Address == 0x4800) {
403
+		res_value = value_optbyte;
404
+	} else {
405
+		if (value_optbyte == (uint8_t) (~value_optbyte_complement)) {
406
+			res_value = (uint16_t) ((uint16_t) value_optbyte << 8);
407
+			res_value = res_value | (uint16_t) value_optbyte_complement;
408
+		} else {
409
+			res_value = FLASH_OPTIONBYTE_ERROR;
410
+		}
411
+	}
412
+	return (res_value);
413
+}
414
+
415
+/**
416
+  * @brief  Select the Flash behaviour in low power mode
417
+  * @param  FLASH_LPMode Low power mode selection
418
+  *         This parameter can be any of the @ref FLASH_LPMode_TypeDef values.
419
+  * @retval None
420
+  */
421
+void FLASH_SetLowPowerMode(FLASH_LPMode_TypeDef FLASH_LPMode)
422
+{
423
+	/* Check parameter */
424
+	assert_param(IS_FLASH_LOW_POWER_MODE_OK(FLASH_LPMode));
425
+
426
+	/* Clears the two bits */
427
+	FLASH->CR1 &= (uint8_t) (~(FLASH_CR1_HALT | FLASH_CR1_AHALT));
428
+
429
+	/* Sets the new mode */
430
+	FLASH->CR1 |= (uint8_t) FLASH_LPMode;
431
+}
432
+
433
+/**
434
+  * @brief  Sets the fixed programming time
435
+  * @param  FLASH_ProgTime Indicates the programming time to be fixed
436
+  *         This parameter can be any of the @ref FLASH_ProgramTime_TypeDef values.
437
+  * @retval None
438
+  */
439
+void FLASH_SetProgrammingTime(FLASH_ProgramTime_TypeDef FLASH_ProgTime)
440
+{
441
+	/* Check parameter */
442
+	assert_param(IS_FLASH_PROGRAM_TIME_OK(FLASH_ProgTime));
443
+
444
+	FLASH->CR1 &= (uint8_t) (~FLASH_CR1_FIX);
445
+	FLASH->CR1 |= (uint8_t) FLASH_ProgTime;
446
+}
447
+
448
+/**
449
+  * @brief  Returns the Flash behaviour type in low power mode
450
+  * @param  None
451
+  * @retval FLASH_LPMode_TypeDef Flash behaviour type in low power mode
452
+  */
453
+FLASH_LPMode_TypeDef FLASH_GetLowPowerMode(void)
454
+{
455
+	return ((FLASH_LPMode_TypeDef) (FLASH->CR1 & (uint8_t) (FLASH_CR1_HALT | FLASH_CR1_AHALT)));
456
+}
457
+
458
+/**
459
+  * @brief  Returns the fixed programming time
460
+  * @param  None
461
+  * @retval FLASH_ProgramTime_TypeDef Fixed programming time value
462
+  */
463
+FLASH_ProgramTime_TypeDef FLASH_GetProgrammingTime(void)
464
+{
465
+	return ((FLASH_ProgramTime_TypeDef) (FLASH->CR1 & FLASH_CR1_FIX));
466
+}
467
+
468
+/**
469
+  * @brief  Returns the Boot memory size in bytes
470
+  * @param  None
471
+  * @retval Boot memory size in bytes
472
+  */
473
+uint32_t FLASH_GetBootSize(void)
474
+{
475
+	uint32_t temp = 0;
476
+
477
+	/* Calculates the number of bytes */
478
+	temp = (uint32_t) ((uint32_t) FLASH->FPR * (uint32_t) 512);
479
+
480
+	/* Correction because size of 127.5 kb doesn't exist */
481
+	if (FLASH->FPR == 0xFF) {
482
+		temp += 512;
483
+	}
484
+
485
+	/* Return value */
486
+	return (temp);
487
+}
488
+
489
+/**
490
+  * @brief  Checks whether the specified SPI flag is set or not.
491
+  * @param  FLASH_FLAG : Specifies the flag to check.
492
+  *         This parameter can be any of the @ref FLASH_Flag_TypeDef enumeration.
493
+  * @retval FlagStatus : Indicates the state of FLASH_FLAG.
494
+  *         This parameter can be any of the @ref FlagStatus enumeration.
495
+  * @note   This function can clear the EOP, WR_PG_DIS flags in the IAPSR register.
496
+  */
497
+FlagStatus FLASH_GetFlagStatus(FLASH_Flag_TypeDef FLASH_FLAG)
498
+{
499
+	FlagStatus status = RESET;
500
+	/* Check parameters */
501
+	assert_param(IS_FLASH_FLAGS_OK(FLASH_FLAG));
502
+
503
+	/* Check the status of the specified FLASH flag */
504
+	if ((FLASH->IAPSR & (uint8_t) FLASH_FLAG) != (uint8_t) RESET) {
505
+		status = SET; /* FLASH_FLAG is set */
506
+	} else {
507
+		status = RESET; /* FLASH_FLAG is reset*/
508
+	}
509
+
510
+	/* Return the FLASH_FLAG status */
511
+	return status;
512
+}
513
+
514
+/**
515
+@code
516
+ All the functions defined below must be executed from RAM exclusively, except
517
+ for the FLASH_WaitForLastOperation function which can be executed from Flash.
518
+
519
+ Steps of the execution from RAM differs from one toolchain to another:
520
+ - For Cosmic Compiler:
521
+    1- Define a segment FLASH_CODE by the mean of " #pragma section (FLASH_CODE)".
522
+    This segment is defined in the stm8s_flash.c file.
523
+  2- Uncomment the "#define RAM_EXECUTION  (1)" line in the stm8s.h file,
524
+    or define it in Cosmic compiler preprocessor to enable the FLASH_CODE segment
525
+   definition.
526
+  3- In STVD Select Project\Settings\Linker\Category "input" and in the RAM section
527
+    add the FLASH_CODE segment with "-ic" options.
528
+  4- In main.c file call the _fctcpy() function with first segment character as 
529
+    parameter "_fctcpy('F');" to load the declared moveable code segment
530
+    (FLASH_CODE) in RAM before execution.
531
+  5- By default the _fctcpy function is packaged in the Cosmic machine library,
532
+    so the function prototype "int _fctcopy(char name);" must be added in main.c
533
+    file.
534
+
535
+  - For Raisonance Compiler
536
+   1- Use the inram keyword in the function declaration to specify that it can be
537
+    executed from RAM.
538
+    This is done within the stm8s_flash.c file, and it's conditioned by 
539
+    RAM_EXECUTION definition.
540
+   2- Uncomment the "#define RAM_EXECUTION  (1)" line in the stm8s.h file, or 
541
+   define it in Raisonance compiler preprocessor to enable the access for the 
542
+   inram functions.
543
+   3- An inram function code is copied from Flash to RAM by the C startup code. 
544
+   In some applications, the RAM area where the code was initially stored may be
545
+   erased or corrupted, so it may be desirable to perform the copy again. 
546
+   Depending on the application memory model, the memcpy() or fmemcpy() functions
547
+   should be used to perform the copy.
548
+      ' In case your project uses the SMALL memory model (code smaller than 64K),
549
+       memcpy()function is recommended to perform the copy
550
+      ' In case your project uses the LARGE memory model, functions can be
551
+      everywhere in the 24-bits address space (not limited to the first 64KB of
552
+      code), In this case, the use of memcpy() function will not be appropriate,
553
+      you need to use the specific fmemcpy() function (which copies objects with
554
+      24-bit addresses).
555
+      - The linker automatically defines 2 symbols for each inram function:
556
+           ' __address__functionname is a symbol that holds the Flash address
557
+           where the given function code is stored.
558
+           ' __size__functionname is a symbol that holds the function size in bytes.
559
+     And we already have the function address (which is itself a pointer)
560
+  4- In main.c file these two steps should be performed for each inram function:
561
+     ' Import the "__address__functionname" and "__size__functionname" symbols
562
+       as global variables:
563
+         extern int __address__functionname; // Symbol holding the flash address
564
+         extern int __size__functionname;    // Symbol holding the function size
565
+     ' In case of SMALL memory model use, Call the memcpy() function to copy the
566
+      inram function to the RAM destination address:
567
+                memcpy(functionname, // RAM destination address
568
+                      (void*)&__address__functionname, // Flash source address
569
+                      (int)&__size__functionname); // Code size of the function
570
+     ' In case of LARGE memory model use, call the fmemcpy() function to copy
571
+     the inram function to the RAM destination address:
572
+                 memcpy(functionname, // RAM destination address
573
+                      (void @far*)&__address__functionname, // Flash source address
574
+                      (int)&__size__functionname); // Code size of the function
575
+
576
+ - For IAR Compiler:
577
+    1- Use the __ramfunc keyword in the function declaration to specify that it 
578
+    can be executed from RAM.
579
+    This is done within the stm8s_flash.c file, and it's conditioned by 
580
+    RAM_EXECUTION definition.
581
+    2- Uncomment the "#define RAM_EXECUTION  (1)" line in the stm8s.h file, or 
582
+   define it in IAR compiler preprocessor to enable the access for the 
583
+   __ramfunc functions.
584
+
585
+ - Note: 
586
+    1- Ignore the IAR compiler warnings, these warnings don't impact the FLASH Program/Erase
587
+    operations.
588
+    The code performing the Flash Program/erase must be executed from RAM; the variables
589
+    initializations don't necessary require the execution from RAM, only CR2/NCR2 registers 
590
+    configuration and data programing must be executed from RAM.
591
+    2- These warnings depends on IAR compiler: as the code generation is made using many
592
+    runtime library functions to keep code size to a minimum.
593
+    3- It is recommended to use High Speed Optimization with IAR (-Ohs), in order 
594
+    to reduce the runtime library calls in the generated code.
595
+
596
+
597
+
598
+ The FLASH examples given within the STM8S_StdPeriph_Lib package, details all 
599
+ the steps described above.
600
+
601
+@endcode
602
+*/
603
+
604
+/**
605
+  * @brief
606
+  *******************************************************************************
607
+  *                         Execution from RAM enable
608
+  *******************************************************************************
609
+  *
610
+  * To enable execution from RAM you can either uncomment the following define 
611
+  * in the stm8s.h file or define it in your toolchain compiler preprocessor
612
+  * - #define RAM_EXECUTION  (1) 
613
+  */
614
+
615
+#if defined (_COSMIC_) && defined (RAM_EXECUTION)
616
+#pragma section (FLASH_CODE)
617
+#endif  /* _COSMIC_ && RAM_EXECUTION */
618
+/**
619
+  * @brief  Wait for a Flash operation to complete.
620
+  * @note   The call and execution of this function must be done from RAM in case
621
+  *         of Block operation.
622
+  * @param  FLASH_MemType : Memory type
623
+  *         This parameter can be a value of @ref FLASH_MemType_TypeDef
624
+  * @retval FLASH status
625
+  */
626
+IN_RAM(FLASH_Status_TypeDef FLASH_WaitForLastOperation(FLASH_MemType_TypeDef FLASH_MemType))
627
+{
628
+	uint8_t flagstatus = 0x00;
629
+	uint16_t timeout = _FLASH_OPERATION_TIMEOUT;
630
+
631
+	/* Wait until operation completion or write protection page occurred */
632
+#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
633
+  defined(STM8S005) || defined(STM8AF52Ax) || defined(STM8AF62Ax) || defined(STM8AF626x)
634
+	if(FLASH_MemType == FLASH_MEMTYPE_PROG)
635
+	{
636
+	  while((flagstatus == 0x00) && (timeout != 0x00))
637
+	  {
638
+		flagstatus = (uint8_t)(FLASH->IAPSR & (uint8_t)(FLASH_IAPSR_EOP |
639
+														FLASH_IAPSR_WR_PG_DIS));
640
+		timeout--;
641
+	  }
642
+	}
643
+	else
644
+	{
645
+	  while((flagstatus == 0x00) && (timeout != 0x00))
646
+	  {
647
+		flagstatus = (uint8_t)(FLASH->IAPSR & (uint8_t)(FLASH_IAPSR_HVOFF |
648
+														FLASH_IAPSR_WR_PG_DIS));
649
+		timeout--;
650
+	  }
651
+	}
652
+#else /*STM8S103, STM8S903, STM8AF622x */
653
+	while ((flagstatus == 0x00) && (timeout != 0x00)) {
654
+		flagstatus = (uint8_t) (FLASH->IAPSR & (FLASH_IAPSR_EOP | FLASH_IAPSR_WR_PG_DIS));
655
+		timeout--;
656
+	}
657
+#endif /* STM8S208, STM8S207, STM8S105, STM8AF52Ax, STM8AF62Ax, STM8AF262x */
658
+
659
+	if (timeout == 0x00) {
660
+		flagstatus = FLASH_STATUS_TIMEOUT;
661
+	}
662
+
663
+	return ((FLASH_Status_TypeDef) flagstatus);
664
+}
665
+
666
+/**
667
+  * @brief  Erases a block in the program or data memory.
668
+  * @note   This function should be executed from RAM.
669
+  * @param  FLASH_MemType :  The type of memory to erase
670
+  * @param  BlockNum : Indicates the block number to erase
671
+  * @retval None.
672
+  */
673
+IN_RAM(void FLASH_EraseBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType))
674
+{
675
+	uint32_t startaddress = 0;
676
+
677
+#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \
678
+  defined (STM8S903) || defined (STM8AF626x) || defined (STM8AF622x)
679
+	uint32_t PointerAttr *pwFlash;
680
+#elif defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF62Ax) || defined (STM8AF52Ax)
681
+	uint8_t PointerAttr  *pwFlash;
682
+#endif
683
+
684
+	/* Check parameters */
685
+	assert_param(IS_MEMORY_TYPE_OK(FLASH_MemType));
686
+	if (FLASH_MemType == FLASH_MEMTYPE_PROG) {
687
+		assert_param(IS_FLASH_PROG_BLOCK_NUMBER_OK(BlockNum));
688
+		startaddress = FLASH_PROG_START_PHYSICAL_ADDRESS;
689
+	} else {
690
+		assert_param(IS_FLASH_DATA_BLOCK_NUMBER_OK(BlockNum));
691
+		startaddress = FLASH_DATA_START_PHYSICAL_ADDRESS;
692
+	}
693
+
694
+	/* Point to the first block address */
695
+#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF62Ax) || defined (STM8AF52Ax)
696
+	pwFlash = (PointerAttr uint8_t *)(MemoryAddressCast)(startaddress + ((uint32_t)BlockNum * FLASH_BLOCK_SIZE));
697
+#elif defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \
698
+  defined (STM8S903) || defined (STM8AF626x) || defined (STM8AF622x)
699
+	pwFlash = (PointerAttr uint32_t *) (MemoryAddressCast) (startaddress + ((uint32_t) BlockNum * FLASH_BLOCK_SIZE));
700
+#endif	/* STM8S208, STM8S207 */
701
+
702
+	/* Enable erase block mode */
703
+	FLASH->CR2 |= FLASH_CR2_ERASE;
704
+	FLASH->NCR2 &= (uint8_t) (~FLASH_NCR2_NERASE);
705
+
706
+#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \
707
+  defined (STM8S903) || defined (STM8AF626x) || defined (STM8AF622x)
708
+	*pwFlash = (uint32_t) 0;
709
+#elif defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF62Ax) || \
710
+  defined (STM8AF52Ax)
711
+	*pwFlash = (uint8_t)0;
712
+  *(pwFlash + 1) = (uint8_t)0;
713
+  *(pwFlash + 2) = (uint8_t)0;
714
+  *(pwFlash + 3) = (uint8_t)0;
715
+#endif
716
+}
717
+
718
+/**
719
+  * @brief  Programs a memory block
720
+  * @note   This function should be executed from RAM.
721
+  * @param  FLASH_MemType : The type of memory to program
722
+  * @param  BlockNum : The block number
723
+  * @param  FLASH_ProgMode : The programming mode.
724
+  * @param  Buffer : Pointer to buffer containing source data.
725
+  * @retval None.
726
+  */
727
+IN_RAM(void FLASH_ProgramBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType,
728
+		   FLASH_ProgramMode_TypeDef FLASH_ProgMode, uint8_t
729
+		   *Buffer))
730
+{
731
+	uint16_t Count = 0;
732
+	uint32_t startaddress = 0;
733
+
734
+	/* Check parameters */
735
+	assert_param(IS_MEMORY_TYPE_OK(FLASH_MemType));
736
+	assert_param(IS_FLASH_PROGRAM_MODE_OK(FLASH_ProgMode));
737
+	if (FLASH_MemType == FLASH_MEMTYPE_PROG) {
738
+		assert_param(IS_FLASH_PROG_BLOCK_NUMBER_OK(BlockNum));
739
+		startaddress = FLASH_PROG_START_PHYSICAL_ADDRESS;
740
+	} else {
741
+		assert_param(IS_FLASH_DATA_BLOCK_NUMBER_OK(BlockNum));
742
+		startaddress = FLASH_DATA_START_PHYSICAL_ADDRESS;
743
+	}
744
+
745
+	/* Point to the first block address */
746
+	startaddress = startaddress + ((uint32_t) BlockNum * FLASH_BLOCK_SIZE);
747
+
748
+	/* Selection of Standard or Fast programming mode */
749
+	if (FLASH_ProgMode == FLASH_PROGRAMMODE_STANDARD) {
750
+		/* Standard programming mode */ /*No need in standard mode */
751
+		FLASH->CR2 |= FLASH_CR2_PRG;
752
+		FLASH->NCR2 &= (uint8_t) (~FLASH_NCR2_NPRG);
753
+	} else {
754
+		/* Fast programming mode */
755
+		FLASH->CR2 |= FLASH_CR2_FPRG;
756
+		FLASH->NCR2 &= (uint8_t) (~FLASH_NCR2_NFPRG);
757
+	}
758
+
759
+	/* Copy data bytes from RAM to FLASH memory */
760
+	for (Count = 0; Count < FLASH_BLOCK_SIZE; Count++) {
761
+#ifndef _SDCC_
762
+		*((PointerAttr uint8_t*) (MemoryAddressCast)startaddress + Count) = ((uint8_t)(Buffer[Count]));
763
+#else
764
+		write_byte_address(startaddress + Count,
765
+						   ((uint8_t) (Buffer[Count])));    // SDCC patch: required for far pointers
766
+#endif // _SDCC_
767
+	}
768
+}
769
+
770
+#if defined (_COSMIC_) && defined (RAM_EXECUTION)
771
+/* End of FLASH_CODE section */
772
+#pragma section ()
773
+#endif /* _COSMIC_ && RAM_EXECUTION */
774
+
775
+
776
+/**
777
+  * @}
778
+  */
779
+
780
+/**
781
+  * @}
782
+  */
783
+
784
+
785
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 319 - 0
Library/SPL/stm8s_flash.h View File

@@ -0,0 +1,319 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm8s_flash.h
4
+  * @author  MCD Application Team
5
+  * @version V2.2.0
6
+  * @date    30-September-2014
7
+  * @brief   This file contains all functions prototype and macros for the FLASH peripheral.
8
+   ******************************************************************************
9
+  * @attention
10
+  *
11
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
12
+  *
13
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14
+  * You may not use this file except in compliance with the License.
15
+  * You may obtain a copy of the License at:
16
+  *
17
+  *        http://www.st.com/software_license_agreement_liberty_v2
18
+  *
19
+  * Unless required by applicable law or agreed to in writing, software 
20
+  * distributed under the License is distributed on an "AS IS" BASIS, 
21
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22
+  * See the License for the specific language governing permissions and
23
+  * limitations under the License.
24
+  *
25
+  ******************************************************************************
26
+  */
27
+
28
+/* Define to prevent recursive inclusion -------------------------------------*/
29
+#ifndef __STM8S_FLASH_H
30
+#define __STM8S_FLASH_H
31
+
32
+/* Includes ------------------------------------------------------------------*/
33
+#include "stm8s.h"
34
+
35
+/* Exported constants --------------------------------------------------------*/
36
+
37
+/** @addtogroup FLASH_Exported_Constants
38
+  * @{
39
+  */
40
+
41
+#define FLASH_PROG_START_PHYSICAL_ADDRESS ((uint32_t)0x008000) /*!< Program memory: start address */
42
+
43
+#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
44
+#define FLASH_PROG_END_PHYSICAL_ADDRESS   ((uint32_t)0x027FFF) /*!< Program memory: end address */
45
+#define FLASH_PROG_BLOCKS_NUMBER          ((uint16_t)1024)     /*!< Program memory: total number of blocks */
46
+#define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */
47
+#define FLASH_DATA_END_PHYSICAL_ADDRESS   ((uint32_t)0x0047FF) /*!< Data EEPROM memory: end address */
48
+#define FLASH_DATA_BLOCKS_NUMBER          ((uint16_t)16)       /*!< Data EEPROM memory: total number of blocks */
49
+#define FLASH_BLOCK_SIZE                  ((uint8_t)128)       /*!< Number of bytes in a block (common for Program and Data memories) */
50
+#endif /* STM8S208, STM8S207, STM8S007, STM8AF52Ax, STM8AF62Ax */
51
+
52
+#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x)
53
+#define FLASH_PROG_END_PHYSICAL_ADDRESS   ((uint32_t)0xFFFF)   /*!< Program memory: end address */
54
+#define FLASH_PROG_BLOCKS_NUMBER          ((uint16_t)256)      /*!< Program memory: total number of blocks */
55
+#define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */
56
+#define FLASH_DATA_END_PHYSICAL_ADDRESS   ((uint32_t)0x0043FF) /*!< Data EEPROM memory: end address */
57
+#define FLASH_DATA_BLOCKS_NUMBER          ((uint16_t)8)        /*!< Data EEPROM memory: total number of blocks */
58
+#define FLASH_BLOCK_SIZE                  ((uint8_t)128)       /*!< Number of bytes in a block (common for Program and Data memories) */
59
+#endif /* STM8S105 or STM8AF626x */
60
+
61
+#if defined(STM8S103) || defined(STM8S003) || defined(STM8S903) || defined(STM8AF622x)