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260 lines
7.3 KiB
260 lines
7.3 KiB
;***************************************************************************************************
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;*
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;* Misto : CVUT FEL, Katedra Mereni
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;* Prednasejici : Doc. Ing. Jan Fischer,CSc.
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;* Predmet : A4M38AVS, A4B38NVS
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;* Vyvojovy Kit : STM32L100 DISCOVERY (STM32L100RC)
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;* Datum : 12/2010, 10/2015
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;* Autor : Michal TOMAS (2010), Ondrej Hruska (2015)
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;*
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;***************************************************************************************************
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;***************************************************************************************************
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;* Include library files
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;***************************************************************************************************
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; Base library file
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GET lib/INI_BASE.s
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; Peripheral modules
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GET lib/INI_GPIO.s
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GET lib/INI_SYSTICK.s
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GET lib/INI_RCC.s
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GET lib/INI_FLASH.s
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;***************************************************************************************************
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;* Start program AREA and pass compiler flags to the startup script...
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;***************************************************************************************************
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AREA MAIN, CODE, READONLY
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; This is a compiler flag imported by the startup script.
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__use_two_region_memory
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EXPORT __use_two_region_memory
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;***************************************************************************************************
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;* System config (clock, ports, timers...)
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;*
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;* Called by the startup script before calling __main
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;***************************************************************************************************
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SystemInit
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EXPORT SystemInit ; Export the address to startup script
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PUSH {LR}
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BL RCC_CNF ; Configure clock sources
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BL GPIO_CNF ; Configure GPIO power and pin settings
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BL SYSTICK_CNF ; Configure SysTick timer
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POP {PC}
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;***************************************************************************************************
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;* Interrupt handlers...
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;***************************************************************************************************
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SysTick_Handler
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EXPORT SysTick_Handler ; Export the address to startup script (replaces a WEAK stub)
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PUSH {LR}
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; Toggle the PC8 LED (bit-banding access)
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LDR R0, =BB_GPIOC_ODR_9
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LDR R1, [R0]
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EOR R1, R1, #1
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STR R1, [R0]
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; alternative - writing the register
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; LDR R0, =GPIOC_ODR
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; LDR R1, [R0]
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; EOR R1, R1, #GPIO9
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; STR R1, [R0]
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POP {PC}
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;***************************************************************************************************
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;* Main function
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;*
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;* Called by the startup script after SystemInit.
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;* __main is called only once, and does not return!
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;***************************************************************************************************
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__main
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EXPORT __main ; Export the address to startup script
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ENTRY ; Marks the program entry point (shouldnt be here)
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LOOP ; Main loop
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; turn LED on
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LDR R0, =BB_GPIOC_ODR_8 ; bit-banding address
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MOV R1, #1
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STR R1, [R0]
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; wait
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MOV R0, #40
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BL DELAY
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; turn LED off
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LDR R0, =BB_GPIOC_ODR_8
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MOV R1, #0
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STR R1, [R0]
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; wait
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MOV R0, #10
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BL DELAY
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B LOOP
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;**************************************************************************************************
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;* GPIO configuration
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;*
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;* Sets PC08 and PC09 as outputs, PA0 as input.
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;**************************************************************************************************
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GPIO_CNF
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PUSH {R0,R1,LR}
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; Enable GPIO peripheral timing
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LDR R0, =RCC_AHBENR ; Advanced High-speed Bus ENable Register
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LDR R1, [R0]
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LDR R2, =(RCC_AHBENR_GPIOAEN :OR: RCC_AHBENR_GPIOCEN)
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ORR R1, R1, R2
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STR R1, [R0]
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; Output pins C8, C9
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LDR R0, =GPIOC_MODER
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LDR R1, [R0]
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BIC R1,R1, #(GPIO_MODER_8 :OR: GPIO_MODER_9)
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ORR R1,R1, #(GPIO_MODER_8 :OR: GPIO_MODER_9) & GPIO_MODER_OUTPUT
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STR R1, [R0]
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; Input pin A0
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LDR R0, =GPIOA_MODER
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LDR R1, [R0]
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BIC R1,R1, #GPIO_MODER_0 ; Clear the bit config area
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ORR R1,R1, #(GPIO_MODER_0 & GPIO_MODER_INPUT); Write the "input" pattern into the bit config area
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STR R1, [R0]
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POP {R0,R1,PC}
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;**************************************************************************************************
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;* SysTick configuration
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;*
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;* Configures SysTick to fire a SysTick interrupt at 1 Hz
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;**************************************************************************************************
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SYSTICK_CNF
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PUSH {R0, R1, LR}
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; Use the core clock (undivided)
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LDR R0, =SysTick_CSR
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LDR R1, [R0]
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ORR R1, R1, #SysTick_CSR_CLKSOURCE_CORE
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STR R1, [R0]
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; Configure the reload register to 1s
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LDR R1, =0xFFFFFF
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LDR R0, =SysTick_RELOAD
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STR R1, [R0]
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; Enable SysTick interrupt & start counting
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LDR R0, =SysTick_CSR
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LDR R1, [R0]
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ORR R1, R1, #(SysTick_CSR_TICKINT :OR: SysTick_CSR_ENABLE)
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STR R1, [R0]
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POP {R0, R1, PC}
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;**************************************************************************************************
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;* Delay routine
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;*
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;* Inputs: R0 = number of loop cycles
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;**************************************************************************************************
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DELAY
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PUSH {R2, LR} ; Push the changed registers & link register
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WAIT_OUTER ; Outer loop
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LDR R2, =40000 ; Length of inner loop
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; Inner loop
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WAIT_INNER SUBS R2, R2, #1 ; Decrement INNER loop counter
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BNE WAIT_INNER ; Continue the loop if not done
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SUBS R0, R0, #1 ; Decrement OUTER loop counter
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BNE WAIT_OUTER ; Continue the loop if not done
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POP {R2, PC} ; Pop & return
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;***************************************************************************************************
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;* Konfigurace systemovych hodin a hodin periferii
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;*
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;* Nastavi hodiny na HSI 16 MHz
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;**************************************************************************************************
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RCC_CNF
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PUSH {R0, R1, LR}
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; Flash timing configuration
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LDR R0, =FLASH_ACR
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LDR R1, [R0]
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ORR R1, R1, #FLASH_ACR_ACC64
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STR R1, [R0]
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LDR R1, [R0]
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ORR R1, R1, #(FLASH_ACR_PRFTEN :OR: FLASH_ACR_LATENCY)
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STR R1, [R0]
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; Nastavit hodinove vstupy
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LDR R0, =RCC_CR
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; Additional RCC_CR config
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; LDR R1, [R0]
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; LDR R2, =RCC_CR_RTCPRE ; clear RTC prescaler
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; BIC R1, R1, R2
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; ; HseByp allows to use external clock source with HSEON
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; LDR R2, =(RCC_CR_RTCPRE_DIV2 :OR: RCC_CR_HSEBYP)
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; ORR R1, R1, R2
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; STR R1, [R0]
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; Power on HSI (runs from MSI on start)
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LDR R1, [R0]
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ORR R1, R1, #RCC_CR_HSION
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STR R1, [R0]
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; Wait for HSIRDY
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ALIGN
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NO_HSI_RDY LDR R1, [R0]
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TST R1, #RCC_CR_HSIRDY
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BEQ NO_HSI_RDY
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; Select HSI as the core clock source
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LDR R0, =RCC_CFGR
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LDR R1, [R0]
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BIC R1, R1, #RCC_CFGR_SW
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ORR R1, R1, #RCC_CFGR_SW_HSI
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STR R1, [R0]
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POP {R0, R1, PC}
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;**************************************************************************************************
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ALIGN ; Adds NOP if needed to complete a 32-bit word
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END
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