parent
d0048dcfb2
commit
2cad6ccf4d
GPG Key ID:
2C5FD5035250423D
@ -0,0 +1,28 @@ |
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# This is an NUCLEO-L073RZ board with a single STM32L073RZTx chip |
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# |
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# Generated by System Workbench for STM32 |
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# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s) |
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|
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source [find interface/stlink.cfg] |
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set WORKAREASIZE 0x5000 |
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transport select "hla_swd" |
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set CHIPNAME STM32L073RZTx |
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# Enable debug when in low power modes |
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set ENABLE_LOW_POWER 1 |
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# Stop Watchdog counters when halt |
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set STOP_WATCHDOG 1 |
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|
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# STlink Debug clock frequency |
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set CLOCK_FREQ 4000 |
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# use hardware reset, connect under reset |
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# connect_assert_srst needed if low power mode application running (WFI...) |
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reset_config srst_only srst_nogate connect_assert_srst |
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set CONNECT_UNDER_RESET 1 |
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source [find target/stm32l0x.cfg] |
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@ -0,0 +1,73 @@ |
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/** |
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****************************************************************************** |
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* @file stm32_assert.h |
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* @author MCD Application Team |
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* @brief STM32 assert template file. |
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* This file should be copied to the application folder and renamed |
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* to stm32_assert.h. |
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****************************************************************************** |
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* @attention |
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* |
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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* |
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* Redistribution and use in source and binary forms, with or without modification, |
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* are permitted provided that the following conditions are met: |
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* 1. Redistributions of source code must retain the above copyright notice, |
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* this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright notice, |
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* this list of conditions and the following disclaimer in the documentation |
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* and/or other materials provided with the distribution. |
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* 3. Neither the name of STMicroelectronics nor the names of its contributors |
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* may be used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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****************************************************************************** |
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*/ |
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|
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef __STM32_ASSERT_H |
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#define __STM32_ASSERT_H |
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|
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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|
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/* Exported types ------------------------------------------------------------*/ |
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/* Exported constants --------------------------------------------------------*/ |
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/* Includes ------------------------------------------------------------------*/ |
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/* Exported macro ------------------------------------------------------------*/ |
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#ifdef USE_FULL_ASSERT |
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/** |
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* @brief The assert_param macro is used for function's parameters check. |
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* @param expr: If expr is false, it calls assert_failed function |
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* which reports the name of the source file and the source |
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* line number of the call that failed. |
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* If expr is true, it returns no value. |
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* @retval None |
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*/ |
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#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) |
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/* Exported functions ------------------------------------------------------- */ |
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void assert_failed(uint8_t* file, uint32_t line); |
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#else |
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#define assert_param(expr) ((void)0U) |
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#endif /* USE_FULL_ASSERT */ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* __STM32_ASSERT_H */ |
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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File diff suppressed because it is too large
Load Diff
@ -0,0 +1,229 @@ |
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/**
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****************************************************************************** |
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* @file stm32l0xx_hal_adc_ex.h |
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* @author MCD Application Team |
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* @brief Header file of ADC HAL extended module. |
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****************************************************************************** |
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* @attention |
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* |
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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* |
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* Redistribution and use in source and binary forms, with or without modification, |
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* are permitted provided that the following conditions are met: |
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* 1. Redistributions of source code must retain the above copyright notice, |
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* this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright notice, |
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* this list of conditions and the following disclaimer in the documentation |
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* and/or other materials provided with the distribution. |
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* 3. Neither the name of STMicroelectronics nor the names of its contributors |
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* may be used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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****************************************************************************** |
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef __STM32L0xx_HAL_ADC_EX_H |
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#define __STM32L0xx_HAL_ADC_EX_H |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/* Includes ------------------------------------------------------------------*/ |
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#include "stm32l0xx_hal_def.h" |
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/** @addtogroup STM32L0xx_HAL_Driver
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* @{ |
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*/ |
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/** @addtogroup ADCEx
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* @{ |
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*/
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/* Exported types ------------------------------------------------------------*/ |
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/* Exported constants --------------------------------------------------------*/ |
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/** @defgroup ADCEx_Exported_Constants ADC Extended Exported Constants
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* @{ |
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*/ |
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/** @defgroup ADCEx_Channel_Mode ADC Single Ended
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* @{ |
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*/ |
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#define ADC_SINGLE_ENDED (uint32_t)0x00000000U /* dummy value */ |
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/**
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* @} |
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*/ |
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/** @defgroup ADC_regular_external_trigger_source ADC External Trigger Source
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* @{ |
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*/ |
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#define ADC_EXTERNALTRIGCONV_T6_TRGO ((uint32_t)0x00000000U) |
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#define ADC_EXTERNALTRIGCONV_T21_CC2 (ADC_CFGR1_EXTSEL_0) |
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#define ADC_EXTERNALTRIGCONV_T2_TRGO (ADC_CFGR1_EXTSEL_1) |
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#define ADC_EXTERNALTRIGCONV_T2_CC4 (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0) |
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#define ADC_EXTERNALTRIGCONV_T22_TRGO (ADC_CFGR1_EXTSEL_2) |
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#define ADC_EXTERNALTRIGCONV_T3_TRGO (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1) |
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#define ADC_EXTERNALTRIGCONV_EXT_IT11 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0) |
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#define ADC_SOFTWARE_START (ADC_CFGR1_EXTSEL + (uint32_t)1) |
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/* ADC group regular external trigger TIM21_TRGO available only on */ |
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/* STM32L0 devices categories: Cat.2, Cat.3, Cat.5 */ |
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#if defined (STM32L031xx) || defined (STM32L041xx) || \ |
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defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || \
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defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || \
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defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || \
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defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
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#define ADC_EXTERNALTRIGCONV_T21_TRGO (ADC_EXTERNALTRIGCONV_T22_TRGO) |
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#endif |
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/* ADC group regular external trigger TIM2_CC3 available only on */ |
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/* STM32L0 devices categories: Cat.1, Cat.2, Cat.5 */ |
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#if defined (STM32L011xx) || defined (STM32L021xx) || \ |
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defined (STM32L031xx) || defined (STM32L041xx) || \
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defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || \
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defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
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#define ADC_EXTERNALTRIGCONV_T2_CC3 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0) |
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#endif |
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/**
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* @} |
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*/ |
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/** @defgroup ADC_SYSCFG_internal_paths_flags_definition ADC SYSCFG internal paths Flags Definition
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* @{ |
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*/ |
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#define ADC_FLAG_SENSOR SYSCFG_CFGR3_VREFINT_RDYF |
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#define ADC_FLAG_VREFINT SYSCFG_VREFINT_ADC_RDYF |
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/**
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* @} |
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*/ |
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/**
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* @} |
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*/ |
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/* Private macros ------------------------------------------------------------*/ |
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/** @defgroup ADCEx_Private_Macros ADCEx Private Macros
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* @{ |
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*/ |
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#define IS_ADC_SINGLE_DIFFERENTIAL(SING_DIFF) ((SING_DIFF) == ADC_SINGLE_ENDED) |
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/** @defgroup ADCEx_calibration_factor_length_verification ADC Calibration Factor Length Verification
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* @{ |
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*/
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/**
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* @brief Calibration factor length verification (7 bits maximum) |
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* @param _Calibration_Factor_: Calibration factor value |
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* @retval None |
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*/ |
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#define IS_ADC_CALFACT(_Calibration_Factor_) ((_Calibration_Factor_) <= ((uint32_t)0x7FU)) |
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/**
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* @} |
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*/
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/** @defgroup ADC_External_trigger_Source ADC External Trigger Source
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* @{ |
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*/ |
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#if defined (STM32L031xx) || defined (STM32L041xx) || \ |
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defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || \
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defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
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#define IS_ADC_EXTTRIG(CONV) (((CONV) == ADC_EXTERNALTRIGCONV_T6_TRGO ) || \ |
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((CONV) == ADC_EXTERNALTRIGCONV_T21_CC2 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_CC4 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T22_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T21_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_CC3 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T3_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_EXT_IT11 ) || \
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((CONV) == ADC_SOFTWARE_START)) |
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#elif defined (STM32L011xx) || defined (STM32L021xx) |
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#define IS_ADC_EXTTRIG(CONV) (((CONV) == ADC_EXTERNALTRIGCONV_T6_TRGO ) || \ |
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((CONV) == ADC_EXTERNALTRIGCONV_T21_CC2 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_CC4 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T22_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_CC3 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T3_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_EXT_IT11 ) || \
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((CONV) == ADC_SOFTWARE_START)) |
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#elif defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || \ |
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defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) |
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#define IS_ADC_EXTTRIG(CONV) (((CONV) == ADC_EXTERNALTRIGCONV_T6_TRGO ) || \ |
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((CONV) == ADC_EXTERNALTRIGCONV_T21_CC2 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_CC4 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T22_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T21_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T3_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_EXT_IT11 ) || \
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((CONV) == ADC_SOFTWARE_START)) |
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#endif |
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/**
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* @} |
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*/ |
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/**
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* @} |
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*/ |
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/* Exported functions --------------------------------------------------------*/ |
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/** @addtogroup ADCEx_Exported_Functions
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* @{ |
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*/ |
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/** @addtogroup ADCEx_Exported_Functions_Group1
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* @{ |
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*/ |
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/* IO operation functions *****************************************************/ |
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/* ADC calibration */ |
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HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff); |
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uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff); |
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HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint32_t CalibrationFactor); |
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/* ADC VrefInt and Temperature sensor functions specific to this STM32 serie */ |
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HAL_StatusTypeDef HAL_ADCEx_EnableVREFINT(void); |
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void HAL_ADCEx_DisableVREFINT(void); |
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HAL_StatusTypeDef HAL_ADCEx_EnableVREFINTTempSensor(void); |
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void HAL_ADCEx_DisableVREFINTTempSensor(void); |
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/**
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* @} |
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*/ |
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/**
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* @} |
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*/ |
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/**
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* @} |
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*/ |
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/**
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* @} |
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*/ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /*__STM32L0xx_HAL_ADC_EX_H */ |
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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@ -0,0 +1,683 @@ |
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/**
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****************************************************************************** |
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* @file stm32l0xx_hal_comp.h |
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* @author MCD Application Team |
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* @brief Header file of COMP HAL module. |
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****************************************************************************** |
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* @attention |
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* |
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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* |
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* Redistribution and use in source and binary forms, with or without modification, |
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* are permitted provided that the following conditions are met: |
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* 1. Redistributions of source code must retain the above copyright notice, |
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* this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright notice, |
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* this list of conditions and the following disclaimer in the documentation |
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* and/or other materials provided with the distribution. |
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* 3. Neither the name of STMicroelectronics nor the names of its contributors |
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* may be used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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******************************************************************************
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef __STM32L0xx_HAL_COMP_H |
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#define __STM32L0xx_HAL_COMP_H |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/* Includes ------------------------------------------------------------------*/ |
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#include "stm32l0xx_hal_def.h" |
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/** @addtogroup STM32L0xx_HAL_Driver
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* @{ |
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*/ |
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/** @addtogroup COMP
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* @{ |
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*/ |
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup COMP_Exported_Types COMP Exported Types
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* @{ |
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*/ |
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/**
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* @brief COMP Init structure definition
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*/ |
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typedef struct |
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{ |
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uint32_t WindowMode; /*!< Set window mode of a pair of comparators instances
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(2 consecutive instances odd and even COMP<x> and COMP<x+1>). |
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Note: HAL COMP driver allows to set window mode from any COMP instance of the pair of COMP instances composing window mode. |
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This parameter can be a value of @ref COMP_WindowMode */ |
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uint32_t Mode; /*!< Set comparator operating mode to adjust power and speed.
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Note: For the characteritics of comparator power modes |
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(propagation delay and power consumption), refer to device datasheet. |
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This parameter can be a value of @ref COMP_PowerMode */ |
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uint32_t NonInvertingInput; /*!< Set comparator input plus (non-inverting input).
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This parameter can be a value of @ref COMP_InputPlus */ |
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uint32_t InvertingInput; /*!< Set comparator input minus (inverting input).
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This parameter can be a value of @ref COMP_InputMinus */ |
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uint32_t OutputPol; /*!< Set comparator output polarity.
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This parameter can be a value of @ref COMP_OutputPolarity */ |
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uint32_t LPTIMConnection; /*!< Set comparator output connection to LPTIM peripheral.
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This parameter can be a value of @ref COMP_LPTIMConnection */ |
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uint32_t TriggerMode; /*!< Set the comparator output triggering External Interrupt Line (EXTI).
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This parameter can be a value of @ref COMP_EXTI_TriggerMode */ |
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}COMP_InitTypeDef; |
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/**
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* @brief HAL COMP state machine: HAL COMP states definition |
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*/ |
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#define COMP_STATE_BITFIELD_LOCK ((uint32_t)0x10) |
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typedef enum |
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{ |
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HAL_COMP_STATE_RESET = 0x00U, /*!< COMP not yet initialized */ |
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HAL_COMP_STATE_RESET_LOCKED = (HAL_COMP_STATE_RESET | COMP_STATE_BITFIELD_LOCK), /*!< COMP not yet initialized and configuration is locked */ |
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HAL_COMP_STATE_READY = 0x01U, /*!< COMP initialized and ready for use */ |
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HAL_COMP_STATE_READY_LOCKED = (HAL_COMP_STATE_READY | COMP_STATE_BITFIELD_LOCK), /*!< COMP initialized but configuration is locked */ |
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HAL_COMP_STATE_BUSY = 0x02U, /*!< COMP is running */ |
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HAL_COMP_STATE_BUSY_LOCKED = (HAL_COMP_STATE_BUSY | COMP_STATE_BITFIELD_LOCK) /*!< COMP is running and configuration is locked */ |
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}HAL_COMP_StateTypeDef; |
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/**
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* @brief COMP Handle Structure definition |
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*/ |
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typedef struct |
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{ |
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COMP_TypeDef *Instance; /*!< Register base address */ |
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COMP_InitTypeDef Init; /*!< COMP required parameters */ |
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HAL_LockTypeDef Lock; /*!< Locking object */ |
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__IO HAL_COMP_StateTypeDef State; /*!< COMP communication state */ |
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} COMP_HandleTypeDef; |
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/**
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* @} |
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*/ |
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|
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/* Exported constants --------------------------------------------------------*/ |
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/** @defgroup COMP_Exported_Constants COMP Exported Constants
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* @{ |
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*/ |
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|
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/** @defgroup COMP_WindowMode COMP Window Mode
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* @{ |
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*/ |
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#define COMP_WINDOWMODE_DISABLE ((uint32_t)0x00000000U) /*!< Window mode disable: Comparators instances pair COMP1 and COMP2 are independent */ |
||||
#define COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON (COMP_CSR_COMP1WM) /*!< Window mode enable: Comparators instances pair COMP1 and COMP2 have their input plus connected together. The common input is COMP1 input plus (COMP2 input plus is no more accessible). */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_PowerMode COMP power mode
|
||||
* @{ |
||||
*/ |
||||
/* Note: For the characteritics of comparator power modes */ |
||||
/* (propagation delay and power consumption), */ |
||||
/* refer to device datasheet. */ |
||||
#define COMP_POWERMODE_MEDIUMSPEED (COMP_CSR_COMP2SPEED) /*!< COMP power mode to low power (indicated as "high speed" in reference manual) (only for COMP instance: COMP2) */ |
||||
#define COMP_POWERMODE_ULTRALOWPOWER ((uint32_t)0x00000000U) /*!< COMP power mode to ultra low power (indicated as "low speed" in reference manual) (only for COMP instance: COMP2) */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_InputPlus COMP input plus (non-inverting input)
|
||||
* @{ |
||||
*/ |
||||
#define COMP_INPUT_PLUS_IO1 ((uint32_t)0x00000000U) /*!< Comparator input plus connected to IO1 (pin PA1 for COMP1, pin PA3 for COMP2) */ |
||||
#define COMP_INPUT_PLUS_IO2 (COMP_CSR_COMP2INPSEL_0) /*!< Comparator input plus connected to IO2 (pin PB4 for COMP2) (only for COMP instance: COMP2) */ |
||||
#define COMP_INPUT_PLUS_IO3 (COMP_CSR_COMP2INPSEL_1) /*!< Comparator input plus connected to IO3 (pin PA5 for COMP2) (only for COMP instance: COMP2) */ |
||||
#define COMP_INPUT_PLUS_IO4 (COMP_CSR_COMP2INPSEL_0 | COMP_CSR_COMP2INPSEL_1) /*!< Comparator input plus connected to IO4 (pin PB6 for COMP2) (only for COMP instance: COMP2) */ |
||||
#define COMP_INPUT_PLUS_IO5 (COMP_CSR_COMP2INPSEL_2) /*!< Comparator input plus connected to IO5 (pin PB7 for COMP2) (only for COMP instance: COMP2) */ |
||||
#if defined (STM32L011xx) || defined (STM32L021xx) |
||||
#define COMP_INPUT_PLUS_IO6 (COMP_CSR_COMP2INPSEL_2 | COMP_CSR_COMP2INPSEL_0) /*!< Comparator input plus connected to IO6 (pin PA7 for COMP2) (only for COMP instance: COMP2) (Available only on devices STM32L0 category 1) */ |
||||
#endif |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_InputMinus COMP input minus (inverting input)
|
||||
* @{ |
||||
*/ |
||||
#define COMP_INPUT_MINUS_1_4VREFINT (COMP_CSR_COMP2INNSEL_2 ) /*!< Comparator input minus connected to 1/4 VREFINT (only for COMP instance: COMP2) */ |
||||
#define COMP_INPUT_MINUS_1_2VREFINT (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to 1/2 VREFINT (only for COMP instance: COMP2) */ |
||||
#define COMP_INPUT_MINUS_3_4VREFINT (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_1 ) /*!< Comparator input minus connected to 3/4 VREFINT (only for COMP instance: COMP2) */ |
||||
#define COMP_INPUT_MINUS_VREFINT ((uint32_t)0x00000000U) /*!< Comparator input minus connected to VrefInt */ |
||||
#define COMP_INPUT_MINUS_DAC1_CH1 ( COMP_CSR_COMP2INNSEL_1 ) /*!< Comparator input minus connected to DAC1 channel 1 (DAC_OUT1) */ |
||||
#define COMP_INPUT_MINUS_DAC1_CH2 ( COMP_CSR_COMP2INNSEL_1 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to DAC1 channel 2 (DAC_OUT2) */ |
||||
#define COMP_INPUT_MINUS_IO1 ( COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to IO1 (pin PA0 for COMP1, pin PA2 for COMP2) */ |
||||
#define COMP_INPUT_MINUS_IO2 (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_1 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to IO2 (pin PB3 for COMP2) (only for COMP instance: COMP2) */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/** @defgroup COMP_LPTIMConnection COMP Low power timer connection definition
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define COMP_LPTIMCONNECTION_DISABLED ((uint32_t)0x00000000U) /*!< COMPx signal is gated */ |
||||
#define COMP_LPTIMCONNECTION_IN1_ENABLED ((uint32_t)0x00000001U) /*!< COMPx signal is connected to LPTIM input 1 */ |
||||
#define COMP_LPTIMCONNECTION_IN2_ENABLED ((uint32_t)0x00000002U) /*!< COMPx signal is connected to LPTIM input 2 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_OutputPolarity COMP output Polarity
|
||||
* @{ |
||||
*/ |
||||
#define COMP_OUTPUTPOL_NONINVERTED ((uint32_t)0x00000000U) /*!< COMP output on GPIO isn't inverted */ |
||||
#define COMP_OUTPUTPOL_INVERTED COMP_CSR_COMPxPOLARITY /*!< COMP output on GPIO is inverted */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_OutputLevel COMP Output Level
|
||||
* @{ |
||||
*/ |
||||
/* Note: Comparator output level values are fixed to "0" and "1", */ |
||||
/* corresponding COMP register bit is managed by HAL function to match */ |
||||
/* with these values (independently of bit position in register). */ |
||||
|
||||
/* When output polarity is not inverted, comparator output is low when
|
||||
the input plus is at a lower voltage than the input minus */ |
||||
#define COMP_OUTPUT_LEVEL_LOW ((uint32_t)0x00000000U) |
||||
/* When output polarity is not inverted, comparator output is high when
|
||||
the input plus is at a higher voltage than the input minus */ |
||||
#define COMP_OUTPUT_LEVEL_HIGH ((uint32_t)0x00000001U) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_EXTI_TriggerMode COMP output to EXTI
|
||||
* @{ |
||||
*/ |
||||
#define COMP_TRIGGERMODE_NONE ((uint32_t)0x00000000U) /*!< Comparator output triggering no External Interrupt Line */ |
||||
#define COMP_TRIGGERMODE_IT_RISING (COMP_EXTI_IT | COMP_EXTI_RISING) /*!< Comparator output triggering External Interrupt Line event with interruption, on rising edge */ |
||||
#define COMP_TRIGGERMODE_IT_FALLING (COMP_EXTI_IT | COMP_EXTI_FALLING) /*!< Comparator output triggering External Interrupt Line event with interruption, on falling edge */ |
||||
#define COMP_TRIGGERMODE_IT_RISING_FALLING (COMP_EXTI_IT | COMP_EXTI_RISING | COMP_EXTI_FALLING) /*!< Comparator output triggering External Interrupt Line event with interruption, on both rising and falling edges */ |
||||
#define COMP_TRIGGERMODE_EVENT_RISING (COMP_EXTI_EVENT | COMP_EXTI_RISING) /*!< Comparator output triggering External Interrupt Line event only (without interruption), on rising edge */ |
||||
#define COMP_TRIGGERMODE_EVENT_FALLING (COMP_EXTI_EVENT | COMP_EXTI_FALLING) /*!< Comparator output triggering External Interrupt Line event only (without interruption), on falling edge */ |
||||
#define COMP_TRIGGERMODE_EVENT_RISING_FALLING (COMP_EXTI_EVENT | COMP_EXTI_RISING | COMP_EXTI_FALLING) /*!< Comparator output triggering External Interrupt Line event only (without interruption), on both rising and falling edges */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
/** @defgroup COMP_Exported_Macros COMP Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup COMP_Handle_Management COMP Handle Management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset COMP handle state.
|
||||
* @param __HANDLE__ COMP handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET) |
||||
|
||||
/**
|
||||
* @brief Enable the specified comparator. |
||||
* @param __HANDLE__ COMP handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxEN) |
||||
|
||||
/**
|
||||
* @brief Disable the specified comparator. |
||||
* @param __HANDLE__ COMP handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxEN) |
||||
|
||||
/**
|
||||
* @brief Lock the specified comparator configuration. |
||||
* @note Using this macro induce HAL COMP handle state machine being no |
||||
* more in line with COMP instance state. |
||||
* To keep HAL COMP handle state machine updated, it is recommended |
||||
* to use function "HAL_COMP_Lock')". |
||||
* @param __HANDLE__ COMP handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_LOCK(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxLOCK) |
||||
|
||||
/**
|
||||
* @brief Check whether the specified comparator is locked. |
||||
* @param __HANDLE__ COMP handle |
||||
* @retval Value 0 if COMP instance is not locked, value 1 if COMP instance is locked |
||||
*/ |
||||
#define __HAL_COMP_IS_LOCKED(__HANDLE__) (READ_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxLOCK) == COMP_CSR_COMPxLOCK) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_Exti_Management COMP external interrupt line management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable the COMP1 EXTI line rising edge trigger. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP1 EXTI line rising edge trigger. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP1 EXTI line falling edge trigger. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP1 EXTI line falling edge trigger. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP1 EXTI line rising & falling edge trigger. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ |
||||
__HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE(); \
|
||||
__HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE(); \
|
||||
} while(0) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP1 EXTI line rising & falling edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ |
||||
__HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE(); \
|
||||
__HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE(); \
|
||||
} while(0) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP1 EXTI line in interrupt mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP1 EXTI line in interrupt mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Generate a software interrupt on the COMP1 EXTI line. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP1 EXTI line in event mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP1 EXTI line in event mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Check whether the COMP1 EXTI line flag is set. |
||||
* @retval RESET or SET |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Clear the COMP1 EXTI flag. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP2 EXTI line rising edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP2 EXTI line rising edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP2 EXTI line falling edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP2 EXTI line falling edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP2 EXTI line rising & falling edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ |
||||
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE(); \
|
||||
__HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE(); \
|
||||
} while(0) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP2 EXTI line rising & falling edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ |
||||
__HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE(); \
|
||||
__HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE(); \
|
||||
} while(0) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP2 EXTI line in interrupt mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP2 EXTI line in interrupt mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Generate a software interrupt on the COMP2 EXTI line. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP2 EXTI line in event mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP2 EXTI line in event mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Check whether the COMP2 EXTI line flag is set. |
||||
* @retval RESET or SET |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Clear the COMP2 EXTI flag. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Private types -------------------------------------------------------------*/ |
||||
/* Private constants ---------------------------------------------------------*/ |
||||
/** @defgroup COMP_Private_Constants COMP Private Constants
|
||||
* @{ |
||||
*/ |
||||
/** @defgroup COMP_ExtiLine COMP EXTI Lines
|
||||
* @{ |
||||
*/ |
||||
#define COMP_EXTI_LINE_COMP1 (EXTI_IMR_IM21) /*!< EXTI line 21 connected to COMP1 output */ |
||||
#define COMP_EXTI_LINE_COMP2 (EXTI_IMR_IM22) /*!< EXTI line 22 connected to COMP2 output */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_ExtiLine COMP EXTI Lines
|
||||
* @{ |
||||
*/ |
||||
#define COMP_EXTI_IT ((uint32_t) 0x01U) /*!< EXTI line event with interruption */ |
||||
#define COMP_EXTI_EVENT ((uint32_t) 0x02U) /*!< EXTI line event only (without interruption) */ |
||||
#define COMP_EXTI_RISING ((uint32_t) 0x10U) /*!< EXTI line event on rising edge */ |
||||
#define COMP_EXTI_FALLING ((uint32_t) 0x20U) /*!< EXTI line event on falling edge */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
/** @defgroup COMP_Private_Macros COMP Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup COMP_GET_EXTI_LINE COMP private macros to get EXTI line associated with comparators
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief Get the specified EXTI line for a comparator instance. |
||||
* @param __INSTANCE__ specifies the COMP instance. |
||||
* @retval value of @ref COMP_ExtiLine |
||||
*/ |
||||
#define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? \ |
||||
COMP_EXTI_LINE_COMP1 : COMP_EXTI_LINE_COMP2) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_IS_COMP_Definitions COMP private macros to check input parameters
|
||||
* @{ |
||||
*/ |
||||
#define IS_COMP_WINDOWMODE(__WINDOWMODE__) (((__WINDOWMODE__) == COMP_WINDOWMODE_DISABLE) || \ |
||||
((__WINDOWMODE__) == COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON) ) |
||||
|
||||
#define IS_COMP_POWERMODE(__POWERMODE__) (((__POWERMODE__) == COMP_POWERMODE_MEDIUMSPEED) || \ |
||||
((__POWERMODE__) == COMP_POWERMODE_ULTRALOWPOWER) ) |
||||
|
||||
#define IS_COMP_WINDOWMODE_INSTANCE(INSTANCE) ((INSTANCE) == COMP1) |
||||
|
||||
#if defined (STM32L011xx) || defined (STM32L021xx) |
||||
#define IS_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__) \ |
||||
(((__COMP_INSTANCE__) == COMP1) \
|
||||
? ( \
|
||||
(__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1 \
|
||||
) \
|
||||
: \
|
||||
( \
|
||||
((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO2) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO3) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO4) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO5) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO6) \
|
||||
) \
|
||||
) |
||||
#else |
||||
#define IS_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__) \ |
||||
(((__COMP_INSTANCE__) == COMP1) \
|
||||
? ( \
|
||||
(__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1 \
|
||||
) \
|
||||
: \
|
||||
( \
|
||||
((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO2) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO3) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO4) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO5) \
|
||||
) \
|
||||
) |
||||
#endif |
||||
|
||||
#define IS_COMP_INPUT_MINUS(__COMP_INSTANCE__, __INPUT_MINUS__) \ |
||||
(((__COMP_INSTANCE__) == COMP1) \
|
||||
? ( \
|
||||
((__INPUT_MINUS__) == COMP_INPUT_MINUS_VREFINT) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH1) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH2) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO1) \
|
||||
) \
|
||||
: \
|
||||
( \
|
||||
((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_4VREFINT) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_2VREFINT) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_3_4VREFINT) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_VREFINT) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH1) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH2) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO1) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO2) \
|
||||
) \
|
||||
) |
||||
|
||||
#define IS_COMP1_LPTIMCONNECTION(LPTIMCONNECTION) (((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_DISABLED) || \ |
||||
((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_IN1_ENABLED)) |
||||
|
||||
#define IS_COMP2_LPTIMCONNECTION(LPTIMCONNECTION) (((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_DISABLED) || \ |
||||
((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_IN1_ENABLED) || \
|
||||
((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_IN2_ENABLED)) |
||||
|
||||
#define IS_COMP2_LPTIMCONNECTION_RESTRICTED(LPTIMCONNECTION) (((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_DISABLED) || \ |
||||
((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_IN1_ENABLED)) |
||||
|
||||
#define IS_COMP_OUTPUTPOL(POL) (((POL) == COMP_OUTPUTPOL_NONINVERTED) || \ |
||||
((POL) == COMP_OUTPUTPOL_INVERTED)) |
||||
|
||||
#define IS_COMP_TRIGGERMODE(__TRIGGERMODE__) (((__TRIGGERMODE__) == COMP_TRIGGERMODE_NONE) || \ |
||||
((__TRIGGERMODE__) == COMP_TRIGGERMODE_IT_RISING) || \
|
||||
((__TRIGGERMODE__) == COMP_TRIGGERMODE_IT_FALLING) || \
|
||||
((__TRIGGERMODE__) == COMP_TRIGGERMODE_IT_RISING_FALLING) || \
|
||||
((__TRIGGERMODE__) == COMP_TRIGGERMODE_EVENT_RISING) || \
|
||||
((__TRIGGERMODE__) == COMP_TRIGGERMODE_EVENT_FALLING) || \
|
||||
((__TRIGGERMODE__) == COMP_TRIGGERMODE_EVENT_RISING_FALLING) ) |
||||
|
||||
|
||||
#define IS_COMP_OUTPUT_LEVEL(__OUTPUT_LEVEL__) (((__OUTPUT_LEVEL__) == COMP_OUTPUT_LEVEL_LOW) || \ |
||||
((__OUTPUT_LEVEL__) == COMP_OUTPUT_LEVEL_HIGH)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Include COMP HAL Extended module */ |
||||
#include "stm32l0xx_hal_comp_ex.h" |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @addtogroup COMP_Exported_Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup COMP_Exported_Functions_Group1
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Initialization and de-initialization functions **********************************/ |
||||
HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp); |
||||
HAL_StatusTypeDef HAL_COMP_DeInit (COMP_HandleTypeDef *hcomp); |
||||
void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp); |
||||
void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* IO operation functions *****************************************************/ |
||||
/** @addtogroup COMP_Exported_Functions_Group2
|
||||
* @{ |
||||
*/ |
||||
HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp); |
||||
HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp); |
||||
void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Peripheral Control functions ************************************************/ |
||||
/** @addtogroup COMP_Exported_Functions_Group3
|
||||
* @{ |
||||
*/ |
||||
HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp); |
||||
uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp); |
||||
/* Callback in interrupt mode */ |
||||
void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Peripheral State functions **************************************************/ |
||||
/** @addtogroup COMP_Exported_Functions_Group4
|
||||
* @{ |
||||
*/ |
||||
HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_COMP_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,89 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_comp_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of COMP HAL Extended module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_COMP_EX_H |
||||
#define __STM32L0xx_HAL_COMP_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup COMPEx COMPEx
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup COMPEx_Exported_Functions COMPEx Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup COMPEx_Exported_Functions_Group1 Extended COMP VREFINT setup functions
|
||||
* @{ |
||||
*/ |
||||
/* COMP specific functions to manage VREFINT *************************************/ |
||||
void HAL_COMPEx_EnableVREFINT(void); |
||||
void HAL_COMPEx_DisableVREFINT(void); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_COMP_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,314 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_conf.h |
||||
* @author MCD Application Team |
||||
* @brief HAL configuration template file.
|
||||
* This file should be copied to the application folder and renamed |
||||
* to stm32l0xx_hal_conf.h. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_CONF_H |
||||
#define __STM32L0xx_HAL_CONF_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/* ########################## Module Selection ############################## */ |
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/ |
||||
#define HAL_MODULE_ENABLED |
||||
#define HAL_ADC_MODULE_ENABLED |
||||
#define HAL_COMP_MODULE_ENABLED |
||||
#define HAL_CRC_MODULE_ENABLED |
||||
#define HAL_CRYP_MODULE_ENABLED |
||||
#define HAL_DAC_MODULE_ENABLED |
||||
#define HAL_DMA_MODULE_ENABLED |
||||
#define HAL_FIREWALL_MODULE_ENABLED |
||||
#define HAL_FLASH_MODULE_ENABLED |
||||
#define HAL_GPIO_MODULE_ENABLED |
||||
#define HAL_I2C_MODULE_ENABLED |
||||
#define HAL_I2S_MODULE_ENABLED |
||||
#define HAL_IWDG_MODULE_ENABLED |
||||
#define HAL_LCD_MODULE_ENABLED |
||||
#define HAL_LPTIM_MODULE_ENABLED |
||||
#define HAL_PWR_MODULE_ENABLED |
||||
#define HAL_RCC_MODULE_ENABLED |
||||
#define HAL_RNG_MODULE_ENABLED |
||||
#define HAL_RTC_MODULE_ENABLED |
||||
#define HAL_SPI_MODULE_ENABLED |
||||
#define HAL_TIM_MODULE_ENABLED |
||||
#define HAL_TSC_MODULE_ENABLED |
||||
#define HAL_UART_MODULE_ENABLED |
||||
#define HAL_USART_MODULE_ENABLED |
||||
#define HAL_IRDA_MODULE_ENABLED |
||||
#define HAL_SMARTCARD_MODULE_ENABLED |
||||
#define HAL_SMBUS_MODULE_ENABLED |
||||
#define HAL_WWDG_MODULE_ENABLED |
||||
#define HAL_CORTEX_MODULE_ENABLED |
||||
#define HAL_PCD_MODULE_ENABLED |
||||
|
||||
/* ########################## Oscillator Values adaptation ####################*/ |
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application. |
||||
* This value is used by the RCC HAL module to compute the system frequency |
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/ |
||||
#if !defined (HSE_VALUE) |
||||
#define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ |
||||
#endif /* HSE_VALUE */ |
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT) |
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ |
||||
#endif /* HSE_STARTUP_TIMEOUT */ |
||||
|
||||
/**
|
||||
* @brief Internal Multiple Speed oscillator (MSI) default value. |
||||
* This value is the default MSI range value after Reset. |
||||
*/ |
||||
#if !defined (MSI_VALUE) |
||||
#define MSI_VALUE ((uint32_t)2000000U) /*!< Value of the Internal oscillator in Hz*/ |
||||
#endif /* MSI_VALUE */ |
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value. |
||||
* This value is used by the RCC HAL module to compute the system frequency |
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/ |
||||
#if !defined (HSI_VALUE) |
||||
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ |
||||
#endif /* HSI_VALUE */ |
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator for USB (HSI48) value. |
||||
*/ |
||||
#if !defined (HSI48_VALUE) |
||||
#define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz. |
||||
The real value may vary depending on the variations |
||||
in voltage and temperature. */ |
||||
#endif /* HSI48_VALUE */ |
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value. |
||||
*/ |
||||
#if !defined (LSI_VALUE) |
||||
#define LSI_VALUE ((uint32_t)37000U) /*!< LSI Typical Value in Hz*/ |
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz |
||||
The real value may vary depending on the variations |
||||
in voltage and temperature.*/ |
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value. |
||||
* This value is used by the UART, RTC HAL module to compute the system frequency |
||||
*/ |
||||
#if !defined (LSE_VALUE) |
||||
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ |
||||
#endif /* LSE_VALUE */ |
||||
|
||||
/**
|
||||
* @brief Time out for LSE start up value in ms. |
||||
*/ |
||||
#if !defined (LSE_STARTUP_TIMEOUT) |
||||
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ |
||||
#endif /* LSE_STARTUP_TIMEOUT */ |
||||
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */ |
||||
|
||||
/* ########################### System Configuration ######################### */ |
||||
/**
|
||||
* @brief This is the HAL system configuration section |
||||
*/
|
||||
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ |
||||
#define TICK_INT_PRIORITY (((uint32_t)1U<<__NVIC_PRIO_BITS) - 1U) /*!< tick interrupt priority */ |
||||
#define USE_RTOS 0U |
||||
#define PREFETCH_ENABLE 1U |
||||
#define PREREAD_ENABLE 0U |
||||
#define BUFFER_CACHE_DISABLE 0U |
||||
|
||||
/* ########################## Assert Selection ############################## */ |
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code |
||||
*/ |
||||
/* #define USE_FULL_ASSERT 1 */ |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/ |
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_rcc.h" |
||||
#endif /* HAL_RCC_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_gpio.h" |
||||
#endif /* HAL_GPIO_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_dma.h" |
||||
#endif /* HAL_DMA_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_cortex.h" |
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_adc.h" |
||||
#endif /* HAL_ADC_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_comp.h" |
||||
#endif /* HAL_COMP_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_crc.h" |
||||
#endif /* HAL_CRC_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_cryp.h" |
||||
#endif /* HAL_CRYP_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_dac.h" |
||||
#endif /* HAL_DAC_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_FIREWALL_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_firewall.h" |
||||
#endif /* HAL_FIREWALL_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_flash.h" |
||||
#endif /* HAL_FLASH_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_i2c.h" |
||||
#endif /* HAL_I2C_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_i2s.h" |
||||
#endif /* HAL_I2S_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_iwdg.h" |
||||
#endif /* HAL_IWDG_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_LCD_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_lcd.h" |
||||
#endif /* HAL_LCD_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_lptim.h" |
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_pwr.h" |
||||
#endif /* HAL_PWR_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_rng.h" |
||||
#endif /* HAL_RNG_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_rtc.h" |
||||
#endif /* HAL_RTC_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_spi.h" |
||||
#endif /* HAL_SPI_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_tim.h" |
||||
#endif /* HAL_TIM_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_TSC_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_tsc.h" |
||||
#endif /* HAL_TSC_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_uart.h" |
||||
#endif /* HAL_UART_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_usart.h" |
||||
#endif /* HAL_USART_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_irda.h" |
||||
#endif /* HAL_IRDA_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_smartcard.h" |
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_smbus.h" |
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_wwdg.h" |
||||
#endif /* HAL_WWDG_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_pcd.h" |
||||
#endif /* HAL_PCD_MODULE_ENABLED */ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
#ifdef USE_FULL_ASSERT |
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check. |
||||
* @param expr: If expr is false, it calls assert_failed function |
||||
* which reports the name of the source file and the source |
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value. |
||||
* @retval None |
||||
*/ |
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) |
||||
/* Exported functions ------------------------------------------------------- */ |
||||
void assert_failed(uint8_t* file, uint32_t line); |
||||
#else |
||||
#define assert_param(expr) ((void)0U) |
||||
#endif /* USE_FULL_ASSERT */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_CONF_H */ |
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,382 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_crc.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of CRC HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_CRC_H |
||||
#define __STM32L0xx_HAL_CRC_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRC CRC
|
||||
* @{ |
||||
*/
|
||||
|
||||
/** @defgroup CRC_Exported_Types CRC Exported Types
|
||||
* @{ |
||||
*/ |
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief CRC HAL State Structure definition
|
||||
*/
|
||||
typedef enum |
||||
{
|
||||
HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */ |
||||
HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */ |
||||
HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */ |
||||
HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */ |
||||
HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */ |
||||
}HAL_CRC_StateTypeDef; |
||||
|
||||
|
||||
/**
|
||||
* @brief CRC Init Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used.
|
||||
If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default
|
||||
X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1.
|
||||
In that case, there is no need to set GeneratingPolynomial field. |
||||
If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and CRCLength fields must be set */ |
||||
|
||||
uint8_t DefaultInitValueUse; /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used.
|
||||
If set to DEFAULT_INIT_VALUE_ENABLE, resort to default |
||||
0xFFFFFFFF value. In that case, there is no need to set InitValue field.
|
||||
If otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set */ |
||||
|
||||
uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial. 7, 8, 16 or 32-bit long value for a polynomial degree
|
||||
respectively equal to 7, 8, 16 or 32. This field is written in normal representation,
|
||||
e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65. |
||||
No need to specify it if DefaultPolynomialUse is set to DEFAULT_POLYNOMIAL_ENABLE */
|
||||
|
||||
uint32_t CRCLength; /*!< This parameter is a value of @ref CRC_Polynomial_Sizes and indicates CRC length.
|
||||
Value can be either one of |
||||
CRC_POLYLENGTH_32B (32-bit CRC) |
||||
CRC_POLYLENGTH_16B (16-bit CRC) |
||||
CRC_POLYLENGTH_8B (8-bit CRC) |
||||
CRC_POLYLENGTH_7B (7-bit CRC) */ |
||||
|
||||
uint32_t InitValue; /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse
|
||||
is set to DEFAULT_INIT_VALUE_ENABLE */
|
||||
|
||||
uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode.
|
||||
Can be either one of the following values
|
||||
CRC_INPUTDATA_INVERSION_NONE no input data inversion |
||||
CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2 |
||||
CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C |
||||
CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458 */
|
||||
|
||||
uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode.
|
||||
Can be either
|
||||
CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion, or |
||||
CRC_OUTPUTDATA_INVERSION_ENABLE CRC 0x11223344 is converted into 0x22CC4488 */ |
||||
}CRC_InitTypeDef; |
||||
|
||||
|
||||
/**
|
||||
* @brief CRC Handle Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
CRC_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
CRC_InitTypeDef Init; /*!< CRC configuration parameters */ |
||||
|
||||
HAL_LockTypeDef Lock; /*!< CRC Locking object */ |
||||
|
||||
__IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */ |
||||
|
||||
uint32_t InputDataFormat; /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format.
|
||||
Can be either
|
||||
CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes (8-bit data) |
||||
CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of half-words (16-bit data) |
||||
CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words (32-bits data)
|
||||
Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization error |
||||
must occur if InputBufferFormat is not one of the three values listed above */
|
||||
}CRC_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup CRC_Exported_Constants CRC Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Default_Polynomial_Value Default CRC generating polynomial
|
||||
* @{ |
||||
*/ |
||||
#define DEFAULT_CRC32_POLY 0x04C11DB7U |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Default_InitValue Default CRC computation initialization value
|
||||
* @{ |
||||
*/ |
||||
#define DEFAULT_CRC_INITVALUE 0xFFFFFFFFU |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Default_Polynomial Indicates whether or not default polynomial is used
|
||||
* @{ |
||||
*/ |
||||
#define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00U) |
||||
#define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01U) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Default_InitValue_Use Indicates whether or not default init value is used
|
||||
* @{ |
||||
*/
|
||||
#define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00U) |
||||
#define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01U) |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the IP
|
||||
* @{ |
||||
*/ |
||||
#define CRC_POLYLENGTH_32B ((uint32_t)0x00000000U) |
||||
#define CRC_POLYLENGTH_16B ((uint32_t)CRC_CR_POLYSIZE_0) |
||||
#define CRC_POLYLENGTH_8B ((uint32_t)CRC_CR_POLYSIZE_1) |
||||
#define CRC_POLYLENGTH_7B ((uint32_t)CRC_CR_POLYSIZE) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Polynomial_Size_Definitions CRC polynomial possible sizes actual definitions
|
||||
* @{ |
||||
*/ |
||||
#define HAL_CRC_LENGTH_32B 32U |
||||
#define HAL_CRC_LENGTH_16B 16U |
||||
#define HAL_CRC_LENGTH_8B 8U |
||||
#define HAL_CRC_LENGTH_7B 7U |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup CRC_Input_Buffer_Format CRC input buffer format
|
||||
* @{ |
||||
*/ |
||||
/* WARNING: CRC_INPUT_FORMAT_UNDEFINED is created for reference purposes but
|
||||
* an error is triggered in HAL_CRC_Init() if InputDataFormat field is set
|
||||
* to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for
|
||||
* the CRC APIs to provide a correct result */
|
||||
#define CRC_INPUTDATA_FORMAT_UNDEFINED ((uint32_t)0x00000000U) |
||||
#define CRC_INPUTDATA_FORMAT_BYTES ((uint32_t)0x00000001U) |
||||
#define CRC_INPUTDATA_FORMAT_HALFWORDS ((uint32_t)0x00000002U) |
||||
#define CRC_INPUTDATA_FORMAT_WORDS ((uint32_t)0x00000003U) |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRC_Exported_Macros CRC Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset CRC handle state
|
||||
* @param __HANDLE__: CRC handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET) |
||||
|
||||
/**
|
||||
* @brief Reset CRC Data Register. |
||||
* @param __HANDLE__: CRC handle |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET) |
||||
|
||||
/**
|
||||
* @brief Set CRC INIT non-default value |
||||
* @param __HANDLE__ : CRC handle |
||||
* @param __INIT__ : 32-bit initial value
|
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__)) |
||||
|
||||
/**
|
||||
* @brief Stores a 8-bit data in the Independent Data(ID) register. |
||||
* @param __HANDLE__: CRC handle |
||||
* @param __VALUE__: 8-bit value to be stored in the ID register |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__))) |
||||
|
||||
/**
|
||||
* @brief Returns the 8-bit data stored in the Independent Data(ID) register. |
||||
* @param __HANDLE__: CRC handle |
||||
* @retval 8-bit value of the ID register
|
||||
*/ |
||||
#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros --------------------------------------------------------*/ |
||||
/** @defgroup CRC_Private_Macros CRC Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define IS_DEFAULT_POLYNOMIAL(__DEFAULT__) (((__DEFAULT__) == DEFAULT_POLYNOMIAL_ENABLE) || \ |
||||
((__DEFAULT__) == DEFAULT_POLYNOMIAL_DISABLE)) |
||||
|
||||
|
||||
#define IS_DEFAULT_INIT_VALUE(__VALUE__) (((__VALUE__) == DEFAULT_INIT_VALUE_ENABLE) || \ |
||||
((__VALUE__) == DEFAULT_INIT_VALUE_DISABLE)) |
||||
|
||||
#define IS_CRC_POL_LENGTH(__LENGTH__) (((__LENGTH__) == CRC_POLYLENGTH_32B) || \ |
||||
((__LENGTH__) == CRC_POLYLENGTH_16B) || \
|
||||
((__LENGTH__) == CRC_POLYLENGTH_8B) || \
|
||||
((__LENGTH__) == CRC_POLYLENGTH_7B)) |
||||
|
||||
|
||||
#define IS_CRC_INPUTDATA_FORMAT(__FORMAT__) (((__FORMAT__) == CRC_INPUTDATA_FORMAT_BYTES) || \ |
||||
((__FORMAT__) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \
|
||||
((__FORMAT__) == CRC_INPUTDATA_FORMAT_WORDS)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Include CRC HAL Extension module */ |
||||
#include "stm32l0xx_hal_crc_ex.h" |
||||
|
||||
/** @defgroup CRC_Exported_Constants CRC Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Aliases for inter STM32 series compatibility */ |
||||
#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse |
||||
#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup CRC_Exported_Functions CRC Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Exported_Functions_Group1 Initialization/de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
/* Initialization and de-initialization functions ****************************/ |
||||
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc); |
||||
HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc); |
||||
void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc); |
||||
void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
|
||||
* @{ |
||||
*/ |
||||
/* Peripheral Control functions ***********************************************/ |
||||
uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); |
||||
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
|
||||
* @{ |
||||
*/ |
||||
/* Peripheral State and Error functions ***************************************/ |
||||
HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup CRC_Private CRC Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_CRC_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,174 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_crc_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of CRC HAL extension module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_CRC_EX_H |
||||
#define __STM32L0xx_HAL_CRC_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRCEx CRCEx
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRCEx_Exported_Constants CRCEx Exported constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRCEx_Input_Data_Inversion CRC Extended input data inversion modes
|
||||
* @{ |
||||
*/ |
||||
#define CRC_INPUTDATA_INVERSION_NONE ((uint32_t)0x00000000U) |
||||
#define CRC_INPUTDATA_INVERSION_BYTE ((uint32_t)CRC_CR_REV_IN_0) |
||||
#define CRC_INPUTDATA_INVERSION_HALFWORD ((uint32_t)CRC_CR_REV_IN_1) |
||||
#define CRC_INPUTDATA_INVERSION_WORD ((uint32_t)CRC_CR_REV_IN) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRCEx_Output_Data_Inversion CRC Extended output data inversion modes
|
||||
* @{ |
||||
*/ |
||||
#define CRC_OUTPUTDATA_INVERSION_DISABLE ((uint32_t)0x00000000U) |
||||
#define CRC_OUTPUTDATA_INVERSION_ENABLE ((uint32_t)CRC_CR_REV_OUT) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRCEx_Exported_Macros CRCEx Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Set CRC output reversal |
||||
* @param __HANDLE__ : CRC handle |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT) |
||||
|
||||
/**
|
||||
* @brief Unset CRC output reversal |
||||
* @param __HANDLE__ : CRC handle |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT)) |
||||
|
||||
/**
|
||||
* @brief Set CRC non-default polynomial |
||||
* @param __HANDLE__ : CRC handle |
||||
* @param __POLYNOMIAL__: 7, 8, 16 or 32-bit polynomial
|
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRCEx_Private_Macros CRCEx Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define IS_CRC_INPUTDATA_INVERSION_MODE(__MODE__) (((__MODE__) == CRC_INPUTDATA_INVERSION_NONE) || \ |
||||
((__MODE__) == CRC_INPUTDATA_INVERSION_BYTE) || \
|
||||
((__MODE__) == CRC_INPUTDATA_INVERSION_HALFWORD) || \
|
||||
((__MODE__) == CRC_INPUTDATA_INVERSION_WORD)) |
||||
|
||||
|
||||
#define IS_CRC_OUTPUTDATA_INVERSION_MODE(__MODE__) (((__MODE__) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \ |
||||
((__MODE__) == CRC_OUTPUTDATA_INVERSION_ENABLE)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
/** @defgroup CRCEx_Exported_Functions CRCEx Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRCEx_Exported_Functions_Group1 Extended CRC features functions
|
||||
* @{ |
||||
*/ |
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/* Initialization and de-initialization functions ****************************/ |
||||
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength); |
||||
HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode); |
||||
HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode); |
||||
|
||||
/* Peripheral Control functions ***********************************************/ |
||||
/* Peripheral State and Error functions ***************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_CRC_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,427 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_cryp.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of CRYP HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_CRYP_H |
||||
#define __STM32L0xx_HAL_CRYP_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if defined (STM32L021xx) || defined (STM32L041xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRYP CRYP
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup CRYP_Exported_Types CRYP Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief CRYP Configuration Structure definition
|
||||
*/ |
||||
typedef struct |
||||
{
|
||||
uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.
|
||||
This parameter can be a value of @ref CRYP_Data_Type */ |
||||
|
||||
uint8_t* pKey; /*!< The key used for encryption/decryption */ |
||||
|
||||
uint8_t* pInitVect; /*!< The initialization vector used also as initialization
|
||||
counter in CTR mode */ |
||||
|
||||
}CRYP_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL CRYP State structures definition
|
||||
*/
|
||||
typedef enum |
||||
{ |
||||
HAL_CRYP_STATE_RESET = 0x00U, /*!< CRYP not yet initialized or disabled */ |
||||
HAL_CRYP_STATE_READY = 0x01U, /*!< CRYP initialized and ready for use */ |
||||
HAL_CRYP_STATE_BUSY = 0x02U, /*!< CRYP internal processing is ongoing */ |
||||
HAL_CRYP_STATE_TIMEOUT = 0x03U, /*!< CRYP timeout state */ |
||||
HAL_CRYP_STATE_ERROR = 0x04U /*!< CRYP error state */
|
||||
|
||||
}HAL_CRYP_STATETypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL CRYP phase structures definition
|
||||
*/
|
||||
typedef enum |
||||
{ |
||||
HAL_CRYP_PHASE_READY = 0x01U, /*!< CRYP peripheral is ready for initialization. */ |
||||
HAL_CRYP_PHASE_PROCESS = 0x02U, /*!< CRYP peripheral is in processing phase */ |
||||
}HAL_PhaseTypeDef; |
||||
|
||||
/**
|
||||
* @brief CRYP handle Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
AES_TypeDef *Instance; /*!< Register base address */ |
||||
|
||||
CRYP_InitTypeDef Init; /*!< CRYP required parameters */ |
||||
|
||||
uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */ |
||||
|
||||
uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */ |
||||
|
||||
__IO uint16_t CrypInCount; /*!< Counter of inputed data */ |
||||
|
||||
__IO uint16_t CrypOutCount; /*!< Counter of outputed data */ |
||||
|
||||
HAL_StatusTypeDef Status; /*!< CRYP peripheral status */ |
||||
|
||||
HAL_PhaseTypeDef Phase; /*!< CRYP peripheral phase */ |
||||
|
||||
DMA_HandleTypeDef *hdmain; /*!< CRYP In DMA handle parameters */ |
||||
|
||||
DMA_HandleTypeDef *hdmaout; /*!< CRYP Out DMA handle parameters */ |
||||
|
||||
HAL_LockTypeDef Lock; /*!< CRYP locking object */ |
||||
|
||||
__IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */ |
||||
|
||||
}CRYP_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRYP_Exported_Constants CRYP Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRYP_Data_Type CRYP Data Type
|
||||
* @{ |
||||
*/ |
||||
#define CRYP_DATATYPE_32B ((uint32_t)0x00000000U) |
||||
#define CRYP_DATATYPE_16B AES_CR_DATATYPE_0 |
||||
#define CRYP_DATATYPE_8B AES_CR_DATATYPE_1 |
||||
#define CRYP_DATATYPE_1B AES_CR_DATATYPE |
||||
|
||||
#define IS_CRYP_DATATYPE(DATATYPE) (((DATATYPE) == CRYP_DATATYPE_32B) || \ |
||||
((DATATYPE) == CRYP_DATATYPE_16B) || \
|
||||
((DATATYPE) == CRYP_DATATYPE_8B) || \
|
||||
((DATATYPE) == CRYP_DATATYPE_1B))
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRYP_AlgoModeDirection CRYP Algo Mode Direction
|
||||
* @{ |
||||
*/
|
||||
#define CRYP_CR_ALGOMODE_DIRECTION (uint32_t)(AES_CR_MODE|AES_CR_CHMOD) |
||||
|
||||
#define CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT ((uint32_t)0x00000000U) |
||||
#define CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT (AES_CR_MODE) |
||||
#define CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT (AES_CR_CHMOD_0) |
||||
#define CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT ((uint32_t)(AES_CR_CHMOD_0|AES_CR_MODE)) |
||||
#define CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT (AES_CR_CHMOD_1) |
||||
#define CRYP_CR_ALGOMODE_AES_CTR_DECRYPT ((uint32_t)(AES_CR_CHMOD_1 | AES_CR_MODE_1)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRYP_AES_Interrupts AES Interrupts
|
||||
* @{ |
||||
*/
|
||||
#define CRYP_IT_CC AES_CR_CCIE /*!< Computation Complete interrupt */ |
||||
#define CRYP_IT_ERR AES_CR_ERRIE /*!< Error interrupt */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/** @defgroup CRYP_AES_Flags AES Flags
|
||||
* @{ |
||||
*/
|
||||
#define CRYP_FLAG_CCF AES_SR_CCF /*!< Computation Complete Flag */ |
||||
#define CRYP_FLAG_RDERR AES_SR_RDERR /*!< Read Error Flag */ |
||||
#define CRYP_FLAG_WRERR AES_SR_WRERR /*!< Write Error Flag */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup CRYP_AES_Clear_Flags AES Clear Flags
|
||||
* @{ |
||||
*/
|
||||
#define CRYP_CLEARFLAG_CCF AES_CR_CCFC /*!< Computation Complete Flag Clear */ |
||||
#define CRYP_CLEARFLAG_RDERR AES_CR_ERRC /*!< Read Error Clear */ |
||||
#define CRYP_CLEARFLAG_WRERR AES_CR_ERRC /*!< Write Error Clear */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRYP_Exported_Macros CRYP Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset CRYP handle state
|
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET) |
||||
|
||||
/**
|
||||
* @brief Enable/Disable the CRYP peripheral. |
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, AES_CR_EN) |
||||
#define __HAL_CRYP_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, AES_CR_EN) |
||||
|
||||
/**
|
||||
* @brief Set the algorithm mode: AES-ECB, AES-CBC, AES-CTR, DES-ECB, DES-CBC,... |
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __MODE__: The algorithm mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_SET_MODE(__HANDLE__,__MODE__) SET_BIT((__HANDLE__)->Instance->CR, (__MODE__)) |
||||
|
||||
|
||||
/** @brief Check whether the specified CRYP flag is set or not.
|
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __FLAG__: specifies the flag to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg CRYP_FLAG_CCF : Computation Complete Flag |
||||
* @arg CRYP_FLAG_RDERR : Read Error Flag |
||||
* @arg CRYP_FLAG_WRERR : Write Error Flag |
||||
* @retval The new state of __FLAG__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_CRYP_GET_FLAG(__HANDLE__,__FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
/** @brief Clear the CRYP pending flag.
|
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __FLAG__: specifies the flag to clear. |
||||
* This parameter can be one of the following values: |
||||
* @arg CRYP_CLEARFLAG_CCF : Computation Complete Clear Flag |
||||
* @arg CRYP_CLEARFLAG_RDERR : Read Error Clear |
||||
* @arg CRYP_CLEARFLAG_WRERR : Write Error Clear |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_CLEAR_FLAG(__HANDLE__, __FLAG__) SET_BIT((__HANDLE__)->Instance->CR, (__FLAG__)) |
||||
|
||||
/**
|
||||
* @brief Enable the CRYP interrupt. |
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __INTERRUPT__: CRYP Interrupt. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_ENABLE_IT(__HANDLE__,__INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
||||
|
||||
/**
|
||||
* @brief Disable the CRYP interrupt. |
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __INTERRUPT__: CRYP interrupt. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_DISABLE_IT(__HANDLE__,__INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
||||
|
||||
/** @brief Checks if the specified CRYP interrupt source is enabled or disabled.
|
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __INTERRUPT__: CRYP interrupt source to check |
||||
* This parameter can be one of the following values: |
||||
* @arg CRYP_IT_CC : Computation Complete interrupt |
||||
* @arg CRYP_IT_ERR : Error interrupt (used for RDERR and WRERR) |
||||
* @retval State of interruption (SET or RESET) |
||||
*/ |
||||
#define __HAL_CRYP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ |
||||
(( ((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__) \
|
||||
)? SET : RESET \
|
||||
) |
||||
|
||||
/** @brief Clear the CRYP pending IT.
|
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __IT__: specifies the IT to clear. |
||||
* This parameter can be one of the following values: |
||||
* @arg CRYP_CLEARFLAG_CCF : Computation Complete Clear Flag |
||||
* @arg CRYP_CLEARFLAG_RDERR : Read Error Clear |
||||
* @arg CRYP_CLEARFLAG_WRERR : Write Error Clear |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_CLEAR_IT(__HANDLE__, __IT__) SET_BIT((__HANDLE__)->Instance->CR, (__IT__)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Include CRYP HAL Extension module */ |
||||
#include "stm32l0xx_hal_cryp_ex.h" |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRYP_Exported_Functions CRYP Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Initialization/de-initialization functions *********************************/ |
||||
HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp); |
||||
HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp); |
||||
|
||||
/* MSP functions *************************************************************/ |
||||
void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp); |
||||
void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* AES encryption/decryption using polling ***********************************/ |
||||
HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
||||
|
||||
/* AES encryption/decryption using interrupt *********************************/ |
||||
HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
||||
|
||||
/* AES encryption/decryption using DMA ***************************************/ |
||||
HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @addtogroup CRYP_Exported_Functions_Group3 DMA callback functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* CallBack functions ********************************************************/ |
||||
void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp); |
||||
void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp); |
||||
void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Processing functions ********************************************************/ |
||||
void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Peripheral State functions **************************************************/ |
||||
HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup CRYP_Private CRYP Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
#endif /* STM32L021xx || STM32L041xx || STM32L061xx || STM32L062xx || STM32L063xx || STM32L081xx || STM32L082xx || STM32L083xx */ |
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_CRYP_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,97 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_cryp_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of CRYPEx HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_CRYP_EX_H |
||||
#define __STM32L0xx_HAL_CRYP_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if defined (STM32L021xx) || defined (STM32L041xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRYPEx CRYPEx
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRYPEx_Exported_Functions CRYPEx Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRYPEx_Exported_Functions_Group1 Extended features functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* CallBack functions ********************************************************/ |
||||
void HAL_CRYPEx_ComputationCpltCallback(CRYP_HandleTypeDef *hcryp); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
#endif /* STM32L021xx || STM32L041xx || STM32L061xx || STM32L062xx || STM32L063xx || STM32L081xx || STM32L082xx || STM32L083xx */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_CRYP_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,441 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_dac.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of DAC HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_DAC_H |
||||
#define __STM32L0xx_HAL_DAC_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup DAC DAC
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup DAC_Exported_Types DAC Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief HAL State structures definition
|
||||
*/
|
||||
typedef enum |
||||
{ |
||||
HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ |
||||
HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ |
||||
HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ |
||||
HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ |
||||
HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ |
||||
|
||||
}HAL_DAC_StateTypeDef; |
||||
|
||||
/**
|
||||
* @brief DAC handle Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
DAC_TypeDef *Instance; /*!< Register base address */ |
||||
|
||||
__IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ |
||||
|
||||
HAL_LockTypeDef Lock; /*!< DAC locking object */ |
||||
|
||||
DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ |
||||
|
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
|
||||
#endif |
||||
|
||||
__IO uint32_t ErrorCode; /*!< DAC Error code */ |
||||
|
||||
}DAC_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @brief DAC Configuration regular Channel structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
|
||||
This parameter can be a value of @ref DAC_trigger_selection */ |
||||
|
||||
uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
|
||||
This parameter can be a value of @ref DAC_output_buffer */ |
||||
|
||||
}DAC_ChannelConfTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup DAC_Exported_Constants DAC Exported Constants
|
||||
* @{ |
||||
*/
|
||||
|
||||
/** @defgroup DAC_Error_Code DAC Error Code
|
||||
* @{ |
||||
*/ |
||||
#define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ |
||||
#define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DAM underrun error */ |
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DAM underrun error */ |
||||
#endif |
||||
#define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_trigger_selection DAC trigger selection
|
||||
* @{ |
||||
*/ |
||||
#define DAC_TRIGGER_NONE ((uint32_t)0x00000000U) /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */ |
||||
#define DAC_TRIGGER_T6_TRGO ((uint32_t) DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ |
||||
#define DAC_TRIGGER_T21_TRGO ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM21 TRGO selected as external conversion trigger for DAC channel */ |
||||
#define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ |
||||
#define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ |
||||
#define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ |
||||
|
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define DAC_TRIGGER_T3_TRGO ((uint32_t)( DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel */ |
||||
#define DAC_TRIGGER_T3_CH3 ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM3 CH3 selected as external conversion trigger for DAC channel */ |
||||
#define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ |
||||
#endif |
||||
|
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
||||
((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T3_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T3_CH3) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T21_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
|
||||
((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
||||
#else /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */ |
||||
#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
||||
((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T21_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
|
||||
((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
||||
#endif /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_output_buffer DAC output buffer
|
||||
* @{ |
||||
*/ |
||||
#define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000U) |
||||
#define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1) |
||||
|
||||
#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ |
||||
((STATE) == DAC_OUTPUTBUFFER_DISABLE)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_Channel_selection DAC Channel selection
|
||||
* @{ |
||||
*/ |
||||
#define DAC_CHANNEL_1 ((uint32_t)0x00000000U) |
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define DAC_CHANNEL_2 ((uint32_t)0x00000010U) |
||||
#endif |
||||
|
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ |
||||
((CHANNEL) == DAC_CHANNEL_2)) |
||||
#else |
||||
#define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1) |
||||
#endif |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_data_alignement DAC data alignement
|
||||
* @{ |
||||
*/ |
||||
#define DAC_ALIGN_12B_R ((uint32_t)0x00000000U) |
||||
#define DAC_ALIGN_12B_L ((uint32_t)0x00000004U) |
||||
#define DAC_ALIGN_8B_R ((uint32_t)0x00000008U) |
||||
|
||||
#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ |
||||
((ALIGN) == DAC_ALIGN_12B_L) || \
|
||||
((ALIGN) == DAC_ALIGN_8B_R)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_data DAC data
|
||||
* @{ |
||||
*/ |
||||
#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_flags_definition DAC flags definition
|
||||
* @{ |
||||
*/
|
||||
#define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
||||
#endif |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_IT_definition DAC IT definition
|
||||
* @{ |
||||
*/
|
||||
#define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
||||
#endif |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup DAC_Exported_Macros DAC Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset DAC handle state
|
||||
* @param __HANDLE__: specifies the DAC handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) |
||||
|
||||
/** @brief Enable the DAC channel
|
||||
* @param __HANDLE__: specifies the DAC handle. |
||||
* @param __DAC_CHANNEL__: specifies the DAC channel |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_CHANNEL__) \ |
||||
SET_BIT((__HANDLE__)->Instance->CR, (DAC_CR_EN1 << (__DAC_CHANNEL__))) |
||||
|
||||
/** @brief Disable the DAC channel
|
||||
* @param __HANDLE__: specifies the DAC handle |
||||
* @param __DAC_CHANNEL__: specifies the DAC channel. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_CHANNEL__) \ |
||||
CLEAR_BIT((__HANDLE__)->Instance->CR, (DAC_CR_EN1 << (__DAC_CHANNEL__))) |
||||
|
||||
|
||||
#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ |
||||
SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
||||
|
||||
|
||||
/** @brief Disable the DAC interrupt
|
||||
* @param __HANDLE__: specifies the DAC handle |
||||
* @param __INTERRUPT__: specifies the DAC interrupt. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ |
||||
CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
||||
|
||||
/** @brief Check whether the specified DAC interrupt source is enabled or not.
|
||||
* @param __HANDLE__: DAC handle |
||||
* @param __INTERRUPT__: DAC interrupt source to check |
||||
* This parameter can be any combination of the following values: |
||||
* @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
||||
* @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt (STM32L072xx STM32L073xx STM32L082xx STM32L083xx only) |
||||
* @retval State of interruption (SET or RESET) |
||||
*/ |
||||
#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ |
||||
(((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) |
||||
|
||||
/** @brief Get the selected DAC's flag status.
|
||||
* @param __HANDLE__: specifies the DAC handle. |
||||
* @param __FLAG__: specifies the FLAG. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) \ |
||||
((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
/** @brief Clear the DAC's flag.
|
||||
* @param __HANDLE__: specifies the DAC handle. |
||||
* @param __FLAG__: specifies the FLAG. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) \ |
||||
(((__HANDLE__)->Instance->SR) = (__FLAG__)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Private macro ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup DAC_Private_Macros DAC Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Set DHR12R1 alignment
|
||||
* @param __ALIGNEMENT__: specifies the DAC alignement |
||||
* @retval None |
||||
*/ |
||||
#define DAC_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008U) + (__ALIGNEMENT__)) |
||||
|
||||
/** @brief Set DHR12R2 alignment
|
||||
* @param __ALIGNEMENT__: specifies the DAC alignement |
||||
* @retval None |
||||
*/ |
||||
#define DAC_DHR12R2_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000014U) + (__ALIGNEMENT__)) |
||||
|
||||
/** @brief Set DHR12RD alignment
|
||||
* @param __ALIGNEMENT__: specifies the DAC alignement |
||||
* @retval None |
||||
*/ |
||||
#define DAC_DHR12RD_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000020U) + (__ALIGNEMENT__)) |
||||
|
||||
/** @brief Enable the DAC interrupt
|
||||
* @param __HANDLE__: specifies the DAC handle |
||||
* @param __INTERRUPT__: specifies the DAC interrupt. |
||||
* @retval None |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
|
||||
/* Include DAC HAL Extension module */ |
||||
#include "stm32l0xx_hal_dac_ex.h" |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup DAC_Exported_Functions DAC Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{ |
||||
*/
|
||||
/* Initialization and de-initialization functions *****************************/ |
||||
HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); |
||||
HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); |
||||
void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); |
||||
void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_Exported_Functions_Group2 IO operation functions
|
||||
* @{ |
||||
*/ |
||||
/* IO operation functions *****************************************************/ |
||||
HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); |
||||
HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); |
||||
HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); |
||||
HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); |
||||
HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); |
||||
uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); |
||||
void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); |
||||
void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
||||
void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
||||
void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); |
||||
void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
|
||||
* @{ |
||||
*/ |
||||
/* Peripheral Control functions ***********************************************/ |
||||
HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
|
||||
* @{ |
||||
*/ |
||||
/* Peripheral State functions ***************************************************/ |
||||
HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); |
||||
uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* STM32L011xx && STM32L021xx && STM32L031xx && STM32L041xx && STM32L061xx && STM32L071xx && STM32L081xx*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /*__STM32L0xx_HAL_DAC_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,183 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_dac_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of DAC HAL Extension module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_DAC_EX_H |
||||
#define __STM32L0xx_HAL_DAC_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup DACEx DACEx
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup DACEx_Exported_Constants DACEx Exported Constants
|
||||
* @{ |
||||
*/
|
||||
|
||||
/** @defgroup DACEx_lfsrunmask_triangleamplitude DACEx lfsrunmask triangleamplitude
|
||||
* @{ |
||||
*/ |
||||
#define DAC_LFSRUNMASK_BIT0 ((uint32_t)0x00000000U) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS1_0 ((uint32_t)DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS2_0 ((uint32_t)DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS3_0 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0)/*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS4_0 ((uint32_t)DAC_CR_MAMP1_2) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS5_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS6_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS7_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS8_0 ((uint32_t)DAC_CR_MAMP1_3) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS9_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS10_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS11_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */ |
||||
#define DAC_TRIANGLEAMPLITUDE_1 ((uint32_t)0x00000000U) /*!< Select max triangle amplitude of 1 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_3 ((uint32_t)DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 3 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_7 ((uint32_t)DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 7 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_15 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 15 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_31 ((uint32_t)DAC_CR_MAMP1_2) /*!< Select max triangle amplitude of 31 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_63 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 63 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_127 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 127 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_255 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 255 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_511 ((uint32_t)DAC_CR_MAMP1_3) /*!< Select max triangle amplitude of 511 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_1023 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 1023 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_2047 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 2047 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_4095 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 4095 */ |
||||
|
||||
#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \ |
||||
((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS10_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS11_0) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_1) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_3) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_7) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_15) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_31) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_63) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_127) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_255) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_511) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_1023) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_2047) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_4095)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DACEx_Exported_Functions DACEx Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup DACEx_Exported_Functions_Group1 Extended features functions
|
||||
* @{ |
||||
*/ |
||||
/* Extension features functions ***********************************************/ |
||||
HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude); |
||||
HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude); |
||||
|
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac); |
||||
HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2); |
||||
void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac); |
||||
void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac); |
||||
void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef* hdac); |
||||
void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef* hdac); |
||||
#endif |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup DACEx_Private DACEx Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* !STM32L011xx && !STM32L021xx && !STM32L031xx && !STM32L041xx && !STM32L051xx && !STM32L061xx && !STM32L071xx && !STM32L081xx*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /*__STM32L0xx_HAL_DAC_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,384 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_firewall.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of FIREWALL HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
******************************************************************************
|
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_FIREWALL_H |
||||
#define __STM32L0xx_HAL_FIREWALL_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup FIREWALL FIREWALL
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup FIREWALL_Exported_Types FIREWALL Exported Types
|
||||
* @{ |
||||
*/
|
||||
|
||||
/**
|
||||
* @brief FIREWALL Initialization Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
uint32_t CodeSegmentStartAddress; /*!< Protected code segment start address. This value is 24-bit long, the 8 LSB bits are
|
||||
reserved and forced to 0 in order to allow a 256-byte granularity. */ |
||||
|
||||
uint32_t CodeSegmentLength; /*!< Protected code segment length in bytes. This value is 22-bit long, the 8 LSB bits are
|
||||
reserved and forced to 0 for the length to be a multiple of 256 bytes. */ |
||||
|
||||
uint32_t NonVDataSegmentStartAddress; /*!< Protected non-volatile data segment start address. This value is 24-bit long, the 8 LSB
|
||||
bits are reserved and forced to 0 in order to allow a 256-byte granularity. */ |
||||
|
||||
uint32_t NonVDataSegmentLength; /*!< Protected non-volatile data segment length in bytes. This value is 22-bit long, the 8 LSB
|
||||
bits are reserved and forced to 0 for the length to be a multiple of 256 bytes. */ |
||||
|
||||
uint32_t VDataSegmentStartAddress; /*!< Protected volatile data segment start address. This value is 17-bit long, the 6 LSB bits
|
||||
are reserved and forced to 0 in order to allow a 64-byte granularity. */ |
||||
|
||||
uint32_t VDataSegmentLength; /*!< Protected volatile data segment length in bytes. This value is 17-bit long, the 6 LSB
|
||||
bits are reserved and forced to 0 for the length to be a multiple of 64 bytes. */ |
||||
|
||||
uint32_t VolatileDataExecution; /*!< Set VDE bit specifying whether or not the volatile data segment can be executed.
|
||||
When VDS = 1 (set by parameter VolatileDataShared), VDE bit has no meaning. |
||||
This parameter can be a value of @ref FIREWALL_VolatileData_Executable */
|
||||
|
||||
uint32_t VolatileDataShared; /*!< Set VDS bit in specifying whether or not the volatile data segment can be shared with a
|
||||
non-protected application code. |
||||
This parameter can be a value of @ref FIREWALL_VolatileData_Shared */
|
||||
|
||||
}FIREWALL_InitTypeDef; |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup FIREWALL_Exported_Constants FIREWALL Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup FIREWALL_VolatileData_Executable FIREWALL volatile data segment execution status
|
||||
* @{ |
||||
*/ |
||||
#define FIREWALL_VOLATILEDATA_NOT_EXECUTABLE ((uint32_t)0x0000U) |
||||
#define FIREWALL_VOLATILEDATA_EXECUTABLE ((uint32_t)FW_CR_VDE) |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup FIREWALL_VolatileData_Shared FIREWALL volatile data segment share status
|
||||
* @{ |
||||
*/
|
||||
#define FIREWALL_VOLATILEDATA_NOT_SHARED ((uint32_t)0x0000U) |
||||
#define FIREWALL_VOLATILEDATA_SHARED ((uint32_t)FW_CR_VDS) |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup FIREWALL_Pre_Arm FIREWALL pre arm status
|
||||
* @{ |
||||
*/
|
||||
#define FIREWALL_PRE_ARM_RESET ((uint32_t)0x0000U) |
||||
#define FIREWALL_PRE_ARM_SET ((uint32_t)FW_CR_FPA) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros --------------------------------------------------------*/ |
||||
/** @addtogroup FIREWALL_Private
|
||||
* @{ |
||||
*/ |
||||
#define IS_FIREWALL_CODE_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE + FLASH_SIZE))) |
||||
#define IS_FIREWALL_CODE_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (FLASH_BASE + FLASH_SIZE)) |
||||
|
||||
#define IS_FIREWALL_NONVOLATILEDATA_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE + FLASH_SIZE))) |
||||
#define IS_FIREWALL_NONVOLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (FLASH_BASE + FLASH_SIZE)) |
||||
|
||||
#define IS_FIREWALL_VOLATILEDATA_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= SRAM_BASE) && ((ADDRESS) < (SRAM_BASE + SRAM_SIZE_MAX))) |
||||
#define IS_FIREWALL_VOLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (SRAM_BASE + SRAM_SIZE_MAX)) |
||||
|
||||
|
||||
#define IS_FIREWALL_VOLATILEDATA_SHARE(SHARE) (((SHARE) == FIREWALL_VOLATILEDATA_NOT_SHARED) || \ |
||||
((SHARE) == FIREWALL_VOLATILEDATA_SHARED)) |
||||
|
||||
#define IS_FIREWALL_VOLATILEDATA_EXECUTE(EXECUTE) (((EXECUTE) == FIREWALL_VOLATILEDATA_NOT_EXECUTABLE) || \ |
||||
((EXECUTE) == FIREWALL_VOLATILEDATA_EXECUTABLE))
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
/** @defgroup FIREWALL_Exported_Macros FIREWALL Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Check whether the FIREWALL is enabled or not.
|
||||
* @retval FIREWALL enabling status (TRUE or FALSE). |
||||
*/
|
||||
#define __HAL_FIREWALL_IS_ENABLED() HAL_IS_BIT_CLR(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN) |
||||
|
||||
|
||||
/** @brief Enable FIREWALL pre arm.
|
||||
* @note When FPA bit is set, any code executed outside the protected segment
|
||||
* closes the Firewall, otherwise it generates a system reset. |
||||
* @note This macro provides the same service as HAL_FIREWALL_EnablePreArmFlag() API |
||||
* but can be executed inside a code area protected by the Firewall.
|
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
*/
|
||||
#define __HAL_FIREWALL_PREARM_ENABLE() \ |
||||
do { \
|
||||
__IO uint32_t tmpreg; \
|
||||
SET_BIT(FIREWALL->CR, FW_CR_FPA) ; \
|
||||
/* Read bit back to ensure it is taken into account by IP */ \
|
||||
/* (introduce proper delay inside macro execution) */ \
|
||||
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0) |
||||
|
||||
|
||||
|
||||
/** @brief Disable FIREWALL pre arm.
|
||||
* @note When FPA bit is set, any code executed outside the protected segment
|
||||
* closes the Firewall, otherwise, it generates a system reset. |
||||
* @note This macro provides the same service as HAL_FIREWALL_DisablePreArmFlag() API |
||||
* but can be executed inside a code area protected by the Firewall. |
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
*/
|
||||
#define __HAL_FIREWALL_PREARM_DISABLE() \ |
||||
do { \
|
||||
__IO uint32_t tmpreg; \
|
||||
CLEAR_BIT(FIREWALL->CR, FW_CR_FPA) ; \
|
||||
/* Read bit back to ensure it is taken into account by IP */ \
|
||||
/* (introduce proper delay inside macro execution) */ \
|
||||
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0) |
||||
|
||||
/** @brief Enable volatile data sharing in setting VDS bit.
|
||||
* @note When VDS bit is set, the volatile data segment is shared with non-protected |
||||
* application code. It can be accessed whatever the Firewall state (opened or closed).
|
||||
* @note This macro can be executed inside a code area protected by the Firewall. |
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
*/
|
||||
#define __HAL_FIREWALL_VOLATILEDATA_SHARED_ENABLE() \ |
||||
do { \
|
||||
__IO uint32_t tmpreg; \
|
||||
SET_BIT(FIREWALL->CR, FW_CR_VDS) ; \
|
||||
/* Read bit back to ensure it is taken into account by IP */ \
|
||||
/* (introduce proper delay inside macro execution) */ \
|
||||
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0) |
||||
|
||||
/** @brief Disable volatile data sharing in resetting VDS bit.
|
||||
* @note When VDS bit is reset, the volatile data segment is not shared and cannot be
|
||||
* hit by a non protected executable code when the Firewall is closed. If it is
|
||||
* accessed in such a condition, a system reset is generated by the Firewall. |
||||
* @note This macro can be executed inside a code area protected by the Firewall.
|
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
*/
|
||||
#define __HAL_FIREWALL_VOLATILEDATA_SHARED_DISABLE() \ |
||||
do { \
|
||||
__IO uint32_t tmpreg; \
|
||||
CLEAR_BIT(FIREWALL->CR, FW_CR_VDS) ; \
|
||||
/* Read bit back to ensure it is taken into account by IP */ \
|
||||
/* (introduce proper delay inside macro execution) */ \
|
||||
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0) |
||||
|
||||
/** @brief Enable volatile data execution in setting VDE bit.
|
||||
* @note VDE bit is ignored when VDS is set. IF VDS = 1, the Volatile data segment can be
|
||||
* executed whatever the VDE bit value.
|
||||
* @note When VDE bit is set (with VDS = 0), the volatile data segment is executable. When |
||||
* the Firewall call is closed, a "call gate" entry procedure is required to open
|
||||
* first the Firewall. |
||||
* @note This macro can be executed inside a code area protected by the Firewall. |
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
*/
|
||||
#define __HAL_FIREWALL_VOLATILEDATA_EXECUTION_ENABLE() \ |
||||
do { \
|
||||
__IO uint32_t tmpreg; \
|
||||
SET_BIT(FIREWALL->CR, FW_CR_VDE) ; \
|
||||
/* Read bit back to ensure it is taken into account by IP */ \
|
||||
/* (introduce proper delay inside macro execution) */ \
|
||||
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0) |
||||
|
||||
/** @brief Disable volatile data execution in resetting VDE bit.
|
||||
* @note VDE bit is ignored when VDS is set. IF VDS = 1, the Volatile data segment can be
|
||||
* executed whatever the VDE bit value.
|
||||
* @note When VDE bit is reset (with VDS = 0), the volatile data segment cannot be executed. |
||||
* @note This macro can be executed inside a code area protected by the Firewall.
|
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
*/ |
||||
#define __HAL_FIREWALL_VOLATILEDATA_EXECUTION_DISABLE() \ |
||||
do { \
|
||||
__IO uint32_t tmpreg; \
|
||||
CLEAR_BIT(FIREWALL->CR, FW_CR_VDE) ; \
|
||||
/* Read bit back to ensure it is taken into account by IP */ \
|
||||
/* (introduce proper delay inside macro execution) */ \
|
||||
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0)
|
||||
|
||||
|
||||
/** @brief Check whether or not the volatile data segment is shared.
|
||||
* @note This macro can be executed inside a code area protected by the Firewall. |
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
* @retval VDS bit setting status (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_FIREWALL_GET_VOLATILEDATA_SHARED() ((FIREWALL->CR & FW_CR_VDS) == FW_CR_VDS) |
||||
|
||||
/** @brief Check whether or not the volatile data segment is declared executable.
|
||||
* @note This macro can be executed inside a code area protected by the Firewall. |
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
* @retval VDE bit setting status (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_FIREWALL_GET_VOLATILEDATA_EXECUTION() ((FIREWALL->CR & FW_CR_VDE) == FW_CR_VDE) |
||||
|
||||
/** @brief Check whether or not the Firewall pre arm bit is set.
|
||||
* @note This macro can be executed inside a code area protected by the Firewall. |
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
* @retval FPA bit setting status (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_FIREWALL_GET_PREARM() ((FIREWALL->CR & FW_CR_FPA) == FW_CR_FPA) |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup FIREWALL_Exported_Functions FIREWALL Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup FIREWALL_Exported_Functions_Group1 Initialization Functions
|
||||
* @brief Initialization and Configuration Functions
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Initialization functions ********************************/ |
||||
HAL_StatusTypeDef HAL_FIREWALL_Config(FIREWALL_InitTypeDef * fw_init); |
||||
void HAL_FIREWALL_GetConfig(FIREWALL_InitTypeDef * fw_config); |
||||
void HAL_FIREWALL_EnableFirewall(void); |
||||
void HAL_FIREWALL_EnablePreArmFlag(void); |
||||
void HAL_FIREWALL_DisablePreArmFlag(void); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup FIREWALL_Private FIREWALL Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
|
||||
#endif /* #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_FIREWALL_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,479 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_i2s.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of I2S HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_I2S_H |
||||
#define __STM32L0xx_HAL_I2S_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L011xx) && !defined (STM32L021xx) |
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup I2S I2S
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/** @defgroup I2S_Exported_Types I2S Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief I2S Init structure definition
|
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Mode; /*!< Specifies the I2S operating mode.
|
||||
This parameter can be a value of @ref I2S_Mode */ |
||||
|
||||
uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Standard */ |
||||
|
||||
uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Data_Format */ |
||||
|
||||
uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
|
||||
This parameter can be a value of @ref I2S_MCLK_Output */ |
||||
|
||||
uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Audio_Frequency */ |
||||
|
||||
uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
|
||||
This parameter can be a value of @ref I2S_Clock_Polarity */ |
||||
|
||||
}I2S_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL State structures definition |
||||
*/
|
||||
typedef enum |
||||
{ |
||||
HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */ |
||||
HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */ |
||||
HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */
|
||||
HAL_I2S_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
|
||||
HAL_I2S_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
||||
HAL_I2S_STATE_TIMEOUT = 0x03U, /*!< I2S timeout state */
|
||||
HAL_I2S_STATE_ERROR = 0x04U /*!< I2S error state */
|
||||
}HAL_I2S_StateTypeDef; |
||||
|
||||
/**
|
||||
* @brief I2S handle Structure definition
|
||||
*/ |
||||
typedef struct |
||||
{ |
||||
SPI_TypeDef *Instance; /* I2S registers base address */ |
||||
|
||||
I2S_InitTypeDef Init; /* I2S communication parameters */ |
||||
|
||||
uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */ |
||||
|
||||
__IO uint16_t TxXferSize; /* I2S Tx transfer size */ |
||||
|
||||
__IO uint16_t TxXferCount; /* I2S Tx transfer Counter */ |
||||
|
||||
uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */ |
||||
|
||||
__IO uint16_t RxXferSize; /* I2S Rx transfer size */ |
||||
|
||||
__IO uint16_t RxXferCount; /* I2S Rx transfer counter
|
||||
(This field is initialized at the
|
||||
same value as transfer size at the
|
||||
beginning of the transfer and
|
||||
decremented when a sample is received.
|
||||
NbSamplesReceived = RxBufferSize-RxBufferCount) */ |
||||
|
||||
DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */ |
||||
|
||||
DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */ |
||||
|
||||
__IO HAL_LockTypeDef Lock; /* I2S locking object */ |
||||
|
||||
__IO HAL_I2S_StateTypeDef State; /* I2S communication state */ |
||||
|
||||
__IO uint32_t ErrorCode; /* I2S Error code */ |
||||
|
||||
}I2S_HandleTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup I2S_Exported_Constants I2S Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup I2S_ErrorCode I2S Error Code |
||||
* @{ |
||||
*/ |
||||
#define HAL_I2S_ERROR_NONE ((uint32_t)0x00U) /*!< No error */ |
||||
#define HAL_I2S_ERROR_UDR ((uint32_t)0x01U) /*!< I2S Underrun error */ |
||||
#define HAL_I2S_ERROR_OVR ((uint32_t)0x02U) /*!< I2S Overrun error */ |
||||
#define HAL_I2S_ERROR_FRE ((uint32_t)0x04U) /*!< I2S Frame format error */ |
||||
#define HAL_I2S_ERROR_DMA ((uint32_t)0x08U) /*!< DMA transfer error */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Mode I2S Mode
|
||||
* @{ |
||||
*/ |
||||
#define I2S_MODE_SLAVE_TX ((uint32_t) 0x00000000U) |
||||
#define I2S_MODE_SLAVE_RX ((uint32_t) SPI_I2SCFGR_I2SCFG_0) |
||||
#define I2S_MODE_MASTER_TX ((uint32_t) SPI_I2SCFGR_I2SCFG_1) |
||||
#define I2S_MODE_MASTER_RX ((uint32_t)(SPI_I2SCFGR_I2SCFG_0 |\ |
||||
SPI_I2SCFGR_I2SCFG_1)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Standard I2S Standard
|
||||
* @{ |
||||
*/ |
||||
#define I2S_STANDARD_PHILIPS ((uint32_t) 0x00000000U) |
||||
#define I2S_STANDARD_MSB ((uint32_t) SPI_I2SCFGR_I2SSTD_0) |
||||
#define I2S_STANDARD_LSB ((uint32_t) SPI_I2SCFGR_I2SSTD_1) |
||||
#define I2S_STANDARD_PCM_SHORT ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\ |
||||
SPI_I2SCFGR_I2SSTD_1)) |
||||
#define I2S_STANDARD_PCM_LONG ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\ |
||||
SPI_I2SCFGR_I2SSTD_1 |\
|
||||
SPI_I2SCFGR_PCMSYNC)) |
||||
/** @defgroup I2S_Legacy I2S Legacy
|
||||
* @{ |
||||
*/ |
||||
#define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Data_Format I2S Data Format
|
||||
* @{ |
||||
*/ |
||||
#define I2S_DATAFORMAT_16B ((uint32_t) 0x00000000U) |
||||
#define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t) SPI_I2SCFGR_CHLEN) |
||||
#define I2S_DATAFORMAT_24B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0)) |
||||
#define I2S_DATAFORMAT_32B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_MCLK_Output I2S MCLK Output
|
||||
* @{ |
||||
*/ |
||||
#define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) |
||||
#define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000U) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Audio_Frequency I2S Audio Frequency
|
||||
* @{ |
||||
*/ |
||||
#define I2S_AUDIOFREQ_192K ((uint32_t)192000U) |
||||
#define I2S_AUDIOFREQ_96K ((uint32_t)96000U) |
||||
#define I2S_AUDIOFREQ_48K ((uint32_t)48000U) |
||||
#define I2S_AUDIOFREQ_44K ((uint32_t)44100U) |
||||
#define I2S_AUDIOFREQ_32K ((uint32_t)32000U) |
||||
#define I2S_AUDIOFREQ_22K ((uint32_t)22050U) |
||||
#define I2S_AUDIOFREQ_16K ((uint32_t)16000U) |
||||
#define I2S_AUDIOFREQ_11K ((uint32_t)11025U) |
||||
#define I2S_AUDIOFREQ_8K ((uint32_t)8000U) |
||||
#define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2U) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Clock_Polarity I2S Clock Polarity
|
||||
* @{ |
||||
*/ |
||||
#define I2S_CPOL_LOW ((uint32_t)0x00000000U) |
||||
#define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition
|
||||
* @{ |
||||
*/ |
||||
#define I2S_IT_TXE SPI_CR2_TXEIE |
||||
#define I2S_IT_RXNE SPI_CR2_RXNEIE |
||||
#define I2S_IT_ERR SPI_CR2_ERRIE |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Flag_definition I2S Flag definition
|
||||
* @{ |
||||
*/ |
||||
#define I2S_FLAG_TXE SPI_SR_TXE |
||||
#define I2S_FLAG_RXNE SPI_SR_RXNE |
||||
|
||||
#define I2S_FLAG_UDR SPI_SR_UDR |
||||
#define I2S_FLAG_OVR SPI_SR_OVR |
||||
#define I2S_FLAG_FRE SPI_SR_FRE |
||||
|
||||
#define I2S_FLAG_CHSIDE SPI_SR_CHSIDE |
||||
#define I2S_FLAG_BSY SPI_SR_BSY |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
/** @defgroup I2S_Exported_Macros I2S Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset I2S handle state
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) |
||||
|
||||
/** @brief Enable the specified SPI peripheral (in I2S mode).
|
||||
* @param __HANDLE__: specifies the I2S Handle.
|
||||
* @retval None |
||||
*/ |
||||
#define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
||||
|
||||
/** @brief Disable the specified SPI peripheral (in I2S mode).
|
||||
* @param __HANDLE__: specifies the I2S Handle.
|
||||
* @retval None |
||||
*/ |
||||
#define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
||||
|
||||
/** @brief Enable the specified I2S interrupts.
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
||||
* This parameter can be one of the following values: |
||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
||||
* @arg I2S_IT_ERR: Error interrupt enable |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) |
||||
|
||||
/** @brief Disable the specified I2S interrupts.
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
||||
* This parameter can be one of the following values: |
||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
||||
* @arg I2S_IT_ERR: Error interrupt enable |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) |
||||
|
||||
/** @brief Checks if the specified I2S interrupt source is enabled or disabled.
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. |
||||
* @param __INTERRUPT__: specifies the I2S interrupt source to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
||||
* @arg I2S_IT_ERR: Error interrupt enable |
||||
* @retval The new state of __IT__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
||||
|
||||
/** @brief Checks whether the specified I2S flag is set or not.
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* @param __FLAG__: specifies the flag to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg I2S_FLAG_RXNE: Receive buffer not empty flag |
||||
* @arg I2S_FLAG_TXE: Transmit buffer empty flag |
||||
* @arg I2S_FLAG_UDR: Underrun flag |
||||
* @arg I2S_FLAG_OVR: Overrun flag |
||||
* @arg I2S_FLAG_CHSIDE: Channel Side flag |
||||
* @arg I2S_FLAG_BSY: Busy flag |
||||
* @retval The new state of __FLAG__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
/** @brief Clears the I2S OVR pending flag.
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{__IO uint32_t tmpreg = (__HANDLE__)->Instance->DR;\ |
||||
tmpreg = (__HANDLE__)->Instance->SR;\
|
||||
UNUSED(tmpreg);\
|
||||
}while(0) |
||||
/** @brief Clears the I2S UDR pending flag.
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR) |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup I2S_Exported_Functions I2S Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
/* Initialization/de-initialization functions ********************************/ |
||||
HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); |
||||
HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); |
||||
void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); |
||||
void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Exported_Functions_Group2 IO operation functions
|
||||
* @{ |
||||
*/ |
||||
/* I/O operation functions ***************************************************/ |
||||
/* Blocking mode: Polling */ |
||||
HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
||||
|
||||
/* Non-Blocking mode: Interrupt */ |
||||
HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
||||
void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); |
||||
|
||||
/* Non-Blocking mode: DMA */ |
||||
HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
||||
|
||||
HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); |
||||
HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); |
||||
HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); |
||||
|
||||
/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ |
||||
void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
||||
void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); |
||||
void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
||||
void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); |
||||
void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Exported_Functions_Group3 Peripheral Control and State functions
|
||||
* @{ |
||||
*/ |
||||
/* Peripheral Control and State functions ************************************/ |
||||
HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); |
||||
uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
/** @defgroup I2S_Private I2S Private
|
||||
* @{ |
||||
*/ |
||||
#define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ |
||||
((MODE) == I2S_MODE_SLAVE_RX) || \
|
||||
((MODE) == I2S_MODE_MASTER_TX) || \
|
||||
((MODE) == I2S_MODE_MASTER_RX)) |
||||
|
||||
#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ |
||||
((STANDARD) == I2S_STANDARD_MSB) || \
|
||||
((STANDARD) == I2S_STANDARD_LSB) || \
|
||||
((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
|
||||
((STANDARD) == I2S_STANDARD_PCM_LONG)) |
||||
|
||||
#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ |
||||
((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
|
||||
((FORMAT) == I2S_DATAFORMAT_24B) || \
|
||||
((FORMAT) == I2S_DATAFORMAT_32B)) |
||||
|
||||
#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ |
||||
((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) |
||||
|
||||
#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ |
||||
((FREQ) <= I2S_AUDIOFREQ_192K)) || \
|
||||
((FREQ) == I2S_AUDIOFREQ_DEFAULT)) |
||||
|
||||
#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ |
||||
((CPOL) == I2S_CPOL_HIGH)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup I2S_Private I2S Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* !STM32L031xx && !STM32L041xx && !STM32L011xx && !STM32L021xx */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_I2S_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,843 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_irda.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of IRDA HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_IRDA_H |
||||
#define __STM32L0xx_HAL_IRDA_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup IRDA
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/** @defgroup IRDA_Exported_Types IRDA Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief IRDA Init Structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate.
|
||||
The baud rate register is computed using the following formula: |
||||
Baud Rate Register = ((PCLKx) / ((hirda->Init.BaudRate))) */ |
||||
|
||||
uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref IRDA_Word_Length */ |
||||
|
||||
uint32_t Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of @ref IRDA_Parity |
||||
@note When parity is enabled, the computed parity is inserted |
||||
at the MSB position of the transmitted data (9th bit when |
||||
the word length is set to 9 data bits; 8th bit when the |
||||
word length is set to 8 data bits). */ |
||||
|
||||
uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
|
||||
This parameter can be a value of @ref IRDA_Transfer_Mode */ |
||||
|
||||
uint8_t Prescaler; /*!< Specifies the Prescaler value for dividing the UART/USART source clock
|
||||
to achieve low-power frequency. |
||||
@note Prescaler value 0 is forbidden */ |
||||
|
||||
uint16_t PowerMode; /*!< Specifies the IRDA power mode.
|
||||
This parameter can be a value of @ref IRDA_Low_Power */ |
||||
}IRDA_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL IRDA State structures definition |
||||
* @note HAL IRDA State value is a combination of 2 different substates: gState and RxState. |
||||
* - gState contains IRDA state information related to global Handle management
|
||||
* and also information related to Tx operations. |
||||
* gState value coding follow below described bitmap : |
||||
* b7-b6 Error information
|
||||
* 00 : No Error |
||||
* 01 : (Not Used) |
||||
* 10 : Timeout |
||||
* 11 : Error |
||||
* b5 IP initilisation status |
||||
* 0 : Reset (IP not initialized) |
||||
* 1 : Init done (IP not initialized. HAL IRDA Init function already called) |
||||
* b4-b3 (not used) |
||||
* xx : Should be set to 00 |
||||
* b2 Intrinsic process state |
||||
* 0 : Ready |
||||
* 1 : Busy (IP busy with some configuration or internal operations) |
||||
* b1 (not used) |
||||
* x : Should be set to 0 |
||||
* b0 Tx state |
||||
* 0 : Ready (no Tx operation ongoing) |
||||
* 1 : Busy (Tx operation ongoing) |
||||
* - RxState contains information related to Rx operations. |
||||
* RxState value coding follow below described bitmap : |
||||
* b7-b6 (not used) |
||||
* xx : Should be set to 00 |
||||
* b5 IP initilisation status |
||||
* 0 : Reset (IP not initialized) |
||||
* 1 : Init done (IP not initialized) |
||||
* b4-b2 (not used) |
||||
* xxx : Should be set to 000 |
||||
* b1 Rx state |
||||
* 0 : Ready (no Rx operation ongoing) |
||||
* 1 : Busy (Rx operation ongoing) |
||||
* b0 (not used) |
||||
* x : Should be set to 0. |
||||
*/ |
||||
typedef enum |
||||
{ |
||||
HAL_IRDA_STATE_RESET = 0x00U, /*!< Peripheral is not initialized
|
||||
Value is allowed for gState and RxState */ |
||||
HAL_IRDA_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
|
||||
Value is allowed for gState and RxState */ |
||||
HAL_IRDA_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
|
||||
Value is allowed for gState only */ |
||||
HAL_IRDA_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
|
||||
Value is allowed for gState only */ |
||||
HAL_IRDA_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
|
||||
Value is allowed for RxState only */ |
||||
HAL_IRDA_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
|
||||
Not to be used for neither gState nor RxState. |
||||
Value is result of combination (Or) between gState and RxState values */ |
||||
HAL_IRDA_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
|
||||
Value is allowed for gState only */ |
||||
HAL_IRDA_STATE_ERROR = 0xE0U /*!< Error
|
||||
Value is allowed for gState only */ |
||||
}HAL_IRDA_StateTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL IRDA Error Code structure definition |
||||
*/ |
||||
|
||||
#define HAL_IRDA_ERROR_NONE ((uint32_t)0x00U) /*!< No error */ |
||||
#define HAL_IRDA_ERROR_PE ((uint32_t)0x01U) /*!< Parity error */ |
||||
#define HAL_IRDA_ERROR_NE ((uint32_t)0x02U) /*!< Noise error */ |
||||
#define HAL_IRDA_ERROR_FE ((uint32_t)0x04U) /*!< frame error */ |
||||
#define HAL_IRDA_ERROR_ORE ((uint32_t)0x08U) /*!< Overrun error */ |
||||
#define HAL_IRDA_ERROR_DMA ((uint32_t)0x10U) /*!< DMA transfer error */ |
||||
|
||||
/**
|
||||
* @brief IRDA clock sources definition |
||||
*/ |
||||
typedef enum |
||||
{ |
||||
IRDA_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ |
||||
IRDA_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ |
||||
IRDA_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ |
||||
IRDA_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ |
||||
IRDA_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ |
||||
IRDA_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ |
||||
}IRDA_ClockSourceTypeDef; |
||||
|
||||
/**
|
||||
* @brief IRDA handle Structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
USART_TypeDef *Instance; /*!< IRDA registers base address */ |
||||
|
||||
IRDA_InitTypeDef Init; /*!< IRDA communication parameters */ |
||||
|
||||
uint8_t *pTxBuffPtr; /*!< Pointer to IRDA Tx transfer Buffer */ |
||||
|
||||
uint16_t TxXferSize; /*!< IRDA Tx Transfer size */ |
||||
|
||||
__IO uint16_t TxXferCount; /*!< IRDA Tx Transfer Counter */ |
||||
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to IRDA Rx transfer Buffer */ |
||||
|
||||
uint16_t RxXferSize; /*!< IRDA Rx Transfer size */ |
||||
|
||||
__IO uint16_t RxXferCount; /*!< IRDA Rx Transfer Counter */ |
||||
|
||||
uint16_t Mask; /*!< IRDA RX RDR register mask */ |
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< IRDA Tx DMA Handle parameters */ |
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< IRDA Rx DMA Handle parameters */ |
||||
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */ |
||||
|
||||
__IO HAL_IRDA_StateTypeDef gState; /*!< IRDA state information related to global Handle management
|
||||
and also related to Tx operations. |
||||
This parameter can be a value of @ref HAL_IRDA_StateTypeDef */ |
||||
|
||||
__IO HAL_IRDA_StateTypeDef RxState; /*!< IRDA state information related to Rx operations.
|
||||
This parameter can be a value of @ref HAL_IRDA_StateTypeDef */ |
||||
|
||||
__IO uint32_t ErrorCode; /*!< IRDA Error code */ |
||||
|
||||
}IRDA_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup IRDA_Exported_Constants IRDA Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Word_Length IRDA Word Length
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long frame */ |
||||
#define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000) /*!< 8-bit long frame */ |
||||
#define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long frame */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Parity IRDA Parity
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_PARITY_NONE ((uint32_t)0x00000000U) /*!< No parity */ |
||||
#define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */ |
||||
#define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Transfer_Mode IRDA Transfer Mode
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */ |
||||
#define IRDA_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */ |
||||
#define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Low_Power IRDA Low Power
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_POWERMODE_NORMAL ((uint32_t)0x00000000U) /*!< IRDA normal power mode */ |
||||
#define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP) /*!< IRDA low power mode */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_State IRDA State
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_STATE_DISABLE ((uint32_t)0x00000000U) /*!< IRDA disabled */ |
||||
#define IRDA_STATE_ENABLE ((uint32_t)USART_CR1_UE) /*!< IRDA enabled */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Mode IRDA Mode
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_MODE_DISABLE ((uint32_t)0x00000000U) /*!< Associated UART disabled in IRDA mode */ |
||||
#define IRDA_MODE_ENABLE ((uint32_t)USART_CR3_IREN) /*!< Associated UART enabled in IRDA mode */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_One_Bit IRDA One Bit Sampling
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000U) /*!< One-bit sampling disabled */ |
||||
#define IRDA_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT) /*!< One-bit sampling enabled */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_DMA_Tx IRDA DMA Tx
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_DMA_TX_DISABLE ((uint32_t)0x00000000U) /*!< IRDA DMA TX disabled */ |
||||
#define IRDA_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT) /*!< IRDA DMA TX enabled */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_DMA_Rx IRDA DMA Rx
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_DMA_RX_DISABLE ((uint32_t)0x00000000) /*!< IRDA DMA RX disabled */ |
||||
#define IRDA_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR) /*!< IRDA DMA RX enabled */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Request_Parameters IRDA Request Parameters
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_AUTOBAUD_REQUEST ((uint16_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */ |
||||
#define IRDA_RXDATA_FLUSH_REQUEST ((uint16_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */ |
||||
#define IRDA_TXDATA_FLUSH_REQUEST ((uint16_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Flags IRDA Flags
|
||||
* Elements values convention: 0xXXXX |
||||
* - 0xXXXX : Flag mask in the ISR register |
||||
* @{ |
||||
*/ |
||||
#define IRDA_FLAG_REACK USART_ISR_REACK /*!< IRDA Receive enable acknowledge flag */ |
||||
#define IRDA_FLAG_TEACK USART_ISR_TEACK /*!< IRDA Transmit enable acknowledge flag */ |
||||
#define IRDA_FLAG_BUSY USART_ISR_BUSY /*!< IRDA Busy flag */ |
||||
#define IRDA_FLAG_ABRF USART_ISR_ABRF /*!< IRDA Auto baud rate flag */ |
||||
#define IRDA_FLAG_ABRE USART_ISR_ABRE /*!< IRDA Auto baud rate error */ |
||||
#define IRDA_FLAG_TXE USART_ISR_TXE /*!< IRDA Transmit data register empty */ |
||||
#define IRDA_FLAG_TC USART_ISR_TC /*!< IRDA Transmission complete */ |
||||
#define IRDA_FLAG_RXNE USART_ISR_RXNE /*!< IRDA Read data register not empty */ |
||||
#define IRDA_FLAG_ORE USART_ISR_ORE /*!< IRDA Overrun error */ |
||||
#define IRDA_FLAG_NE USART_ISR_NE /*!< IRDA Noise error */ |
||||
#define IRDA_FLAG_FE USART_ISR_FE /*!< IRDA Framing error */ |
||||
#define IRDA_FLAG_PE USART_ISR_PE /*!< IRDA Parity error */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Interrupt_definition IRDA Interrupts Definition
|
||||
* Elements values convention: 0000ZZZZ0XXYYYYYb |
||||
* - YYYYY : Interrupt source position in the XX register (5bits) |
||||
* - XX : Interrupt source register (2bits) |
||||
* - 01: CR1 register |
||||
* - 10: CR2 register |
||||
* - 11: CR3 register |
||||
* - ZZZZ : Flag position in the ISR register(4bits) |
||||
* @{ |
||||
*/ |
||||
#define IRDA_IT_PE ((uint16_t)0x0028U) /*!< IRDA Parity error interruption */ |
||||
#define IRDA_IT_TXE ((uint16_t)0x0727U) /*!< IRDA Transmit data register empty interruption */ |
||||
#define IRDA_IT_TC ((uint16_t)0x0626U) /*!< IRDA Transmission complete interruption */ |
||||
#define IRDA_IT_RXNE ((uint16_t)0x0525U) /*!< IRDA Read data register not empty interruption */ |
||||
#define IRDA_IT_IDLE ((uint16_t)0x0424U) /*!< IRDA Idle interruption */ |
||||
|
||||
/** Elements values convention: 000000000XXYYYYYb
|
||||
* - YYYYY : Interrupt source position in the XX register (5bits) |
||||
* - XX : Interrupt source register (2bits) |
||||
* - 01: CR1 register |
||||
* - 10: CR2 register |
||||
* - 11: CR3 register |
||||
*/ |
||||
#define IRDA_IT_ERR ((uint16_t)0x0060U) /*!< IRDA Error interruption */ |
||||
|
||||
/** Elements values convention: 0000ZZZZ00000000b
|
||||
* - ZZZZ : Flag position in the ISR register(4bits) |
||||
*/ |
||||
#define IRDA_IT_ORE ((uint16_t)0x0300U) /*!< IRDA Overrun error interruption */ |
||||
#define IRDA_IT_NE ((uint16_t)0x0200U) /*!< IRDA Noise error interruption */ |
||||
#define IRDA_IT_FE ((uint16_t)0x0100U) /*!< IRDA Frame error interruption */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_IT_CLEAR_Flags IRDA Interruption Clear Flags
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ |
||||
#define IRDA_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ |
||||
#define IRDA_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ |
||||
#define IRDA_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ |
||||
#define IRDA_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ |
||||
#define IRDA_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Interruption_Mask IRDA interruptions flags mask
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_IT_MASK ((uint16_t)0x001FU) /*!< IRDA Interruptions flags mask */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
/** @defgroup IRDA_Exported_Macros IRDA Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset IRDA handle state.
|
||||
* @param __HANDLE__: IRDA handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
||||
(__HANDLE__)->gState = HAL_IRDA_STATE_RESET; \
|
||||
(__HANDLE__)->RxState = HAL_IRDA_STATE_RESET; \
|
||||
} while(0) |
||||
|
||||
/** @brief Flush the IRDA DR register.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) \ |
||||
do{ \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, IRDA_RXDATA_FLUSH_REQUEST); \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, IRDA_TXDATA_FLUSH_REQUEST); \
|
||||
} while(0) |
||||
|
||||
/** @brief Clear the specified IRDA pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __FLAG__: specifies the flag to check. |
||||
* This parameter can be any combination of the following values: |
||||
* @arg @ref IRDA_CLEAR_PEF |
||||
* @arg @ref IRDA_CLEAR_FEF |
||||
* @arg @ref IRDA_CLEAR_NEF |
||||
* @arg @ref IRDA_CLEAR_OREF |
||||
* @arg @ref IRDA_CLEAR_TCF |
||||
* @arg @ref IRDA_CLEAR_IDLEF |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
||||
|
||||
/** @brief Clear the IRDA PE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_PEF) |
||||
|
||||
|
||||
/** @brief Clear the IRDA FE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_FEF) |
||||
|
||||
/** @brief Clear the IRDA NE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_NEF) |
||||
|
||||
/** @brief Clear the IRDA ORE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_OREF) |
||||
|
||||
/** @brief Clear the IRDA IDLE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_IDLEF) |
||||
|
||||
/** @brief Check whether the specified IRDA flag is set or not.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __FLAG__: specifies the flag to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_FLAG_REACK Receive enable acknowledge flag |
||||
* @arg @ref IRDA_FLAG_TEACK Transmit enable acknowledge flag |
||||
* @arg @ref IRDA_FLAG_BUSY Busy flag |
||||
* @arg @ref IRDA_FLAG_ABRF Auto Baud rate detection flag |
||||
* @arg @ref IRDA_FLAG_ABRE Auto Baud rate detection error flag |
||||
* @arg @ref IRDA_FLAG_TXE Transmit data register empty flag |
||||
* @arg @ref IRDA_FLAG_TC Transmission Complete flag |
||||
* @arg @ref IRDA_FLAG_RXNE Receive data register not empty flag |
||||
* @arg @ref IRDA_FLAG_ORE OverRun Error flag |
||||
* @arg @ref IRDA_FLAG_NE Noise Error flag |
||||
* @arg @ref IRDA_FLAG_FE Framing Error flag |
||||
* @arg @ref IRDA_FLAG_PE Parity Error flag |
||||
* @retval The new state of __FLAG__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
|
||||
/** @brief Enable the specified IRDA interrupt.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __INTERRUPT__: specifies the IRDA interrupt source to enable. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt |
||||
* @arg @ref IRDA_IT_TC Transmission complete interrupt |
||||
* @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt |
||||
* @arg @ref IRDA_IT_IDLE Idle line detection interrupt |
||||
* @arg @ref IRDA_IT_PE Parity Error interrupt |
||||
* @arg @ref IRDA_IT_ERR Error interrupt(Frame error, noise error, overrun error) |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \ |
||||
((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK)))) |
||||
|
||||
/** @brief Disable the specified IRDA interrupt.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __INTERRUPT__: specifies the IRDA interrupt source to disable. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt |
||||
* @arg @ref IRDA_IT_TC Transmission complete interrupt |
||||
* @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt |
||||
* @arg @ref IRDA_IT_IDLE Idle line detection interrupt |
||||
* @arg @ref IRDA_IT_PE Parity Error interrupt |
||||
* @arg @ref IRDA_IT_ERR Error interrupt(Frame error, noise error, overrun error) |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \ |
||||
((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK)))) |
||||
|
||||
|
||||
/** @brief Check whether the specified IRDA interrupt has occurred or not.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __IT__: specifies the IRDA interrupt source to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt |
||||
* @arg @ref IRDA_IT_TC Transmission complete interrupt |
||||
* @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt |
||||
* @arg @ref IRDA_IT_IDLE Idle line detection interrupt |
||||
* @arg @ref IRDA_IT_ORE OverRun Error interrupt |
||||
* @arg @ref IRDA_IT_NE Noise Error interrupt |
||||
* @arg @ref IRDA_IT_FE Framing Error interrupt |
||||
* @arg @ref IRDA_IT_PE Parity Error interrupt |
||||
* @retval The new state of __IT__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_IRDA_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1U << ((__IT__)>> 0x08U))) |
||||
|
||||
/** @brief Check whether the specified IRDA interrupt source is enabled or not.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __IT__: specifies the IRDA interrupt source to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt |
||||
* @arg @ref IRDA_IT_TC Transmission complete interrupt |
||||
* @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt |
||||
* @arg @ref IRDA_IT_IDLE Idle line detection interrupt |
||||
* @arg @ref IRDA_IT_ERR Framing, overrun or noise error interrupt |
||||
* @arg @ref IRDA_IT_PE Parity Error interrupt |
||||
* @retval The new state of __IT__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \ |
||||
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1U << (((uint16_t)(__IT__)) & IRDA_IT_MASK))) |
||||
|
||||
/** @brief Clear the specified IRDA ISR flag, in setting the proper ICR register flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set |
||||
* to clear the corresponding interrupt |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_CLEAR_PEF Parity Error Clear Flag |
||||
* @arg @ref IRDA_CLEAR_FEF Framing Error Clear Flag |
||||
* @arg @ref IRDA_CLEAR_NEF Noise detected Clear Flag |
||||
* @arg @ref IRDA_CLEAR_OREF OverRun Error Clear Flag |
||||
* @arg @ref IRDA_CLEAR_TCF Transmission Complete Clear Flag |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) |
||||
|
||||
|
||||
/** @brief Set a specific IRDA request flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __REQ__: specifies the request flag to set |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_AUTOBAUD_REQUEST Auto-Baud Rate Request |
||||
* @arg @ref IRDA_RXDATA_FLUSH_REQUEST Receive Data flush Request |
||||
* @arg @ref IRDA_TXDATA_FLUSH_REQUEST Transmit data flush Request |
||||
* |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) |
||||
|
||||
/** @brief Enable the IRDA one bit sample method.
|
||||
* @param __HANDLE__: specifies the IRDA Handle.
|
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
||||
|
||||
/** @brief Disable the IRDA one bit sample method.
|
||||
* @param __HANDLE__: specifies the IRDA Handle.
|
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT)) |
||||
|
||||
/** @brief Enable UART/USART associated to IRDA Handle.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
||||
|
||||
/** @brief Disable UART/USART associated to IRDA Handle.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros --------------------------------------------------------*/ |
||||
/** @defgroup IRDA_Private_Macros IRDA Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Compute the mask to apply to retrieve the received data
|
||||
* according to the word length and to the parity bits activation. |
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None, the mask to apply to the associated UART RDR register is stored in (__HANDLE__)->Mask field. |
||||
*/ |
||||
#define IRDA_MASK_COMPUTATION(__HANDLE__) \ |
||||
do { \
|
||||
if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_7B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x003FU ; \
|
||||
} \
|
||||
} \
|
||||
} while(0) |
||||
|
||||
/** @brief Ensure that IRDA Baud rate is less or equal to maximum value.
|
||||
* @param __BAUDRATE__: specifies the IRDA Baudrate set by the user. |
||||
* @retval True or False |
||||
*/ |
||||
#define IS_IRDA_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 115201U) |
||||
|
||||
/** @brief Ensure that IRDA prescaler value is strictly larger than 0.
|
||||
* @param __PRESCALER__: specifies the IRDA prescaler value set by the user. |
||||
* @retval True or False |
||||
*/ |
||||
#define IS_IRDA_PRESCALER(__PRESCALER__) ((__PRESCALER__) > 0U) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA frame length is valid. |
||||
* @param __LENGTH__: IRDA frame length.
|
||||
* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == IRDA_WORDLENGTH_7B) || \ |
||||
((__LENGTH__) == IRDA_WORDLENGTH_8B) || \
|
||||
((__LENGTH__) == IRDA_WORDLENGTH_9B)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA frame parity is valid. |
||||
* @param __PARITY__: IRDA frame parity.
|
||||
* @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_PARITY(__PARITY__) (((__PARITY__) == IRDA_PARITY_NONE) || \ |
||||
((__PARITY__) == IRDA_PARITY_EVEN) || \
|
||||
((__PARITY__) == IRDA_PARITY_ODD)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA communication mode is valid. |
||||
* @param __MODE__: IRDA communication mode.
|
||||
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_TX_RX_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(IRDA_MODE_TX_RX)))) == (uint32_t)0x00) && ((__MODE__) != (uint32_t)0x00)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA power mode is valid. |
||||
* @param __MODE__: IRDA power mode.
|
||||
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_POWERMODE(__MODE__) (((__MODE__) == IRDA_POWERMODE_LOWPOWER) || \ |
||||
((__MODE__) == IRDA_POWERMODE_NORMAL)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA state is valid. |
||||
* @param __STATE__: IRDA state mode.
|
||||
* @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_STATE(__STATE__) (((__STATE__) == IRDA_STATE_DISABLE) || \ |
||||
((__STATE__) == IRDA_STATE_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA associated UART/USART mode is valid. |
||||
* @param __MODE__: IRDA associated UART/USART mode.
|
||||
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_MODE(__MODE__) (((__MODE__) == IRDA_MODE_DISABLE) || \ |
||||
((__MODE__) == IRDA_MODE_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA sampling rate is valid. |
||||
* @param __ONEBIT__: IRDA sampling rate.
|
||||
* @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == IRDA_ONE_BIT_SAMPLE_DISABLE) || \ |
||||
((__ONEBIT__) == IRDA_ONE_BIT_SAMPLE_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA DMA TX mode is valid. |
||||
* @param __DMATX__: IRDA DMA TX mode.
|
||||
* @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_DMA_TX(__DMATX__) (((__DMATX__) == IRDA_DMA_TX_DISABLE) || \ |
||||
((__DMATX__) == IRDA_DMA_TX_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA DMA RX mode is valid. |
||||
* @param __DMARX__: IRDA DMA RX mode.
|
||||
* @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_DMA_RX(__DMARX__) (((__DMARX__) == IRDA_DMA_RX_DISABLE) || \ |
||||
((__DMARX__) == IRDA_DMA_RX_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA request is valid. |
||||
* @param __PARAM__: IRDA request.
|
||||
* @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == IRDA_AUTOBAUD_REQUEST) || \ |
||||
((__PARAM__) == IRDA_RXDATA_FLUSH_REQUEST) || \
|
||||
((__PARAM__) == IRDA_TXDATA_FLUSH_REQUEST)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Include IRDA HAL Extended module */ |
||||
#include "stm32l0xx_hal_irda_ex.h" |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @addtogroup IRDA_Exported_Functions IRDA Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup IRDA_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Initialization and de-initialization functions ****************************/ |
||||
HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup IRDA_Exported_Functions_Group2 IO operation functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* IO operation functions *****************************************************/ |
||||
HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda); |
||||
/* Transfer Abort functions */ |
||||
HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda); |
||||
|
||||
void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_AbortCpltCallback (IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_AbortTransmitCpltCallback (IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_AbortReceiveCpltCallback (IRDA_HandleTypeDef *hirda); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Peripheral Control functions ************************************************/ |
||||
|
||||
/** @addtogroup IRDA_Exported_Functions_Group4 Peripheral State and Error functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Peripheral State and Error functions ***************************************/ |
||||
HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda); |
||||
uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_IRDA_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,209 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_irda_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of IRDA HAL Extended module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_IRDA_EX_H |
||||
#define __STM32L0xx_HAL_IRDA_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup IRDAEx
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup IRDAEx_Private_Macros IRDAEx Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Report the IRDA clock source.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __CLOCKSOURCE__: output variable. |
||||
* @retval IRDA clocking source, written in __CLOCKSOURCE__. |
||||
*/ |
||||
#if defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx) |
||||
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == LPUART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_LPUART1CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
} while(0) |
||||
|
||||
#else /* (STM32L031xx) || defined (STM32L041xx) || (STM32L011xx) || defined (STM32L021xx) */ |
||||
|
||||
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == LPUART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_LPUART1CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
} while(0) |
||||
#endif /* (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx) */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_IRDA_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,255 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_iwdg.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of IWDG HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_IWDG_H |
||||
#define __STM32L0xx_HAL_IWDG_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup IWDG IWDG
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/** @defgroup IWDG_Exported_Types IWDG Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief IWDG Init structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
|
||||
This parameter can be a value of @ref IWDG_Prescaler */ |
||||
|
||||
uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
||||
|
||||
uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
||||
|
||||
} IWDG_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief IWDG Handle Structure definition
|
||||
*/ |
||||
typedef struct |
||||
{ |
||||
IWDG_TypeDef *Instance; /*!< Register base address */ |
||||
|
||||
IWDG_InitTypeDef Init; /*!< IWDG required parameters */ |
||||
|
||||
}IWDG_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup IWDG_Prescaler IWDG Prescaler
|
||||
* @{ |
||||
*/ |
||||
#define IWDG_PRESCALER_4 0x00000000U /*!< IWDG prescaler set to 4 */ |
||||
#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ |
||||
#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ |
||||
#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ |
||||
#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ |
||||
#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ |
||||
#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IWDG_Window_option IWDG Window option
|
||||
* @{ |
||||
*/ |
||||
#define IWDG_WINDOW_DISABLE IWDG_WINR_WIN |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable the IWDG peripheral. |
||||
* @param __HANDLE__ IWDG handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) |
||||
|
||||
/**
|
||||
* @brief Reload IWDG counter with value defined in the reload register |
||||
* (write access to IWDG_PR, IWDG_RLR & IWDG_WINR registers disabled). |
||||
* @param __HANDLE__ IWDG handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup IWDG_Exported_Functions IWDG Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
|
||||
* @{ |
||||
*/ |
||||
/* Initialization/Start functions ********************************************/ |
||||
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
|
||||
* @{ |
||||
*/ |
||||
/* I/O operation functions ****************************************************/ |
||||
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private constants ---------------------------------------------------------*/ |
||||
/** @defgroup IWDG_Private_Constants IWDG Private Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief IWDG Key Register BitMask |
||||
*/ |
||||
#define IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ |
||||
#define IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ |
||||
#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ |
||||
#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
/** @defgroup IWDG_Private_Macros IWDG Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. |
||||
* @param __HANDLE__ IWDG handle |
||||
* @retval None |
||||
*/ |
||||
#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) |
||||
|
||||
/**
|
||||
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. |
||||
* @param __HANDLE__ IWDG handle |
||||
* @retval None |
||||
*/ |
||||
#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) |
||||
|
||||
/**
|
||||
* @brief Check IWDG prescaler value. |
||||
* @param __PRESCALER__ IWDG prescaler value |
||||
* @retval None |
||||
*/ |
||||
#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ |
||||
((__PRESCALER__) == IWDG_PRESCALER_8) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_16) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_32) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_64) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_128)|| \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_256)) |
||||
|
||||
/**
|
||||
* @brief Check IWDG reload value. |
||||
* @param __RELOAD__ IWDG reload value |
||||
* @retval None |
||||
*/ |
||||
#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) |
||||
|
||||
/**
|
||||
* @brief Check IWDG window value. |
||||
* @param __WINDOW__ IWDG window value |
||||
* @retval None |
||||
*/ |
||||
#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_IWDG_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,804 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_lcd.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of LCD Controller HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_LCD_H |
||||
#define __STM32L0xx_HAL_LCD_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup LCD LCD
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/** @defgroup LCD_Exported_Types LCD Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief LCD Init structure definition |
||||
*/ |
||||
|
||||
typedef struct |
||||
{ |
||||
uint32_t Prescaler; /*!< Configures the LCD Prescaler.
|
||||
This parameter can be one value of @ref LCD_Prescaler */ |
||||
uint32_t Divider; /*!< Configures the LCD Divider.
|
||||
This parameter can be one value of @ref LCD_Divider */ |
||||
uint32_t Duty; /*!< Configures the LCD Duty.
|
||||
This parameter can be one value of @ref LCD_Duty */ |
||||
uint32_t Bias; /*!< Configures the LCD Bias.
|
||||
This parameter can be one value of @ref LCD_Bias */
|
||||
uint32_t VoltageSource; /*!< Selects the LCD Voltage source.
|
||||
This parameter can be one value of @ref LCD_Voltage_Source */
|
||||
uint32_t Contrast; /*!< Configures the LCD Contrast.
|
||||
This parameter can be one value of @ref LCD_Contrast */ |
||||
uint32_t DeadTime; /*!< Configures the LCD Dead Time.
|
||||
This parameter can be one value of @ref LCD_DeadTime */ |
||||
uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration.
|
||||
This parameter can be one value of @ref LCD_PulseOnDuration */ |
||||
uint32_t HighDrive; /*!< Configures the LCD High Drive.
|
||||
This parameter can be one value of @ref LCD_HighDrive */ |
||||
uint32_t BlinkMode; /*!< Configures the LCD Blink Mode.
|
||||
This parameter can be one value of @ref LCD_BlinkMode */ |
||||
uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency.
|
||||
This parameter can be one value of @ref LCD_BlinkFrequency */ |
||||
uint32_t MuxSegment; /*!< Enable or disable mux segment.
|
||||
This parameter can be one value of @ref LCD_MuxSegment */ |
||||
}LCD_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL LCD State structures definition |
||||
*/
|
||||
typedef enum |
||||
{ |
||||
HAL_LCD_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ |
||||
HAL_LCD_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
||||
HAL_LCD_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ |
||||
HAL_LCD_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ |
||||
HAL_LCD_STATE_ERROR = 0x04U /*!< Error */ |
||||
}HAL_LCD_StateTypeDef; |
||||
|
||||
/**
|
||||
* @brief UART handle Structure definition |
||||
*/
|
||||
typedef struct |
||||
{ |
||||
LCD_TypeDef *Instance; /* LCD registers base address */ |
||||
|
||||
LCD_InitTypeDef Init; /* LCD communication parameters */ |
||||
|
||||
HAL_LockTypeDef Lock; /* Locking object */ |
||||
|
||||
__IO HAL_LCD_StateTypeDef State; /* LCD communication state */ |
||||
|
||||
__IO uint32_t ErrorCode; /* LCD Error code */ |
||||
|
||||
}LCD_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup LCD_Exported_Constants LCD Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup LCD_ErrorCode LCD Error Code
|
||||
* @{ |
||||
*/
|
||||
#define HAL_LCD_ERROR_NONE ((uint32_t)0x00U) /*!< No error */ |
||||
#define HAL_LCD_ERROR_FCRSF ((uint32_t)0x01U) /*!< Synchro flag timeout error */ |
||||
#define HAL_LCD_ERROR_UDR ((uint32_t)0x02U) /*!< Update display request flag timeout error */ |
||||
#define HAL_LCD_ERROR_UDD ((uint32_t)0x04U) /*!< Update display done flag timeout error */ |
||||
#define HAL_LCD_ERROR_ENS ((uint32_t)0x08U) /*!< LCD enabled status flag timeout error */ |
||||
#define HAL_LCD_ERROR_RDY ((uint32_t)0x10U) /*!< LCD Booster ready timeout error */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Prescaler LCD Prescaler
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_PRESCALER_1 ((uint32_t)0x00000000U) /*!< CLKPS = LCDCLK */ |
||||
#define LCD_PRESCALER_2 ((uint32_t)0x00400000U) /*!< CLKPS = LCDCLK/2 */ |
||||
#define LCD_PRESCALER_4 ((uint32_t)0x00800000U) /*!< CLKPS = LCDCLK/4 */ |
||||
#define LCD_PRESCALER_8 ((uint32_t)0x00C00000U) /*!< CLKPS = LCDCLK/8 */ |
||||
#define LCD_PRESCALER_16 ((uint32_t)0x01000000U) /*!< CLKPS = LCDCLK/16 */ |
||||
#define LCD_PRESCALER_32 ((uint32_t)0x01400000U) /*!< CLKPS = LCDCLK/32 */ |
||||
#define LCD_PRESCALER_64 ((uint32_t)0x01800000U) /*!< CLKPS = LCDCLK/64 */ |
||||
#define LCD_PRESCALER_128 ((uint32_t)0x01C00000U) /*!< CLKPS = LCDCLK/128 */ |
||||
#define LCD_PRESCALER_256 ((uint32_t)0x02000000U) /*!< CLKPS = LCDCLK/256 */ |
||||
#define LCD_PRESCALER_512 ((uint32_t)0x02400000U) /*!< CLKPS = LCDCLK/512 */ |
||||
#define LCD_PRESCALER_1024 ((uint32_t)0x02800000U) /*!< CLKPS = LCDCLK/1024 */ |
||||
#define LCD_PRESCALER_2048 ((uint32_t)0x02C00000U) /*!< CLKPS = LCDCLK/2048 */ |
||||
#define LCD_PRESCALER_4096 ((uint32_t)0x03000000U) /*!< CLKPS = LCDCLK/4096 */ |
||||
#define LCD_PRESCALER_8192 ((uint32_t)0x03400000U) /*!< CLKPS = LCDCLK/8192 */ |
||||
#define LCD_PRESCALER_16384 ((uint32_t)0x03800000U) /*!< CLKPS = LCDCLK/16384 */ |
||||
#define LCD_PRESCALER_32768 ((uint32_t)LCD_FCR_PS) /*!< CLKPS = LCDCLK/32768 */ |
||||
|
||||
#define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \ |
||||
((__PRESCALER__) == LCD_PRESCALER_2) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_4) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_8) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_16) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_32) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_64) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_128) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_256) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_512) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_1024) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_2048) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_4096) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_8192) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_16384) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_32768)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Divider LCD Divider
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_DIVIDER_16 ((uint32_t)0x00000000U) /*!< LCD frequency = CLKPS/16 */ |
||||
#define LCD_DIVIDER_17 ((uint32_t)0x00040000U) /*!< LCD frequency = CLKPS/17 */ |
||||
#define LCD_DIVIDER_18 ((uint32_t)0x00080000U) /*!< LCD frequency = CLKPS/18 */ |
||||
#define LCD_DIVIDER_19 ((uint32_t)0x000C0000U) /*!< LCD frequency = CLKPS/19 */ |
||||
#define LCD_DIVIDER_20 ((uint32_t)0x00100000U) /*!< LCD frequency = CLKPS/20 */ |
||||
#define LCD_DIVIDER_21 ((uint32_t)0x00140000U) /*!< LCD frequency = CLKPS/21 */ |
||||
#define LCD_DIVIDER_22 ((uint32_t)0x00180000U) /*!< LCD frequency = CLKPS/22 */ |
||||
#define LCD_DIVIDER_23 ((uint32_t)0x001C0000U) /*!< LCD frequency = CLKPS/23 */ |
||||
#define LCD_DIVIDER_24 ((uint32_t)0x00200000U) /*!< LCD frequency = CLKPS/24 */ |
||||
#define LCD_DIVIDER_25 ((uint32_t)0x00240000U) /*!< LCD frequency = CLKPS/25 */ |
||||
#define LCD_DIVIDER_26 ((uint32_t)0x00280000U) /*!< LCD frequency = CLKPS/26 */ |
||||
#define LCD_DIVIDER_27 ((uint32_t)0x002C0000U) /*!< LCD frequency = CLKPS/27 */ |
||||
#define LCD_DIVIDER_28 ((uint32_t)0x00300000U) /*!< LCD frequency = CLKPS/28 */ |
||||
#define LCD_DIVIDER_29 ((uint32_t)0x00340000U) /*!< LCD frequency = CLKPS/29 */ |
||||
#define LCD_DIVIDER_30 ((uint32_t)0x00380000U) /*!< LCD frequency = CLKPS/30 */ |
||||
#define LCD_DIVIDER_31 ((uint32_t)LCD_FCR_DIV) /*!< LCD frequency = CLKPS/31 */ |
||||
|
||||
#define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \ |
||||
((__DIVIDER__) == LCD_DIVIDER_17) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_18) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_19) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_20) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_21) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_22) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_23) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_24) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_25) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_26) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_27) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_28) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_29) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_30) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_31)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/** @defgroup LCD_Duty LCD Duty
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_DUTY_STATIC ((uint32_t)0x00000000U) /*!< Static duty */ |
||||
#define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */ |
||||
#define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */ |
||||
#define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */ |
||||
#define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */ |
||||
|
||||
#define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \ |
||||
((__DUTY__) == LCD_DUTY_1_2) || \
|
||||
((__DUTY__) == LCD_DUTY_1_3) || \
|
||||
((__DUTY__) == LCD_DUTY_1_4) || \
|
||||
((__DUTY__) == LCD_DUTY_1_8)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
|
||||
/** @defgroup LCD_Bias LCD Bias
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_BIAS_1_4 ((uint32_t)0x00000000U) /*!< 1/4 Bias */ |
||||
#define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */ |
||||
#define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */ |
||||
|
||||
#define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \ |
||||
((__BIAS__) == LCD_BIAS_1_2) || \
|
||||
((__BIAS__) == LCD_BIAS_1_3)) |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup LCD_Voltage_Source LCD Voltage Source
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_VOLTAGESOURCE_INTERNAL ((uint32_t)0x00000000U) /*!< Internal voltage source for the LCD */ |
||||
#define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */ |
||||
|
||||
#define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \ |
||||
((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup LCD_Interrupts LCD Interrupts
|
||||
* @{ |
||||
*/ |
||||
#define LCD_IT_SOF LCD_FCR_SOFIE |
||||
#define LCD_IT_UDD LCD_FCR_UDDIE |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_PulseOnDuration LCD Pulse On Duration
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_PULSEONDURATION_0 ((uint32_t)0x00000000U) /*!< Pulse ON duration = 0 pulse */ |
||||
#define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */ |
||||
#define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */ |
||||
#define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */ |
||||
#define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */ |
||||
#define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */ |
||||
#define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */ |
||||
#define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */ |
||||
|
||||
#define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \ |
||||
((__DURATION__) == LCD_PULSEONDURATION_1) || \
|
||||
((__DURATION__) == LCD_PULSEONDURATION_2) || \
|
||||
((__DURATION__) == LCD_PULSEONDURATION_3) || \
|
||||
((__DURATION__) == LCD_PULSEONDURATION_4) || \
|
||||
((__DURATION__) == LCD_PULSEONDURATION_5) || \
|
||||
((__DURATION__) == LCD_PULSEONDURATION_6) || \
|
||||
((__DURATION__) == LCD_PULSEONDURATION_7)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_HighDrive LCD HighDrive
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_HIGHDRIVE_0 ((uint32_t)0x00000000U) /*!< Low resistance Drive */ |
||||
#define LCD_HIGHDRIVE_1 (LCD_FCR_HD) /*!< High resistance Drive */ |
||||
|
||||
#define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) (((__HIGHDRIVE__) == LCD_HIGHDRIVE_0) || \ |
||||
((__HIGHDRIVE__) == LCD_HIGHDRIVE_1)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_DeadTime LCD Dead Time
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_DEADTIME_0 ((uint32_t)0x00000000U) /*!< No dead Time */ |
||||
#define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */ |
||||
#define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */ |
||||
#define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */ |
||||
#define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */ |
||||
#define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */ |
||||
#define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */ |
||||
#define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */ |
||||
|
||||
#define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \ |
||||
((__TIME__) == LCD_DEADTIME_1) || \
|
||||
((__TIME__) == LCD_DEADTIME_2) || \
|
||||
((__TIME__) == LCD_DEADTIME_3) || \
|
||||
((__TIME__) == LCD_DEADTIME_4) || \
|
||||
((__TIME__) == LCD_DEADTIME_5) || \
|
||||
((__TIME__) == LCD_DEADTIME_6) || \
|
||||
((__TIME__) == LCD_DEADTIME_7)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_BlinkMode LCD Blink Mode
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_BLINKMODE_OFF ((uint32_t)0x00000000U) /*!< Blink disabled */ |
||||
#define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */ |
||||
#define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to |
||||
8 pixels according to the programmed duty) */ |
||||
#define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */ |
||||
|
||||
#define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \ |
||||
((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \
|
||||
((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \
|
||||
((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM)) |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup LCD_BlinkFrequency LCD Blink Frequency
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_BLINKFREQUENCY_DIV8 ((uint32_t)0x00000000U) /*!< The Blink frequency = fLCD/8 */ |
||||
#define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */ |
||||
#define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */ |
||||
#define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */ |
||||
#define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */ |
||||
#define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */ |
||||
#define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */ |
||||
#define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */ |
||||
|
||||
#define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \ |
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \
|
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \
|
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \
|
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \
|
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \
|
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \
|
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Contrast LCD Contrast
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_CONTRASTLEVEL_0 ((uint32_t)0x00000000U) /*!< Maximum Voltage = 2.60V */ |
||||
#define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */ |
||||
#define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */ |
||||
#define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */ |
||||
#define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */ |
||||
#define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.25V */ |
||||
#define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.38V */ |
||||
#define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.51V */ |
||||
|
||||
#define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \ |
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \
|
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \
|
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \
|
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \
|
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \
|
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \
|
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_7)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_MuxSegment LCD Mux Segment
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_MUXSEGMENT_DISABLE ((uint32_t)0x00000000U) /*!< SEG pin multiplexing disabled */ |
||||
#define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /*!< SEG[31:28] are multiplexed with SEG[43:40] */ |
||||
|
||||
#define IS_LCD_MUXSEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \ |
||||
((__VALUE__) == LCD_MUXSEGMENT_DISABLE)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_BUFEN LCD Voltage output buffer enable
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_VOLTBUFOUT_DISABLE ((uint32_t)0x00000000U) /*!< Voltage output buffer disabled */ |
||||
#define LCD_VOLTBUFOUT_ENABLE (LCD_CR_BUFEN) /*!< BUFEN[1] Voltage output buffer enabled */ |
||||
|
||||
#define IS_LCD_VOLTBUFOUT(__VALUE__) (((__VALUE__) == LCD_VOLTBUFOUT_ENABLE) || \ |
||||
((__VALUE__) == LCD_VOLTBUFOUT_DISABLE)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Flag LCD Flag
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_FLAG_ENS LCD_SR_ENS |
||||
#define LCD_FLAG_SOF LCD_SR_SOF |
||||
#define LCD_FLAG_UDR LCD_SR_UDR |
||||
#define LCD_FLAG_UDD LCD_SR_UDD |
||||
#define LCD_FLAG_RDY LCD_SR_RDY |
||||
#define LCD_FLAG_FCRSF LCD_SR_FCRSR |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup LCD_RAMRegister LCD RAMRegister
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_RAM_REGISTER0 ((uint32_t)0x00000000U) /*!< LCD RAM Register 0 */ |
||||
#define LCD_RAM_REGISTER1 ((uint32_t)0x00000001U) /*!< LCD RAM Register 1 */ |
||||
#define LCD_RAM_REGISTER2 ((uint32_t)0x00000002U) /*!< LCD RAM Register 2 */ |
||||
#define LCD_RAM_REGISTER3 ((uint32_t)0x00000003U) /*!< LCD RAM Register 3 */ |
||||
#define LCD_RAM_REGISTER4 ((uint32_t)0x00000004U) /*!< LCD RAM Register 4 */ |
||||
#define LCD_RAM_REGISTER5 ((uint32_t)0x00000005U) /*!< LCD RAM Register 5 */ |
||||
#define LCD_RAM_REGISTER6 ((uint32_t)0x00000006U) /*!< LCD RAM Register 6 */ |
||||
#define LCD_RAM_REGISTER7 ((uint32_t)0x00000007U) /*!< LCD RAM Register 7 */ |
||||
#define LCD_RAM_REGISTER8 ((uint32_t)0x00000008U) /*!< LCD RAM Register 8 */ |
||||
#define LCD_RAM_REGISTER9 ((uint32_t)0x00000009U) /*!< LCD RAM Register 9 */ |
||||
#define LCD_RAM_REGISTER10 ((uint32_t)0x0000000AU) /*!< LCD RAM Register 10 */ |
||||
#define LCD_RAM_REGISTER11 ((uint32_t)0x0000000BU) /*!< LCD RAM Register 11 */ |
||||
#define LCD_RAM_REGISTER12 ((uint32_t)0x0000000CU) /*!< LCD RAM Register 12 */ |
||||
#define LCD_RAM_REGISTER13 ((uint32_t)0x0000000DU) /*!< LCD RAM Register 13 */ |
||||
#define LCD_RAM_REGISTER14 ((uint32_t)0x0000000EU) /*!< LCD RAM Register 14 */ |
||||
#define LCD_RAM_REGISTER15 ((uint32_t)0x0000000FU) /*!< LCD RAM Register 15 */ |
||||
|
||||
#define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \ |
||||
((__REGISTER__) == LCD_RAM_REGISTER1) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER2) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER3) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER4) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER5) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER6) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER7) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER8) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER9) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER10) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER11) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER12) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER13) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER14) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER15)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup LCD_Exported_Macros LCD Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset LCD handle state
|
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET) |
||||
|
||||
/** @brief macros to enables or disables the LCD
|
||||
* @param __HANDLE__: specifies the LCD Handle.
|
||||
* @retval None |
||||
*/
|
||||
#define __HAL_LCD_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) |
||||
#define __HAL_LCD_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) |
||||
|
||||
/** @brief macros to enables or disables the Voltage output buffer
|
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_VOLTOUTBUFFER_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN)) |
||||
#define __HAL_LCD_VOLTOUTBUFFER_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN)) |
||||
|
||||
/** @brief Macros to enable or disable the low resistance divider. Displays with high
|
||||
* internal resistance may need a longer drive time to achieve
|
||||
* satisfactory contrast. This function is useful in this case if some
|
||||
* additional power consumption can be tolerated. |
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @note When this mode is enabled, the PulseOn Duration (PON) have to be
|
||||
* programmed to 1/CK_PS (LCD_PULSEONDURATION_1). |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \ |
||||
do{ \
|
||||
SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0) |
||||
|
||||
#define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \ |
||||
do{ \
|
||||
CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0) |
||||
|
||||
/**
|
||||
* @brief Macro to configure the LCD pulses on duration. |
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __DURATION__: specifies the LCD pulse on duration in terms of
|
||||
* CK_PS (prescaled LCD clock period) pulses. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_PULSEONDURATION_0: 0 pulse |
||||
* @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS |
||||
* @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS |
||||
* @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS |
||||
* @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS |
||||
* @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS |
||||
* @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS |
||||
* @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \ |
||||
do{ \
|
||||
MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0) |
||||
|
||||
/**
|
||||
* @brief Macro to configure the LCD dead time. |
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __DEADTIME__: specifies the LCD dead time. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_DEADTIME_0: No dead Time |
||||
* @arg LCD_DEADTIME_1: One Phase between different couple of Frame |
||||
* @arg LCD_DEADTIME_2: Two Phase between different couple of Frame |
||||
* @arg LCD_DEADTIME_3: Three Phase between different couple of Frame |
||||
* @arg LCD_DEADTIME_4: Four Phase between different couple of Frame |
||||
* @arg LCD_DEADTIME_5: Five Phase between different couple of Frame |
||||
* @arg LCD_DEADTIME_6: Six Phase between different couple of Frame
|
||||
* @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \ |
||||
do{ \
|
||||
MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0) |
||||
|
||||
/**
|
||||
* @brief Macro to configure the LCD Contrast. |
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __CONTRAST__: specifies the LCD Contrast. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V |
||||
* @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V |
||||
* @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V |
||||
* @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V |
||||
* @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V |
||||
* @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V |
||||
* @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V |
||||
* @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \ |
||||
do{ \
|
||||
MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* @brief Macro to configure the LCD Blink mode and Blink frequency. |
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __BLINKMODE__: specifies the LCD blink mode. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_BLINKMODE_OFF: Blink disabled |
||||
* @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel) |
||||
* @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8
|
||||
* pixels according to the programmed duty) |
||||
* @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM
|
||||
* (all pixels) |
||||
* @param __BLINKFREQUENCY__: specifies the LCD blink frequency. |
||||
* @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8 |
||||
* @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16 |
||||
* @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32 |
||||
* @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64
|
||||
* @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128 |
||||
* @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256 |
||||
* @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512 |
||||
* @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024 |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \ |
||||
do{ \
|
||||
MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0) |
||||
|
||||
/** @brief Enables or disables the specified LCD interrupt.
|
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __INTERRUPT__: specifies the LCD interrupt source to be enabled or disabled. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_IT_SOF: Start of Frame Interrupt |
||||
* @arg LCD_IT_UDD: Update Display Done Interrupt |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ |
||||
do{ \
|
||||
SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0)
|
||||
#define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ |
||||
do{ \
|
||||
CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0) |
||||
|
||||
/** @brief Checks whether the specified LCD interrupt is enabled or not.
|
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __IT__: specifies the LCD interrupt source to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_IT_SOF: Start of Frame Interrupt |
||||
* @arg LCD_IT_UDD: Update Display Done Interrupt. |
||||
* @note If the device is in STOP mode (PCLK not provided) UDD will not
|
||||
* generate an interrupt even if UDDIE = 1.
|
||||
* If the display is not enabled the UDD interrupt will never occur. |
||||
* @retval The state of __IT__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__)) |
||||
|
||||
/** @brief Checks whether the specified LCD flag is set or not.
|
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __FLAG__: specifies the flag to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status. |
||||
* @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR
|
||||
* goes from 0 to 1. On deactivation it reflects the real status of
|
||||
* LCD so it becomes 0 at the end of the last displayed frame.
|
||||
* @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at
|
||||
* the beginning of a new frame, at the same time as the display data is
|
||||
* updated. |
||||
* @arg LCD_FLAG_UDR: Update Display Request flag. |
||||
* @arg LCD_FLAG_UDD: Update Display Done flag.
|
||||
* @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status
|
||||
* of the step-up converter. |
||||
* @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag.
|
||||
* This flag is set by hardware each time the LCD_FCR register is updated
|
||||
* in the LCDCLK domain.
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
/** @brief Clears the specified LCD pending flag.
|
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __FLAG__: specifies the flag to clear. |
||||
* This parameter can be any combination of the following values: |
||||
* @arg LCD_FLAG_SOF: Start of Frame Interrupt |
||||
* @arg LCD_FLAG_UDD: Update Display Done Interrupt |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions ------------------------------------------------------- */ |
||||
|
||||
/** @defgroup LCD_Exported_Functions LCD Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Exported_Functions_Group1 Initialization and de-initialization methods
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Initialization/de-initialization methods **********************************/ |
||||
HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd); |
||||
HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd); |
||||
void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd); |
||||
void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Exported_Functions_Group2 IO operation methods
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* IO operation methods *******************************************************/ |
||||
HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data); |
||||
HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd); |
||||
HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Exported_Functions_Group3 Peripheral State methods
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Peripheral State methods **************************************************/ |
||||
HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd); |
||||
uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup LCD_Private
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Private functions ---------------------------------------------------------*/ |
||||
HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup LCD_Private LCD Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* STM32L053xx || STM32L063xx || STM32L073xx || STM32L083xx */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_LCD_H */ |
||||
|
||||
/******************* (C) COPYRIGHT 2016 STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,743 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_lptim.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of LPTIM HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_LPTIM_H |
||||
#define __STM32L0xx_HAL_LPTIM_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM LPTIM (Low power timer)
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup LPTIM_Exported_Types LPTIM Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM_Clock_Configuration LPTIM Clock configuration structure
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT ((uint32_t)EXTI_IMR_IM29) /*!< External interrupt line 29 Connected to the LPTIM EXTI Line */ |
||||
|
||||
/**
|
||||
* @brief LPTIM Clock configuration definition
|
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Source; /*!< Selects the clock source.
|
||||
This parameter can be a value of @ref LPTIM_Clock_Source */ |
||||
|
||||
uint32_t Prescaler; /*!< Specifies the counter clock Prescaler.
|
||||
This parameter can be a value of @ref LPTIM_Clock_Prescaler */ |
||||
|
||||
}LPTIM_ClockConfigTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM_ULPClock_Configuration LPTIM ULP Clock configuration structure
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief LPTIM ULP Clock configuration definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit
|
||||
if the ULPTIM input is selected. |
||||
Note: This parameter is used only when Ultra low power clock source is used. |
||||
Note: If the polarity is configured on 'both edges', an auxiliary clock |
||||
(one of the Low power oscillator) must be active. |
||||
This parameter can be a value of @ref LPTIM_Clock_Polarity */
|
||||
|
||||
uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter.
|
||||
Note: This parameter is used only when Ultra low power clock source is used. |
||||
This parameter can be a value of @ref LPTIM_Clock_Sample_Time */
|
||||
|
||||
}LPTIM_ULPClockConfigTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM_Trigger_Configuration LPTIM Trigger configuration structure
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief LPTIM Trigger configuration structure |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Source; /*!< Selects the Trigger source.
|
||||
This parameter can be a value of @ref LPTIM_Trigger_Source */ |
||||
|
||||
uint32_t ActiveEdge; /*!< Selects the Trigger active edge.
|
||||
Note: This parameter is used only when an external trigger is used. |
||||
This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ |
||||
|
||||
uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter.
|
||||
Note: This parameter is used only when an external trigger is used. |
||||
This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */
|
||||
}LPTIM_TriggerConfigTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM_Init_Configuration LPTIM Initialization configuration structure
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief LPTIM Initialization Structure definition
|
||||
*/ |
||||
typedef struct |
||||
{
|
||||
LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ |
||||
|
||||
LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /*!< Specifies the Ultra Low Power clock parameters */ |
||||
|
||||
LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ |
||||
|
||||
uint32_t OutputPolarity; /*!< Specifies the Output polarity.
|
||||
This parameter can be a value of @ref LPTIM_Output_Polarity */ |
||||
|
||||
uint32_t UpdateMode; /*!< Specifies whether the update of the autorelaod and the compare
|
||||
values is done immediately or after the end of current period. |
||||
This parameter can be a value of @ref LPTIM_Updating_Mode */ |
||||
|
||||
uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event
|
||||
or each external event. |
||||
This parameter can be a value of @ref LPTIM_Counter_Source */
|
||||
|
||||
}LPTIM_InitTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/** @defgroup LPTIM_State_structure LPTIM state definition
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief HAL LPTIM State structure definition
|
||||
*/
|
||||
typedef enum __HAL_LPTIM_StateTypeDef |
||||
{ |
||||
HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */ |
||||
HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
||||
HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
|
||||
HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
|
||||
HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */
|
||||
}HAL_LPTIM_StateTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM_Handle LPTIM handler
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief LPTIM handle Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
LPTIM_TypeDef *Instance; /*!< Register base address */ |
||||
|
||||
LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ |
||||
|
||||
HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< LPTIM locking object */ |
||||
|
||||
__IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ |
||||
|
||||
}LPTIM_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup LPTIM_Exported_Constants LPTIM Exported constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Check autoreload value */ |
||||
#define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((__AUTORELOAD__) <= 0x0000FFFFU) |
||||
|
||||
/* Check compare value */ |
||||
#define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFU) |
||||
|
||||
/** @defgroup LPTIM_Clock_Source Clock source
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC ((uint32_t)0x00U) |
||||
#define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ |
||||
((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) |
||||
|
||||
|
||||
/** @defgroup LPTIM_Clock_Prescaler Prescaler
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_PRESCALER_DIV1 ((uint32_t)0x000000U) |
||||
#define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 |
||||
#define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 |
||||
#define LPTIM_PRESCALER_DIV8 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1)) |
||||
#define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 |
||||
#define LPTIM_PRESCALER_DIV32 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2)) |
||||
#define LPTIM_PRESCALER_DIV64 ((uint32_t)(LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2)) |
||||
#define LPTIM_PRESCALER_DIV128 ((uint32_t)LPTIM_CFGR_PRESC) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ |
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \
|
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \
|
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \
|
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \
|
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \
|
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \
|
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) |
||||
|
||||
#define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) |
||||
|
||||
|
||||
/** @defgroup LPTIM_Output_Polarity Output polarity
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_OUTPUTPOLARITY_HIGH ((uint32_t)0x00000000U) |
||||
#define LPTIM_OUTPUTPOLARITY_LOW (LPTIM_CFGR_WAVPOL) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \ |
||||
((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH)) |
||||
|
||||
/** @defgroup LPTIM_Clock_Sample_Time Clock sample time
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U) |
||||
#define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 |
||||
#define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 |
||||
#define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ |
||||
((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \
|
||||
((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \
|
||||
((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) |
||||
|
||||
/** @defgroup LPTIM_Clock_Polarity Clock polarity
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_CLOCKPOLARITY_RISING ((uint32_t)0x00000000U) |
||||
#define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 |
||||
#define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ |
||||
((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \
|
||||
((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) |
||||
|
||||
/** @defgroup LPTIM_External_Trigger_Polarity Trigger polarity
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 |
||||
#define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 |
||||
#define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_EXT_TRG_POLARITY(__POLAR__) (((__POLAR__) == LPTIM_ACTIVEEDGE_RISING ) || \ |
||||
((__POLAR__) == LPTIM_ACTIVEEDGE_FALLING ) || \
|
||||
((__POLAR__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) |
||||
|
||||
/** @defgroup LPTIM_Trigger_Sample_Time Trigger sample time
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U) |
||||
#define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 |
||||
#define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 |
||||
#define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION ) || \ |
||||
((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \
|
||||
((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \
|
||||
((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) |
||||
|
||||
|
||||
/** @defgroup LPTIM_Updating_Mode Updating mode
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LPTIM_UPDATE_IMMEDIATE ((uint32_t)0x00000000U) |
||||
#define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ |
||||
((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) |
||||
|
||||
|
||||
|
||||
/** @defgroup LPTIM_Counter_Source Counter source
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_COUNTERSOURCE_INTERNAL ((uint32_t)0x00000000U) |
||||
#define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ |
||||
((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) |
||||
|
||||
|
||||
|
||||
/* Check for period value */ |
||||
#define IS_LPTIM_PERIOD(__PERIOD__) ((__PERIOD__) <= 0x0000FFFFU) |
||||
|
||||
/* Check for pulse value */ |
||||
#define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFU) |
||||
|
||||
/** @defgroup LPTIM_Flag_Definition Flag definition
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN |
||||
#define LPTIM_FLAG_UP LPTIM_ISR_UP |
||||
#define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK |
||||
#define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK |
||||
#define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG |
||||
#define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM |
||||
#define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM_Interrupts_Definition Interrupts definition
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_IT_DOWN LPTIM_IER_DOWNIE |
||||
#define LPTIM_IT_UP LPTIM_IER_UPIE |
||||
#define LPTIM_IT_ARROK LPTIM_IER_ARROKIE |
||||
#define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE |
||||
#define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE |
||||
#define LPTIM_IT_ARRM LPTIM_IER_ARRMIE |
||||
#define LPTIM_IT_CMPM LPTIM_IER_CMPMIE |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset LPTIM handle state
|
||||
* @param __HANDLE__: LPTIM handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET) |
||||
|
||||
/**
|
||||
* @brief Enable/Disable the LPTIM peripheral. |
||||
* @param __HANDLE__: LPTIM handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) |
||||
#define __HAL_LPTIM_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Starts the LPTIM peripheral in Continuous or in single mode. |
||||
* @param __HANDLE__: DMA handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) |
||||
#define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) |
||||
|
||||
|
||||
/**
|
||||
* @brief Writes the passed parameter in the Autoreload register. |
||||
* @param __HANDLE__: LPTIM handle |
||||
* @param __VALUE__ : Autoreload value |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) |
||||
|
||||
/**
|
||||
* @brief Writes the passed parameter in the Compare register. |
||||
* @param __HANDLE__: LPTIM handle |
||||
* @param __VALUE__ : Compare value |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__)) |
||||
|
||||
/**
|
||||
* @brief Checks whether the specified LPTIM flag is set or not. |
||||
* @param __HANDLE__: LPTIM handle |
||||
* @param __FLAG__ : LPTIM flag to check |
||||
* This parameter can be a value of: |
||||
* @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. |
||||
* @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. |
||||
* @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. |
||||
* @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. |
||||
* @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. |
||||
* @arg LPTIM_FLAG_ARRM : Autoreload match Flag. |
||||
* @arg LPTIM_FLAG_CMPM : Compare match Flag. |
||||
* @retval The state of the specified flag (SET or RESET). |
||||
*/ |
||||
#define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) |
||||
|
||||
/**
|
||||
* @brief Clears the specified LPTIM flag. |
||||
* @param __HANDLE__: LPTIM handle. |
||||
* @param __FLAG__ : LPTIM flag to clear. |
||||
* This parameter can be a value of: |
||||
* @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. |
||||
* @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. |
||||
* @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. |
||||
* @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. |
||||
* @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. |
||||
* @arg LPTIM_FLAG_ARRM : Autoreload match Flag. |
||||
* @arg LPTIM_FLAG_CMPM : Compare match Flag. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
||||
|
||||
/**
|
||||
* @brief Enable the specified LPTIM interrupt. |
||||
* @param __HANDLE__ : LPTIM handle. |
||||
* @param __INTERRUPT__ : LPTIM interrupt to set. |
||||
* This parameter can be a value of: |
||||
* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
||||
* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
||||
* @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
||||
* @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
||||
* @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
||||
* @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
||||
* @arg LPTIM_IT_CMPM : Compare match Interrupt. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) |
||||
|
||||
/**
|
||||
* @brief Disable the specified LPTIM interrupt. |
||||
* @param __HANDLE__ : LPTIM handle. |
||||
* @param __INTERRUPT__ : LPTIM interrupt to set. |
||||
* This parameter can be a value of: |
||||
* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
||||
* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
||||
* @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
||||
* @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
||||
* @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
||||
* @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
||||
* @arg LPTIM_IT_CMPM : Compare match Interrupt. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) |
||||
|
||||
/**
|
||||
* @brief Checks whether the specified LPTIM interrupt is set or not. |
||||
* @param __HANDLE__ : LPTIM handle. |
||||
* @param __INTERRUPT__ : LPTIM interrupt to check. |
||||
* This parameter can be a value of: |
||||
* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
||||
* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
||||
* @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
||||
* @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
||||
* @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
||||
* @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
||||
* @arg LPTIM_IT_CMPM : Compare match Interrupt. |
||||
* @retval Interrupt status. |
||||
*/ |
||||
|
||||
#define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
||||
|
||||
/**
|
||||
* @brief Enable interrupt on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @brief Disable interrupt on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
||||
|
||||
/**
|
||||
* @brief Enable event on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @brief Disable event on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
||||
|
||||
/**
|
||||
* @brief Enable falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
|
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @brief Disable falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
||||
|
||||
/**
|
||||
* @brief Enable rising edge trigger on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @brief Disable rising edge trigger on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
||||
|
||||
/**
|
||||
* @brief Enable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();\ |
||||
__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE();\
|
||||
}while(0) |
||||
|
||||
/**
|
||||
* @brief Disable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();\ |
||||
__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE();\
|
||||
}while(0) |
||||
|
||||
/**
|
||||
* @brief Check whether the LPTIM Wake-up Timer associated Exti line interrupt flag is set or not. |
||||
* @retval Line Status. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR & LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @brief Clear the LPTIM Wake-up Timer associated Exti line flag. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @brief Generate a Software interrupt on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Include LPTIM HAL Extension module */ |
||||
#include "stm32l0xx_hal_lptim_ex.h" |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
|
||||
* @{ |
||||
*/ |
||||
/* Initialization/de-initialization functions ********************************/ |
||||
|
||||
/** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); |
||||
HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
|
||||
/* MSP functions *************************************************************/ |
||||
|
||||
void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); |
||||
void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Start/Stop operation functions *********************************************/ |
||||
|
||||
/** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* ################################# PWM Mode ################################*/ |
||||
/* Blocking mode: Polling */ |
||||
HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
||||
HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim); |
||||
/* Non-Blocking mode: Interrupt */ |
||||
HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
||||
HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/* ############################# One Pulse Mode ##############################*/ |
||||
/* Blocking mode: Polling */ |
||||
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
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HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim); |
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/* Non-Blocking mode: Interrupt */ |
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HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
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HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
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|
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/* ############################## Set once Mode ##############################*/ |
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/* Blocking mode: Polling */ |
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HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
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HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim); |
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/* Non-Blocking mode: Interrupt */ |
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HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
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HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
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|
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/* ############################### Encoder Mode ##############################*/ |
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/* Blocking mode: Polling */ |
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HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
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HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); |
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/* Non-Blocking mode: Interrupt */ |
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HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
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HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
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|
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/* ############################# Time out Mode ##############################*/ |
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/* Blocking mode: Polling */ |
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HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); |
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HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); |
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/* Non-Blocking mode: Interrupt */ |
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HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); |
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HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
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|
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/* ############################## Counter Mode ###############################*/ |
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/* Blocking mode: Polling */ |
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HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
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HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); |
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/* Non-Blocking mode: Interrupt */ |
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HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
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HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
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|
||||
/**
|
||||
* @} |
||||
*/ |
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|
||||
/* Reading operation functions ************************************************/ |
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|
||||
/** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
|
||||
* @{ |
||||
*/ |
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uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim); |
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uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim); |
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uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim); |
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/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* LPTIM IRQ functions *******************************************************/ |
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/** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler
|
||||
* @{ |
||||
*/ |
||||
void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/* CallBack functions ********************************************************/ |
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void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); |
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void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); |
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void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); |
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void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); |
||||
void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); |
||||
void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); |
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void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/* Peripheral State functions ************************************************/ |
||||
/** @defgroup LPTIM_Exported_Functions_Group5 Peripheral State functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_LPTIM_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,133 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_lptim_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of LPTIM Extended HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from | ||||