parent
d0048dcfb2
commit
2cad6ccf4d
GPG Key ID:
2C5FD5035250423D
@ -0,0 +1,28 @@ |
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# This is an NUCLEO-L073RZ board with a single STM32L073RZTx chip |
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# |
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# Generated by System Workbench for STM32 |
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# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s) |
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|
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source [find interface/stlink.cfg] |
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set WORKAREASIZE 0x5000 |
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transport select "hla_swd" |
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set CHIPNAME STM32L073RZTx |
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# Enable debug when in low power modes |
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set ENABLE_LOW_POWER 1 |
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# Stop Watchdog counters when halt |
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set STOP_WATCHDOG 1 |
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|
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# STlink Debug clock frequency |
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set CLOCK_FREQ 4000 |
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# use hardware reset, connect under reset |
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# connect_assert_srst needed if low power mode application running (WFI...) |
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reset_config srst_only srst_nogate connect_assert_srst |
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set CONNECT_UNDER_RESET 1 |
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source [find target/stm32l0x.cfg] |
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@ -0,0 +1,73 @@ |
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/** |
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****************************************************************************** |
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* @file stm32_assert.h |
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* @author MCD Application Team |
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* @brief STM32 assert template file. |
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* This file should be copied to the application folder and renamed |
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* to stm32_assert.h. |
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****************************************************************************** |
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* @attention |
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* |
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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* |
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* Redistribution and use in source and binary forms, with or without modification, |
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* are permitted provided that the following conditions are met: |
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* 1. Redistributions of source code must retain the above copyright notice, |
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* this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright notice, |
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* this list of conditions and the following disclaimer in the documentation |
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* and/or other materials provided with the distribution. |
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* 3. Neither the name of STMicroelectronics nor the names of its contributors |
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* may be used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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****************************************************************************** |
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*/ |
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|
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef __STM32_ASSERT_H |
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#define __STM32_ASSERT_H |
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|
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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|
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/* Exported types ------------------------------------------------------------*/ |
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/* Exported constants --------------------------------------------------------*/ |
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/* Includes ------------------------------------------------------------------*/ |
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/* Exported macro ------------------------------------------------------------*/ |
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#ifdef USE_FULL_ASSERT |
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/** |
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* @brief The assert_param macro is used for function's parameters check. |
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* @param expr: If expr is false, it calls assert_failed function |
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* which reports the name of the source file and the source |
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* line number of the call that failed. |
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* If expr is true, it returns no value. |
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* @retval None |
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*/ |
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#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) |
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/* Exported functions ------------------------------------------------------- */ |
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void assert_failed(uint8_t* file, uint32_t line); |
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#else |
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#define assert_param(expr) ((void)0U) |
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#endif /* USE_FULL_ASSERT */ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* __STM32_ASSERT_H */ |
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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File diff suppressed because it is too large
Load Diff
@ -0,0 +1,229 @@ |
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/**
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****************************************************************************** |
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* @file stm32l0xx_hal_adc_ex.h |
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* @author MCD Application Team |
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* @brief Header file of ADC HAL extended module. |
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****************************************************************************** |
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* @attention |
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* |
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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* |
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* Redistribution and use in source and binary forms, with or without modification, |
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* are permitted provided that the following conditions are met: |
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* 1. Redistributions of source code must retain the above copyright notice, |
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* this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright notice, |
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* this list of conditions and the following disclaimer in the documentation |
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* and/or other materials provided with the distribution. |
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* 3. Neither the name of STMicroelectronics nor the names of its contributors |
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* may be used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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****************************************************************************** |
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef __STM32L0xx_HAL_ADC_EX_H |
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#define __STM32L0xx_HAL_ADC_EX_H |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/* Includes ------------------------------------------------------------------*/ |
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#include "stm32l0xx_hal_def.h" |
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/** @addtogroup STM32L0xx_HAL_Driver
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* @{ |
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*/ |
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/** @addtogroup ADCEx
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* @{ |
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*/
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/* Exported types ------------------------------------------------------------*/ |
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/* Exported constants --------------------------------------------------------*/ |
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/** @defgroup ADCEx_Exported_Constants ADC Extended Exported Constants
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* @{ |
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*/ |
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/** @defgroup ADCEx_Channel_Mode ADC Single Ended
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* @{ |
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*/ |
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#define ADC_SINGLE_ENDED (uint32_t)0x00000000U /* dummy value */ |
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/**
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* @} |
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*/ |
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/** @defgroup ADC_regular_external_trigger_source ADC External Trigger Source
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* @{ |
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*/ |
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#define ADC_EXTERNALTRIGCONV_T6_TRGO ((uint32_t)0x00000000U) |
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#define ADC_EXTERNALTRIGCONV_T21_CC2 (ADC_CFGR1_EXTSEL_0) |
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#define ADC_EXTERNALTRIGCONV_T2_TRGO (ADC_CFGR1_EXTSEL_1) |
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#define ADC_EXTERNALTRIGCONV_T2_CC4 (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0) |
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#define ADC_EXTERNALTRIGCONV_T22_TRGO (ADC_CFGR1_EXTSEL_2) |
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#define ADC_EXTERNALTRIGCONV_T3_TRGO (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1) |
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#define ADC_EXTERNALTRIGCONV_EXT_IT11 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0) |
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#define ADC_SOFTWARE_START (ADC_CFGR1_EXTSEL + (uint32_t)1) |
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/* ADC group regular external trigger TIM21_TRGO available only on */ |
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/* STM32L0 devices categories: Cat.2, Cat.3, Cat.5 */ |
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#if defined (STM32L031xx) || defined (STM32L041xx) || \ |
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defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || \
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defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || \
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defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || \
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defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
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#define ADC_EXTERNALTRIGCONV_T21_TRGO (ADC_EXTERNALTRIGCONV_T22_TRGO) |
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#endif |
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/* ADC group regular external trigger TIM2_CC3 available only on */ |
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/* STM32L0 devices categories: Cat.1, Cat.2, Cat.5 */ |
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#if defined (STM32L011xx) || defined (STM32L021xx) || \ |
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defined (STM32L031xx) || defined (STM32L041xx) || \
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defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || \
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defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
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#define ADC_EXTERNALTRIGCONV_T2_CC3 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0) |
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#endif |
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/**
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* @} |
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*/ |
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/** @defgroup ADC_SYSCFG_internal_paths_flags_definition ADC SYSCFG internal paths Flags Definition
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* @{ |
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*/ |
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#define ADC_FLAG_SENSOR SYSCFG_CFGR3_VREFINT_RDYF |
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#define ADC_FLAG_VREFINT SYSCFG_VREFINT_ADC_RDYF |
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/**
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* @} |
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*/ |
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/**
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* @} |
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*/ |
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/* Private macros ------------------------------------------------------------*/ |
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/** @defgroup ADCEx_Private_Macros ADCEx Private Macros
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* @{ |
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*/ |
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#define IS_ADC_SINGLE_DIFFERENTIAL(SING_DIFF) ((SING_DIFF) == ADC_SINGLE_ENDED) |
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/** @defgroup ADCEx_calibration_factor_length_verification ADC Calibration Factor Length Verification
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* @{ |
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*/
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/**
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* @brief Calibration factor length verification (7 bits maximum) |
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* @param _Calibration_Factor_: Calibration factor value |
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* @retval None |
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*/ |
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#define IS_ADC_CALFACT(_Calibration_Factor_) ((_Calibration_Factor_) <= ((uint32_t)0x7FU)) |
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/**
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* @} |
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*/
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/** @defgroup ADC_External_trigger_Source ADC External Trigger Source
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* @{ |
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*/ |
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#if defined (STM32L031xx) || defined (STM32L041xx) || \ |
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defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || \
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defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
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#define IS_ADC_EXTTRIG(CONV) (((CONV) == ADC_EXTERNALTRIGCONV_T6_TRGO ) || \ |
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((CONV) == ADC_EXTERNALTRIGCONV_T21_CC2 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_CC4 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T22_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T21_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_CC3 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T3_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_EXT_IT11 ) || \
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((CONV) == ADC_SOFTWARE_START)) |
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#elif defined (STM32L011xx) || defined (STM32L021xx) |
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#define IS_ADC_EXTTRIG(CONV) (((CONV) == ADC_EXTERNALTRIGCONV_T6_TRGO ) || \ |
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((CONV) == ADC_EXTERNALTRIGCONV_T21_CC2 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_CC4 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T22_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_CC3 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T3_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_EXT_IT11 ) || \
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((CONV) == ADC_SOFTWARE_START)) |
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#elif defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || \ |
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defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) |
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#define IS_ADC_EXTTRIG(CONV) (((CONV) == ADC_EXTERNALTRIGCONV_T6_TRGO ) || \ |
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((CONV) == ADC_EXTERNALTRIGCONV_T21_CC2 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T2_CC4 ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T22_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T21_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_T3_TRGO ) || \
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((CONV) == ADC_EXTERNALTRIGCONV_EXT_IT11 ) || \
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((CONV) == ADC_SOFTWARE_START)) |
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#endif |
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/**
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* @} |
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*/ |
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/**
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* @} |
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*/ |
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/* Exported functions --------------------------------------------------------*/ |
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/** @addtogroup ADCEx_Exported_Functions
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* @{ |
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*/ |
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/** @addtogroup ADCEx_Exported_Functions_Group1
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* @{ |
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*/ |
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/* IO operation functions *****************************************************/ |
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/* ADC calibration */ |
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HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff); |
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uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff); |
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HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint32_t CalibrationFactor); |
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/* ADC VrefInt and Temperature sensor functions specific to this STM32 serie */ |
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HAL_StatusTypeDef HAL_ADCEx_EnableVREFINT(void); |
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void HAL_ADCEx_DisableVREFINT(void); |
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HAL_StatusTypeDef HAL_ADCEx_EnableVREFINTTempSensor(void); |
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void HAL_ADCEx_DisableVREFINTTempSensor(void); |
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/**
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* @} |
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*/ |
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/**
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* @} |
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*/ |
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/**
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* @} |
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*/ |
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/**
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* @} |
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*/ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /*__STM32L0xx_HAL_ADC_EX_H */ |
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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@ -0,0 +1,683 @@ |
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/**
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****************************************************************************** |
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* @file stm32l0xx_hal_comp.h |
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* @author MCD Application Team |
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* @brief Header file of COMP HAL module. |
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****************************************************************************** |
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* @attention |
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* |
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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* |
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* Redistribution and use in source and binary forms, with or without modification, |
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* are permitted provided that the following conditions are met: |
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* 1. Redistributions of source code must retain the above copyright notice, |
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* this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright notice, |
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* this list of conditions and the following disclaimer in the documentation |
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* and/or other materials provided with the distribution. |
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* 3. Neither the name of STMicroelectronics nor the names of its contributors |
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* may be used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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******************************************************************************
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef __STM32L0xx_HAL_COMP_H |
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#define __STM32L0xx_HAL_COMP_H |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/* Includes ------------------------------------------------------------------*/ |
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#include "stm32l0xx_hal_def.h" |
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/** @addtogroup STM32L0xx_HAL_Driver
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* @{ |
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*/ |
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/** @addtogroup COMP
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* @{ |
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*/ |
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup COMP_Exported_Types COMP Exported Types
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* @{ |
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*/ |
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/**
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* @brief COMP Init structure definition
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*/ |
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typedef struct |
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{ |
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uint32_t WindowMode; /*!< Set window mode of a pair of comparators instances
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(2 consecutive instances odd and even COMP<x> and COMP<x+1>). |
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Note: HAL COMP driver allows to set window mode from any COMP instance of the pair of COMP instances composing window mode. |
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This parameter can be a value of @ref COMP_WindowMode */ |
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uint32_t Mode; /*!< Set comparator operating mode to adjust power and speed.
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Note: For the characteritics of comparator power modes |
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(propagation delay and power consumption), refer to device datasheet. |
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This parameter can be a value of @ref COMP_PowerMode */ |
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uint32_t NonInvertingInput; /*!< Set comparator input plus (non-inverting input).
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This parameter can be a value of @ref COMP_InputPlus */ |
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uint32_t InvertingInput; /*!< Set comparator input minus (inverting input).
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This parameter can be a value of @ref COMP_InputMinus */ |
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uint32_t OutputPol; /*!< Set comparator output polarity.
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This parameter can be a value of @ref COMP_OutputPolarity */ |
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uint32_t LPTIMConnection; /*!< Set comparator output connection to LPTIM peripheral.
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This parameter can be a value of @ref COMP_LPTIMConnection */ |
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uint32_t TriggerMode; /*!< Set the comparator output triggering External Interrupt Line (EXTI).
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This parameter can be a value of @ref COMP_EXTI_TriggerMode */ |
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}COMP_InitTypeDef; |
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/**
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* @brief HAL COMP state machine: HAL COMP states definition |
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*/ |
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#define COMP_STATE_BITFIELD_LOCK ((uint32_t)0x10) |
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typedef enum |
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{ |
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HAL_COMP_STATE_RESET = 0x00U, /*!< COMP not yet initialized */ |
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HAL_COMP_STATE_RESET_LOCKED = (HAL_COMP_STATE_RESET | COMP_STATE_BITFIELD_LOCK), /*!< COMP not yet initialized and configuration is locked */ |
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HAL_COMP_STATE_READY = 0x01U, /*!< COMP initialized and ready for use */ |
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HAL_COMP_STATE_READY_LOCKED = (HAL_COMP_STATE_READY | COMP_STATE_BITFIELD_LOCK), /*!< COMP initialized but configuration is locked */ |
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HAL_COMP_STATE_BUSY = 0x02U, /*!< COMP is running */ |
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HAL_COMP_STATE_BUSY_LOCKED = (HAL_COMP_STATE_BUSY | COMP_STATE_BITFIELD_LOCK) /*!< COMP is running and configuration is locked */ |
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}HAL_COMP_StateTypeDef; |
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/**
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* @brief COMP Handle Structure definition |
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*/ |
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typedef struct |
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{ |
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COMP_TypeDef *Instance; /*!< Register base address */ |
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COMP_InitTypeDef Init; /*!< COMP required parameters */ |
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HAL_LockTypeDef Lock; /*!< Locking object */ |
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__IO HAL_COMP_StateTypeDef State; /*!< COMP communication state */ |
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} COMP_HandleTypeDef; |
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/**
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* @} |
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*/ |
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|
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/* Exported constants --------------------------------------------------------*/ |
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/** @defgroup COMP_Exported_Constants COMP Exported Constants
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* @{ |
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*/ |
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|
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/** @defgroup COMP_WindowMode COMP Window Mode
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* @{ |
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*/ |
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#define COMP_WINDOWMODE_DISABLE ((uint32_t)0x00000000U) /*!< Window mode disable: Comparators instances pair COMP1 and COMP2 are independent */ |
||||
#define COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON (COMP_CSR_COMP1WM) /*!< Window mode enable: Comparators instances pair COMP1 and COMP2 have their input plus connected together. The common input is COMP1 input plus (COMP2 input plus is no more accessible). */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_PowerMode COMP power mode
|
||||
* @{ |
||||
*/ |
||||
/* Note: For the characteritics of comparator power modes */ |
||||
/* (propagation delay and power consumption), */ |
||||
/* refer to device datasheet. */ |
||||
#define COMP_POWERMODE_MEDIUMSPEED (COMP_CSR_COMP2SPEED) /*!< COMP power mode to low power (indicated as "high speed" in reference manual) (only for COMP instance: COMP2) */ |
||||
#define COMP_POWERMODE_ULTRALOWPOWER ((uint32_t)0x00000000U) /*!< COMP power mode to ultra low power (indicated as "low speed" in reference manual) (only for COMP instance: COMP2) */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_InputPlus COMP input plus (non-inverting input)
|
||||
* @{ |
||||
*/ |
||||
#define COMP_INPUT_PLUS_IO1 ((uint32_t)0x00000000U) /*!< Comparator input plus connected to IO1 (pin PA1 for COMP1, pin PA3 for COMP2) */ |
||||
#define COMP_INPUT_PLUS_IO2 (COMP_CSR_COMP2INPSEL_0) /*!< Comparator input plus connected to IO2 (pin PB4 for COMP2) (only for COMP instance: COMP2) */ |
||||
#define COMP_INPUT_PLUS_IO3 (COMP_CSR_COMP2INPSEL_1) /*!< Comparator input plus connected to IO3 (pin PA5 for COMP2) (only for COMP instance: COMP2) */ |
||||
#define COMP_INPUT_PLUS_IO4 (COMP_CSR_COMP2INPSEL_0 | COMP_CSR_COMP2INPSEL_1) /*!< Comparator input plus connected to IO4 (pin PB6 for COMP2) (only for COMP instance: COMP2) */ |
||||
#define COMP_INPUT_PLUS_IO5 (COMP_CSR_COMP2INPSEL_2) /*!< Comparator input plus connected to IO5 (pin PB7 for COMP2) (only for COMP instance: COMP2) */ |
||||
#if defined (STM32L011xx) || defined (STM32L021xx) |
||||
#define COMP_INPUT_PLUS_IO6 (COMP_CSR_COMP2INPSEL_2 | COMP_CSR_COMP2INPSEL_0) /*!< Comparator input plus connected to IO6 (pin PA7 for COMP2) (only for COMP instance: COMP2) (Available only on devices STM32L0 category 1) */ |
||||
#endif |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_InputMinus COMP input minus (inverting input)
|
||||
* @{ |
||||
*/ |
||||
#define COMP_INPUT_MINUS_1_4VREFINT (COMP_CSR_COMP2INNSEL_2 ) /*!< Comparator input minus connected to 1/4 VREFINT (only for COMP instance: COMP2) */ |
||||
#define COMP_INPUT_MINUS_1_2VREFINT (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to 1/2 VREFINT (only for COMP instance: COMP2) */ |
||||
#define COMP_INPUT_MINUS_3_4VREFINT (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_1 ) /*!< Comparator input minus connected to 3/4 VREFINT (only for COMP instance: COMP2) */ |
||||
#define COMP_INPUT_MINUS_VREFINT ((uint32_t)0x00000000U) /*!< Comparator input minus connected to VrefInt */ |
||||
#define COMP_INPUT_MINUS_DAC1_CH1 ( COMP_CSR_COMP2INNSEL_1 ) /*!< Comparator input minus connected to DAC1 channel 1 (DAC_OUT1) */ |
||||
#define COMP_INPUT_MINUS_DAC1_CH2 ( COMP_CSR_COMP2INNSEL_1 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to DAC1 channel 2 (DAC_OUT2) */ |
||||
#define COMP_INPUT_MINUS_IO1 ( COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to IO1 (pin PA0 for COMP1, pin PA2 for COMP2) */ |
||||
#define COMP_INPUT_MINUS_IO2 (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_1 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to IO2 (pin PB3 for COMP2) (only for COMP instance: COMP2) */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/** @defgroup COMP_LPTIMConnection COMP Low power timer connection definition
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define COMP_LPTIMCONNECTION_DISABLED ((uint32_t)0x00000000U) /*!< COMPx signal is gated */ |
||||
#define COMP_LPTIMCONNECTION_IN1_ENABLED ((uint32_t)0x00000001U) /*!< COMPx signal is connected to LPTIM input 1 */ |
||||
#define COMP_LPTIMCONNECTION_IN2_ENABLED ((uint32_t)0x00000002U) /*!< COMPx signal is connected to LPTIM input 2 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_OutputPolarity COMP output Polarity
|
||||
* @{ |
||||
*/ |
||||
#define COMP_OUTPUTPOL_NONINVERTED ((uint32_t)0x00000000U) /*!< COMP output on GPIO isn't inverted */ |
||||
#define COMP_OUTPUTPOL_INVERTED COMP_CSR_COMPxPOLARITY /*!< COMP output on GPIO is inverted */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_OutputLevel COMP Output Level
|
||||
* @{ |
||||
*/ |
||||
/* Note: Comparator output level values are fixed to "0" and "1", */ |
||||
/* corresponding COMP register bit is managed by HAL function to match */ |
||||
/* with these values (independently of bit position in register). */ |
||||
|
||||
/* When output polarity is not inverted, comparator output is low when
|
||||
the input plus is at a lower voltage than the input minus */ |
||||
#define COMP_OUTPUT_LEVEL_LOW ((uint32_t)0x00000000U) |
||||
/* When output polarity is not inverted, comparator output is high when
|
||||
the input plus is at a higher voltage than the input minus */ |
||||
#define COMP_OUTPUT_LEVEL_HIGH ((uint32_t)0x00000001U) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_EXTI_TriggerMode COMP output to EXTI
|
||||
* @{ |
||||
*/ |
||||
#define COMP_TRIGGERMODE_NONE ((uint32_t)0x00000000U) /*!< Comparator output triggering no External Interrupt Line */ |
||||
#define COMP_TRIGGERMODE_IT_RISING (COMP_EXTI_IT | COMP_EXTI_RISING) /*!< Comparator output triggering External Interrupt Line event with interruption, on rising edge */ |
||||
#define COMP_TRIGGERMODE_IT_FALLING (COMP_EXTI_IT | COMP_EXTI_FALLING) /*!< Comparator output triggering External Interrupt Line event with interruption, on falling edge */ |
||||
#define COMP_TRIGGERMODE_IT_RISING_FALLING (COMP_EXTI_IT | COMP_EXTI_RISING | COMP_EXTI_FALLING) /*!< Comparator output triggering External Interrupt Line event with interruption, on both rising and falling edges */ |
||||
#define COMP_TRIGGERMODE_EVENT_RISING (COMP_EXTI_EVENT | COMP_EXTI_RISING) /*!< Comparator output triggering External Interrupt Line event only (without interruption), on rising edge */ |
||||
#define COMP_TRIGGERMODE_EVENT_FALLING (COMP_EXTI_EVENT | COMP_EXTI_FALLING) /*!< Comparator output triggering External Interrupt Line event only (without interruption), on falling edge */ |
||||
#define COMP_TRIGGERMODE_EVENT_RISING_FALLING (COMP_EXTI_EVENT | COMP_EXTI_RISING | COMP_EXTI_FALLING) /*!< Comparator output triggering External Interrupt Line event only (without interruption), on both rising and falling edges */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
/** @defgroup COMP_Exported_Macros COMP Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup COMP_Handle_Management COMP Handle Management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset COMP handle state.
|
||||
* @param __HANDLE__ COMP handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET) |
||||
|
||||
/**
|
||||
* @brief Enable the specified comparator. |
||||
* @param __HANDLE__ COMP handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxEN) |
||||
|
||||
/**
|
||||
* @brief Disable the specified comparator. |
||||
* @param __HANDLE__ COMP handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxEN) |
||||
|
||||
/**
|
||||
* @brief Lock the specified comparator configuration. |
||||
* @note Using this macro induce HAL COMP handle state machine being no |
||||
* more in line with COMP instance state. |
||||
* To keep HAL COMP handle state machine updated, it is recommended |
||||
* to use function "HAL_COMP_Lock')". |
||||
* @param __HANDLE__ COMP handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_LOCK(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxLOCK) |
||||
|
||||
/**
|
||||
* @brief Check whether the specified comparator is locked. |
||||
* @param __HANDLE__ COMP handle |
||||
* @retval Value 0 if COMP instance is not locked, value 1 if COMP instance is locked |
||||
*/ |
||||
#define __HAL_COMP_IS_LOCKED(__HANDLE__) (READ_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxLOCK) == COMP_CSR_COMPxLOCK) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_Exti_Management COMP external interrupt line management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable the COMP1 EXTI line rising edge trigger. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP1 EXTI line rising edge trigger. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP1 EXTI line falling edge trigger. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP1 EXTI line falling edge trigger. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP1 EXTI line rising & falling edge trigger. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ |
||||
__HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE(); \
|
||||
__HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE(); \
|
||||
} while(0) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP1 EXTI line rising & falling edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ |
||||
__HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE(); \
|
||||
__HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE(); \
|
||||
} while(0) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP1 EXTI line in interrupt mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP1 EXTI line in interrupt mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Generate a software interrupt on the COMP1 EXTI line. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP1 EXTI line in event mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP1 EXTI line in event mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Check whether the COMP1 EXTI line flag is set. |
||||
* @retval RESET or SET |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Clear the COMP1 EXTI flag. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP1) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP2 EXTI line rising edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP2 EXTI line rising edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP2 EXTI line falling edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP2 EXTI line falling edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP2 EXTI line rising & falling edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ |
||||
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE(); \
|
||||
__HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE(); \
|
||||
} while(0) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP2 EXTI line rising & falling edge trigger. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ |
||||
__HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE(); \
|
||||
__HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE(); \
|
||||
} while(0) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP2 EXTI line in interrupt mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP2 EXTI line in interrupt mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Generate a software interrupt on the COMP2 EXTI line. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Enable the COMP2 EXTI line in event mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Disable the COMP2 EXTI line in event mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Check whether the COMP2 EXTI line flag is set. |
||||
* @retval RESET or SET |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_GET_FLAG() READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @brief Clear the COMP2 EXTI flag. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP2) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Private types -------------------------------------------------------------*/ |
||||
/* Private constants ---------------------------------------------------------*/ |
||||
/** @defgroup COMP_Private_Constants COMP Private Constants
|
||||
* @{ |
||||
*/ |
||||
/** @defgroup COMP_ExtiLine COMP EXTI Lines
|
||||
* @{ |
||||
*/ |
||||
#define COMP_EXTI_LINE_COMP1 (EXTI_IMR_IM21) /*!< EXTI line 21 connected to COMP1 output */ |
||||
#define COMP_EXTI_LINE_COMP2 (EXTI_IMR_IM22) /*!< EXTI line 22 connected to COMP2 output */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_ExtiLine COMP EXTI Lines
|
||||
* @{ |
||||
*/ |
||||
#define COMP_EXTI_IT ((uint32_t) 0x01U) /*!< EXTI line event with interruption */ |
||||
#define COMP_EXTI_EVENT ((uint32_t) 0x02U) /*!< EXTI line event only (without interruption) */ |
||||
#define COMP_EXTI_RISING ((uint32_t) 0x10U) /*!< EXTI line event on rising edge */ |
||||
#define COMP_EXTI_FALLING ((uint32_t) 0x20U) /*!< EXTI line event on falling edge */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
/** @defgroup COMP_Private_Macros COMP Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup COMP_GET_EXTI_LINE COMP private macros to get EXTI line associated with comparators
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief Get the specified EXTI line for a comparator instance. |
||||
* @param __INSTANCE__ specifies the COMP instance. |
||||
* @retval value of @ref COMP_ExtiLine |
||||
*/ |
||||
#define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? \ |
||||
COMP_EXTI_LINE_COMP1 : COMP_EXTI_LINE_COMP2) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_IS_COMP_Definitions COMP private macros to check input parameters
|
||||
* @{ |
||||
*/ |
||||
#define IS_COMP_WINDOWMODE(__WINDOWMODE__) (((__WINDOWMODE__) == COMP_WINDOWMODE_DISABLE) || \ |
||||
((__WINDOWMODE__) == COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON) ) |
||||
|
||||
#define IS_COMP_POWERMODE(__POWERMODE__) (((__POWERMODE__) == COMP_POWERMODE_MEDIUMSPEED) || \ |
||||
((__POWERMODE__) == COMP_POWERMODE_ULTRALOWPOWER) ) |
||||
|
||||
#define IS_COMP_WINDOWMODE_INSTANCE(INSTANCE) ((INSTANCE) == COMP1) |
||||
|
||||
#if defined (STM32L011xx) || defined (STM32L021xx) |
||||
#define IS_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__) \ |
||||
(((__COMP_INSTANCE__) == COMP1) \
|
||||
? ( \
|
||||
(__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1 \
|
||||
) \
|
||||
: \
|
||||
( \
|
||||
((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO2) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO3) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO4) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO5) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO6) \
|
||||
) \
|
||||
) |
||||
#else |
||||
#define IS_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__) \ |
||||
(((__COMP_INSTANCE__) == COMP1) \
|
||||
? ( \
|
||||
(__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1 \
|
||||
) \
|
||||
: \
|
||||
( \
|
||||
((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO2) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO3) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO4) \
|
||||
|| ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO5) \
|
||||
) \
|
||||
) |
||||
#endif |
||||
|
||||
#define IS_COMP_INPUT_MINUS(__COMP_INSTANCE__, __INPUT_MINUS__) \ |
||||
(((__COMP_INSTANCE__) == COMP1) \
|
||||
? ( \
|
||||
((__INPUT_MINUS__) == COMP_INPUT_MINUS_VREFINT) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH1) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH2) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO1) \
|
||||
) \
|
||||
: \
|
||||
( \
|
||||
((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_4VREFINT) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_2VREFINT) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_3_4VREFINT) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_VREFINT) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH1) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH2) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO1) \
|
||||
|| ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO2) \
|
||||
) \
|
||||
) |
||||
|
||||
#define IS_COMP1_LPTIMCONNECTION(LPTIMCONNECTION) (((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_DISABLED) || \ |
||||
((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_IN1_ENABLED)) |
||||
|
||||
#define IS_COMP2_LPTIMCONNECTION(LPTIMCONNECTION) (((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_DISABLED) || \ |
||||
((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_IN1_ENABLED) || \
|
||||
((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_IN2_ENABLED)) |
||||
|
||||
#define IS_COMP2_LPTIMCONNECTION_RESTRICTED(LPTIMCONNECTION) (((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_DISABLED) || \ |
||||
((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_IN1_ENABLED)) |
||||
|
||||
#define IS_COMP_OUTPUTPOL(POL) (((POL) == COMP_OUTPUTPOL_NONINVERTED) || \ |
||||
((POL) == COMP_OUTPUTPOL_INVERTED)) |
||||
|
||||
#define IS_COMP_TRIGGERMODE(__TRIGGERMODE__) (((__TRIGGERMODE__) == COMP_TRIGGERMODE_NONE) || \ |
||||
((__TRIGGERMODE__) == COMP_TRIGGERMODE_IT_RISING) || \
|
||||
((__TRIGGERMODE__) == COMP_TRIGGERMODE_IT_FALLING) || \
|
||||
((__TRIGGERMODE__) == COMP_TRIGGERMODE_IT_RISING_FALLING) || \
|
||||
((__TRIGGERMODE__) == COMP_TRIGGERMODE_EVENT_RISING) || \
|
||||
((__TRIGGERMODE__) == COMP_TRIGGERMODE_EVENT_FALLING) || \
|
||||
((__TRIGGERMODE__) == COMP_TRIGGERMODE_EVENT_RISING_FALLING) ) |
||||
|
||||
|
||||
#define IS_COMP_OUTPUT_LEVEL(__OUTPUT_LEVEL__) (((__OUTPUT_LEVEL__) == COMP_OUTPUT_LEVEL_LOW) || \ |
||||
((__OUTPUT_LEVEL__) == COMP_OUTPUT_LEVEL_HIGH)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Include COMP HAL Extended module */ |
||||
#include "stm32l0xx_hal_comp_ex.h" |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @addtogroup COMP_Exported_Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup COMP_Exported_Functions_Group1
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Initialization and de-initialization functions **********************************/ |
||||
HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp); |
||||
HAL_StatusTypeDef HAL_COMP_DeInit (COMP_HandleTypeDef *hcomp); |
||||
void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp); |
||||
void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* IO operation functions *****************************************************/ |
||||
/** @addtogroup COMP_Exported_Functions_Group2
|
||||
* @{ |
||||
*/ |
||||
HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp); |
||||
HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp); |
||||
void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Peripheral Control functions ************************************************/ |
||||
/** @addtogroup COMP_Exported_Functions_Group3
|
||||
* @{ |
||||
*/ |
||||
HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp); |
||||
uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp); |
||||
/* Callback in interrupt mode */ |
||||
void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Peripheral State functions **************************************************/ |
||||
/** @addtogroup COMP_Exported_Functions_Group4
|
||||
* @{ |
||||
*/ |
||||
HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_COMP_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,89 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_comp_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of COMP HAL Extended module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_COMP_EX_H |
||||
#define __STM32L0xx_HAL_COMP_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup COMPEx COMPEx
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup COMPEx_Exported_Functions COMPEx Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup COMPEx_Exported_Functions_Group1 Extended COMP VREFINT setup functions
|
||||
* @{ |
||||
*/ |
||||
/* COMP specific functions to manage VREFINT *************************************/ |
||||
void HAL_COMPEx_EnableVREFINT(void); |
||||
void HAL_COMPEx_DisableVREFINT(void); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_COMP_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,314 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_conf.h |
||||
* @author MCD Application Team |
||||
* @brief HAL configuration template file.
|
||||
* This file should be copied to the application folder and renamed |
||||
* to stm32l0xx_hal_conf.h. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_CONF_H |
||||
#define __STM32L0xx_HAL_CONF_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/* ########################## Module Selection ############################## */ |
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/ |
||||
#define HAL_MODULE_ENABLED |
||||
#define HAL_ADC_MODULE_ENABLED |
||||
#define HAL_COMP_MODULE_ENABLED |
||||
#define HAL_CRC_MODULE_ENABLED |
||||
#define HAL_CRYP_MODULE_ENABLED |
||||
#define HAL_DAC_MODULE_ENABLED |
||||
#define HAL_DMA_MODULE_ENABLED |
||||
#define HAL_FIREWALL_MODULE_ENABLED |
||||
#define HAL_FLASH_MODULE_ENABLED |
||||
#define HAL_GPIO_MODULE_ENABLED |
||||
#define HAL_I2C_MODULE_ENABLED |
||||
#define HAL_I2S_MODULE_ENABLED |
||||
#define HAL_IWDG_MODULE_ENABLED |
||||
#define HAL_LCD_MODULE_ENABLED |
||||
#define HAL_LPTIM_MODULE_ENABLED |
||||
#define HAL_PWR_MODULE_ENABLED |
||||
#define HAL_RCC_MODULE_ENABLED |
||||
#define HAL_RNG_MODULE_ENABLED |
||||
#define HAL_RTC_MODULE_ENABLED |
||||
#define HAL_SPI_MODULE_ENABLED |
||||
#define HAL_TIM_MODULE_ENABLED |
||||
#define HAL_TSC_MODULE_ENABLED |
||||
#define HAL_UART_MODULE_ENABLED |
||||
#define HAL_USART_MODULE_ENABLED |
||||
#define HAL_IRDA_MODULE_ENABLED |
||||
#define HAL_SMARTCARD_MODULE_ENABLED |
||||
#define HAL_SMBUS_MODULE_ENABLED |
||||
#define HAL_WWDG_MODULE_ENABLED |
||||
#define HAL_CORTEX_MODULE_ENABLED |
||||
#define HAL_PCD_MODULE_ENABLED |
||||
|
||||
/* ########################## Oscillator Values adaptation ####################*/ |
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application. |
||||
* This value is used by the RCC HAL module to compute the system frequency |
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/ |
||||
#if !defined (HSE_VALUE) |
||||
#define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ |
||||
#endif /* HSE_VALUE */ |
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT) |
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ |
||||
#endif /* HSE_STARTUP_TIMEOUT */ |
||||
|
||||
/**
|
||||
* @brief Internal Multiple Speed oscillator (MSI) default value. |
||||
* This value is the default MSI range value after Reset. |
||||
*/ |
||||
#if !defined (MSI_VALUE) |
||||
#define MSI_VALUE ((uint32_t)2000000U) /*!< Value of the Internal oscillator in Hz*/ |
||||
#endif /* MSI_VALUE */ |
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value. |
||||
* This value is used by the RCC HAL module to compute the system frequency |
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/ |
||||
#if !defined (HSI_VALUE) |
||||
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ |
||||
#endif /* HSI_VALUE */ |
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator for USB (HSI48) value. |
||||
*/ |
||||
#if !defined (HSI48_VALUE) |
||||
#define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz. |
||||
The real value may vary depending on the variations |
||||
in voltage and temperature. */ |
||||
#endif /* HSI48_VALUE */ |
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value. |
||||
*/ |
||||
#if !defined (LSI_VALUE) |
||||
#define LSI_VALUE ((uint32_t)37000U) /*!< LSI Typical Value in Hz*/ |
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz |
||||
The real value may vary depending on the variations |
||||
in voltage and temperature.*/ |
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value. |
||||
* This value is used by the UART, RTC HAL module to compute the system frequency |
||||
*/ |
||||
#if !defined (LSE_VALUE) |
||||
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ |
||||
#endif /* LSE_VALUE */ |
||||
|
||||
/**
|
||||
* @brief Time out for LSE start up value in ms. |
||||
*/ |
||||
#if !defined (LSE_STARTUP_TIMEOUT) |
||||
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ |
||||
#endif /* LSE_STARTUP_TIMEOUT */ |
||||
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */ |
||||
|
||||
/* ########################### System Configuration ######################### */ |
||||
/**
|
||||
* @brief This is the HAL system configuration section |
||||
*/
|
||||
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ |
||||
#define TICK_INT_PRIORITY (((uint32_t)1U<<__NVIC_PRIO_BITS) - 1U) /*!< tick interrupt priority */ |
||||
#define USE_RTOS 0U |
||||
#define PREFETCH_ENABLE 1U |
||||
#define PREREAD_ENABLE 0U |
||||
#define BUFFER_CACHE_DISABLE 0U |
||||
|
||||
/* ########################## Assert Selection ############################## */ |
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code |
||||
*/ |
||||
/* #define USE_FULL_ASSERT 1 */ |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/ |
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_rcc.h" |
||||
#endif /* HAL_RCC_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_gpio.h" |
||||
#endif /* HAL_GPIO_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_dma.h" |
||||
#endif /* HAL_DMA_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_cortex.h" |
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_adc.h" |
||||
#endif /* HAL_ADC_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_comp.h" |
||||
#endif /* HAL_COMP_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_crc.h" |
||||
#endif /* HAL_CRC_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_cryp.h" |
||||
#endif /* HAL_CRYP_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_dac.h" |
||||
#endif /* HAL_DAC_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_FIREWALL_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_firewall.h" |
||||
#endif /* HAL_FIREWALL_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_flash.h" |
||||
#endif /* HAL_FLASH_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_i2c.h" |
||||
#endif /* HAL_I2C_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_i2s.h" |
||||
#endif /* HAL_I2S_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_iwdg.h" |
||||
#endif /* HAL_IWDG_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_LCD_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_lcd.h" |
||||
#endif /* HAL_LCD_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_lptim.h" |
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_pwr.h" |
||||
#endif /* HAL_PWR_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_rng.h" |
||||
#endif /* HAL_RNG_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_rtc.h" |
||||
#endif /* HAL_RTC_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_spi.h" |
||||
#endif /* HAL_SPI_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_tim.h" |
||||
#endif /* HAL_TIM_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_TSC_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_tsc.h" |
||||
#endif /* HAL_TSC_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_uart.h" |
||||
#endif /* HAL_UART_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_usart.h" |
||||
#endif /* HAL_USART_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_irda.h" |
||||
#endif /* HAL_IRDA_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_smartcard.h" |
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_smbus.h" |
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_wwdg.h" |
||||
#endif /* HAL_WWDG_MODULE_ENABLED */ |
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED |
||||
#include "stm32l0xx_hal_pcd.h" |
||||
#endif /* HAL_PCD_MODULE_ENABLED */ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
#ifdef USE_FULL_ASSERT |
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check. |
||||
* @param expr: If expr is false, it calls assert_failed function |
||||
* which reports the name of the source file and the source |
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value. |
||||
* @retval None |
||||
*/ |
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) |
||||
/* Exported functions ------------------------------------------------------- */ |
||||
void assert_failed(uint8_t* file, uint32_t line); |
||||
#else |
||||
#define assert_param(expr) ((void)0U) |
||||
#endif /* USE_FULL_ASSERT */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_CONF_H */ |
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,382 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_crc.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of CRC HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_CRC_H |
||||
#define __STM32L0xx_HAL_CRC_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRC CRC
|
||||
* @{ |
||||
*/
|
||||
|
||||
/** @defgroup CRC_Exported_Types CRC Exported Types
|
||||
* @{ |
||||
*/ |
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief CRC HAL State Structure definition
|
||||
*/
|
||||
typedef enum |
||||
{
|
||||
HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */ |
||||
HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */ |
||||
HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */ |
||||
HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */ |
||||
HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */ |
||||
}HAL_CRC_StateTypeDef; |
||||
|
||||
|
||||
/**
|
||||
* @brief CRC Init Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used.
|
||||
If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default
|
||||
X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1.
|
||||
In that case, there is no need to set GeneratingPolynomial field. |
||||
If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and CRCLength fields must be set */ |
||||
|
||||
uint8_t DefaultInitValueUse; /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used.
|
||||
If set to DEFAULT_INIT_VALUE_ENABLE, resort to default |
||||
0xFFFFFFFF value. In that case, there is no need to set InitValue field.
|
||||
If otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set */ |
||||
|
||||
uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial. 7, 8, 16 or 32-bit long value for a polynomial degree
|
||||
respectively equal to 7, 8, 16 or 32. This field is written in normal representation,
|
||||
e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65. |
||||
No need to specify it if DefaultPolynomialUse is set to DEFAULT_POLYNOMIAL_ENABLE */
|
||||
|
||||
uint32_t CRCLength; /*!< This parameter is a value of @ref CRC_Polynomial_Sizes and indicates CRC length.
|
||||
Value can be either one of |
||||
CRC_POLYLENGTH_32B (32-bit CRC) |
||||
CRC_POLYLENGTH_16B (16-bit CRC) |
||||
CRC_POLYLENGTH_8B (8-bit CRC) |
||||
CRC_POLYLENGTH_7B (7-bit CRC) */ |
||||
|
||||
uint32_t InitValue; /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse
|
||||
is set to DEFAULT_INIT_VALUE_ENABLE */
|
||||
|
||||
uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode.
|
||||
Can be either one of the following values
|
||||
CRC_INPUTDATA_INVERSION_NONE no input data inversion |
||||
CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2 |
||||
CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C |
||||
CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458 */
|
||||
|
||||
uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode.
|
||||
Can be either
|
||||
CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion, or |
||||
CRC_OUTPUTDATA_INVERSION_ENABLE CRC 0x11223344 is converted into 0x22CC4488 */ |
||||
}CRC_InitTypeDef; |
||||
|
||||
|
||||
/**
|
||||
* @brief CRC Handle Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
CRC_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
CRC_InitTypeDef Init; /*!< CRC configuration parameters */ |
||||
|
||||
HAL_LockTypeDef Lock; /*!< CRC Locking object */ |
||||
|
||||
__IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */ |
||||
|
||||
uint32_t InputDataFormat; /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format.
|
||||
Can be either
|
||||
CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes (8-bit data) |
||||
CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of half-words (16-bit data) |
||||
CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words (32-bits data)
|
||||
Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization error |
||||
must occur if InputBufferFormat is not one of the three values listed above */
|
||||
}CRC_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup CRC_Exported_Constants CRC Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Default_Polynomial_Value Default CRC generating polynomial
|
||||
* @{ |
||||
*/ |
||||
#define DEFAULT_CRC32_POLY 0x04C11DB7U |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Default_InitValue Default CRC computation initialization value
|
||||
* @{ |
||||
*/ |
||||
#define DEFAULT_CRC_INITVALUE 0xFFFFFFFFU |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Default_Polynomial Indicates whether or not default polynomial is used
|
||||
* @{ |
||||
*/ |
||||
#define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00U) |
||||
#define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01U) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Default_InitValue_Use Indicates whether or not default init value is used
|
||||
* @{ |
||||
*/
|
||||
#define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00U) |
||||
#define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01U) |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the IP
|
||||
* @{ |
||||
*/ |
||||
#define CRC_POLYLENGTH_32B ((uint32_t)0x00000000U) |
||||
#define CRC_POLYLENGTH_16B ((uint32_t)CRC_CR_POLYSIZE_0) |
||||
#define CRC_POLYLENGTH_8B ((uint32_t)CRC_CR_POLYSIZE_1) |
||||
#define CRC_POLYLENGTH_7B ((uint32_t)CRC_CR_POLYSIZE) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Polynomial_Size_Definitions CRC polynomial possible sizes actual definitions
|
||||
* @{ |
||||
*/ |
||||
#define HAL_CRC_LENGTH_32B 32U |
||||
#define HAL_CRC_LENGTH_16B 16U |
||||
#define HAL_CRC_LENGTH_8B 8U |
||||
#define HAL_CRC_LENGTH_7B 7U |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup CRC_Input_Buffer_Format CRC input buffer format
|
||||
* @{ |
||||
*/ |
||||
/* WARNING: CRC_INPUT_FORMAT_UNDEFINED is created for reference purposes but
|
||||
* an error is triggered in HAL_CRC_Init() if InputDataFormat field is set
|
||||
* to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for
|
||||
* the CRC APIs to provide a correct result */
|
||||
#define CRC_INPUTDATA_FORMAT_UNDEFINED ((uint32_t)0x00000000U) |
||||
#define CRC_INPUTDATA_FORMAT_BYTES ((uint32_t)0x00000001U) |
||||
#define CRC_INPUTDATA_FORMAT_HALFWORDS ((uint32_t)0x00000002U) |
||||
#define CRC_INPUTDATA_FORMAT_WORDS ((uint32_t)0x00000003U) |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRC_Exported_Macros CRC Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset CRC handle state
|
||||
* @param __HANDLE__: CRC handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET) |
||||
|
||||
/**
|
||||
* @brief Reset CRC Data Register. |
||||
* @param __HANDLE__: CRC handle |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET) |
||||
|
||||
/**
|
||||
* @brief Set CRC INIT non-default value |
||||
* @param __HANDLE__ : CRC handle |
||||
* @param __INIT__ : 32-bit initial value
|
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__)) |
||||
|
||||
/**
|
||||
* @brief Stores a 8-bit data in the Independent Data(ID) register. |
||||
* @param __HANDLE__: CRC handle |
||||
* @param __VALUE__: 8-bit value to be stored in the ID register |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__))) |
||||
|
||||
/**
|
||||
* @brief Returns the 8-bit data stored in the Independent Data(ID) register. |
||||
* @param __HANDLE__: CRC handle |
||||
* @retval 8-bit value of the ID register
|
||||
*/ |
||||
#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros --------------------------------------------------------*/ |
||||
/** @defgroup CRC_Private_Macros CRC Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define IS_DEFAULT_POLYNOMIAL(__DEFAULT__) (((__DEFAULT__) == DEFAULT_POLYNOMIAL_ENABLE) || \ |
||||
((__DEFAULT__) == DEFAULT_POLYNOMIAL_DISABLE)) |
||||
|
||||
|
||||
#define IS_DEFAULT_INIT_VALUE(__VALUE__) (((__VALUE__) == DEFAULT_INIT_VALUE_ENABLE) || \ |
||||
((__VALUE__) == DEFAULT_INIT_VALUE_DISABLE)) |
||||
|
||||
#define IS_CRC_POL_LENGTH(__LENGTH__) (((__LENGTH__) == CRC_POLYLENGTH_32B) || \ |
||||
((__LENGTH__) == CRC_POLYLENGTH_16B) || \
|
||||
((__LENGTH__) == CRC_POLYLENGTH_8B) || \
|
||||
((__LENGTH__) == CRC_POLYLENGTH_7B)) |
||||
|
||||
|
||||
#define IS_CRC_INPUTDATA_FORMAT(__FORMAT__) (((__FORMAT__) == CRC_INPUTDATA_FORMAT_BYTES) || \ |
||||
((__FORMAT__) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \
|
||||
((__FORMAT__) == CRC_INPUTDATA_FORMAT_WORDS)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Include CRC HAL Extension module */ |
||||
#include "stm32l0xx_hal_crc_ex.h" |
||||
|
||||
/** @defgroup CRC_Exported_Constants CRC Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Aliases for inter STM32 series compatibility */ |
||||
#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse |
||||
#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup CRC_Exported_Functions CRC Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Exported_Functions_Group1 Initialization/de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
/* Initialization and de-initialization functions ****************************/ |
||||
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc); |
||||
HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc); |
||||
void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc); |
||||
void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
|
||||
* @{ |
||||
*/ |
||||
/* Peripheral Control functions ***********************************************/ |
||||
uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); |
||||
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
|
||||
* @{ |
||||
*/ |
||||
/* Peripheral State and Error functions ***************************************/ |
||||
HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup CRC_Private CRC Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_CRC_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,174 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_crc_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of CRC HAL extension module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_CRC_EX_H |
||||
#define __STM32L0xx_HAL_CRC_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRCEx CRCEx
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRCEx_Exported_Constants CRCEx Exported constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRCEx_Input_Data_Inversion CRC Extended input data inversion modes
|
||||
* @{ |
||||
*/ |
||||
#define CRC_INPUTDATA_INVERSION_NONE ((uint32_t)0x00000000U) |
||||
#define CRC_INPUTDATA_INVERSION_BYTE ((uint32_t)CRC_CR_REV_IN_0) |
||||
#define CRC_INPUTDATA_INVERSION_HALFWORD ((uint32_t)CRC_CR_REV_IN_1) |
||||
#define CRC_INPUTDATA_INVERSION_WORD ((uint32_t)CRC_CR_REV_IN) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRCEx_Output_Data_Inversion CRC Extended output data inversion modes
|
||||
* @{ |
||||
*/ |
||||
#define CRC_OUTPUTDATA_INVERSION_DISABLE ((uint32_t)0x00000000U) |
||||
#define CRC_OUTPUTDATA_INVERSION_ENABLE ((uint32_t)CRC_CR_REV_OUT) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRCEx_Exported_Macros CRCEx Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Set CRC output reversal |
||||
* @param __HANDLE__ : CRC handle |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT) |
||||
|
||||
/**
|
||||
* @brief Unset CRC output reversal |
||||
* @param __HANDLE__ : CRC handle |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT)) |
||||
|
||||
/**
|
||||
* @brief Set CRC non-default polynomial |
||||
* @param __HANDLE__ : CRC handle |
||||
* @param __POLYNOMIAL__: 7, 8, 16 or 32-bit polynomial
|
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRCEx_Private_Macros CRCEx Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define IS_CRC_INPUTDATA_INVERSION_MODE(__MODE__) (((__MODE__) == CRC_INPUTDATA_INVERSION_NONE) || \ |
||||
((__MODE__) == CRC_INPUTDATA_INVERSION_BYTE) || \
|
||||
((__MODE__) == CRC_INPUTDATA_INVERSION_HALFWORD) || \
|
||||
((__MODE__) == CRC_INPUTDATA_INVERSION_WORD)) |
||||
|
||||
|
||||
#define IS_CRC_OUTPUTDATA_INVERSION_MODE(__MODE__) (((__MODE__) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \ |
||||
((__MODE__) == CRC_OUTPUTDATA_INVERSION_ENABLE)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
/** @defgroup CRCEx_Exported_Functions CRCEx Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRCEx_Exported_Functions_Group1 Extended CRC features functions
|
||||
* @{ |
||||
*/ |
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/* Initialization and de-initialization functions ****************************/ |
||||
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength); |
||||
HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode); |
||||
HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode); |
||||
|
||||
/* Peripheral Control functions ***********************************************/ |
||||
/* Peripheral State and Error functions ***************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_CRC_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,427 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_cryp.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of CRYP HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_CRYP_H |
||||
#define __STM32L0xx_HAL_CRYP_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if defined (STM32L021xx) || defined (STM32L041xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRYP CRYP
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup CRYP_Exported_Types CRYP Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief CRYP Configuration Structure definition
|
||||
*/ |
||||
typedef struct |
||||
{
|
||||
uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.
|
||||
This parameter can be a value of @ref CRYP_Data_Type */ |
||||
|
||||
uint8_t* pKey; /*!< The key used for encryption/decryption */ |
||||
|
||||
uint8_t* pInitVect; /*!< The initialization vector used also as initialization
|
||||
counter in CTR mode */ |
||||
|
||||
}CRYP_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL CRYP State structures definition
|
||||
*/
|
||||
typedef enum |
||||
{ |
||||
HAL_CRYP_STATE_RESET = 0x00U, /*!< CRYP not yet initialized or disabled */ |
||||
HAL_CRYP_STATE_READY = 0x01U, /*!< CRYP initialized and ready for use */ |
||||
HAL_CRYP_STATE_BUSY = 0x02U, /*!< CRYP internal processing is ongoing */ |
||||
HAL_CRYP_STATE_TIMEOUT = 0x03U, /*!< CRYP timeout state */ |
||||
HAL_CRYP_STATE_ERROR = 0x04U /*!< CRYP error state */
|
||||
|
||||
}HAL_CRYP_STATETypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL CRYP phase structures definition
|
||||
*/
|
||||
typedef enum |
||||
{ |
||||
HAL_CRYP_PHASE_READY = 0x01U, /*!< CRYP peripheral is ready for initialization. */ |
||||
HAL_CRYP_PHASE_PROCESS = 0x02U, /*!< CRYP peripheral is in processing phase */ |
||||
}HAL_PhaseTypeDef; |
||||
|
||||
/**
|
||||
* @brief CRYP handle Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
AES_TypeDef *Instance; /*!< Register base address */ |
||||
|
||||
CRYP_InitTypeDef Init; /*!< CRYP required parameters */ |
||||
|
||||
uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */ |
||||
|
||||
uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */ |
||||
|
||||
__IO uint16_t CrypInCount; /*!< Counter of inputed data */ |
||||
|
||||
__IO uint16_t CrypOutCount; /*!< Counter of outputed data */ |
||||
|
||||
HAL_StatusTypeDef Status; /*!< CRYP peripheral status */ |
||||
|
||||
HAL_PhaseTypeDef Phase; /*!< CRYP peripheral phase */ |
||||
|
||||
DMA_HandleTypeDef *hdmain; /*!< CRYP In DMA handle parameters */ |
||||
|
||||
DMA_HandleTypeDef *hdmaout; /*!< CRYP Out DMA handle parameters */ |
||||
|
||||
HAL_LockTypeDef Lock; /*!< CRYP locking object */ |
||||
|
||||
__IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */ |
||||
|
||||
}CRYP_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRYP_Exported_Constants CRYP Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRYP_Data_Type CRYP Data Type
|
||||
* @{ |
||||
*/ |
||||
#define CRYP_DATATYPE_32B ((uint32_t)0x00000000U) |
||||
#define CRYP_DATATYPE_16B AES_CR_DATATYPE_0 |
||||
#define CRYP_DATATYPE_8B AES_CR_DATATYPE_1 |
||||
#define CRYP_DATATYPE_1B AES_CR_DATATYPE |
||||
|
||||
#define IS_CRYP_DATATYPE(DATATYPE) (((DATATYPE) == CRYP_DATATYPE_32B) || \ |
||||
((DATATYPE) == CRYP_DATATYPE_16B) || \
|
||||
((DATATYPE) == CRYP_DATATYPE_8B) || \
|
||||
((DATATYPE) == CRYP_DATATYPE_1B))
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRYP_AlgoModeDirection CRYP Algo Mode Direction
|
||||
* @{ |
||||
*/
|
||||
#define CRYP_CR_ALGOMODE_DIRECTION (uint32_t)(AES_CR_MODE|AES_CR_CHMOD) |
||||
|
||||
#define CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT ((uint32_t)0x00000000U) |
||||
#define CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT (AES_CR_MODE) |
||||
#define CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT (AES_CR_CHMOD_0) |
||||
#define CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT ((uint32_t)(AES_CR_CHMOD_0|AES_CR_MODE)) |
||||
#define CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT (AES_CR_CHMOD_1) |
||||
#define CRYP_CR_ALGOMODE_AES_CTR_DECRYPT ((uint32_t)(AES_CR_CHMOD_1 | AES_CR_MODE_1)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRYP_AES_Interrupts AES Interrupts
|
||||
* @{ |
||||
*/
|
||||
#define CRYP_IT_CC AES_CR_CCIE /*!< Computation Complete interrupt */ |
||||
#define CRYP_IT_ERR AES_CR_ERRIE /*!< Error interrupt */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/** @defgroup CRYP_AES_Flags AES Flags
|
||||
* @{ |
||||
*/
|
||||
#define CRYP_FLAG_CCF AES_SR_CCF /*!< Computation Complete Flag */ |
||||
#define CRYP_FLAG_RDERR AES_SR_RDERR /*!< Read Error Flag */ |
||||
#define CRYP_FLAG_WRERR AES_SR_WRERR /*!< Write Error Flag */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup CRYP_AES_Clear_Flags AES Clear Flags
|
||||
* @{ |
||||
*/
|
||||
#define CRYP_CLEARFLAG_CCF AES_CR_CCFC /*!< Computation Complete Flag Clear */ |
||||
#define CRYP_CLEARFLAG_RDERR AES_CR_ERRC /*!< Read Error Clear */ |
||||
#define CRYP_CLEARFLAG_WRERR AES_CR_ERRC /*!< Write Error Clear */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRYP_Exported_Macros CRYP Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset CRYP handle state
|
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET) |
||||
|
||||
/**
|
||||
* @brief Enable/Disable the CRYP peripheral. |
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, AES_CR_EN) |
||||
#define __HAL_CRYP_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, AES_CR_EN) |
||||
|
||||
/**
|
||||
* @brief Set the algorithm mode: AES-ECB, AES-CBC, AES-CTR, DES-ECB, DES-CBC,... |
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __MODE__: The algorithm mode. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_SET_MODE(__HANDLE__,__MODE__) SET_BIT((__HANDLE__)->Instance->CR, (__MODE__)) |
||||
|
||||
|
||||
/** @brief Check whether the specified CRYP flag is set or not.
|
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __FLAG__: specifies the flag to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg CRYP_FLAG_CCF : Computation Complete Flag |
||||
* @arg CRYP_FLAG_RDERR : Read Error Flag |
||||
* @arg CRYP_FLAG_WRERR : Write Error Flag |
||||
* @retval The new state of __FLAG__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_CRYP_GET_FLAG(__HANDLE__,__FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
/** @brief Clear the CRYP pending flag.
|
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __FLAG__: specifies the flag to clear. |
||||
* This parameter can be one of the following values: |
||||
* @arg CRYP_CLEARFLAG_CCF : Computation Complete Clear Flag |
||||
* @arg CRYP_CLEARFLAG_RDERR : Read Error Clear |
||||
* @arg CRYP_CLEARFLAG_WRERR : Write Error Clear |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_CLEAR_FLAG(__HANDLE__, __FLAG__) SET_BIT((__HANDLE__)->Instance->CR, (__FLAG__)) |
||||
|
||||
/**
|
||||
* @brief Enable the CRYP interrupt. |
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __INTERRUPT__: CRYP Interrupt. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_ENABLE_IT(__HANDLE__,__INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
||||
|
||||
/**
|
||||
* @brief Disable the CRYP interrupt. |
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __INTERRUPT__: CRYP interrupt. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_DISABLE_IT(__HANDLE__,__INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
||||
|
||||
/** @brief Checks if the specified CRYP interrupt source is enabled or disabled.
|
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __INTERRUPT__: CRYP interrupt source to check |
||||
* This parameter can be one of the following values: |
||||
* @arg CRYP_IT_CC : Computation Complete interrupt |
||||
* @arg CRYP_IT_ERR : Error interrupt (used for RDERR and WRERR) |
||||
* @retval State of interruption (SET or RESET) |
||||
*/ |
||||
#define __HAL_CRYP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ |
||||
(( ((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__) \
|
||||
)? SET : RESET \
|
||||
) |
||||
|
||||
/** @brief Clear the CRYP pending IT.
|
||||
* @param __HANDLE__: specifies the CRYP handle. |
||||
* @param __IT__: specifies the IT to clear. |
||||
* This parameter can be one of the following values: |
||||
* @arg CRYP_CLEARFLAG_CCF : Computation Complete Clear Flag |
||||
* @arg CRYP_CLEARFLAG_RDERR : Read Error Clear |
||||
* @arg CRYP_CLEARFLAG_WRERR : Write Error Clear |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_CRYP_CLEAR_IT(__HANDLE__, __IT__) SET_BIT((__HANDLE__)->Instance->CR, (__IT__)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Include CRYP HAL Extension module */ |
||||
#include "stm32l0xx_hal_cryp_ex.h" |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRYP_Exported_Functions CRYP Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Initialization/de-initialization functions *********************************/ |
||||
HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp); |
||||
HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp); |
||||
|
||||
/* MSP functions *************************************************************/ |
||||
void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp); |
||||
void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* AES encryption/decryption using polling ***********************************/ |
||||
HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
||||
|
||||
/* AES encryption/decryption using interrupt *********************************/ |
||||
HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
||||
|
||||
/* AES encryption/decryption using DMA ***************************************/ |
||||
HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
||||
HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @addtogroup CRYP_Exported_Functions_Group3 DMA callback functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* CallBack functions ********************************************************/ |
||||
void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp); |
||||
void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp); |
||||
void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Processing functions ********************************************************/ |
||||
void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Peripheral State functions **************************************************/ |
||||
HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup CRYP_Private CRYP Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
#endif /* STM32L021xx || STM32L041xx || STM32L061xx || STM32L062xx || STM32L063xx || STM32L081xx || STM32L082xx || STM32L083xx */ |
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_CRYP_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,97 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_cryp_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of CRYPEx HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_CRYP_EX_H |
||||
#define __STM32L0xx_HAL_CRYP_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if defined (STM32L021xx) || defined (STM32L041xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRYPEx CRYPEx
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup CRYPEx_Exported_Functions CRYPEx Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRYPEx_Exported_Functions_Group1 Extended features functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* CallBack functions ********************************************************/ |
||||
void HAL_CRYPEx_ComputationCpltCallback(CRYP_HandleTypeDef *hcryp); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
#endif /* STM32L021xx || STM32L041xx || STM32L061xx || STM32L062xx || STM32L063xx || STM32L081xx || STM32L082xx || STM32L083xx */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_CRYP_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,441 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_dac.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of DAC HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_DAC_H |
||||
#define __STM32L0xx_HAL_DAC_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup DAC DAC
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup DAC_Exported_Types DAC Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief HAL State structures definition
|
||||
*/
|
||||
typedef enum |
||||
{ |
||||
HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ |
||||
HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ |
||||
HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ |
||||
HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ |
||||
HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ |
||||
|
||||
}HAL_DAC_StateTypeDef; |
||||
|
||||
/**
|
||||
* @brief DAC handle Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
DAC_TypeDef *Instance; /*!< Register base address */ |
||||
|
||||
__IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ |
||||
|
||||
HAL_LockTypeDef Lock; /*!< DAC locking object */ |
||||
|
||||
DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ |
||||
|
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
|
||||
#endif |
||||
|
||||
__IO uint32_t ErrorCode; /*!< DAC Error code */ |
||||
|
||||
}DAC_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @brief DAC Configuration regular Channel structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
|
||||
This parameter can be a value of @ref DAC_trigger_selection */ |
||||
|
||||
uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
|
||||
This parameter can be a value of @ref DAC_output_buffer */ |
||||
|
||||
}DAC_ChannelConfTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup DAC_Exported_Constants DAC Exported Constants
|
||||
* @{ |
||||
*/
|
||||
|
||||
/** @defgroup DAC_Error_Code DAC Error Code
|
||||
* @{ |
||||
*/ |
||||
#define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ |
||||
#define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DAM underrun error */ |
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DAM underrun error */ |
||||
#endif |
||||
#define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_trigger_selection DAC trigger selection
|
||||
* @{ |
||||
*/ |
||||
#define DAC_TRIGGER_NONE ((uint32_t)0x00000000U) /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */ |
||||
#define DAC_TRIGGER_T6_TRGO ((uint32_t) DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ |
||||
#define DAC_TRIGGER_T21_TRGO ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM21 TRGO selected as external conversion trigger for DAC channel */ |
||||
#define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ |
||||
#define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ |
||||
#define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ |
||||
|
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define DAC_TRIGGER_T3_TRGO ((uint32_t)( DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel */ |
||||
#define DAC_TRIGGER_T3_CH3 ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM3 CH3 selected as external conversion trigger for DAC channel */ |
||||
#define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ |
||||
#endif |
||||
|
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
||||
((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T3_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T3_CH3) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T21_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
|
||||
((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
||||
#else /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */ |
||||
#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
||||
((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T21_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
|
||||
((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
||||
#endif /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_output_buffer DAC output buffer
|
||||
* @{ |
||||
*/ |
||||
#define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000U) |
||||
#define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1) |
||||
|
||||
#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ |
||||
((STATE) == DAC_OUTPUTBUFFER_DISABLE)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_Channel_selection DAC Channel selection
|
||||
* @{ |
||||
*/ |
||||
#define DAC_CHANNEL_1 ((uint32_t)0x00000000U) |
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define DAC_CHANNEL_2 ((uint32_t)0x00000010U) |
||||
#endif |
||||
|
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ |
||||
((CHANNEL) == DAC_CHANNEL_2)) |
||||
#else |
||||
#define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1) |
||||
#endif |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_data_alignement DAC data alignement
|
||||
* @{ |
||||
*/ |
||||
#define DAC_ALIGN_12B_R ((uint32_t)0x00000000U) |
||||
#define DAC_ALIGN_12B_L ((uint32_t)0x00000004U) |
||||
#define DAC_ALIGN_8B_R ((uint32_t)0x00000008U) |
||||
|
||||
#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ |
||||
((ALIGN) == DAC_ALIGN_12B_L) || \
|
||||
((ALIGN) == DAC_ALIGN_8B_R)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_data DAC data
|
||||
* @{ |
||||
*/ |
||||
#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_flags_definition DAC flags definition
|
||||
* @{ |
||||
*/
|
||||
#define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
||||
#endif |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_IT_definition DAC IT definition
|
||||
* @{ |
||||
*/
|
||||
#define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
#define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
||||
#endif |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup DAC_Exported_Macros DAC Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset DAC handle state
|
||||
* @param __HANDLE__: specifies the DAC handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) |
||||
|
||||
/** @brief Enable the DAC channel
|
||||
* @param __HANDLE__: specifies the DAC handle. |
||||
* @param __DAC_CHANNEL__: specifies the DAC channel |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_CHANNEL__) \ |
||||
SET_BIT((__HANDLE__)->Instance->CR, (DAC_CR_EN1 << (__DAC_CHANNEL__))) |
||||
|
||||
/** @brief Disable the DAC channel
|
||||
* @param __HANDLE__: specifies the DAC handle |
||||
* @param __DAC_CHANNEL__: specifies the DAC channel. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_CHANNEL__) \ |
||||
CLEAR_BIT((__HANDLE__)->Instance->CR, (DAC_CR_EN1 << (__DAC_CHANNEL__))) |
||||
|
||||
|
||||
#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ |
||||
SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
||||
|
||||
|
||||
/** @brief Disable the DAC interrupt
|
||||
* @param __HANDLE__: specifies the DAC handle |
||||
* @param __INTERRUPT__: specifies the DAC interrupt. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ |
||||
CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
||||
|
||||
/** @brief Check whether the specified DAC interrupt source is enabled or not.
|
||||
* @param __HANDLE__: DAC handle |
||||
* @param __INTERRUPT__: DAC interrupt source to check |
||||
* This parameter can be any combination of the following values: |
||||
* @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
||||
* @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt (STM32L072xx STM32L073xx STM32L082xx STM32L083xx only) |
||||
* @retval State of interruption (SET or RESET) |
||||
*/ |
||||
#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ |
||||
(((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) |
||||
|
||||
/** @brief Get the selected DAC's flag status.
|
||||
* @param __HANDLE__: specifies the DAC handle. |
||||
* @param __FLAG__: specifies the FLAG. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) \ |
||||
((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
/** @brief Clear the DAC's flag.
|
||||
* @param __HANDLE__: specifies the DAC handle. |
||||
* @param __FLAG__: specifies the FLAG. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) \ |
||||
(((__HANDLE__)->Instance->SR) = (__FLAG__)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Private macro ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup DAC_Private_Macros DAC Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Set DHR12R1 alignment
|
||||
* @param __ALIGNEMENT__: specifies the DAC alignement |
||||
* @retval None |
||||
*/ |
||||
#define DAC_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008U) + (__ALIGNEMENT__)) |
||||
|
||||
/** @brief Set DHR12R2 alignment
|
||||
* @param __ALIGNEMENT__: specifies the DAC alignement |
||||
* @retval None |
||||
*/ |
||||
#define DAC_DHR12R2_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000014U) + (__ALIGNEMENT__)) |
||||
|
||||
/** @brief Set DHR12RD alignment
|
||||
* @param __ALIGNEMENT__: specifies the DAC alignement |
||||
* @retval None |
||||
*/ |
||||
#define DAC_DHR12RD_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000020U) + (__ALIGNEMENT__)) |
||||
|
||||
/** @brief Enable the DAC interrupt
|
||||
* @param __HANDLE__: specifies the DAC handle |
||||
* @param __INTERRUPT__: specifies the DAC interrupt. |
||||
* @retval None |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
|
||||
/* Include DAC HAL Extension module */ |
||||
#include "stm32l0xx_hal_dac_ex.h" |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup DAC_Exported_Functions DAC Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{ |
||||
*/
|
||||
/* Initialization and de-initialization functions *****************************/ |
||||
HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); |
||||
HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); |
||||
void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); |
||||
void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_Exported_Functions_Group2 IO operation functions
|
||||
* @{ |
||||
*/ |
||||
/* IO operation functions *****************************************************/ |
||||
HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); |
||||
HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); |
||||
HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); |
||||
HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); |
||||
HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); |
||||
uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); |
||||
void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); |
||||
void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
||||
void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
||||
void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); |
||||
void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
|
||||
* @{ |
||||
*/ |
||||
/* Peripheral Control functions ***********************************************/ |
||||
HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
|
||||
* @{ |
||||
*/ |
||||
/* Peripheral State functions ***************************************************/ |
||||
HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); |
||||
uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* STM32L011xx && STM32L021xx && STM32L031xx && STM32L041xx && STM32L061xx && STM32L071xx && STM32L081xx*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /*__STM32L0xx_HAL_DAC_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,183 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_dac_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of DAC HAL Extension module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_DAC_EX_H |
||||
#define __STM32L0xx_HAL_DAC_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup DACEx DACEx
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup DACEx_Exported_Constants DACEx Exported Constants
|
||||
* @{ |
||||
*/
|
||||
|
||||
/** @defgroup DACEx_lfsrunmask_triangleamplitude DACEx lfsrunmask triangleamplitude
|
||||
* @{ |
||||
*/ |
||||
#define DAC_LFSRUNMASK_BIT0 ((uint32_t)0x00000000U) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS1_0 ((uint32_t)DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS2_0 ((uint32_t)DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS3_0 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0)/*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS4_0 ((uint32_t)DAC_CR_MAMP1_2) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS5_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS6_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS7_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS8_0 ((uint32_t)DAC_CR_MAMP1_3) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS9_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS10_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */ |
||||
#define DAC_LFSRUNMASK_BITS11_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */ |
||||
#define DAC_TRIANGLEAMPLITUDE_1 ((uint32_t)0x00000000U) /*!< Select max triangle amplitude of 1 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_3 ((uint32_t)DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 3 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_7 ((uint32_t)DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 7 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_15 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 15 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_31 ((uint32_t)DAC_CR_MAMP1_2) /*!< Select max triangle amplitude of 31 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_63 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 63 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_127 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 127 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_255 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 255 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_511 ((uint32_t)DAC_CR_MAMP1_3) /*!< Select max triangle amplitude of 511 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_1023 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 1023 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_2047 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 2047 */ |
||||
#define DAC_TRIANGLEAMPLITUDE_4095 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 4095 */ |
||||
|
||||
#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \ |
||||
((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS10_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS11_0) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_1) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_3) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_7) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_15) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_31) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_63) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_127) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_255) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_511) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_1023) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_2047) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_4095)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DACEx_Exported_Functions DACEx Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup DACEx_Exported_Functions_Group1 Extended features functions
|
||||
* @{ |
||||
*/ |
||||
/* Extension features functions ***********************************************/ |
||||
HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude); |
||||
HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude); |
||||
|
||||
#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac); |
||||
HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2); |
||||
void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac); |
||||
void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac); |
||||
void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef* hdac); |
||||
void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef* hdac); |
||||
#endif |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup DACEx_Private DACEx Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* !STM32L011xx && !STM32L021xx && !STM32L031xx && !STM32L041xx && !STM32L051xx && !STM32L061xx && !STM32L071xx && !STM32L081xx*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /*__STM32L0xx_HAL_DAC_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,384 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_firewall.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of FIREWALL HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
******************************************************************************
|
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_FIREWALL_H |
||||
#define __STM32L0xx_HAL_FIREWALL_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup FIREWALL FIREWALL
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup FIREWALL_Exported_Types FIREWALL Exported Types
|
||||
* @{ |
||||
*/
|
||||
|
||||
/**
|
||||
* @brief FIREWALL Initialization Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
uint32_t CodeSegmentStartAddress; /*!< Protected code segment start address. This value is 24-bit long, the 8 LSB bits are
|
||||
reserved and forced to 0 in order to allow a 256-byte granularity. */ |
||||
|
||||
uint32_t CodeSegmentLength; /*!< Protected code segment length in bytes. This value is 22-bit long, the 8 LSB bits are
|
||||
reserved and forced to 0 for the length to be a multiple of 256 bytes. */ |
||||
|
||||
uint32_t NonVDataSegmentStartAddress; /*!< Protected non-volatile data segment start address. This value is 24-bit long, the 8 LSB
|
||||
bits are reserved and forced to 0 in order to allow a 256-byte granularity. */ |
||||
|
||||
uint32_t NonVDataSegmentLength; /*!< Protected non-volatile data segment length in bytes. This value is 22-bit long, the 8 LSB
|
||||
bits are reserved and forced to 0 for the length to be a multiple of 256 bytes. */ |
||||
|
||||
uint32_t VDataSegmentStartAddress; /*!< Protected volatile data segment start address. This value is 17-bit long, the 6 LSB bits
|
||||
are reserved and forced to 0 in order to allow a 64-byte granularity. */ |
||||
|
||||
uint32_t VDataSegmentLength; /*!< Protected volatile data segment length in bytes. This value is 17-bit long, the 6 LSB
|
||||
bits are reserved and forced to 0 for the length to be a multiple of 64 bytes. */ |
||||
|
||||
uint32_t VolatileDataExecution; /*!< Set VDE bit specifying whether or not the volatile data segment can be executed.
|
||||
When VDS = 1 (set by parameter VolatileDataShared), VDE bit has no meaning. |
||||
This parameter can be a value of @ref FIREWALL_VolatileData_Executable */
|
||||
|
||||
uint32_t VolatileDataShared; /*!< Set VDS bit in specifying whether or not the volatile data segment can be shared with a
|
||||
non-protected application code. |
||||
This parameter can be a value of @ref FIREWALL_VolatileData_Shared */
|
||||
|
||||
}FIREWALL_InitTypeDef; |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup FIREWALL_Exported_Constants FIREWALL Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup FIREWALL_VolatileData_Executable FIREWALL volatile data segment execution status
|
||||
* @{ |
||||
*/ |
||||
#define FIREWALL_VOLATILEDATA_NOT_EXECUTABLE ((uint32_t)0x0000U) |
||||
#define FIREWALL_VOLATILEDATA_EXECUTABLE ((uint32_t)FW_CR_VDE) |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup FIREWALL_VolatileData_Shared FIREWALL volatile data segment share status
|
||||
* @{ |
||||
*/
|
||||
#define FIREWALL_VOLATILEDATA_NOT_SHARED ((uint32_t)0x0000U) |
||||
#define FIREWALL_VOLATILEDATA_SHARED ((uint32_t)FW_CR_VDS) |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup FIREWALL_Pre_Arm FIREWALL pre arm status
|
||||
* @{ |
||||
*/
|
||||
#define FIREWALL_PRE_ARM_RESET ((uint32_t)0x0000U) |
||||
#define FIREWALL_PRE_ARM_SET ((uint32_t)FW_CR_FPA) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros --------------------------------------------------------*/ |
||||
/** @addtogroup FIREWALL_Private
|
||||
* @{ |
||||
*/ |
||||
#define IS_FIREWALL_CODE_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE + FLASH_SIZE))) |
||||
#define IS_FIREWALL_CODE_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (FLASH_BASE + FLASH_SIZE)) |
||||
|
||||
#define IS_FIREWALL_NONVOLATILEDATA_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE + FLASH_SIZE))) |
||||
#define IS_FIREWALL_NONVOLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (FLASH_BASE + FLASH_SIZE)) |
||||
|
||||
#define IS_FIREWALL_VOLATILEDATA_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= SRAM_BASE) && ((ADDRESS) < (SRAM_BASE + SRAM_SIZE_MAX))) |
||||
#define IS_FIREWALL_VOLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (SRAM_BASE + SRAM_SIZE_MAX)) |
||||
|
||||
|
||||
#define IS_FIREWALL_VOLATILEDATA_SHARE(SHARE) (((SHARE) == FIREWALL_VOLATILEDATA_NOT_SHARED) || \ |
||||
((SHARE) == FIREWALL_VOLATILEDATA_SHARED)) |
||||
|
||||
#define IS_FIREWALL_VOLATILEDATA_EXECUTE(EXECUTE) (((EXECUTE) == FIREWALL_VOLATILEDATA_NOT_EXECUTABLE) || \ |
||||
((EXECUTE) == FIREWALL_VOLATILEDATA_EXECUTABLE))
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
/** @defgroup FIREWALL_Exported_Macros FIREWALL Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Check whether the FIREWALL is enabled or not.
|
||||
* @retval FIREWALL enabling status (TRUE or FALSE). |
||||
*/
|
||||
#define __HAL_FIREWALL_IS_ENABLED() HAL_IS_BIT_CLR(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN) |
||||
|
||||
|
||||
/** @brief Enable FIREWALL pre arm.
|
||||
* @note When FPA bit is set, any code executed outside the protected segment
|
||||
* closes the Firewall, otherwise it generates a system reset. |
||||
* @note This macro provides the same service as HAL_FIREWALL_EnablePreArmFlag() API |
||||
* but can be executed inside a code area protected by the Firewall.
|
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
*/
|
||||
#define __HAL_FIREWALL_PREARM_ENABLE() \ |
||||
do { \
|
||||
__IO uint32_t tmpreg; \
|
||||
SET_BIT(FIREWALL->CR, FW_CR_FPA) ; \
|
||||
/* Read bit back to ensure it is taken into account by IP */ \
|
||||
/* (introduce proper delay inside macro execution) */ \
|
||||
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0) |
||||
|
||||
|
||||
|
||||
/** @brief Disable FIREWALL pre arm.
|
||||
* @note When FPA bit is set, any code executed outside the protected segment
|
||||
* closes the Firewall, otherwise, it generates a system reset. |
||||
* @note This macro provides the same service as HAL_FIREWALL_DisablePreArmFlag() API |
||||
* but can be executed inside a code area protected by the Firewall. |
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
*/
|
||||
#define __HAL_FIREWALL_PREARM_DISABLE() \ |
||||
do { \
|
||||
__IO uint32_t tmpreg; \
|
||||
CLEAR_BIT(FIREWALL->CR, FW_CR_FPA) ; \
|
||||
/* Read bit back to ensure it is taken into account by IP */ \
|
||||
/* (introduce proper delay inside macro execution) */ \
|
||||
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0) |
||||
|
||||
/** @brief Enable volatile data sharing in setting VDS bit.
|
||||
* @note When VDS bit is set, the volatile data segment is shared with non-protected |
||||
* application code. It can be accessed whatever the Firewall state (opened or closed).
|
||||
* @note This macro can be executed inside a code area protected by the Firewall. |
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
*/
|
||||
#define __HAL_FIREWALL_VOLATILEDATA_SHARED_ENABLE() \ |
||||
do { \
|
||||
__IO uint32_t tmpreg; \
|
||||
SET_BIT(FIREWALL->CR, FW_CR_VDS) ; \
|
||||
/* Read bit back to ensure it is taken into account by IP */ \
|
||||
/* (introduce proper delay inside macro execution) */ \
|
||||
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0) |
||||
|
||||
/** @brief Disable volatile data sharing in resetting VDS bit.
|
||||
* @note When VDS bit is reset, the volatile data segment is not shared and cannot be
|
||||
* hit by a non protected executable code when the Firewall is closed. If it is
|
||||
* accessed in such a condition, a system reset is generated by the Firewall. |
||||
* @note This macro can be executed inside a code area protected by the Firewall.
|
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
*/
|
||||
#define __HAL_FIREWALL_VOLATILEDATA_SHARED_DISABLE() \ |
||||
do { \
|
||||
__IO uint32_t tmpreg; \
|
||||
CLEAR_BIT(FIREWALL->CR, FW_CR_VDS) ; \
|
||||
/* Read bit back to ensure it is taken into account by IP */ \
|
||||
/* (introduce proper delay inside macro execution) */ \
|
||||
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0) |
||||
|
||||
/** @brief Enable volatile data execution in setting VDE bit.
|
||||
* @note VDE bit is ignored when VDS is set. IF VDS = 1, the Volatile data segment can be
|
||||
* executed whatever the VDE bit value.
|
||||
* @note When VDE bit is set (with VDS = 0), the volatile data segment is executable. When |
||||
* the Firewall call is closed, a "call gate" entry procedure is required to open
|
||||
* first the Firewall. |
||||
* @note This macro can be executed inside a code area protected by the Firewall. |
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
*/
|
||||
#define __HAL_FIREWALL_VOLATILEDATA_EXECUTION_ENABLE() \ |
||||
do { \
|
||||
__IO uint32_t tmpreg; \
|
||||
SET_BIT(FIREWALL->CR, FW_CR_VDE) ; \
|
||||
/* Read bit back to ensure it is taken into account by IP */ \
|
||||
/* (introduce proper delay inside macro execution) */ \
|
||||
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0) |
||||
|
||||
/** @brief Disable volatile data execution in resetting VDE bit.
|
||||
* @note VDE bit is ignored when VDS is set. IF VDS = 1, the Volatile data segment can be
|
||||
* executed whatever the VDE bit value.
|
||||
* @note When VDE bit is reset (with VDS = 0), the volatile data segment cannot be executed. |
||||
* @note This macro can be executed inside a code area protected by the Firewall.
|
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
*/ |
||||
#define __HAL_FIREWALL_VOLATILEDATA_EXECUTION_DISABLE() \ |
||||
do { \
|
||||
__IO uint32_t tmpreg; \
|
||||
CLEAR_BIT(FIREWALL->CR, FW_CR_VDE) ; \
|
||||
/* Read bit back to ensure it is taken into account by IP */ \
|
||||
/* (introduce proper delay inside macro execution) */ \
|
||||
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0)
|
||||
|
||||
|
||||
/** @brief Check whether or not the volatile data segment is shared.
|
||||
* @note This macro can be executed inside a code area protected by the Firewall. |
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
* @retval VDS bit setting status (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_FIREWALL_GET_VOLATILEDATA_SHARED() ((FIREWALL->CR & FW_CR_VDS) == FW_CR_VDS) |
||||
|
||||
/** @brief Check whether or not the volatile data segment is declared executable.
|
||||
* @note This macro can be executed inside a code area protected by the Firewall. |
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
* @retval VDE bit setting status (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_FIREWALL_GET_VOLATILEDATA_EXECUTION() ((FIREWALL->CR & FW_CR_VDE) == FW_CR_VDE) |
||||
|
||||
/** @brief Check whether or not the Firewall pre arm bit is set.
|
||||
* @note This macro can be executed inside a code area protected by the Firewall. |
||||
* @note This macro can be executed whatever the Firewall state (opened or closed) when |
||||
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from |
||||
* 0, that is, when the non volatile data segment is defined), the macro can be |
||||
* executed only when the Firewall is opened.
|
||||
* @retval FPA bit setting status (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_FIREWALL_GET_PREARM() ((FIREWALL->CR & FW_CR_FPA) == FW_CR_FPA) |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup FIREWALL_Exported_Functions FIREWALL Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup FIREWALL_Exported_Functions_Group1 Initialization Functions
|
||||
* @brief Initialization and Configuration Functions
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Initialization functions ********************************/ |
||||
HAL_StatusTypeDef HAL_FIREWALL_Config(FIREWALL_InitTypeDef * fw_init); |
||||
void HAL_FIREWALL_GetConfig(FIREWALL_InitTypeDef * fw_config); |
||||
void HAL_FIREWALL_EnableFirewall(void); |
||||
void HAL_FIREWALL_EnablePreArmFlag(void); |
||||
void HAL_FIREWALL_DisablePreArmFlag(void); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup FIREWALL_Private FIREWALL Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
|
||||
#endif /* #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_FIREWALL_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,479 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_i2s.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of I2S HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_I2S_H |
||||
#define __STM32L0xx_HAL_I2S_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L011xx) && !defined (STM32L021xx) |
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup I2S I2S
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/** @defgroup I2S_Exported_Types I2S Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief I2S Init structure definition
|
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Mode; /*!< Specifies the I2S operating mode.
|
||||
This parameter can be a value of @ref I2S_Mode */ |
||||
|
||||
uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Standard */ |
||||
|
||||
uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Data_Format */ |
||||
|
||||
uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
|
||||
This parameter can be a value of @ref I2S_MCLK_Output */ |
||||
|
||||
uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
|
||||
This parameter can be a value of @ref I2S_Audio_Frequency */ |
||||
|
||||
uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
|
||||
This parameter can be a value of @ref I2S_Clock_Polarity */ |
||||
|
||||
}I2S_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL State structures definition |
||||
*/
|
||||
typedef enum |
||||
{ |
||||
HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */ |
||||
HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */ |
||||
HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */
|
||||
HAL_I2S_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
|
||||
HAL_I2S_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
||||
HAL_I2S_STATE_TIMEOUT = 0x03U, /*!< I2S timeout state */
|
||||
HAL_I2S_STATE_ERROR = 0x04U /*!< I2S error state */
|
||||
}HAL_I2S_StateTypeDef; |
||||
|
||||
/**
|
||||
* @brief I2S handle Structure definition
|
||||
*/ |
||||
typedef struct |
||||
{ |
||||
SPI_TypeDef *Instance; /* I2S registers base address */ |
||||
|
||||
I2S_InitTypeDef Init; /* I2S communication parameters */ |
||||
|
||||
uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */ |
||||
|
||||
__IO uint16_t TxXferSize; /* I2S Tx transfer size */ |
||||
|
||||
__IO uint16_t TxXferCount; /* I2S Tx transfer Counter */ |
||||
|
||||
uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */ |
||||
|
||||
__IO uint16_t RxXferSize; /* I2S Rx transfer size */ |
||||
|
||||
__IO uint16_t RxXferCount; /* I2S Rx transfer counter
|
||||
(This field is initialized at the
|
||||
same value as transfer size at the
|
||||
beginning of the transfer and
|
||||
decremented when a sample is received.
|
||||
NbSamplesReceived = RxBufferSize-RxBufferCount) */ |
||||
|
||||
DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */ |
||||
|
||||
DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */ |
||||
|
||||
__IO HAL_LockTypeDef Lock; /* I2S locking object */ |
||||
|
||||
__IO HAL_I2S_StateTypeDef State; /* I2S communication state */ |
||||
|
||||
__IO uint32_t ErrorCode; /* I2S Error code */ |
||||
|
||||
}I2S_HandleTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup I2S_Exported_Constants I2S Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @defgroup I2S_ErrorCode I2S Error Code |
||||
* @{ |
||||
*/ |
||||
#define HAL_I2S_ERROR_NONE ((uint32_t)0x00U) /*!< No error */ |
||||
#define HAL_I2S_ERROR_UDR ((uint32_t)0x01U) /*!< I2S Underrun error */ |
||||
#define HAL_I2S_ERROR_OVR ((uint32_t)0x02U) /*!< I2S Overrun error */ |
||||
#define HAL_I2S_ERROR_FRE ((uint32_t)0x04U) /*!< I2S Frame format error */ |
||||
#define HAL_I2S_ERROR_DMA ((uint32_t)0x08U) /*!< DMA transfer error */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Mode I2S Mode
|
||||
* @{ |
||||
*/ |
||||
#define I2S_MODE_SLAVE_TX ((uint32_t) 0x00000000U) |
||||
#define I2S_MODE_SLAVE_RX ((uint32_t) SPI_I2SCFGR_I2SCFG_0) |
||||
#define I2S_MODE_MASTER_TX ((uint32_t) SPI_I2SCFGR_I2SCFG_1) |
||||
#define I2S_MODE_MASTER_RX ((uint32_t)(SPI_I2SCFGR_I2SCFG_0 |\ |
||||
SPI_I2SCFGR_I2SCFG_1)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Standard I2S Standard
|
||||
* @{ |
||||
*/ |
||||
#define I2S_STANDARD_PHILIPS ((uint32_t) 0x00000000U) |
||||
#define I2S_STANDARD_MSB ((uint32_t) SPI_I2SCFGR_I2SSTD_0) |
||||
#define I2S_STANDARD_LSB ((uint32_t) SPI_I2SCFGR_I2SSTD_1) |
||||
#define I2S_STANDARD_PCM_SHORT ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\ |
||||
SPI_I2SCFGR_I2SSTD_1)) |
||||
#define I2S_STANDARD_PCM_LONG ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\ |
||||
SPI_I2SCFGR_I2SSTD_1 |\
|
||||
SPI_I2SCFGR_PCMSYNC)) |
||||
/** @defgroup I2S_Legacy I2S Legacy
|
||||
* @{ |
||||
*/ |
||||
#define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Data_Format I2S Data Format
|
||||
* @{ |
||||
*/ |
||||
#define I2S_DATAFORMAT_16B ((uint32_t) 0x00000000U) |
||||
#define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t) SPI_I2SCFGR_CHLEN) |
||||
#define I2S_DATAFORMAT_24B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0)) |
||||
#define I2S_DATAFORMAT_32B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_MCLK_Output I2S MCLK Output
|
||||
* @{ |
||||
*/ |
||||
#define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) |
||||
#define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000U) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Audio_Frequency I2S Audio Frequency
|
||||
* @{ |
||||
*/ |
||||
#define I2S_AUDIOFREQ_192K ((uint32_t)192000U) |
||||
#define I2S_AUDIOFREQ_96K ((uint32_t)96000U) |
||||
#define I2S_AUDIOFREQ_48K ((uint32_t)48000U) |
||||
#define I2S_AUDIOFREQ_44K ((uint32_t)44100U) |
||||
#define I2S_AUDIOFREQ_32K ((uint32_t)32000U) |
||||
#define I2S_AUDIOFREQ_22K ((uint32_t)22050U) |
||||
#define I2S_AUDIOFREQ_16K ((uint32_t)16000U) |
||||
#define I2S_AUDIOFREQ_11K ((uint32_t)11025U) |
||||
#define I2S_AUDIOFREQ_8K ((uint32_t)8000U) |
||||
#define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2U) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Clock_Polarity I2S Clock Polarity
|
||||
* @{ |
||||
*/ |
||||
#define I2S_CPOL_LOW ((uint32_t)0x00000000U) |
||||
#define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition
|
||||
* @{ |
||||
*/ |
||||
#define I2S_IT_TXE SPI_CR2_TXEIE |
||||
#define I2S_IT_RXNE SPI_CR2_RXNEIE |
||||
#define I2S_IT_ERR SPI_CR2_ERRIE |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Flag_definition I2S Flag definition
|
||||
* @{ |
||||
*/ |
||||
#define I2S_FLAG_TXE SPI_SR_TXE |
||||
#define I2S_FLAG_RXNE SPI_SR_RXNE |
||||
|
||||
#define I2S_FLAG_UDR SPI_SR_UDR |
||||
#define I2S_FLAG_OVR SPI_SR_OVR |
||||
#define I2S_FLAG_FRE SPI_SR_FRE |
||||
|
||||
#define I2S_FLAG_CHSIDE SPI_SR_CHSIDE |
||||
#define I2S_FLAG_BSY SPI_SR_BSY |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
/** @defgroup I2S_Exported_Macros I2S Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset I2S handle state
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) |
||||
|
||||
/** @brief Enable the specified SPI peripheral (in I2S mode).
|
||||
* @param __HANDLE__: specifies the I2S Handle.
|
||||
* @retval None |
||||
*/ |
||||
#define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
||||
|
||||
/** @brief Disable the specified SPI peripheral (in I2S mode).
|
||||
* @param __HANDLE__: specifies the I2S Handle.
|
||||
* @retval None |
||||
*/ |
||||
#define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
||||
|
||||
/** @brief Enable the specified I2S interrupts.
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
||||
* This parameter can be one of the following values: |
||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
||||
* @arg I2S_IT_ERR: Error interrupt enable |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) |
||||
|
||||
/** @brief Disable the specified I2S interrupts.
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
||||
* This parameter can be one of the following values: |
||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
||||
* @arg I2S_IT_ERR: Error interrupt enable |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) |
||||
|
||||
/** @brief Checks if the specified I2S interrupt source is enabled or disabled.
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. |
||||
* @param __INTERRUPT__: specifies the I2S interrupt source to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
||||
* @arg I2S_IT_ERR: Error interrupt enable |
||||
* @retval The new state of __IT__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
||||
|
||||
/** @brief Checks whether the specified I2S flag is set or not.
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* @param __FLAG__: specifies the flag to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg I2S_FLAG_RXNE: Receive buffer not empty flag |
||||
* @arg I2S_FLAG_TXE: Transmit buffer empty flag |
||||
* @arg I2S_FLAG_UDR: Underrun flag |
||||
* @arg I2S_FLAG_OVR: Overrun flag |
||||
* @arg I2S_FLAG_CHSIDE: Channel Side flag |
||||
* @arg I2S_FLAG_BSY: Busy flag |
||||
* @retval The new state of __FLAG__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
/** @brief Clears the I2S OVR pending flag.
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* @retval None |
||||
*/
|
||||
#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{__IO uint32_t tmpreg = (__HANDLE__)->Instance->DR;\ |
||||
tmpreg = (__HANDLE__)->Instance->SR;\
|
||||
UNUSED(tmpreg);\
|
||||
}while(0) |
||||
/** @brief Clears the I2S UDR pending flag.
|
||||
* @param __HANDLE__: specifies the I2S Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR) |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup I2S_Exported_Functions I2S Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
/* Initialization/de-initialization functions ********************************/ |
||||
HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); |
||||
HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); |
||||
void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); |
||||
void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Exported_Functions_Group2 IO operation functions
|
||||
* @{ |
||||
*/ |
||||
/* I/O operation functions ***************************************************/ |
||||
/* Blocking mode: Polling */ |
||||
HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
||||
|
||||
/* Non-Blocking mode: Interrupt */ |
||||
HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
||||
void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); |
||||
|
||||
/* Non-Blocking mode: DMA */ |
||||
HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
||||
|
||||
HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); |
||||
HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); |
||||
HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); |
||||
|
||||
/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ |
||||
void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
||||
void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); |
||||
void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
||||
void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); |
||||
void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup I2S_Exported_Functions_Group3 Peripheral Control and State functions
|
||||
* @{ |
||||
*/ |
||||
/* Peripheral Control and State functions ************************************/ |
||||
HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); |
||||
uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
/** @defgroup I2S_Private I2S Private
|
||||
* @{ |
||||
*/ |
||||
#define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ |
||||
((MODE) == I2S_MODE_SLAVE_RX) || \
|
||||
((MODE) == I2S_MODE_MASTER_TX) || \
|
||||
((MODE) == I2S_MODE_MASTER_RX)) |
||||
|
||||
#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ |
||||
((STANDARD) == I2S_STANDARD_MSB) || \
|
||||
((STANDARD) == I2S_STANDARD_LSB) || \
|
||||
((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
|
||||
((STANDARD) == I2S_STANDARD_PCM_LONG)) |
||||
|
||||
#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ |
||||
((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
|
||||
((FORMAT) == I2S_DATAFORMAT_24B) || \
|
||||
((FORMAT) == I2S_DATAFORMAT_32B)) |
||||
|
||||
#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ |
||||
((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) |
||||
|
||||
#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ |
||||
((FREQ) <= I2S_AUDIOFREQ_192K)) || \
|
||||
((FREQ) == I2S_AUDIOFREQ_DEFAULT)) |
||||
|
||||
#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ |
||||
((CPOL) == I2S_CPOL_HIGH)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup I2S_Private I2S Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* !STM32L031xx && !STM32L041xx && !STM32L011xx && !STM32L021xx */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_I2S_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,843 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_irda.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of IRDA HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_IRDA_H |
||||
#define __STM32L0xx_HAL_IRDA_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup IRDA
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/** @defgroup IRDA_Exported_Types IRDA Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief IRDA Init Structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate.
|
||||
The baud rate register is computed using the following formula: |
||||
Baud Rate Register = ((PCLKx) / ((hirda->Init.BaudRate))) */ |
||||
|
||||
uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref IRDA_Word_Length */ |
||||
|
||||
uint32_t Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of @ref IRDA_Parity |
||||
@note When parity is enabled, the computed parity is inserted |
||||
at the MSB position of the transmitted data (9th bit when |
||||
the word length is set to 9 data bits; 8th bit when the |
||||
word length is set to 8 data bits). */ |
||||
|
||||
uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
|
||||
This parameter can be a value of @ref IRDA_Transfer_Mode */ |
||||
|
||||
uint8_t Prescaler; /*!< Specifies the Prescaler value for dividing the UART/USART source clock
|
||||
to achieve low-power frequency. |
||||
@note Prescaler value 0 is forbidden */ |
||||
|
||||
uint16_t PowerMode; /*!< Specifies the IRDA power mode.
|
||||
This parameter can be a value of @ref IRDA_Low_Power */ |
||||
}IRDA_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL IRDA State structures definition |
||||
* @note HAL IRDA State value is a combination of 2 different substates: gState and RxState. |
||||
* - gState contains IRDA state information related to global Handle management
|
||||
* and also information related to Tx operations. |
||||
* gState value coding follow below described bitmap : |
||||
* b7-b6 Error information
|
||||
* 00 : No Error |
||||
* 01 : (Not Used) |
||||
* 10 : Timeout |
||||
* 11 : Error |
||||
* b5 IP initilisation status |
||||
* 0 : Reset (IP not initialized) |
||||
* 1 : Init done (IP not initialized. HAL IRDA Init function already called) |
||||
* b4-b3 (not used) |
||||
* xx : Should be set to 00 |
||||
* b2 Intrinsic process state |
||||
* 0 : Ready |
||||
* 1 : Busy (IP busy with some configuration or internal operations) |
||||
* b1 (not used) |
||||
* x : Should be set to 0 |
||||
* b0 Tx state |
||||
* 0 : Ready (no Tx operation ongoing) |
||||
* 1 : Busy (Tx operation ongoing) |
||||
* - RxState contains information related to Rx operations. |
||||
* RxState value coding follow below described bitmap : |
||||
* b7-b6 (not used) |
||||
* xx : Should be set to 00 |
||||
* b5 IP initilisation status |
||||
* 0 : Reset (IP not initialized) |
||||
* 1 : Init done (IP not initialized) |
||||
* b4-b2 (not used) |
||||
* xxx : Should be set to 000 |
||||
* b1 Rx state |
||||
* 0 : Ready (no Rx operation ongoing) |
||||
* 1 : Busy (Rx operation ongoing) |
||||
* b0 (not used) |
||||
* x : Should be set to 0. |
||||
*/ |
||||
typedef enum |
||||
{ |
||||
HAL_IRDA_STATE_RESET = 0x00U, /*!< Peripheral is not initialized
|
||||
Value is allowed for gState and RxState */ |
||||
HAL_IRDA_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
|
||||
Value is allowed for gState and RxState */ |
||||
HAL_IRDA_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
|
||||
Value is allowed for gState only */ |
||||
HAL_IRDA_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
|
||||
Value is allowed for gState only */ |
||||
HAL_IRDA_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
|
||||
Value is allowed for RxState only */ |
||||
HAL_IRDA_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
|
||||
Not to be used for neither gState nor RxState. |
||||
Value is result of combination (Or) between gState and RxState values */ |
||||
HAL_IRDA_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
|
||||
Value is allowed for gState only */ |
||||
HAL_IRDA_STATE_ERROR = 0xE0U /*!< Error
|
||||
Value is allowed for gState only */ |
||||
}HAL_IRDA_StateTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL IRDA Error Code structure definition |
||||
*/ |
||||
|
||||
#define HAL_IRDA_ERROR_NONE ((uint32_t)0x00U) /*!< No error */ |
||||
#define HAL_IRDA_ERROR_PE ((uint32_t)0x01U) /*!< Parity error */ |
||||
#define HAL_IRDA_ERROR_NE ((uint32_t)0x02U) /*!< Noise error */ |
||||
#define HAL_IRDA_ERROR_FE ((uint32_t)0x04U) /*!< frame error */ |
||||
#define HAL_IRDA_ERROR_ORE ((uint32_t)0x08U) /*!< Overrun error */ |
||||
#define HAL_IRDA_ERROR_DMA ((uint32_t)0x10U) /*!< DMA transfer error */ |
||||
|
||||
/**
|
||||
* @brief IRDA clock sources definition |
||||
*/ |
||||
typedef enum |
||||
{ |
||||
IRDA_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ |
||||
IRDA_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ |
||||
IRDA_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ |
||||
IRDA_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ |
||||
IRDA_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ |
||||
IRDA_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ |
||||
}IRDA_ClockSourceTypeDef; |
||||
|
||||
/**
|
||||
* @brief IRDA handle Structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
USART_TypeDef *Instance; /*!< IRDA registers base address */ |
||||
|
||||
IRDA_InitTypeDef Init; /*!< IRDA communication parameters */ |
||||
|
||||
uint8_t *pTxBuffPtr; /*!< Pointer to IRDA Tx transfer Buffer */ |
||||
|
||||
uint16_t TxXferSize; /*!< IRDA Tx Transfer size */ |
||||
|
||||
__IO uint16_t TxXferCount; /*!< IRDA Tx Transfer Counter */ |
||||
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to IRDA Rx transfer Buffer */ |
||||
|
||||
uint16_t RxXferSize; /*!< IRDA Rx Transfer size */ |
||||
|
||||
__IO uint16_t RxXferCount; /*!< IRDA Rx Transfer Counter */ |
||||
|
||||
uint16_t Mask; /*!< IRDA RX RDR register mask */ |
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< IRDA Tx DMA Handle parameters */ |
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< IRDA Rx DMA Handle parameters */ |
||||
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */ |
||||
|
||||
__IO HAL_IRDA_StateTypeDef gState; /*!< IRDA state information related to global Handle management
|
||||
and also related to Tx operations. |
||||
This parameter can be a value of @ref HAL_IRDA_StateTypeDef */ |
||||
|
||||
__IO HAL_IRDA_StateTypeDef RxState; /*!< IRDA state information related to Rx operations.
|
||||
This parameter can be a value of @ref HAL_IRDA_StateTypeDef */ |
||||
|
||||
__IO uint32_t ErrorCode; /*!< IRDA Error code */ |
||||
|
||||
}IRDA_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup IRDA_Exported_Constants IRDA Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Word_Length IRDA Word Length
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long frame */ |
||||
#define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000) /*!< 8-bit long frame */ |
||||
#define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long frame */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Parity IRDA Parity
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_PARITY_NONE ((uint32_t)0x00000000U) /*!< No parity */ |
||||
#define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */ |
||||
#define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Transfer_Mode IRDA Transfer Mode
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */ |
||||
#define IRDA_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */ |
||||
#define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Low_Power IRDA Low Power
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_POWERMODE_NORMAL ((uint32_t)0x00000000U) /*!< IRDA normal power mode */ |
||||
#define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP) /*!< IRDA low power mode */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_State IRDA State
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_STATE_DISABLE ((uint32_t)0x00000000U) /*!< IRDA disabled */ |
||||
#define IRDA_STATE_ENABLE ((uint32_t)USART_CR1_UE) /*!< IRDA enabled */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Mode IRDA Mode
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_MODE_DISABLE ((uint32_t)0x00000000U) /*!< Associated UART disabled in IRDA mode */ |
||||
#define IRDA_MODE_ENABLE ((uint32_t)USART_CR3_IREN) /*!< Associated UART enabled in IRDA mode */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_One_Bit IRDA One Bit Sampling
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000U) /*!< One-bit sampling disabled */ |
||||
#define IRDA_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT) /*!< One-bit sampling enabled */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_DMA_Tx IRDA DMA Tx
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_DMA_TX_DISABLE ((uint32_t)0x00000000U) /*!< IRDA DMA TX disabled */ |
||||
#define IRDA_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT) /*!< IRDA DMA TX enabled */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_DMA_Rx IRDA DMA Rx
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_DMA_RX_DISABLE ((uint32_t)0x00000000) /*!< IRDA DMA RX disabled */ |
||||
#define IRDA_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR) /*!< IRDA DMA RX enabled */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Request_Parameters IRDA Request Parameters
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_AUTOBAUD_REQUEST ((uint16_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */ |
||||
#define IRDA_RXDATA_FLUSH_REQUEST ((uint16_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */ |
||||
#define IRDA_TXDATA_FLUSH_REQUEST ((uint16_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Flags IRDA Flags
|
||||
* Elements values convention: 0xXXXX |
||||
* - 0xXXXX : Flag mask in the ISR register |
||||
* @{ |
||||
*/ |
||||
#define IRDA_FLAG_REACK USART_ISR_REACK /*!< IRDA Receive enable acknowledge flag */ |
||||
#define IRDA_FLAG_TEACK USART_ISR_TEACK /*!< IRDA Transmit enable acknowledge flag */ |
||||
#define IRDA_FLAG_BUSY USART_ISR_BUSY /*!< IRDA Busy flag */ |
||||
#define IRDA_FLAG_ABRF USART_ISR_ABRF /*!< IRDA Auto baud rate flag */ |
||||
#define IRDA_FLAG_ABRE USART_ISR_ABRE /*!< IRDA Auto baud rate error */ |
||||
#define IRDA_FLAG_TXE USART_ISR_TXE /*!< IRDA Transmit data register empty */ |
||||
#define IRDA_FLAG_TC USART_ISR_TC /*!< IRDA Transmission complete */ |
||||
#define IRDA_FLAG_RXNE USART_ISR_RXNE /*!< IRDA Read data register not empty */ |
||||
#define IRDA_FLAG_ORE USART_ISR_ORE /*!< IRDA Overrun error */ |
||||
#define IRDA_FLAG_NE USART_ISR_NE /*!< IRDA Noise error */ |
||||
#define IRDA_FLAG_FE USART_ISR_FE /*!< IRDA Framing error */ |
||||
#define IRDA_FLAG_PE USART_ISR_PE /*!< IRDA Parity error */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Interrupt_definition IRDA Interrupts Definition
|
||||
* Elements values convention: 0000ZZZZ0XXYYYYYb |
||||
* - YYYYY : Interrupt source position in the XX register (5bits) |
||||
* - XX : Interrupt source register (2bits) |
||||
* - 01: CR1 register |
||||
* - 10: CR2 register |
||||
* - 11: CR3 register |
||||
* - ZZZZ : Flag position in the ISR register(4bits) |
||||
* @{ |
||||
*/ |
||||
#define IRDA_IT_PE ((uint16_t)0x0028U) /*!< IRDA Parity error interruption */ |
||||
#define IRDA_IT_TXE ((uint16_t)0x0727U) /*!< IRDA Transmit data register empty interruption */ |
||||
#define IRDA_IT_TC ((uint16_t)0x0626U) /*!< IRDA Transmission complete interruption */ |
||||
#define IRDA_IT_RXNE ((uint16_t)0x0525U) /*!< IRDA Read data register not empty interruption */ |
||||
#define IRDA_IT_IDLE ((uint16_t)0x0424U) /*!< IRDA Idle interruption */ |
||||
|
||||
/** Elements values convention: 000000000XXYYYYYb
|
||||
* - YYYYY : Interrupt source position in the XX register (5bits) |
||||
* - XX : Interrupt source register (2bits) |
||||
* - 01: CR1 register |
||||
* - 10: CR2 register |
||||
* - 11: CR3 register |
||||
*/ |
||||
#define IRDA_IT_ERR ((uint16_t)0x0060U) /*!< IRDA Error interruption */ |
||||
|
||||
/** Elements values convention: 0000ZZZZ00000000b
|
||||
* - ZZZZ : Flag position in the ISR register(4bits) |
||||
*/ |
||||
#define IRDA_IT_ORE ((uint16_t)0x0300U) /*!< IRDA Overrun error interruption */ |
||||
#define IRDA_IT_NE ((uint16_t)0x0200U) /*!< IRDA Noise error interruption */ |
||||
#define IRDA_IT_FE ((uint16_t)0x0100U) /*!< IRDA Frame error interruption */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_IT_CLEAR_Flags IRDA Interruption Clear Flags
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ |
||||
#define IRDA_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ |
||||
#define IRDA_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ |
||||
#define IRDA_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ |
||||
#define IRDA_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ |
||||
#define IRDA_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IRDA_Interruption_Mask IRDA interruptions flags mask
|
||||
* @{ |
||||
*/ |
||||
#define IRDA_IT_MASK ((uint16_t)0x001FU) /*!< IRDA Interruptions flags mask */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
/** @defgroup IRDA_Exported_Macros IRDA Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset IRDA handle state.
|
||||
* @param __HANDLE__: IRDA handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
||||
(__HANDLE__)->gState = HAL_IRDA_STATE_RESET; \
|
||||
(__HANDLE__)->RxState = HAL_IRDA_STATE_RESET; \
|
||||
} while(0) |
||||
|
||||
/** @brief Flush the IRDA DR register.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) \ |
||||
do{ \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, IRDA_RXDATA_FLUSH_REQUEST); \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, IRDA_TXDATA_FLUSH_REQUEST); \
|
||||
} while(0) |
||||
|
||||
/** @brief Clear the specified IRDA pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __FLAG__: specifies the flag to check. |
||||
* This parameter can be any combination of the following values: |
||||
* @arg @ref IRDA_CLEAR_PEF |
||||
* @arg @ref IRDA_CLEAR_FEF |
||||
* @arg @ref IRDA_CLEAR_NEF |
||||
* @arg @ref IRDA_CLEAR_OREF |
||||
* @arg @ref IRDA_CLEAR_TCF |
||||
* @arg @ref IRDA_CLEAR_IDLEF |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
||||
|
||||
/** @brief Clear the IRDA PE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_PEF) |
||||
|
||||
|
||||
/** @brief Clear the IRDA FE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_FEF) |
||||
|
||||
/** @brief Clear the IRDA NE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_NEF) |
||||
|
||||
/** @brief Clear the IRDA ORE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_OREF) |
||||
|
||||
/** @brief Clear the IRDA IDLE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_IDLEF) |
||||
|
||||
/** @brief Check whether the specified IRDA flag is set or not.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __FLAG__: specifies the flag to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_FLAG_REACK Receive enable acknowledge flag |
||||
* @arg @ref IRDA_FLAG_TEACK Transmit enable acknowledge flag |
||||
* @arg @ref IRDA_FLAG_BUSY Busy flag |
||||
* @arg @ref IRDA_FLAG_ABRF Auto Baud rate detection flag |
||||
* @arg @ref IRDA_FLAG_ABRE Auto Baud rate detection error flag |
||||
* @arg @ref IRDA_FLAG_TXE Transmit data register empty flag |
||||
* @arg @ref IRDA_FLAG_TC Transmission Complete flag |
||||
* @arg @ref IRDA_FLAG_RXNE Receive data register not empty flag |
||||
* @arg @ref IRDA_FLAG_ORE OverRun Error flag |
||||
* @arg @ref IRDA_FLAG_NE Noise Error flag |
||||
* @arg @ref IRDA_FLAG_FE Framing Error flag |
||||
* @arg @ref IRDA_FLAG_PE Parity Error flag |
||||
* @retval The new state of __FLAG__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
|
||||
/** @brief Enable the specified IRDA interrupt.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __INTERRUPT__: specifies the IRDA interrupt source to enable. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt |
||||
* @arg @ref IRDA_IT_TC Transmission complete interrupt |
||||
* @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt |
||||
* @arg @ref IRDA_IT_IDLE Idle line detection interrupt |
||||
* @arg @ref IRDA_IT_PE Parity Error interrupt |
||||
* @arg @ref IRDA_IT_ERR Error interrupt(Frame error, noise error, overrun error) |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \ |
||||
((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK)))) |
||||
|
||||
/** @brief Disable the specified IRDA interrupt.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __INTERRUPT__: specifies the IRDA interrupt source to disable. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt |
||||
* @arg @ref IRDA_IT_TC Transmission complete interrupt |
||||
* @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt |
||||
* @arg @ref IRDA_IT_IDLE Idle line detection interrupt |
||||
* @arg @ref IRDA_IT_PE Parity Error interrupt |
||||
* @arg @ref IRDA_IT_ERR Error interrupt(Frame error, noise error, overrun error) |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \ |
||||
((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK)))) |
||||
|
||||
|
||||
/** @brief Check whether the specified IRDA interrupt has occurred or not.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __IT__: specifies the IRDA interrupt source to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt |
||||
* @arg @ref IRDA_IT_TC Transmission complete interrupt |
||||
* @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt |
||||
* @arg @ref IRDA_IT_IDLE Idle line detection interrupt |
||||
* @arg @ref IRDA_IT_ORE OverRun Error interrupt |
||||
* @arg @ref IRDA_IT_NE Noise Error interrupt |
||||
* @arg @ref IRDA_IT_FE Framing Error interrupt |
||||
* @arg @ref IRDA_IT_PE Parity Error interrupt |
||||
* @retval The new state of __IT__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_IRDA_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1U << ((__IT__)>> 0x08U))) |
||||
|
||||
/** @brief Check whether the specified IRDA interrupt source is enabled or not.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __IT__: specifies the IRDA interrupt source to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt |
||||
* @arg @ref IRDA_IT_TC Transmission complete interrupt |
||||
* @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt |
||||
* @arg @ref IRDA_IT_IDLE Idle line detection interrupt |
||||
* @arg @ref IRDA_IT_ERR Framing, overrun or noise error interrupt |
||||
* @arg @ref IRDA_IT_PE Parity Error interrupt |
||||
* @retval The new state of __IT__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \ |
||||
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1U << (((uint16_t)(__IT__)) & IRDA_IT_MASK))) |
||||
|
||||
/** @brief Clear the specified IRDA ISR flag, in setting the proper ICR register flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set |
||||
* to clear the corresponding interrupt |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_CLEAR_PEF Parity Error Clear Flag |
||||
* @arg @ref IRDA_CLEAR_FEF Framing Error Clear Flag |
||||
* @arg @ref IRDA_CLEAR_NEF Noise detected Clear Flag |
||||
* @arg @ref IRDA_CLEAR_OREF OverRun Error Clear Flag |
||||
* @arg @ref IRDA_CLEAR_TCF Transmission Complete Clear Flag |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) |
||||
|
||||
|
||||
/** @brief Set a specific IRDA request flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __REQ__: specifies the request flag to set |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref IRDA_AUTOBAUD_REQUEST Auto-Baud Rate Request |
||||
* @arg @ref IRDA_RXDATA_FLUSH_REQUEST Receive Data flush Request |
||||
* @arg @ref IRDA_TXDATA_FLUSH_REQUEST Transmit data flush Request |
||||
* |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) |
||||
|
||||
/** @brief Enable the IRDA one bit sample method.
|
||||
* @param __HANDLE__: specifies the IRDA Handle.
|
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
||||
|
||||
/** @brief Disable the IRDA one bit sample method.
|
||||
* @param __HANDLE__: specifies the IRDA Handle.
|
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT)) |
||||
|
||||
/** @brief Enable UART/USART associated to IRDA Handle.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
||||
|
||||
/** @brief Disable UART/USART associated to IRDA Handle.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IRDA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros --------------------------------------------------------*/ |
||||
/** @defgroup IRDA_Private_Macros IRDA Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Compute the mask to apply to retrieve the received data
|
||||
* according to the word length and to the parity bits activation. |
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @retval None, the mask to apply to the associated UART RDR register is stored in (__HANDLE__)->Mask field. |
||||
*/ |
||||
#define IRDA_MASK_COMPUTATION(__HANDLE__) \ |
||||
do { \
|
||||
if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_7B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x003FU ; \
|
||||
} \
|
||||
} \
|
||||
} while(0) |
||||
|
||||
/** @brief Ensure that IRDA Baud rate is less or equal to maximum value.
|
||||
* @param __BAUDRATE__: specifies the IRDA Baudrate set by the user. |
||||
* @retval True or False |
||||
*/ |
||||
#define IS_IRDA_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 115201U) |
||||
|
||||
/** @brief Ensure that IRDA prescaler value is strictly larger than 0.
|
||||
* @param __PRESCALER__: specifies the IRDA prescaler value set by the user. |
||||
* @retval True or False |
||||
*/ |
||||
#define IS_IRDA_PRESCALER(__PRESCALER__) ((__PRESCALER__) > 0U) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA frame length is valid. |
||||
* @param __LENGTH__: IRDA frame length.
|
||||
* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == IRDA_WORDLENGTH_7B) || \ |
||||
((__LENGTH__) == IRDA_WORDLENGTH_8B) || \
|
||||
((__LENGTH__) == IRDA_WORDLENGTH_9B)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA frame parity is valid. |
||||
* @param __PARITY__: IRDA frame parity.
|
||||
* @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_PARITY(__PARITY__) (((__PARITY__) == IRDA_PARITY_NONE) || \ |
||||
((__PARITY__) == IRDA_PARITY_EVEN) || \
|
||||
((__PARITY__) == IRDA_PARITY_ODD)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA communication mode is valid. |
||||
* @param __MODE__: IRDA communication mode.
|
||||
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_TX_RX_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(IRDA_MODE_TX_RX)))) == (uint32_t)0x00) && ((__MODE__) != (uint32_t)0x00)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA power mode is valid. |
||||
* @param __MODE__: IRDA power mode.
|
||||
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_POWERMODE(__MODE__) (((__MODE__) == IRDA_POWERMODE_LOWPOWER) || \ |
||||
((__MODE__) == IRDA_POWERMODE_NORMAL)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA state is valid. |
||||
* @param __STATE__: IRDA state mode.
|
||||
* @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_STATE(__STATE__) (((__STATE__) == IRDA_STATE_DISABLE) || \ |
||||
((__STATE__) == IRDA_STATE_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA associated UART/USART mode is valid. |
||||
* @param __MODE__: IRDA associated UART/USART mode.
|
||||
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_MODE(__MODE__) (((__MODE__) == IRDA_MODE_DISABLE) || \ |
||||
((__MODE__) == IRDA_MODE_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA sampling rate is valid. |
||||
* @param __ONEBIT__: IRDA sampling rate.
|
||||
* @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == IRDA_ONE_BIT_SAMPLE_DISABLE) || \ |
||||
((__ONEBIT__) == IRDA_ONE_BIT_SAMPLE_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA DMA TX mode is valid. |
||||
* @param __DMATX__: IRDA DMA TX mode.
|
||||
* @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_DMA_TX(__DMATX__) (((__DMATX__) == IRDA_DMA_TX_DISABLE) || \ |
||||
((__DMATX__) == IRDA_DMA_TX_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA DMA RX mode is valid. |
||||
* @param __DMARX__: IRDA DMA RX mode.
|
||||
* @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_DMA_RX(__DMARX__) (((__DMARX__) == IRDA_DMA_RX_DISABLE) || \ |
||||
((__DMARX__) == IRDA_DMA_RX_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA request is valid. |
||||
* @param __PARAM__: IRDA request.
|
||||
* @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) |
||||
*/
|
||||
#define IS_IRDA_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == IRDA_AUTOBAUD_REQUEST) || \ |
||||
((__PARAM__) == IRDA_RXDATA_FLUSH_REQUEST) || \
|
||||
((__PARAM__) == IRDA_TXDATA_FLUSH_REQUEST)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Include IRDA HAL Extended module */ |
||||
#include "stm32l0xx_hal_irda_ex.h" |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @addtogroup IRDA_Exported_Functions IRDA Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup IRDA_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Initialization and de-initialization functions ****************************/ |
||||
HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup IRDA_Exported_Functions_Group2 IO operation functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* IO operation functions *****************************************************/ |
||||
HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda); |
||||
/* Transfer Abort functions */ |
||||
HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda); |
||||
HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda); |
||||
|
||||
void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_AbortCpltCallback (IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_AbortTransmitCpltCallback (IRDA_HandleTypeDef *hirda); |
||||
void HAL_IRDA_AbortReceiveCpltCallback (IRDA_HandleTypeDef *hirda); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Peripheral Control functions ************************************************/ |
||||
|
||||
/** @addtogroup IRDA_Exported_Functions_Group4 Peripheral State and Error functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Peripheral State and Error functions ***************************************/ |
||||
HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda); |
||||
uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_IRDA_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,209 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_irda_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of IRDA HAL Extended module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_IRDA_EX_H |
||||
#define __STM32L0xx_HAL_IRDA_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup IRDAEx
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup IRDAEx_Private_Macros IRDAEx Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Report the IRDA clock source.
|
||||
* @param __HANDLE__: specifies the IRDA Handle. |
||||
* @param __CLOCKSOURCE__: output variable. |
||||
* @retval IRDA clocking source, written in __CLOCKSOURCE__. |
||||
*/ |
||||
#if defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx) |
||||
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == LPUART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_LPUART1CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
} while(0) |
||||
|
||||
#else /* (STM32L031xx) || defined (STM32L041xx) || (STM32L011xx) || defined (STM32L021xx) */ |
||||
|
||||
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == LPUART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_LPUART1CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
} while(0) |
||||
#endif /* (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx) */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_IRDA_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,255 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_iwdg.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of IWDG HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_IWDG_H |
||||
#define __STM32L0xx_HAL_IWDG_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup IWDG IWDG
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/** @defgroup IWDG_Exported_Types IWDG Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief IWDG Init structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
|
||||
This parameter can be a value of @ref IWDG_Prescaler */ |
||||
|
||||
uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
||||
|
||||
uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
||||
|
||||
} IWDG_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief IWDG Handle Structure definition
|
||||
*/ |
||||
typedef struct |
||||
{ |
||||
IWDG_TypeDef *Instance; /*!< Register base address */ |
||||
|
||||
IWDG_InitTypeDef Init; /*!< IWDG required parameters */ |
||||
|
||||
}IWDG_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup IWDG_Prescaler IWDG Prescaler
|
||||
* @{ |
||||
*/ |
||||
#define IWDG_PRESCALER_4 0x00000000U /*!< IWDG prescaler set to 4 */ |
||||
#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ |
||||
#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ |
||||
#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ |
||||
#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ |
||||
#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ |
||||
#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IWDG_Window_option IWDG Window option
|
||||
* @{ |
||||
*/ |
||||
#define IWDG_WINDOW_DISABLE IWDG_WINR_WIN |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable the IWDG peripheral. |
||||
* @param __HANDLE__ IWDG handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) |
||||
|
||||
/**
|
||||
* @brief Reload IWDG counter with value defined in the reload register |
||||
* (write access to IWDG_PR, IWDG_RLR & IWDG_WINR registers disabled). |
||||
* @param __HANDLE__ IWDG handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup IWDG_Exported_Functions IWDG Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
|
||||
* @{ |
||||
*/ |
||||
/* Initialization/Start functions ********************************************/ |
||||
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
|
||||
* @{ |
||||
*/ |
||||
/* I/O operation functions ****************************************************/ |
||||
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private constants ---------------------------------------------------------*/ |
||||
/** @defgroup IWDG_Private_Constants IWDG Private Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief IWDG Key Register BitMask |
||||
*/ |
||||
#define IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ |
||||
#define IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ |
||||
#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ |
||||
#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
/** @defgroup IWDG_Private_Macros IWDG Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. |
||||
* @param __HANDLE__ IWDG handle |
||||
* @retval None |
||||
*/ |
||||
#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) |
||||
|
||||
/**
|
||||
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. |
||||
* @param __HANDLE__ IWDG handle |
||||
* @retval None |
||||
*/ |
||||
#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) |
||||
|
||||
/**
|
||||
* @brief Check IWDG prescaler value. |
||||
* @param __PRESCALER__ IWDG prescaler value |
||||
* @retval None |
||||
*/ |
||||
#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ |
||||
((__PRESCALER__) == IWDG_PRESCALER_8) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_16) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_32) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_64) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_128)|| \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_256)) |
||||
|
||||
/**
|
||||
* @brief Check IWDG reload value. |
||||
* @param __RELOAD__ IWDG reload value |
||||
* @retval None |
||||
*/ |
||||
#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) |
||||
|
||||
/**
|
||||
* @brief Check IWDG window value. |
||||
* @param __WINDOW__ IWDG window value |
||||
* @retval None |
||||
*/ |
||||
#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_IWDG_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,804 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_lcd.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of LCD Controller HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_LCD_H |
||||
#define __STM32L0xx_HAL_LCD_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup LCD LCD
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/** @defgroup LCD_Exported_Types LCD Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief LCD Init structure definition |
||||
*/ |
||||
|
||||
typedef struct |
||||
{ |
||||
uint32_t Prescaler; /*!< Configures the LCD Prescaler.
|
||||
This parameter can be one value of @ref LCD_Prescaler */ |
||||
uint32_t Divider; /*!< Configures the LCD Divider.
|
||||
This parameter can be one value of @ref LCD_Divider */ |
||||
uint32_t Duty; /*!< Configures the LCD Duty.
|
||||
This parameter can be one value of @ref LCD_Duty */ |
||||
uint32_t Bias; /*!< Configures the LCD Bias.
|
||||
This parameter can be one value of @ref LCD_Bias */
|
||||
uint32_t VoltageSource; /*!< Selects the LCD Voltage source.
|
||||
This parameter can be one value of @ref LCD_Voltage_Source */
|
||||
uint32_t Contrast; /*!< Configures the LCD Contrast.
|
||||
This parameter can be one value of @ref LCD_Contrast */ |
||||
uint32_t DeadTime; /*!< Configures the LCD Dead Time.
|
||||
This parameter can be one value of @ref LCD_DeadTime */ |
||||
uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration.
|
||||
This parameter can be one value of @ref LCD_PulseOnDuration */ |
||||
uint32_t HighDrive; /*!< Configures the LCD High Drive.
|
||||
This parameter can be one value of @ref LCD_HighDrive */ |
||||
uint32_t BlinkMode; /*!< Configures the LCD Blink Mode.
|
||||
This parameter can be one value of @ref LCD_BlinkMode */ |
||||
uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency.
|
||||
This parameter can be one value of @ref LCD_BlinkFrequency */ |
||||
uint32_t MuxSegment; /*!< Enable or disable mux segment.
|
||||
This parameter can be one value of @ref LCD_MuxSegment */ |
||||
}LCD_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL LCD State structures definition |
||||
*/
|
||||
typedef enum |
||||
{ |
||||
HAL_LCD_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ |
||||
HAL_LCD_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
||||
HAL_LCD_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ |
||||
HAL_LCD_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ |
||||
HAL_LCD_STATE_ERROR = 0x04U /*!< Error */ |
||||
}HAL_LCD_StateTypeDef; |
||||
|
||||
/**
|
||||
* @brief UART handle Structure definition |
||||
*/
|
||||
typedef struct |
||||
{ |
||||
LCD_TypeDef *Instance; /* LCD registers base address */ |
||||
|
||||
LCD_InitTypeDef Init; /* LCD communication parameters */ |
||||
|
||||
HAL_LockTypeDef Lock; /* Locking object */ |
||||
|
||||
__IO HAL_LCD_StateTypeDef State; /* LCD communication state */ |
||||
|
||||
__IO uint32_t ErrorCode; /* LCD Error code */ |
||||
|
||||
}LCD_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup LCD_Exported_Constants LCD Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup LCD_ErrorCode LCD Error Code
|
||||
* @{ |
||||
*/
|
||||
#define HAL_LCD_ERROR_NONE ((uint32_t)0x00U) /*!< No error */ |
||||
#define HAL_LCD_ERROR_FCRSF ((uint32_t)0x01U) /*!< Synchro flag timeout error */ |
||||
#define HAL_LCD_ERROR_UDR ((uint32_t)0x02U) /*!< Update display request flag timeout error */ |
||||
#define HAL_LCD_ERROR_UDD ((uint32_t)0x04U) /*!< Update display done flag timeout error */ |
||||
#define HAL_LCD_ERROR_ENS ((uint32_t)0x08U) /*!< LCD enabled status flag timeout error */ |
||||
#define HAL_LCD_ERROR_RDY ((uint32_t)0x10U) /*!< LCD Booster ready timeout error */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Prescaler LCD Prescaler
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_PRESCALER_1 ((uint32_t)0x00000000U) /*!< CLKPS = LCDCLK */ |
||||
#define LCD_PRESCALER_2 ((uint32_t)0x00400000U) /*!< CLKPS = LCDCLK/2 */ |
||||
#define LCD_PRESCALER_4 ((uint32_t)0x00800000U) /*!< CLKPS = LCDCLK/4 */ |
||||
#define LCD_PRESCALER_8 ((uint32_t)0x00C00000U) /*!< CLKPS = LCDCLK/8 */ |
||||
#define LCD_PRESCALER_16 ((uint32_t)0x01000000U) /*!< CLKPS = LCDCLK/16 */ |
||||
#define LCD_PRESCALER_32 ((uint32_t)0x01400000U) /*!< CLKPS = LCDCLK/32 */ |
||||
#define LCD_PRESCALER_64 ((uint32_t)0x01800000U) /*!< CLKPS = LCDCLK/64 */ |
||||
#define LCD_PRESCALER_128 ((uint32_t)0x01C00000U) /*!< CLKPS = LCDCLK/128 */ |
||||
#define LCD_PRESCALER_256 ((uint32_t)0x02000000U) /*!< CLKPS = LCDCLK/256 */ |
||||
#define LCD_PRESCALER_512 ((uint32_t)0x02400000U) /*!< CLKPS = LCDCLK/512 */ |
||||
#define LCD_PRESCALER_1024 ((uint32_t)0x02800000U) /*!< CLKPS = LCDCLK/1024 */ |
||||
#define LCD_PRESCALER_2048 ((uint32_t)0x02C00000U) /*!< CLKPS = LCDCLK/2048 */ |
||||
#define LCD_PRESCALER_4096 ((uint32_t)0x03000000U) /*!< CLKPS = LCDCLK/4096 */ |
||||
#define LCD_PRESCALER_8192 ((uint32_t)0x03400000U) /*!< CLKPS = LCDCLK/8192 */ |
||||
#define LCD_PRESCALER_16384 ((uint32_t)0x03800000U) /*!< CLKPS = LCDCLK/16384 */ |
||||
#define LCD_PRESCALER_32768 ((uint32_t)LCD_FCR_PS) /*!< CLKPS = LCDCLK/32768 */ |
||||
|
||||
#define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \ |
||||
((__PRESCALER__) == LCD_PRESCALER_2) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_4) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_8) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_16) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_32) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_64) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_128) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_256) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_512) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_1024) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_2048) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_4096) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_8192) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_16384) || \
|
||||
((__PRESCALER__) == LCD_PRESCALER_32768)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Divider LCD Divider
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_DIVIDER_16 ((uint32_t)0x00000000U) /*!< LCD frequency = CLKPS/16 */ |
||||
#define LCD_DIVIDER_17 ((uint32_t)0x00040000U) /*!< LCD frequency = CLKPS/17 */ |
||||
#define LCD_DIVIDER_18 ((uint32_t)0x00080000U) /*!< LCD frequency = CLKPS/18 */ |
||||
#define LCD_DIVIDER_19 ((uint32_t)0x000C0000U) /*!< LCD frequency = CLKPS/19 */ |
||||
#define LCD_DIVIDER_20 ((uint32_t)0x00100000U) /*!< LCD frequency = CLKPS/20 */ |
||||
#define LCD_DIVIDER_21 ((uint32_t)0x00140000U) /*!< LCD frequency = CLKPS/21 */ |
||||
#define LCD_DIVIDER_22 ((uint32_t)0x00180000U) /*!< LCD frequency = CLKPS/22 */ |
||||
#define LCD_DIVIDER_23 ((uint32_t)0x001C0000U) /*!< LCD frequency = CLKPS/23 */ |
||||
#define LCD_DIVIDER_24 ((uint32_t)0x00200000U) /*!< LCD frequency = CLKPS/24 */ |
||||
#define LCD_DIVIDER_25 ((uint32_t)0x00240000U) /*!< LCD frequency = CLKPS/25 */ |
||||
#define LCD_DIVIDER_26 ((uint32_t)0x00280000U) /*!< LCD frequency = CLKPS/26 */ |
||||
#define LCD_DIVIDER_27 ((uint32_t)0x002C0000U) /*!< LCD frequency = CLKPS/27 */ |
||||
#define LCD_DIVIDER_28 ((uint32_t)0x00300000U) /*!< LCD frequency = CLKPS/28 */ |
||||
#define LCD_DIVIDER_29 ((uint32_t)0x00340000U) /*!< LCD frequency = CLKPS/29 */ |
||||
#define LCD_DIVIDER_30 ((uint32_t)0x00380000U) /*!< LCD frequency = CLKPS/30 */ |
||||
#define LCD_DIVIDER_31 ((uint32_t)LCD_FCR_DIV) /*!< LCD frequency = CLKPS/31 */ |
||||
|
||||
#define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \ |
||||
((__DIVIDER__) == LCD_DIVIDER_17) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_18) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_19) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_20) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_21) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_22) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_23) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_24) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_25) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_26) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_27) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_28) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_29) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_30) || \
|
||||
((__DIVIDER__) == LCD_DIVIDER_31)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/** @defgroup LCD_Duty LCD Duty
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_DUTY_STATIC ((uint32_t)0x00000000U) /*!< Static duty */ |
||||
#define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */ |
||||
#define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */ |
||||
#define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */ |
||||
#define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */ |
||||
|
||||
#define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \ |
||||
((__DUTY__) == LCD_DUTY_1_2) || \
|
||||
((__DUTY__) == LCD_DUTY_1_3) || \
|
||||
((__DUTY__) == LCD_DUTY_1_4) || \
|
||||
((__DUTY__) == LCD_DUTY_1_8)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
|
||||
/** @defgroup LCD_Bias LCD Bias
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_BIAS_1_4 ((uint32_t)0x00000000U) /*!< 1/4 Bias */ |
||||
#define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */ |
||||
#define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */ |
||||
|
||||
#define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \ |
||||
((__BIAS__) == LCD_BIAS_1_2) || \
|
||||
((__BIAS__) == LCD_BIAS_1_3)) |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup LCD_Voltage_Source LCD Voltage Source
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_VOLTAGESOURCE_INTERNAL ((uint32_t)0x00000000U) /*!< Internal voltage source for the LCD */ |
||||
#define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */ |
||||
|
||||
#define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \ |
||||
((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup LCD_Interrupts LCD Interrupts
|
||||
* @{ |
||||
*/ |
||||
#define LCD_IT_SOF LCD_FCR_SOFIE |
||||
#define LCD_IT_UDD LCD_FCR_UDDIE |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_PulseOnDuration LCD Pulse On Duration
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_PULSEONDURATION_0 ((uint32_t)0x00000000U) /*!< Pulse ON duration = 0 pulse */ |
||||
#define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */ |
||||
#define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */ |
||||
#define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */ |
||||
#define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */ |
||||
#define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */ |
||||
#define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */ |
||||
#define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */ |
||||
|
||||
#define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \ |
||||
((__DURATION__) == LCD_PULSEONDURATION_1) || \
|
||||
((__DURATION__) == LCD_PULSEONDURATION_2) || \
|
||||
((__DURATION__) == LCD_PULSEONDURATION_3) || \
|
||||
((__DURATION__) == LCD_PULSEONDURATION_4) || \
|
||||
((__DURATION__) == LCD_PULSEONDURATION_5) || \
|
||||
((__DURATION__) == LCD_PULSEONDURATION_6) || \
|
||||
((__DURATION__) == LCD_PULSEONDURATION_7)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_HighDrive LCD HighDrive
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_HIGHDRIVE_0 ((uint32_t)0x00000000U) /*!< Low resistance Drive */ |
||||
#define LCD_HIGHDRIVE_1 (LCD_FCR_HD) /*!< High resistance Drive */ |
||||
|
||||
#define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) (((__HIGHDRIVE__) == LCD_HIGHDRIVE_0) || \ |
||||
((__HIGHDRIVE__) == LCD_HIGHDRIVE_1)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_DeadTime LCD Dead Time
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_DEADTIME_0 ((uint32_t)0x00000000U) /*!< No dead Time */ |
||||
#define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */ |
||||
#define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */ |
||||
#define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */ |
||||
#define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */ |
||||
#define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */ |
||||
#define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */ |
||||
#define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */ |
||||
|
||||
#define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \ |
||||
((__TIME__) == LCD_DEADTIME_1) || \
|
||||
((__TIME__) == LCD_DEADTIME_2) || \
|
||||
((__TIME__) == LCD_DEADTIME_3) || \
|
||||
((__TIME__) == LCD_DEADTIME_4) || \
|
||||
((__TIME__) == LCD_DEADTIME_5) || \
|
||||
((__TIME__) == LCD_DEADTIME_6) || \
|
||||
((__TIME__) == LCD_DEADTIME_7)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_BlinkMode LCD Blink Mode
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_BLINKMODE_OFF ((uint32_t)0x00000000U) /*!< Blink disabled */ |
||||
#define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */ |
||||
#define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to |
||||
8 pixels according to the programmed duty) */ |
||||
#define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */ |
||||
|
||||
#define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \ |
||||
((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \
|
||||
((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \
|
||||
((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM)) |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup LCD_BlinkFrequency LCD Blink Frequency
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_BLINKFREQUENCY_DIV8 ((uint32_t)0x00000000U) /*!< The Blink frequency = fLCD/8 */ |
||||
#define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */ |
||||
#define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */ |
||||
#define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */ |
||||
#define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */ |
||||
#define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */ |
||||
#define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */ |
||||
#define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */ |
||||
|
||||
#define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \ |
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \
|
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \
|
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \
|
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \
|
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \
|
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \
|
||||
((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Contrast LCD Contrast
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_CONTRASTLEVEL_0 ((uint32_t)0x00000000U) /*!< Maximum Voltage = 2.60V */ |
||||
#define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */ |
||||
#define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */ |
||||
#define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */ |
||||
#define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */ |
||||
#define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.25V */ |
||||
#define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.38V */ |
||||
#define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.51V */ |
||||
|
||||
#define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \ |
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \
|
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \
|
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \
|
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \
|
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \
|
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \
|
||||
((__CONTRAST__) == LCD_CONTRASTLEVEL_7)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_MuxSegment LCD Mux Segment
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_MUXSEGMENT_DISABLE ((uint32_t)0x00000000U) /*!< SEG pin multiplexing disabled */ |
||||
#define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /*!< SEG[31:28] are multiplexed with SEG[43:40] */ |
||||
|
||||
#define IS_LCD_MUXSEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \ |
||||
((__VALUE__) == LCD_MUXSEGMENT_DISABLE)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_BUFEN LCD Voltage output buffer enable
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_VOLTBUFOUT_DISABLE ((uint32_t)0x00000000U) /*!< Voltage output buffer disabled */ |
||||
#define LCD_VOLTBUFOUT_ENABLE (LCD_CR_BUFEN) /*!< BUFEN[1] Voltage output buffer enabled */ |
||||
|
||||
#define IS_LCD_VOLTBUFOUT(__VALUE__) (((__VALUE__) == LCD_VOLTBUFOUT_ENABLE) || \ |
||||
((__VALUE__) == LCD_VOLTBUFOUT_DISABLE)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Flag LCD Flag
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_FLAG_ENS LCD_SR_ENS |
||||
#define LCD_FLAG_SOF LCD_SR_SOF |
||||
#define LCD_FLAG_UDR LCD_SR_UDR |
||||
#define LCD_FLAG_UDD LCD_SR_UDD |
||||
#define LCD_FLAG_RDY LCD_SR_RDY |
||||
#define LCD_FLAG_FCRSF LCD_SR_FCRSR |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup LCD_RAMRegister LCD RAMRegister
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LCD_RAM_REGISTER0 ((uint32_t)0x00000000U) /*!< LCD RAM Register 0 */ |
||||
#define LCD_RAM_REGISTER1 ((uint32_t)0x00000001U) /*!< LCD RAM Register 1 */ |
||||
#define LCD_RAM_REGISTER2 ((uint32_t)0x00000002U) /*!< LCD RAM Register 2 */ |
||||
#define LCD_RAM_REGISTER3 ((uint32_t)0x00000003U) /*!< LCD RAM Register 3 */ |
||||
#define LCD_RAM_REGISTER4 ((uint32_t)0x00000004U) /*!< LCD RAM Register 4 */ |
||||
#define LCD_RAM_REGISTER5 ((uint32_t)0x00000005U) /*!< LCD RAM Register 5 */ |
||||
#define LCD_RAM_REGISTER6 ((uint32_t)0x00000006U) /*!< LCD RAM Register 6 */ |
||||
#define LCD_RAM_REGISTER7 ((uint32_t)0x00000007U) /*!< LCD RAM Register 7 */ |
||||
#define LCD_RAM_REGISTER8 ((uint32_t)0x00000008U) /*!< LCD RAM Register 8 */ |
||||
#define LCD_RAM_REGISTER9 ((uint32_t)0x00000009U) /*!< LCD RAM Register 9 */ |
||||
#define LCD_RAM_REGISTER10 ((uint32_t)0x0000000AU) /*!< LCD RAM Register 10 */ |
||||
#define LCD_RAM_REGISTER11 ((uint32_t)0x0000000BU) /*!< LCD RAM Register 11 */ |
||||
#define LCD_RAM_REGISTER12 ((uint32_t)0x0000000CU) /*!< LCD RAM Register 12 */ |
||||
#define LCD_RAM_REGISTER13 ((uint32_t)0x0000000DU) /*!< LCD RAM Register 13 */ |
||||
#define LCD_RAM_REGISTER14 ((uint32_t)0x0000000EU) /*!< LCD RAM Register 14 */ |
||||
#define LCD_RAM_REGISTER15 ((uint32_t)0x0000000FU) /*!< LCD RAM Register 15 */ |
||||
|
||||
#define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \ |
||||
((__REGISTER__) == LCD_RAM_REGISTER1) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER2) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER3) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER4) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER5) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER6) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER7) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER8) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER9) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER10) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER11) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER12) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER13) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER14) || \
|
||||
((__REGISTER__) == LCD_RAM_REGISTER15)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup LCD_Exported_Macros LCD Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset LCD handle state
|
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET) |
||||
|
||||
/** @brief macros to enables or disables the LCD
|
||||
* @param __HANDLE__: specifies the LCD Handle.
|
||||
* @retval None |
||||
*/
|
||||
#define __HAL_LCD_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) |
||||
#define __HAL_LCD_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) |
||||
|
||||
/** @brief macros to enables or disables the Voltage output buffer
|
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_VOLTOUTBUFFER_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN)) |
||||
#define __HAL_LCD_VOLTOUTBUFFER_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN)) |
||||
|
||||
/** @brief Macros to enable or disable the low resistance divider. Displays with high
|
||||
* internal resistance may need a longer drive time to achieve
|
||||
* satisfactory contrast. This function is useful in this case if some
|
||||
* additional power consumption can be tolerated. |
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @note When this mode is enabled, the PulseOn Duration (PON) have to be
|
||||
* programmed to 1/CK_PS (LCD_PULSEONDURATION_1). |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \ |
||||
do{ \
|
||||
SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0) |
||||
|
||||
#define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \ |
||||
do{ \
|
||||
CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0) |
||||
|
||||
/**
|
||||
* @brief Macro to configure the LCD pulses on duration. |
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __DURATION__: specifies the LCD pulse on duration in terms of
|
||||
* CK_PS (prescaled LCD clock period) pulses. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_PULSEONDURATION_0: 0 pulse |
||||
* @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS |
||||
* @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS |
||||
* @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS |
||||
* @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS |
||||
* @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS |
||||
* @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS |
||||
* @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \ |
||||
do{ \
|
||||
MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0) |
||||
|
||||
/**
|
||||
* @brief Macro to configure the LCD dead time. |
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __DEADTIME__: specifies the LCD dead time. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_DEADTIME_0: No dead Time |
||||
* @arg LCD_DEADTIME_1: One Phase between different couple of Frame |
||||
* @arg LCD_DEADTIME_2: Two Phase between different couple of Frame |
||||
* @arg LCD_DEADTIME_3: Three Phase between different couple of Frame |
||||
* @arg LCD_DEADTIME_4: Four Phase between different couple of Frame |
||||
* @arg LCD_DEADTIME_5: Five Phase between different couple of Frame |
||||
* @arg LCD_DEADTIME_6: Six Phase between different couple of Frame
|
||||
* @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \ |
||||
do{ \
|
||||
MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0) |
||||
|
||||
/**
|
||||
* @brief Macro to configure the LCD Contrast. |
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __CONTRAST__: specifies the LCD Contrast. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V |
||||
* @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V |
||||
* @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V |
||||
* @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V |
||||
* @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V |
||||
* @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V |
||||
* @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V |
||||
* @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \ |
||||
do{ \
|
||||
MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* @brief Macro to configure the LCD Blink mode and Blink frequency. |
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __BLINKMODE__: specifies the LCD blink mode. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_BLINKMODE_OFF: Blink disabled |
||||
* @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel) |
||||
* @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8
|
||||
* pixels according to the programmed duty) |
||||
* @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM
|
||||
* (all pixels) |
||||
* @param __BLINKFREQUENCY__: specifies the LCD blink frequency. |
||||
* @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8 |
||||
* @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16 |
||||
* @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32 |
||||
* @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64
|
||||
* @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128 |
||||
* @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256 |
||||
* @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512 |
||||
* @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024 |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \ |
||||
do{ \
|
||||
MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0) |
||||
|
||||
/** @brief Enables or disables the specified LCD interrupt.
|
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __INTERRUPT__: specifies the LCD interrupt source to be enabled or disabled. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_IT_SOF: Start of Frame Interrupt |
||||
* @arg LCD_IT_UDD: Update Display Done Interrupt |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ |
||||
do{ \
|
||||
SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0)
|
||||
#define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ |
||||
do{ \
|
||||
CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
|
||||
LCD_WaitForSynchro(__HANDLE__); \
|
||||
}while(0) |
||||
|
||||
/** @brief Checks whether the specified LCD interrupt is enabled or not.
|
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __IT__: specifies the LCD interrupt source to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_IT_SOF: Start of Frame Interrupt |
||||
* @arg LCD_IT_UDD: Update Display Done Interrupt. |
||||
* @note If the device is in STOP mode (PCLK not provided) UDD will not
|
||||
* generate an interrupt even if UDDIE = 1.
|
||||
* If the display is not enabled the UDD interrupt will never occur. |
||||
* @retval The state of __IT__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__)) |
||||
|
||||
/** @brief Checks whether the specified LCD flag is set or not.
|
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __FLAG__: specifies the flag to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status. |
||||
* @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR
|
||||
* goes from 0 to 1. On deactivation it reflects the real status of
|
||||
* LCD so it becomes 0 at the end of the last displayed frame.
|
||||
* @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at
|
||||
* the beginning of a new frame, at the same time as the display data is
|
||||
* updated. |
||||
* @arg LCD_FLAG_UDR: Update Display Request flag. |
||||
* @arg LCD_FLAG_UDD: Update Display Done flag.
|
||||
* @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status
|
||||
* of the step-up converter. |
||||
* @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag.
|
||||
* This flag is set by hardware each time the LCD_FCR register is updated
|
||||
* in the LCDCLK domain.
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
/** @brief Clears the specified LCD pending flag.
|
||||
* @param __HANDLE__: specifies the LCD Handle. |
||||
* @param __FLAG__: specifies the flag to clear. |
||||
* This parameter can be any combination of the following values: |
||||
* @arg LCD_FLAG_SOF: Start of Frame Interrupt |
||||
* @arg LCD_FLAG_UDD: Update Display Done Interrupt |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions ------------------------------------------------------- */ |
||||
|
||||
/** @defgroup LCD_Exported_Functions LCD Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Exported_Functions_Group1 Initialization and de-initialization methods
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Initialization/de-initialization methods **********************************/ |
||||
HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd); |
||||
HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd); |
||||
void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd); |
||||
void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Exported_Functions_Group2 IO operation methods
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* IO operation methods *******************************************************/ |
||||
HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data); |
||||
HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd); |
||||
HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LCD_Exported_Functions_Group3 Peripheral State methods
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Peripheral State methods **************************************************/ |
||||
HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd); |
||||
uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup LCD_Private
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Private functions ---------------------------------------------------------*/ |
||||
HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup LCD_Private LCD Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* STM32L053xx || STM32L063xx || STM32L073xx || STM32L083xx */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_LCD_H */ |
||||
|
||||
/******************* (C) COPYRIGHT 2016 STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,743 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_lptim.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of LPTIM HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_LPTIM_H |
||||
#define __STM32L0xx_HAL_LPTIM_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM LPTIM (Low power timer)
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup LPTIM_Exported_Types LPTIM Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM_Clock_Configuration LPTIM Clock configuration structure
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT ((uint32_t)EXTI_IMR_IM29) /*!< External interrupt line 29 Connected to the LPTIM EXTI Line */ |
||||
|
||||
/**
|
||||
* @brief LPTIM Clock configuration definition
|
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Source; /*!< Selects the clock source.
|
||||
This parameter can be a value of @ref LPTIM_Clock_Source */ |
||||
|
||||
uint32_t Prescaler; /*!< Specifies the counter clock Prescaler.
|
||||
This parameter can be a value of @ref LPTIM_Clock_Prescaler */ |
||||
|
||||
}LPTIM_ClockConfigTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM_ULPClock_Configuration LPTIM ULP Clock configuration structure
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief LPTIM ULP Clock configuration definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit
|
||||
if the ULPTIM input is selected. |
||||
Note: This parameter is used only when Ultra low power clock source is used. |
||||
Note: If the polarity is configured on 'both edges', an auxiliary clock |
||||
(one of the Low power oscillator) must be active. |
||||
This parameter can be a value of @ref LPTIM_Clock_Polarity */
|
||||
|
||||
uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter.
|
||||
Note: This parameter is used only when Ultra low power clock source is used. |
||||
This parameter can be a value of @ref LPTIM_Clock_Sample_Time */
|
||||
|
||||
}LPTIM_ULPClockConfigTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM_Trigger_Configuration LPTIM Trigger configuration structure
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief LPTIM Trigger configuration structure |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Source; /*!< Selects the Trigger source.
|
||||
This parameter can be a value of @ref LPTIM_Trigger_Source */ |
||||
|
||||
uint32_t ActiveEdge; /*!< Selects the Trigger active edge.
|
||||
Note: This parameter is used only when an external trigger is used. |
||||
This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ |
||||
|
||||
uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter.
|
||||
Note: This parameter is used only when an external trigger is used. |
||||
This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */
|
||||
}LPTIM_TriggerConfigTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM_Init_Configuration LPTIM Initialization configuration structure
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief LPTIM Initialization Structure definition
|
||||
*/ |
||||
typedef struct |
||||
{
|
||||
LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ |
||||
|
||||
LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /*!< Specifies the Ultra Low Power clock parameters */ |
||||
|
||||
LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ |
||||
|
||||
uint32_t OutputPolarity; /*!< Specifies the Output polarity.
|
||||
This parameter can be a value of @ref LPTIM_Output_Polarity */ |
||||
|
||||
uint32_t UpdateMode; /*!< Specifies whether the update of the autorelaod and the compare
|
||||
values is done immediately or after the end of current period. |
||||
This parameter can be a value of @ref LPTIM_Updating_Mode */ |
||||
|
||||
uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event
|
||||
or each external event. |
||||
This parameter can be a value of @ref LPTIM_Counter_Source */
|
||||
|
||||
}LPTIM_InitTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/** @defgroup LPTIM_State_structure LPTIM state definition
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief HAL LPTIM State structure definition
|
||||
*/
|
||||
typedef enum __HAL_LPTIM_StateTypeDef |
||||
{ |
||||
HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */ |
||||
HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
||||
HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
|
||||
HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
|
||||
HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */
|
||||
}HAL_LPTIM_StateTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM_Handle LPTIM handler
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief LPTIM handle Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
LPTIM_TypeDef *Instance; /*!< Register base address */ |
||||
|
||||
LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ |
||||
|
||||
HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< LPTIM locking object */ |
||||
|
||||
__IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ |
||||
|
||||
}LPTIM_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup LPTIM_Exported_Constants LPTIM Exported constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Check autoreload value */ |
||||
#define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((__AUTORELOAD__) <= 0x0000FFFFU) |
||||
|
||||
/* Check compare value */ |
||||
#define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFU) |
||||
|
||||
/** @defgroup LPTIM_Clock_Source Clock source
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC ((uint32_t)0x00U) |
||||
#define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ |
||||
((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) |
||||
|
||||
|
||||
/** @defgroup LPTIM_Clock_Prescaler Prescaler
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_PRESCALER_DIV1 ((uint32_t)0x000000U) |
||||
#define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 |
||||
#define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 |
||||
#define LPTIM_PRESCALER_DIV8 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1)) |
||||
#define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 |
||||
#define LPTIM_PRESCALER_DIV32 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2)) |
||||
#define LPTIM_PRESCALER_DIV64 ((uint32_t)(LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2)) |
||||
#define LPTIM_PRESCALER_DIV128 ((uint32_t)LPTIM_CFGR_PRESC) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ |
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \
|
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \
|
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \
|
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \
|
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \
|
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \
|
||||
((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) |
||||
|
||||
#define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) |
||||
|
||||
|
||||
/** @defgroup LPTIM_Output_Polarity Output polarity
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_OUTPUTPOLARITY_HIGH ((uint32_t)0x00000000U) |
||||
#define LPTIM_OUTPUTPOLARITY_LOW (LPTIM_CFGR_WAVPOL) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \ |
||||
((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH)) |
||||
|
||||
/** @defgroup LPTIM_Clock_Sample_Time Clock sample time
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U) |
||||
#define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 |
||||
#define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 |
||||
#define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ |
||||
((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \
|
||||
((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \
|
||||
((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) |
||||
|
||||
/** @defgroup LPTIM_Clock_Polarity Clock polarity
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_CLOCKPOLARITY_RISING ((uint32_t)0x00000000U) |
||||
#define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 |
||||
#define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ |
||||
((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \
|
||||
((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) |
||||
|
||||
/** @defgroup LPTIM_External_Trigger_Polarity Trigger polarity
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 |
||||
#define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 |
||||
#define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_EXT_TRG_POLARITY(__POLAR__) (((__POLAR__) == LPTIM_ACTIVEEDGE_RISING ) || \ |
||||
((__POLAR__) == LPTIM_ACTIVEEDGE_FALLING ) || \
|
||||
((__POLAR__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) |
||||
|
||||
/** @defgroup LPTIM_Trigger_Sample_Time Trigger sample time
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U) |
||||
#define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 |
||||
#define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 |
||||
#define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION ) || \ |
||||
((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \
|
||||
((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \
|
||||
((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) |
||||
|
||||
|
||||
/** @defgroup LPTIM_Updating_Mode Updating mode
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LPTIM_UPDATE_IMMEDIATE ((uint32_t)0x00000000U) |
||||
#define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ |
||||
((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) |
||||
|
||||
|
||||
|
||||
/** @defgroup LPTIM_Counter_Source Counter source
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_COUNTERSOURCE_INTERNAL ((uint32_t)0x00000000U) |
||||
#define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ |
||||
((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) |
||||
|
||||
|
||||
|
||||
/* Check for period value */ |
||||
#define IS_LPTIM_PERIOD(__PERIOD__) ((__PERIOD__) <= 0x0000FFFFU) |
||||
|
||||
/* Check for pulse value */ |
||||
#define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFU) |
||||
|
||||
/** @defgroup LPTIM_Flag_Definition Flag definition
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN |
||||
#define LPTIM_FLAG_UP LPTIM_ISR_UP |
||||
#define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK |
||||
#define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK |
||||
#define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG |
||||
#define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM |
||||
#define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup LPTIM_Interrupts_Definition Interrupts definition
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_IT_DOWN LPTIM_IER_DOWNIE |
||||
#define LPTIM_IT_UP LPTIM_IER_UPIE |
||||
#define LPTIM_IT_ARROK LPTIM_IER_ARROKIE |
||||
#define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE |
||||
#define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE |
||||
#define LPTIM_IT_ARRM LPTIM_IER_ARRMIE |
||||
#define LPTIM_IT_CMPM LPTIM_IER_CMPMIE |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset LPTIM handle state
|
||||
* @param __HANDLE__: LPTIM handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET) |
||||
|
||||
/**
|
||||
* @brief Enable/Disable the LPTIM peripheral. |
||||
* @param __HANDLE__: LPTIM handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) |
||||
#define __HAL_LPTIM_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Starts the LPTIM peripheral in Continuous or in single mode. |
||||
* @param __HANDLE__: DMA handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) |
||||
#define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) |
||||
|
||||
|
||||
/**
|
||||
* @brief Writes the passed parameter in the Autoreload register. |
||||
* @param __HANDLE__: LPTIM handle |
||||
* @param __VALUE__ : Autoreload value |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) |
||||
|
||||
/**
|
||||
* @brief Writes the passed parameter in the Compare register. |
||||
* @param __HANDLE__: LPTIM handle |
||||
* @param __VALUE__ : Compare value |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__)) |
||||
|
||||
/**
|
||||
* @brief Checks whether the specified LPTIM flag is set or not. |
||||
* @param __HANDLE__: LPTIM handle |
||||
* @param __FLAG__ : LPTIM flag to check |
||||
* This parameter can be a value of: |
||||
* @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. |
||||
* @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. |
||||
* @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. |
||||
* @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. |
||||
* @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. |
||||
* @arg LPTIM_FLAG_ARRM : Autoreload match Flag. |
||||
* @arg LPTIM_FLAG_CMPM : Compare match Flag. |
||||
* @retval The state of the specified flag (SET or RESET). |
||||
*/ |
||||
#define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) |
||||
|
||||
/**
|
||||
* @brief Clears the specified LPTIM flag. |
||||
* @param __HANDLE__: LPTIM handle. |
||||
* @param __FLAG__ : LPTIM flag to clear. |
||||
* This parameter can be a value of: |
||||
* @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. |
||||
* @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. |
||||
* @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. |
||||
* @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. |
||||
* @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. |
||||
* @arg LPTIM_FLAG_ARRM : Autoreload match Flag. |
||||
* @arg LPTIM_FLAG_CMPM : Compare match Flag. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
||||
|
||||
/**
|
||||
* @brief Enable the specified LPTIM interrupt. |
||||
* @param __HANDLE__ : LPTIM handle. |
||||
* @param __INTERRUPT__ : LPTIM interrupt to set. |
||||
* This parameter can be a value of: |
||||
* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
||||
* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
||||
* @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
||||
* @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
||||
* @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
||||
* @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
||||
* @arg LPTIM_IT_CMPM : Compare match Interrupt. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) |
||||
|
||||
/**
|
||||
* @brief Disable the specified LPTIM interrupt. |
||||
* @param __HANDLE__ : LPTIM handle. |
||||
* @param __INTERRUPT__ : LPTIM interrupt to set. |
||||
* This parameter can be a value of: |
||||
* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
||||
* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
||||
* @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
||||
* @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
||||
* @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
||||
* @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
||||
* @arg LPTIM_IT_CMPM : Compare match Interrupt. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) |
||||
|
||||
/**
|
||||
* @brief Checks whether the specified LPTIM interrupt is set or not. |
||||
* @param __HANDLE__ : LPTIM handle. |
||||
* @param __INTERRUPT__ : LPTIM interrupt to check. |
||||
* This parameter can be a value of: |
||||
* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
||||
* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
||||
* @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
||||
* @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
||||
* @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
||||
* @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
||||
* @arg LPTIM_IT_CMPM : Compare match Interrupt. |
||||
* @retval Interrupt status. |
||||
*/ |
||||
|
||||
#define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
||||
|
||||
/**
|
||||
* @brief Enable interrupt on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @brief Disable interrupt on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
||||
|
||||
/**
|
||||
* @brief Enable event on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @brief Disable event on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
||||
|
||||
/**
|
||||
* @brief Enable falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
|
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @brief Disable falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
||||
|
||||
/**
|
||||
* @brief Enable rising edge trigger on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @brief Disable rising edge trigger on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) |
||||
|
||||
/**
|
||||
* @brief Enable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();\ |
||||
__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE();\
|
||||
}while(0) |
||||
|
||||
/**
|
||||
* @brief Disable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();\ |
||||
__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE();\
|
||||
}while(0) |
||||
|
||||
/**
|
||||
* @brief Check whether the LPTIM Wake-up Timer associated Exti line interrupt flag is set or not. |
||||
* @retval Line Status. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR & LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @brief Clear the LPTIM Wake-up Timer associated Exti line flag. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @brief Generate a Software interrupt on the LPTIM Wake-up Timer associated Exti line. |
||||
* @retval None. |
||||
*/ |
||||
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Include LPTIM HAL Extension module */ |
||||
#include "stm32l0xx_hal_lptim_ex.h" |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
|
||||
* @{ |
||||
*/ |
||||
/* Initialization/de-initialization functions ********************************/ |
||||
|
||||
/** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); |
||||
HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
|
||||
/* MSP functions *************************************************************/ |
||||
|
||||
void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); |
||||
void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Start/Stop operation functions *********************************************/ |
||||
|
||||
/** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* ################################# PWM Mode ################################*/ |
||||
/* Blocking mode: Polling */ |
||||
HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
||||
HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim); |
||||
/* Non-Blocking mode: Interrupt */ |
||||
HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
||||
HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/* ############################# One Pulse Mode ##############################*/ |
||||
/* Blocking mode: Polling */ |
||||
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
||||
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim); |
||||
/* Non-Blocking mode: Interrupt */ |
||||
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
||||
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/* ############################## Set once Mode ##############################*/ |
||||
/* Blocking mode: Polling */ |
||||
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
||||
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim); |
||||
/* Non-Blocking mode: Interrupt */ |
||||
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
||||
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/* ############################### Encoder Mode ##############################*/ |
||||
/* Blocking mode: Polling */ |
||||
HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
||||
HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); |
||||
/* Non-Blocking mode: Interrupt */ |
||||
HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
||||
HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/* ############################# Time out Mode ##############################*/ |
||||
/* Blocking mode: Polling */ |
||||
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); |
||||
/* Non-Blocking mode: Interrupt */ |
||||
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/* ############################## Counter Mode ###############################*/ |
||||
/* Blocking mode: Polling */ |
||||
HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
||||
HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); |
||||
/* Non-Blocking mode: Interrupt */ |
||||
HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
||||
HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Reading operation functions ************************************************/ |
||||
|
||||
/** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
|
||||
* @{ |
||||
*/ |
||||
uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim); |
||||
uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim); |
||||
uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* LPTIM IRQ functions *******************************************************/ |
||||
/** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler
|
||||
* @{ |
||||
*/ |
||||
void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/* CallBack functions ********************************************************/ |
||||
void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); |
||||
void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); |
||||
void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); |
||||
void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); |
||||
void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); |
||||
void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); |
||||
void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/* Peripheral State functions ************************************************/ |
||||
/** @defgroup LPTIM_Exported_Functions_Group5 Peripheral State functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_LPTIM_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,133 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_lptim_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of LPTIM Extended HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_LPTIM_EX_H |
||||
#define __STM32L0xx_HAL_LPTIM_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup LPTIMEx LPTIMEx
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup LPTIMEx_Exported_Constants LPTIMEx Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
|
||||
/** @defgroup LPTIM_Trigger_Source Trigger source
|
||||
* @{ |
||||
*/ |
||||
#define LPTIM_TRIGSOURCE_SOFTWARE ((uint32_t)0x0000FFFFU) |
||||
#define LPTIM_TRIGSOURCE_0 ((uint32_t)0x00000000U) |
||||
#define LPTIM_TRIGSOURCE_1 ((uint32_t)LPTIM_CFGR_TRIGSEL_0) |
||||
#define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1 |
||||
#define LPTIM_TRIGSOURCE_3 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1) |
||||
#define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2 |
||||
|
||||
#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \ |
||||
defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
|
||||
defined (STM32L031xx) || defined (STM32L041xx) |
||||
#define LPTIM_TRIGSOURCE_5 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2) |
||||
#endif |
||||
|
||||
#define LPTIM_TRIGSOURCE_6 ((uint32_t)LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2) |
||||
#define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup LPTIMEx_Private
|
||||
* @{ |
||||
*/ |
||||
#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \ |
||||
defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
|
||||
defined (STM32L031xx) || defined (STM32L041xx) |
||||
|
||||
#define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \ |
||||
((__TRIG__) == LPTIM_TRIGSOURCE_0) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_1) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_2) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_3) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_4) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_5) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_6) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_7)) |
||||
#else |
||||
#define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \ |
||||
((__TRIG__) == LPTIM_TRIGSOURCE_0) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_1) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_2) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_3) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_4) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_6) || \
|
||||
((__TRIG__) == LPTIM_TRIGSOURCE_7)) |
||||
#endif |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_LPTIM_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,808 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_pcd.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of PCD HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_PCD_H |
||||
#define __STM32L0xx_HAL_PCD_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup PCD PCD
|
||||
* @{ |
||||
*/
|
||||
|
||||
/** @defgroup PCD_Exported_Types PCD Exported Types
|
||||
* @{ |
||||
*/ |
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief PCD State structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{ |
||||
HAL_PCD_STATE_RESET = 0x00U, |
||||
HAL_PCD_STATE_READY = 0x01U, |
||||
HAL_PCD_STATE_ERROR = 0x02U, |
||||
HAL_PCD_STATE_BUSY = 0x03U, |
||||
HAL_PCD_STATE_TIMEOUT = 0x04U |
||||
} PCD_StateTypeDef; |
||||
|
||||
/* Device LPM suspend state */ |
||||
typedef enum
|
||||
{ |
||||
LPM_L0 = 0x00, /* on */ |
||||
LPM_L1 = 0x01, /* LPM L1 sleep */ |
||||
LPM_L2 = 0x02, /* suspend */ |
||||
LPM_L3 = 0x03, /* off */ |
||||
}PCD_LPM_StateTypeDef; |
||||
|
||||
typedef enum |
||||
{ |
||||
/* double buffered endpoint direction */ |
||||
PCD_EP_DBUF_OUT, |
||||
PCD_EP_DBUF_IN, |
||||
PCD_EP_DBUF_ERR, |
||||
}PCD_EP_DBUF_DIR; |
||||
|
||||
/* endpoint buffer number */ |
||||
typedef enum
|
||||
{ |
||||
PCD_EP_NOBUF, |
||||
PCD_EP_BUF0, |
||||
PCD_EP_BUF1 |
||||
}PCD_EP_BUF_NUM;
|
||||
|
||||
|
||||
/**
|
||||
* @brief PCD Initialization Structure definition
|
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t dev_endpoints; /*!< Device Endpoints number.
|
||||
This parameter depends on the used USB core.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
|
||||
|
||||
uint32_t speed; /*!< USB Core speed.
|
||||
This parameter can be any value of @ref PCD_Speed */
|
||||
|
||||
uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
|
||||
This parameter can be any value of @ref PCD_USB_EP0_MPS */
|
||||
|
||||
uint32_t phy_itface; /*!< Select the used PHY interface.
|
||||
This parameter can be any value of @ref PCD_USB_Core_PHY */
|
||||
|
||||
uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal.
|
||||
This parameter can be set to ENABLE or DISABLE */
|
||||
|
||||
uint32_t low_power_enable; /*!< Enable or disable Low Power mode
|
||||
This parameter can be set to ENABLE or DISABLE */
|
||||
|
||||
uint32_t lpm_enable; /*!< Enable or disable Link Power Management.
|
||||
This parameter can be set to ENABLE or DISABLE */
|
||||
|
||||
uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.
|
||||
This parameter can be set to ENABLE or DISABLE */
|
||||
|
||||
}PCD_InitTypeDef; |
||||
|
||||
typedef struct |
||||
{ |
||||
uint8_t num; /*!< Endpoint number
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
|
||||
|
||||
uint8_t is_in; /*!< Endpoint direction
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
|
||||
|
||||
uint8_t is_stall; /*!< Endpoint stall condition
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
|
||||
|
||||
uint8_t type; /*!< Endpoint type
|
||||
This parameter can be any value of @ref PCD_USB_EP_Type */
|
||||
|
||||
uint16_t pmaadress; /*!< PMA Address
|
||||
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
|
||||
|
||||
|
||||
uint16_t pmaaddr0; /*!< PMA Address0
|
||||
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
|
||||
|
||||
|
||||
uint16_t pmaaddr1; /*!< PMA Address1
|
||||
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
|
||||
|
||||
|
||||
uint8_t doublebuffer; /*!< Double buffer enable
|
||||
This parameter can be 0 or 1 */
|
||||
|
||||
uint32_t maxpacket; /*!< Endpoint Max packet size
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ |
||||
|
||||
uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ |
||||
|
||||
|
||||
uint32_t xfer_len; /*!< Current transfer length */ |
||||
|
||||
uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ |
||||
|
||||
}PCD_EPTypeDef; |
||||
|
||||
typedef USB_TypeDef PCD_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief PCD Handle Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
PCD_TypeDef *Instance; /*!< Register base address */
|
||||
PCD_InitTypeDef Init; /*!< PCD required parameters */ |
||||
__IO uint8_t USB_Address; /*!< USB Address */
|
||||
PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ |
||||
PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
|
||||
HAL_LockTypeDef Lock; /*!< PCD peripheral status */ |
||||
__IO PCD_StateTypeDef State; /*!< PCD communication state */ |
||||
uint32_t Setup[12]; /*!< Setup packet buffer */ |
||||
PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ |
||||
uint32_t BESL; |
||||
|
||||
|
||||
uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
|
||||
This parameter can be set to ENABLE or DISABLE */ |
||||
|
||||
uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
|
||||
This parameter can be set to ENABLE or DISABLE */ |
||||
void *pData; /*!< Pointer to upper stack Handler */
|
||||
|
||||
} PCD_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
#include "stm32l0xx_hal_pcd_ex.h" |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup PCD_Exported_Constants PCD Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup PCD_EndPoint PCD End Point
|
||||
* @{ |
||||
*/ |
||||
|
||||
|
||||
#define PCD_ENDP0 ((uint8_t)0U) |
||||
#define PCD_ENDP1 ((uint8_t)1U) |
||||
#define PCD_ENDP2 ((uint8_t)2U) |
||||
#define PCD_ENDP3 ((uint8_t)3U) |
||||
#define PCD_ENDP4 ((uint8_t)4U) |
||||
#define PCD_ENDP5 ((uint8_t)5U) |
||||
#define PCD_ENDP6 ((uint8_t)6U) |
||||
#define PCD_ENDP7 ((uint8_t)7U) |
||||
|
||||
/* Endpoint Kind */ |
||||
#define PCD_SNG_BUF 0U |
||||
#define PCD_DBL_BUF 1U |
||||
|
||||
#define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/** @defgroup PCD_Speed PCD Speed
|
||||
* @{ |
||||
*/ |
||||
#define PCD_SPEED_HIGH 0U /* Not Supported */ |
||||
#define PCD_SPEED_FULL 2U |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup PCD_USB_Core_PHY PCD USB Core PHY
|
||||
* @{ |
||||
*/ |
||||
#define PCD_PHY_EMBEDDED 2U |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup PCD_USB_EP0_MPS PCD USB EP0 MPS
|
||||
* @{ |
||||
*/ |
||||
#define DEP0CTL_MPS_64 0U |
||||
#define DEP0CTL_MPS_32 1U |
||||
#define DEP0CTL_MPS_16 2U |
||||
#define DEP0CTL_MPS_8 3U |
||||
|
||||
#define PCD_EP0MPS_64 DEP0CTL_MPS_64 |
||||
#define PCD_EP0MPS_32 DEP0CTL_MPS_32 |
||||
#define PCD_EP0MPS_16 DEP0CTL_MPS_16 |
||||
#define PCD_EP0MPS_08 DEP0CTL_MPS_8 |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup PCD_USB_EP_Type PCD USB EP Type
|
||||
* @{ |
||||
*/ |
||||
#define PCD_EP_TYPE_CTRL 0U |
||||
#define PCD_EP_TYPE_ISOC 1U |
||||
#define PCD_EP_TYPE_BULK 2U |
||||
#define PCD_EP_TYPE_INTR 3U |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
|
||||
/** @defgroup PCD_Interrupt_Clock PCD Interrupt
|
||||
* @brief macros to handle interrupts and specific clock configurations |
||||
* @{ |
||||
*/ |
||||
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__)) |
||||
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= (uint16_t) ~(__INTERRUPT__)) |
||||
|
||||
#define USB_WAKEUP_EXTI_LINE (EXTI_IMR_IM18) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */ |
||||
|
||||
#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE |
||||
#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE) |
||||
#define __HAL_USB_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_WAKEUP_EXTI_LINE) |
||||
|
||||
/* Internal macros -----------------------------------------------------------*/ |
||||
|
||||
/* SetENDPOINT */ |
||||
#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&USBx->EP0R + bEpNum * 2U)= (uint16_t)wRegValue) |
||||
|
||||
/* GetENDPOINT */ |
||||
#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&USBx->EP0R + bEpNum * 2U)) |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @param wType: Endpoint Type. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT(USBx, bEpNum,\ |
||||
((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_T_MASK) | wType ))) |
||||
|
||||
/**
|
||||
* @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval Endpoint Type |
||||
*/ |
||||
#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_T_FIELD) |
||||
|
||||
|
||||
/**
|
||||
* @brief free buffer used from the application realizing it to the line |
||||
* toggles bit SW_BUF in the double buffered endpoint register |
||||
* @param USBx: USB device. |
||||
* @param bEpNum, bDir |
||||
* @retval None |
||||
*/ |
||||
#define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\ |
||||
do {\
|
||||
if (bDir == PCD_EP_DBUF_OUT)\
|
||||
{ /* OUT double buffered endpoint */\
|
||||
PCD_TX_DTOG(USBx, bEpNum);\
|
||||
}\
|
||||
else if (bDir == PCD_EP_DBUF_IN)\
|
||||
{ /* IN double buffered endpoint */\
|
||||
PCD_RX_DTOG(USBx, bEpNum);\
|
||||
}\
|
||||
} while(0) |
||||
|
||||
/**
|
||||
* @brief gets direction of the double buffered endpoint |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval EP_DBUF_OUT, EP_DBUF_IN, |
||||
* EP_DBUF_ERR if the endpoint counter not yet programmed. |
||||
*/ |
||||
#define PCD_GET_DB_DIR(USBx, bEpNum)\ |
||||
do {\
|
||||
if ((uint16_t)(*PCD_EP_RX_CNT(USBx, bEpNum) & 0xFC00U) != 0U)\
|
||||
return(PCD_EP_DBUF_OUT);\
|
||||
else if (((uint16_t)(*PCD_EP_TX_CNT(USBx, bEpNum)) & 0x03FFU) != 0U)\
|
||||
return(PCD_EP_DBUF_IN);\
|
||||
else\
|
||||
return(PCD_EP_DBUF_ERR);\
|
||||
} while(0) |
||||
|
||||
/**
|
||||
* @brief sets the status for tx transfer (bits STAT_TX[1:0]). |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @param wState: new state |
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do {\ |
||||
register uint16_t _wRegVal; \
|
||||
\
|
||||
_wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPTX_DTOGMASK;\
|
||||
/* toggle first bit ? */ \
|
||||
if((USB_EPTX_DTOG1 & wState)!= 0U) \
|
||||
_wRegVal ^= USB_EPTX_DTOG1; \
|
||||
/* toggle second bit ? */ \
|
||||
if((USB_EPTX_DTOG2 & wState)!= 0U) \
|
||||
_wRegVal ^= USB_EPTX_DTOG2; \
|
||||
PCD_SET_ENDPOINT(USBx, bEpNum, (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
|
||||
} while(0) /* PCD_SET_EP_TX_STATUS */ |
||||
|
||||
/**
|
||||
* @brief sets the status for rx transfer (bits STAT_TX[1:0]) |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @param wState: new state |
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do {\ |
||||
register uint16_t _wRegVal; \
|
||||
\
|
||||
_wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPRX_DTOGMASK;\
|
||||
/* toggle first bit ? */ \
|
||||
if((USB_EPRX_DTOG1 & wState)!= 0U) \
|
||||
_wRegVal ^= USB_EPRX_DTOG1; \
|
||||
/* toggle second bit ? */ \
|
||||
if((USB_EPRX_DTOG2 & wState)!= 0U) \
|
||||
_wRegVal ^= USB_EPRX_DTOG2; \
|
||||
PCD_SET_ENDPOINT(USBx, bEpNum, (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
|
||||
} while(0) /* PCD_SET_EP_RX_STATUS */ |
||||
|
||||
/**
|
||||
* @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @param wStaterx: new state. |
||||
* @param wStatetx: new state. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) do {\ |
||||
register uint32_t _wRegVal; \
|
||||
\
|
||||
_wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
|
||||
/* toggle first bit ? */ \
|
||||
if((USB_EPRX_DTOG1 & wStaterx)!= 0U) \
|
||||
_wRegVal ^= USB_EPRX_DTOG1; \
|
||||
/* toggle second bit ? */ \
|
||||
if((USB_EPRX_DTOG2 & wStaterx)!= 0U) \
|
||||
_wRegVal ^= USB_EPRX_DTOG2; \
|
||||
/* toggle first bit ? */ \
|
||||
if((USB_EPTX_DTOG1 & wStatetx)!= 0U) \
|
||||
_wRegVal ^= USB_EPTX_DTOG1; \
|
||||
/* toggle second bit ? */ \
|
||||
if((USB_EPTX_DTOG2 & wStatetx)!= 0U) \
|
||||
_wRegVal ^= USB_EPTX_DTOG2; \
|
||||
PCD_SET_ENDPOINT(USBx, bEpNum, _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
|
||||
} while(0) /* PCD_SET_EP_TXRX_STATUS */ |
||||
|
||||
/**
|
||||
* @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] |
||||
* /STAT_RX[1:0]) |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval status |
||||
*/ |
||||
#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPTX_STAT) |
||||
|
||||
#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPRX_STAT) |
||||
|
||||
/**
|
||||
* @brief sets directly the VALID tx/rx-status into the endpoint register |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS(USBx, bEpNum, USB_EP_TX_VALID)) |
||||
|
||||
#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS(USBx, bEpNum, USB_EP_RX_VALID)) |
||||
|
||||
/**
|
||||
* @brief checks stall condition in an endpoint. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval TRUE = endpoint in stall condition. |
||||
*/ |
||||
#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS(USBx, bEpNum) \ |
||||
== USB_EP_TX_STALL) |
||||
#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS(USBx, bEpNum) \ |
||||
== USB_EP_RX_STALL) |
||||
|
||||
/**
|
||||
* @brief set & clear EP_KIND bit. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT(USBx, bEpNum, \ |
||||
(USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT(USBx, bEpNum) | USB_EP_KIND) & USB_EPREG_MASK)))) |
||||
#define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT(USBx, bEpNum, \ |
||||
(USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPKIND_MASK)))) |
||||
|
||||
/**
|
||||
* @brief Sets/clears directly STATUS_OUT bit in the endpoint register. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND(USBx, bEpNum) |
||||
#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND(USBx, bEpNum) |
||||
|
||||
/**
|
||||
* @brief Sets/clears directly EP_KIND bit in the endpoint register. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND(USBx, bEpNum) |
||||
#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND(USBx, bEpNum) |
||||
|
||||
/**
|
||||
* @brief Clears bit CTR_RX / CTR_TX in the endpoint register. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT(USBx, bEpNum,\ |
||||
PCD_GET_ENDPOINT(USBx, bEpNum) & 0x7FFFU & USB_EPREG_MASK)) |
||||
#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT(USBx, bEpNum,\ |
||||
PCD_GET_ENDPOINT(USBx, bEpNum) & 0xFF7FU & USB_EPREG_MASK)) |
||||
|
||||
/**
|
||||
* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT(USBx, bEpNum, \ |
||||
USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK))) |
||||
#define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT(USBx, bEpNum, \ |
||||
USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK))) |
||||
|
||||
/**
|
||||
* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_DTOG_RX) != 0)\ |
||||
PCD_RX_DTOG(USBx, bEpNum) |
||||
#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_DTOG_TX) != 0)\ |
||||
PCD_TX_DTOG(USBx, bEpNum) |
||||
|
||||
/**
|
||||
* @brief Sets address in an endpoint register. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @param bAddr: Address. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT(USBx, bEpNum,\ |
||||
USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK) | bAddr) |
||||
|
||||
/**
|
||||
* @brief Gets address in an endpoint register. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPADDR_FIELD)) |
||||
#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8U)+ ((uint32_t)USBx + 0x400U))) |
||||
#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8U+2U)+ ((uint32_t)USBx + 0x400U))) |
||||
#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8U+4U)+ ((uint32_t)USBx + 0x400U))) |
||||
#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8U+6U)+ ((uint32_t)USBx + 0x400U))) |
||||
|
||||
/**
|
||||
* @brief sets address of the tx/rx buffer. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @param wAddr: address to be set (must be word aligned). |
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS(USBx, bEpNum) = ((wAddr >> 1U) << 1U)) |
||||
#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS(USBx, bEpNum) = ((wAddr >> 1U) << 1U)) |
||||
|
||||
/**
|
||||
* @brief Gets address of the tx/rx buffer. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval address of the buffer. |
||||
*/ |
||||
#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS(USBx, bEpNum)) |
||||
#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS(USBx, bEpNum)) |
||||
|
||||
/**
|
||||
* @brief Sets counter of rx buffer with no. of blocks. |
||||
* @param dwReg: Register. |
||||
* @param wCount: Counter. |
||||
* @param wNBlocks: Nb of block |
||||
* @retval None |
||||
*/ |
||||
#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) do {\ |
||||
wNBlocks = wCount >> 5;\
|
||||
if((wCount & 0x1f) == 0)\
|
||||
wNBlocks--;\
|
||||
*pdwReg = (uint16_t)((wNBlocks << 10U) | 0x8000U);\
|
||||
} while(0) /* PCD_CALC_BLK32 */ |
||||
|
||||
#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) do {\ |
||||
wNBlocks = wCount >> 1;\
|
||||
if((wCount & 0x1) != 0)\
|
||||
wNBlocks++;\
|
||||
*pdwReg = (uint16_t)(wNBlocks << 10U);\
|
||||
} while(0) /* PCD_CALC_BLK2 */ |
||||
|
||||
#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) do {\ |
||||
uint16_t wNBlocks;\
|
||||
if(wCount > 62){PCD_CALC_BLK32(dwReg,wCount,wNBlocks);}\
|
||||
else {PCD_CALC_BLK2(dwReg,wCount,wNBlocks);}\
|
||||
} while(0) /* PCD_SET_EP_CNT_RX_REG */ |
||||
|
||||
#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) do {\ |
||||
uint16_t *pdwReg = PCD_EP_TX_CNT(USBx, bEpNum); \
|
||||
PCD_SET_EP_CNT_RX_REG(pdwReg, wCount);\
|
||||
} while(0) |
||||
/**
|
||||
* @brief sets counter for the tx/rx buffer. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @param wCount: Counter value. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT(USBx, bEpNum) = wCount) |
||||
#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) do {\ |
||||
uint16_t *pdwReg = PCD_EP_RX_CNT(USBx, bEpNum); \
|
||||
PCD_SET_EP_CNT_RX_REG(pdwReg, wCount);\
|
||||
} while(0) |
||||
|
||||
/**
|
||||
* @brief gets counter of the tx buffer. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval Counter value |
||||
*/ |
||||
#define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT(USBx, bEpNum)) & 0x3ffU) |
||||
#define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT(USBx, bEpNum)) & 0x3ffU) |
||||
|
||||
/**
|
||||
* @brief Sets buffer 0/1 address in a double buffer endpoint. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @param wBuf0Addr: buffer 0 address. |
||||
* @retval Counter value |
||||
*/ |
||||
#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wBuf0Addr);} |
||||
#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wBuf1Addr);} |
||||
|
||||
/**
|
||||
* @brief Sets addresses in a double buffer endpoint. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @param wBuf0Addr: buffer 0 address. |
||||
* @param wBuf1Addr = buffer 1 address. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \ |
||||
PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr);\
|
||||
PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr);\
|
||||
} /* PCD_SET_EP_DBUF_ADDR */ |
||||
|
||||
/**
|
||||
* @brief Gets buffer 0/1 address of a double buffer endpoint. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS(USBx, bEpNum)) |
||||
#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS(USBx, bEpNum)) |
||||
|
||||
/**
|
||||
* @brief Gets buffer 0/1 address of a double buffer endpoint. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @param bDir: endpoint dir EP_DBUF_OUT = OUT and EP_DBUF_IN = IN |
||||
* @param wCount: Counter value
|
||||
* @retval None |
||||
*/ |
||||
#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \ |
||||
if(bDir == PCD_EP_DBUF_OUT)\
|
||||
/* OUT endpoint */ \
|
||||
{PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount);} \
|
||||
else if(bDir == PCD_EP_DBUF_IN)\
|
||||
/* IN endpoint */ \
|
||||
*PCD_EP_TX_CNT(USBx, bEpNum) = (uint32_t)wCount; \
|
||||
} /* SetEPDblBuf0Count*/ |
||||
|
||||
#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \ |
||||
if(bDir == PCD_EP_DBUF_OUT)\
|
||||
/* OUT endpoint */ \
|
||||
{PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount);}\
|
||||
else if(bDir == PCD_EP_DBUF_IN)\
|
||||
/* IN endpoint */\
|
||||
*PCD_EP_RX_CNT(USBx, bEpNum) = (uint32_t)wCount; \
|
||||
} /* SetEPDblBuf1Count */ |
||||
|
||||
#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do {\ |
||||
PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount); \
|
||||
PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount); \
|
||||
} while(0) /* PCD_SET_EP_DBUF_CNT */ |
||||
|
||||
/**
|
||||
* @brief Gets buffer 0/1 rx/tx counter for double buffering. |
||||
* @param USBx: USB device. |
||||
* @param bEpNum: Endpoint Number. |
||||
* @retval None |
||||
*/ |
||||
#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT(USBx, bEpNum)) |
||||
#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT(USBx, bEpNum)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup PCD_Exported_Functions PCD Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @brief Initialization and Configuration functions |
||||
* @{ |
||||
*/ |
||||
/* Initialization/de-initialization functions **********************************/ |
||||
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); |
||||
HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd); |
||||
void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); |
||||
void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/** @defgroup PCD_Exported_Functions_Group2 IO Data transfers functions
|
||||
* @brief Data transfers functions |
||||
* @{ |
||||
*/ |
||||
|
||||
/* I/O operation functions *****************************************************/ |
||||
/* Non-Blocking mode: Interrupt */ |
||||
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); |
||||
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); |
||||
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); |
||||
|
||||
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
||||
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
||||
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); |
||||
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); |
||||
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); |
||||
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); |
||||
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); |
||||
void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
||||
void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
||||
void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); |
||||
void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup PCD_Exported_Functions_Group3 Peripheral Control functions
|
||||
* @brief management functions |
||||
* @{ |
||||
*/ |
||||
/* Peripheral Control functions ************************************************/ |
||||
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
||||
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
||||
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
||||
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); |
||||
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
||||
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
||||
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
||||
uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
||||
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
||||
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
||||
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
||||
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
||||
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
||||
void PCD_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); |
||||
void PCD_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/** @defgroup PCD_Exported_Functions_Group4 Peripheral State functions
|
||||
* @brief Peripheral State functions |
||||
* @{ |
||||
*/ |
||||
|
||||
/* Peripheral State functions **************************************************/ |
||||
PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup PCD_Private PCD Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
#endif /* #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
|
||||
#endif /* __STM32L0xx_HAL_PCD_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,115 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_pcd.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of PCD HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_PCD_EX_H |
||||
#define __STM32L0xx_HAL_PCD_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup PCDEx PCDEx
|
||||
* @{ |
||||
*/ |
||||
/* Exported types ------------------------------------------------------------*/ |
||||
typedef enum
|
||||
{ |
||||
PCD_LPM_L0_ACTIVE = 0x00, /* on */ |
||||
PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ |
||||
}PCD_LPM_MsgTypeDef; |
||||
|
||||
typedef enum
|
||||
{ |
||||
PCD_BCD_ERROR = 0xFF,
|
||||
PCD_BCD_CONTACT_DETECTION = 0xFE, |
||||
PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, |
||||
PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, |
||||
PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, |
||||
PCD_BCD_DISCOVERY_COMPLETED = 0x00, |
||||
|
||||
}PCD_BCD_MsgTypeDef; |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup PCDEx__Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @brief Initialization and Configuration functions |
||||
*/ |
||||
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
|
||||
uint16_t ep_addr, |
||||
uint16_t ep_kind, |
||||
uint32_t pmaadress); |
||||
HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); |
||||
HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); |
||||
HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd); |
||||
HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd); |
||||
void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd); |
||||
void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); |
||||
void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
|
||||
#endif /* __STM32L0xx_HAL_PCD_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,308 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_rng.h |
||||
|
||||
* @author MCD Application Team |
||||
* @brief Header file of RNG HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_RNG_H |
||||
#define __STM32L0xx_HAL_RNG_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L062xx) || defined (STM32L063xx) || \ |
||||
defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup RNG RNG
|
||||
* @brief RNG HAL module driver |
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup RNG_Exported_Types RNG Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup RNG_Exported_Types_Group1 RNG State Structure definition
|
||||
* @{ |
||||
*/ |
||||
typedef enum |
||||
{ |
||||
HAL_RNG_STATE_RESET = 0x00U, /*!< RNG not yet initialized or disabled */ |
||||
HAL_RNG_STATE_READY = 0x01U, /*!< RNG initialized and ready for use */ |
||||
HAL_RNG_STATE_BUSY = 0x02U, /*!< RNG internal process is ongoing */
|
||||
HAL_RNG_STATE_TIMEOUT = 0x03U, /*!< RNG timeout state */ |
||||
HAL_RNG_STATE_ERROR = 0x04U /*!< RNG error state */ |
||||
|
||||
}HAL_RNG_StateTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup RNG_Exported_Types_Group2 RNG Handle Structure definition
|
||||
* @{ |
||||
*/
|
||||
typedef struct |
||||
{ |
||||
RNG_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< RNG locking object */ |
||||
|
||||
__IO HAL_RNG_StateTypeDef State; /*!< RNG communication state */ |
||||
|
||||
uint32_t RandomNumber; /*!< Last Generated RNG Data */ |
||||
|
||||
}RNG_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup RNG_Exported_Constants RNG Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup RNG_Exported_Constants_Group1 RNG Interrupt definition
|
||||
* @{ |
||||
*/
|
||||
#define RNG_IT_DRDY ((uint32_t)RNG_SR_DRDY) /*!< Data ready interrupt */ |
||||
#define RNG_IT_CEI ((uint32_t)RNG_SR_CEIS) /*!< Clock error interrupt */ |
||||
#define RNG_IT_SEI ((uint32_t)RNG_SR_SEIS) /*!< Seed error interrupt */ |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup RNG_Exported_Constants_Group2 RNG Flag definition
|
||||
* @{ |
||||
*/
|
||||
#define RNG_FLAG_DRDY ((uint32_t)RNG_SR_DRDY) /*!< Data ready */ |
||||
#define RNG_FLAG_CECS ((uint32_t)RNG_SR_CECS) /*!< Clock error current status */ |
||||
#define RNG_FLAG_SECS ((uint32_t)RNG_SR_SECS) /*!< Seed error current status */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
/** @defgroup RNG_Exported_Macros RNG Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset RNG handle state
|
||||
* @param __HANDLE__: RNG Handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RNG_STATE_RESET) |
||||
|
||||
/**
|
||||
* @brief Enables the RNG peripheral. |
||||
* @param __HANDLE__: RNG Handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_RNG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_RNGEN) |
||||
|
||||
/**
|
||||
* @brief Disables the RNG peripheral. |
||||
* @param __HANDLE__: RNG Handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_RNG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_RNGEN) |
||||
|
||||
/**
|
||||
* @brief Check the selected RNG flag status. |
||||
* @param __HANDLE__: RNG Handle |
||||
* @param __FLAG__: RNG flag |
||||
* This parameter can be one of the following values: |
||||
* @arg RNG_FLAG_DRDY: Data ready
|
||||
* @arg RNG_FLAG_CECS: Clock error current status |
||||
* @arg RNG_FLAG_SECS: Seed error current status
|
||||
* @retval The new state of __FLAG__ (SET or RESET). |
||||
*/ |
||||
#define __HAL_RNG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
|
||||
/**
|
||||
* @brief Clears the selected RNG flag status. |
||||
* @param __HANDLE__: RNG handle |
||||
* @param __FLAG__: RNG flag to clear
|
||||
* @note WARNING: This is a dummy macro for HAL code alignment, |
||||
* flags RNG_FLAG_DRDY, RNG_FLAG_CECS and RNG_FLAG_SECS are read-only. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_RNG_CLEAR_FLAG(__HANDLE__, __FLAG__) /* dummy macro */ |
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enables the RNG interrupts. |
||||
* @param __HANDLE__: RNG Handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_RNG_ENABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_IE) |
||||
|
||||
/**
|
||||
* @brief Disables the RNG interrupts. |
||||
* @param __HANDLE__: RNG Handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_RNG_DISABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_IE) |
||||
|
||||
/**
|
||||
* @brief Checks whether the specified RNG interrupt has occurred or not. |
||||
* @param __HANDLE__: RNG Handle |
||||
* @param __INTERRUPT__: specifies the RNG interrupt status flag to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg RNG_IT_DRDY: Data ready interrupt
|
||||
* @arg RNG_IT_CEI: Clock error interrupt |
||||
* @arg RNG_IT_SEI: Seed error interrupt |
||||
* @retval The new state of __INTERRUPT__ (SET or RESET). |
||||
*/ |
||||
#define __HAL_RNG_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__)) |
||||
|
||||
/**
|
||||
* @brief Clears the RNG interrupt status flags. |
||||
* @param __HANDLE__: RNG Handle |
||||
* @param __INTERRUPT__: specifies the RNG interrupt status flag to clear. |
||||
* This parameter can be one of the following values:
|
||||
* @arg RNG_IT_CEI: Clock error interrupt |
||||
* @arg RNG_IT_SEI: Seed error interrupt |
||||
* @note RNG_IT_DRDY flag is read-only, reading RNG_DR register automatically clears RNG_IT_DRDY.
|
||||
* @retval None |
||||
*/ |
||||
#define __HAL_RNG_CLEAR_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR) = ~(__INTERRUPT__)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup RNG_Exported_Functions RNG Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Initialization and de-initialization functions ******************************/ |
||||
/** @defgroup RNG_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{ |
||||
*/
|
||||
HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng); |
||||
HAL_StatusTypeDef HAL_RNG_DeInit (RNG_HandleTypeDef *hrng); |
||||
void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng); |
||||
void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Peripheral Control functions ************************************************/ |
||||
/** @defgroup RNG_Exported_Functions_Group2 Peripheral Control functions
|
||||
* @{ |
||||
*/ |
||||
uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber() instead */ |
||||
uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber_IT() instead */ |
||||
|
||||
HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit); |
||||
HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng); |
||||
uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng); |
||||
|
||||
void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng); |
||||
void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng); |
||||
void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef* hrng, uint32_t random32bit); |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Peripheral State functions **************************************************/ |
||||
/** @defgroup RNG_Exported_Functions_Group3 Peripheral State functions
|
||||
* @{ |
||||
*/ |
||||
HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup RNG_Private RNG Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
#endif /* if defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L062xx) || defined (STM32L063xx) || \ |
||||
defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) */ |
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_RNG_H */ |
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,188 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_smartcard_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of SMARTCARD HAL Extended module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_SMARTCARD_EX_H |
||||
#define __STM32L0xx_HAL_SMARTCARD_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup SMARTCARDEx
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
/** @defgroup SMARTCARDEx_Private_Macros SMARTCARD Extended Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Report the SMARTCARD clock source.
|
||||
* @param __HANDLE__: specifies the SMARTCARD Handle. |
||||
* @param __CLOCKSOURCE__: output variable. |
||||
* @retval the SMARTCARD clocking source, written in __CLOCKSOURCE__. |
||||
*/ |
||||
#if defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx) |
||||
#define SMARTCARD_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
} while(0) |
||||
|
||||
#else /* (STM32L031xx) || defined (STM32L041xx) || (STM32L011xx) || defined (STM32L021xx) */ |
||||
|
||||
#define SMARTCARD_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
} while(0) |
||||
#endif /* (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || defined (STM32L021xx) */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @addtogroup SMARTCARDEx_Exported_Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Initialization and de-initialization functions ****************************/ |
||||
/* IO operation methods *******************************************************/ |
||||
|
||||
/** @addtogroup SMARTCARDEx_Exported_Functions_Group1
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Peripheral Control functions ***********************************************/ |
||||
void HAL_SMARTCARDEx_BlockLength_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t BlockLength); |
||||
void HAL_SMARTCARDEx_TimeOut_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t TimeOutValue); |
||||
HAL_StatusTypeDef HAL_SMARTCARDEx_EnableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard); |
||||
HAL_StatusTypeDef HAL_SMARTCARDEx_DisableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_SMARTCARD_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,699 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_smbus.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of SMBUS HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_SMBUS_H |
||||
#define __STM32L0xx_HAL_SMBUS_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup SMBUS
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/** @defgroup SMBUS_Exported_Types SMBUS Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_Configuration_Structure_definition SMBUS Configuration Structure definition
|
||||
* @brief SMBUS Configuration Structure definition |
||||
* @{ |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Timing; /*!< Specifies the SMBUS_TIMINGR_register value.
|
||||
This parameter calculated by referring to SMBUS initialization |
||||
section in Reference manual */ |
||||
uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not.
|
||||
This parameter can be a value of @ref SMBUS_Analog_Filter */ |
||||
|
||||
uint32_t OwnAddress1; /*!< Specifies the first device own address.
|
||||
This parameter can be a 7-bit or 10-bit address. */ |
||||
|
||||
uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected.
|
||||
This parameter can be a value of @ref SMBUS_addressing_mode */ |
||||
|
||||
uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
|
||||
This parameter can be a value of @ref SMBUS_dual_addressing_mode */ |
||||
|
||||
uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
|
||||
This parameter can be a 7-bit address. */ |
||||
|
||||
uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected
|
||||
This parameter can be a value of @ref SMBUS_own_address2_masks. */ |
||||
|
||||
uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
|
||||
This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */ |
||||
|
||||
uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
|
||||
This parameter can be a value of @ref SMBUS_nostretch_mode */ |
||||
|
||||
uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected.
|
||||
This parameter can be a value of @ref SMBUS_packet_error_check_mode */ |
||||
|
||||
uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected.
|
||||
This parameter can be a value of @ref SMBUS_peripheral_mode */ |
||||
|
||||
uint32_t SMBusTimeout; /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value.
|
||||
(Enable bits and different timeout values) |
||||
This parameter calculated by referring to SMBUS initialization |
||||
section in Reference manual */ |
||||
} SMBUS_InitTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup HAL_state_definition HAL state definition
|
||||
* @brief HAL State definition |
||||
* @{ |
||||
*/ |
||||
#define HAL_SMBUS_STATE_RESET (0x00000000U) /*!< SMBUS not yet initialized or disabled */ |
||||
#define HAL_SMBUS_STATE_READY (0x00000001U) /*!< SMBUS initialized and ready for use */ |
||||
#define HAL_SMBUS_STATE_BUSY (0x00000002U) /*!< SMBUS internal process is ongoing */ |
||||
#define HAL_SMBUS_STATE_MASTER_BUSY_TX (0x00000012U) /*!< Master Data Transmission process is ongoing */ |
||||
#define HAL_SMBUS_STATE_MASTER_BUSY_RX (0x00000022U) /*!< Master Data Reception process is ongoing */ |
||||
#define HAL_SMBUS_STATE_SLAVE_BUSY_TX (0x00000032U) /*!< Slave Data Transmission process is ongoing */ |
||||
#define HAL_SMBUS_STATE_SLAVE_BUSY_RX (0x00000042U) /*!< Slave Data Reception process is ongoing */ |
||||
#define HAL_SMBUS_STATE_TIMEOUT (0x00000003U) /*!< Timeout state */ |
||||
#define HAL_SMBUS_STATE_ERROR (0x00000004U) /*!< Reception process is ongoing */ |
||||
#define HAL_SMBUS_STATE_LISTEN (0x00000008U) /*!< Address Listen Mode is ongoing */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_Error_Code_definition SMBUS Error Code definition
|
||||
* @brief SMBUS Error Code definition |
||||
* @{ |
||||
*/ |
||||
#define HAL_SMBUS_ERROR_NONE (0x00000000U) /*!< No error */ |
||||
#define HAL_SMBUS_ERROR_BERR (0x00000001U) /*!< BERR error */ |
||||
#define HAL_SMBUS_ERROR_ARLO (0x00000002U) /*!< ARLO error */ |
||||
#define HAL_SMBUS_ERROR_ACKF (0x00000004U) /*!< ACKF error */ |
||||
#define HAL_SMBUS_ERROR_OVR (0x00000008U) /*!< OVR error */ |
||||
#define HAL_SMBUS_ERROR_HALTIMEOUT (0x00000010U) /*!< Timeout error */ |
||||
#define HAL_SMBUS_ERROR_BUSTIMEOUT (0x00000020U) /*!< Bus Timeout error */ |
||||
#define HAL_SMBUS_ERROR_ALERT (0x00000040U) /*!< Alert error */ |
||||
#define HAL_SMBUS_ERROR_PECERR (0x00000080U) /*!< PEC error */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_handle_Structure_definition SMBUS handle Structure definition
|
||||
* @brief SMBUS handle Structure definition |
||||
* @{ |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
I2C_TypeDef *Instance; /*!< SMBUS registers base address */ |
||||
|
||||
SMBUS_InitTypeDef Init; /*!< SMBUS communication parameters */ |
||||
|
||||
uint8_t *pBuffPtr; /*!< Pointer to SMBUS transfer buffer */ |
||||
|
||||
uint16_t XferSize; /*!< SMBUS transfer size */ |
||||
|
||||
__IO uint16_t XferCount; /*!< SMBUS transfer counter */ |
||||
|
||||
__IO uint32_t XferOptions; /*!< SMBUS transfer options */ |
||||
|
||||
__IO uint32_t PreviousState; /*!< SMBUS communication Previous state */ |
||||
|
||||
HAL_LockTypeDef Lock; /*!< SMBUS locking object */ |
||||
|
||||
__IO uint32_t State; /*!< SMBUS communication state */ |
||||
|
||||
__IO uint32_t ErrorCode; /*!< SMBUS Error code */ |
||||
|
||||
} SMBUS_HandleTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter
|
||||
* @{ |
||||
*/ |
||||
#define SMBUS_ANALOGFILTER_ENABLE (0x00000000U) |
||||
#define SMBUS_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_addressing_mode SMBUS addressing mode
|
||||
* @{ |
||||
*/ |
||||
#define SMBUS_ADDRESSINGMODE_7BIT (0x00000001U) |
||||
#define SMBUS_ADDRESSINGMODE_10BIT (0x00000002U) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define SMBUS_DUALADDRESS_DISABLE (0x00000000U) |
||||
#define SMBUS_DUALADDRESS_ENABLE I2C_OAR2_OA2EN |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_own_address2_masks SMBUS ownaddress2 masks
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define SMBUS_OA2_NOMASK ((uint8_t)0x00U) |
||||
#define SMBUS_OA2_MASK01 ((uint8_t)0x01U) |
||||
#define SMBUS_OA2_MASK02 ((uint8_t)0x02U) |
||||
#define SMBUS_OA2_MASK03 ((uint8_t)0x03U) |
||||
#define SMBUS_OA2_MASK04 ((uint8_t)0x04U) |
||||
#define SMBUS_OA2_MASK05 ((uint8_t)0x05U) |
||||
#define SMBUS_OA2_MASK06 ((uint8_t)0x06U) |
||||
#define SMBUS_OA2_MASK07 ((uint8_t)0x07U) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode
|
||||
* @{ |
||||
*/ |
||||
#define SMBUS_GENERALCALL_DISABLE (0x00000000U) |
||||
#define SMBUS_GENERALCALL_ENABLE I2C_CR1_GCEN |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode
|
||||
* @{ |
||||
*/ |
||||
#define SMBUS_NOSTRETCH_DISABLE (0x00000000U) |
||||
#define SMBUS_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode
|
||||
* @{ |
||||
*/ |
||||
#define SMBUS_PEC_DISABLE (0x00000000U) |
||||
#define SMBUS_PEC_ENABLE I2C_CR1_PECEN |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode
|
||||
* @{ |
||||
*/ |
||||
#define SMBUS_PERIPHERAL_MODE_SMBUS_HOST I2C_CR1_SMBHEN |
||||
#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE (0x00000000U) |
||||
#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP I2C_CR1_SMBDEN |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_ReloadEndMode_definition SMBUS ReloadEndMode definition
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define SMBUS_SOFTEND_MODE (0x00000000U) |
||||
#define SMBUS_RELOAD_MODE I2C_CR2_RELOAD |
||||
#define SMBUS_AUTOEND_MODE I2C_CR2_AUTOEND |
||||
#define SMBUS_SENDPEC_MODE I2C_CR2_PECBYTE |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_StartStopMode_definition SMBUS StartStopMode definition
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define SMBUS_NO_STARTSTOP (0x00000000U) |
||||
#define SMBUS_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) |
||||
#define SMBUS_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) |
||||
#define SMBUS_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* List of XferOptions in usage of :
|
||||
* 1- Restart condition when direction change |
||||
* 2- No Restart condition in other use cases |
||||
*/ |
||||
#define SMBUS_FIRST_FRAME SMBUS_SOFTEND_MODE |
||||
#define SMBUS_NEXT_FRAME ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE)) |
||||
#define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
||||
#define SMBUS_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
||||
#define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
||||
#define SMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
||||
|
||||
/* List of XferOptions in usage of :
|
||||
* 1- Restart condition in all use cases (direction change or not) |
||||
*/ |
||||
#define SMBUS_OTHER_FRAME_NO_PEC (0x000000AAU) |
||||
#define SMBUS_OTHER_FRAME_WITH_PEC (0x0000AA00U) |
||||
#define SMBUS_OTHER_AND_LAST_FRAME_NO_PEC (0x00AA0000U) |
||||
#define SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC (0xAA000000U) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition
|
||||
* @brief SMBUS Interrupt definition |
||||
* Elements values convention: 0xXXXXXXXX |
||||
* - XXXXXXXX : Interrupt control mask |
||||
* @{ |
||||
*/ |
||||
#define SMBUS_IT_ERRI I2C_CR1_ERRIE |
||||
#define SMBUS_IT_TCI I2C_CR1_TCIE |
||||
#define SMBUS_IT_STOPI I2C_CR1_STOPIE |
||||
#define SMBUS_IT_NACKI I2C_CR1_NACKIE |
||||
#define SMBUS_IT_ADDRI I2C_CR1_ADDRIE |
||||
#define SMBUS_IT_RXI I2C_CR1_RXIE |
||||
#define SMBUS_IT_TXI I2C_CR1_TXIE |
||||
#define SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI) |
||||
#define SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI) |
||||
#define SMBUS_IT_ALERT (SMBUS_IT_ERRI) |
||||
#define SMBUS_IT_ADDR (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup SMBUS_Flag_definition SMBUS Flag definition
|
||||
* @brief Flag definition |
||||
* Elements values convention: 0xXXXXYYYY |
||||
* - XXXXXXXX : Flag mask |
||||
* @{ |
||||
*/ |
||||
|
||||
#define SMBUS_FLAG_TXE I2C_ISR_TXE |
||||
#define SMBUS_FLAG_TXIS I2C_ISR_TXIS |
||||
#define SMBUS_FLAG_RXNE I2C_ISR_RXNE |
||||
#define SMBUS_FLAG_ADDR I2C_ISR_ADDR |
||||
#define SMBUS_FLAG_AF I2C_ISR_NACKF |
||||
#define SMBUS_FLAG_STOPF I2C_ISR_STOPF |
||||
#define SMBUS_FLAG_TC I2C_ISR_TC |
||||
#define SMBUS_FLAG_TCR I2C_ISR_TCR |
||||
#define SMBUS_FLAG_BERR I2C_ISR_BERR |
||||
#define SMBUS_FLAG_ARLO I2C_ISR_ARLO |
||||
#define SMBUS_FLAG_OVR I2C_ISR_OVR |
||||
#define SMBUS_FLAG_PECERR I2C_ISR_PECERR |
||||
#define SMBUS_FLAG_TIMEOUT I2C_ISR_TIMEOUT |
||||
#define SMBUS_FLAG_ALERT I2C_ISR_ALERT |
||||
#define SMBUS_FLAG_BUSY I2C_ISR_BUSY |
||||
#define SMBUS_FLAG_DIR I2C_ISR_DIR |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macros ------------------------------------------------------------*/ |
||||
/** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset SMBUS handle state.
|
||||
* @param __HANDLE__ specifies the SMBUS Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET) |
||||
|
||||
/** @brief Enable the specified SMBUS interrupts.
|
||||
* @param __HANDLE__ specifies the SMBUS Handle. |
||||
* @param __INTERRUPT__ specifies the interrupt source to enable. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref SMBUS_IT_ERRI Errors interrupt enable |
||||
* @arg @ref SMBUS_IT_TCI Transfer complete interrupt enable |
||||
* @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable |
||||
* @arg @ref SMBUS_IT_NACKI NACK received interrupt enable |
||||
* @arg @ref SMBUS_IT_ADDRI Address match interrupt enable |
||||
* @arg @ref SMBUS_IT_RXI RX interrupt enable |
||||
* @arg @ref SMBUS_IT_TXI TX interrupt enable |
||||
* |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) |
||||
|
||||
/** @brief Disable the specified SMBUS interrupts.
|
||||
* @param __HANDLE__ specifies the SMBUS Handle. |
||||
* @param __INTERRUPT__ specifies the interrupt source to disable. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref SMBUS_IT_ERRI Errors interrupt enable |
||||
* @arg @ref SMBUS_IT_TCI Transfer complete interrupt enable |
||||
* @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable |
||||
* @arg @ref SMBUS_IT_NACKI NACK received interrupt enable |
||||
* @arg @ref SMBUS_IT_ADDRI Address match interrupt enable |
||||
* @arg @ref SMBUS_IT_RXI RX interrupt enable |
||||
* @arg @ref SMBUS_IT_TXI TX interrupt enable |
||||
* |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) |
||||
|
||||
/** @brief Check whether the specified SMBUS interrupt source is enabled or not.
|
||||
* @param __HANDLE__ specifies the SMBUS Handle. |
||||
* @param __INTERRUPT__ specifies the SMBUS interrupt source to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref SMBUS_IT_ERRI Errors interrupt enable |
||||
* @arg @ref SMBUS_IT_TCI Transfer complete interrupt enable |
||||
* @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable |
||||
* @arg @ref SMBUS_IT_NACKI NACK received interrupt enable |
||||
* @arg @ref SMBUS_IT_ADDRI Address match interrupt enable |
||||
* @arg @ref SMBUS_IT_RXI RX interrupt enable |
||||
* @arg @ref SMBUS_IT_TXI TX interrupt enable |
||||
* |
||||
* @retval The new state of __IT__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
||||
|
||||
/** @brief Check whether the specified SMBUS flag is set or not.
|
||||
* @param __HANDLE__ specifies the SMBUS Handle. |
||||
* @param __FLAG__ specifies the flag to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref SMBUS_FLAG_TXE Transmit data register empty |
||||
* @arg @ref SMBUS_FLAG_TXIS Transmit interrupt status |
||||
* @arg @ref SMBUS_FLAG_RXNE Receive data register not empty |
||||
* @arg @ref SMBUS_FLAG_ADDR Address matched (slave mode) |
||||
* @arg @ref SMBUS_FLAG_AF NACK received flag |
||||
* @arg @ref SMBUS_FLAG_STOPF STOP detection flag |
||||
* @arg @ref SMBUS_FLAG_TC Transfer complete (master mode) |
||||
* @arg @ref SMBUS_FLAG_TCR Transfer complete reload |
||||
* @arg @ref SMBUS_FLAG_BERR Bus error |
||||
* @arg @ref SMBUS_FLAG_ARLO Arbitration lost |
||||
* @arg @ref SMBUS_FLAG_OVR Overrun/Underrun |
||||
* @arg @ref SMBUS_FLAG_PECERR PEC error in reception |
||||
* @arg @ref SMBUS_FLAG_TIMEOUT Timeout or Tlow detection flag |
||||
* @arg @ref SMBUS_FLAG_ALERT SMBus alert |
||||
* @arg @ref SMBUS_FLAG_BUSY Bus busy |
||||
* @arg @ref SMBUS_FLAG_DIR Transfer direction (slave mode) |
||||
* |
||||
* @retval The new state of __FLAG__ (TRUE or FALSE). |
||||
*/ |
||||
#define SMBUS_FLAG_MASK (0x0001FFFFU) |
||||
#define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) |
||||
|
||||
/** @brief Clear the SMBUS pending flags which are cleared by writing 1 in a specific bit.
|
||||
* @param __HANDLE__ specifies the SMBUS Handle. |
||||
* @param __FLAG__ specifies the flag to clear. |
||||
* This parameter can be any combination of the following values: |
||||
* @arg @ref SMBUS_FLAG_ADDR Address matched (slave mode) |
||||
* @arg @ref SMBUS_FLAG_AF NACK received flag |
||||
* @arg @ref SMBUS_FLAG_STOPF STOP detection flag |
||||
* @arg @ref SMBUS_FLAG_BERR Bus error |
||||
* @arg @ref SMBUS_FLAG_ARLO Arbitration lost |
||||
* @arg @ref SMBUS_FLAG_OVR Overrun/Underrun |
||||
* @arg @ref SMBUS_FLAG_PECERR PEC error in reception |
||||
* @arg @ref SMBUS_FLAG_TIMEOUT Timeout or Tlow detection flag |
||||
* @arg @ref SMBUS_FLAG_ALERT SMBus alert |
||||
* |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
||||
|
||||
/** @brief Enable the specified SMBUS peripheral.
|
||||
* @param __HANDLE__ specifies the SMBUS Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_SMBUS_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
||||
|
||||
/** @brief Disable the specified SMBUS peripheral.
|
||||
* @param __HANDLE__ specifies the SMBUS Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_SMBUS_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
||||
|
||||
/** @brief Generate a Non-Acknowledge SMBUS peripheral in Slave mode.
|
||||
* @param __HANDLE__ specifies the SMBUS Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
/** @defgroup SMBUS_Private_Macro SMBUS Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) || \ |
||||
((FILTER) == SMBUS_ANALOGFILTER_DISABLE)) |
||||
|
||||
#define IS_SMBUS_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) |
||||
|
||||
#define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) || \ |
||||
((MODE) == SMBUS_ADDRESSINGMODE_10BIT)) |
||||
|
||||
#define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \ |
||||
((ADDRESS) == SMBUS_DUALADDRESS_ENABLE)) |
||||
|
||||
#define IS_SMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == SMBUS_OA2_NOMASK) || \ |
||||
((MASK) == SMBUS_OA2_MASK01) || \
|
||||
((MASK) == SMBUS_OA2_MASK02) || \
|
||||
((MASK) == SMBUS_OA2_MASK03) || \
|
||||
((MASK) == SMBUS_OA2_MASK04) || \
|
||||
((MASK) == SMBUS_OA2_MASK05) || \
|
||||
((MASK) == SMBUS_OA2_MASK06) || \
|
||||
((MASK) == SMBUS_OA2_MASK07)) |
||||
|
||||
#define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLE) || \ |
||||
((CALL) == SMBUS_GENERALCALL_ENABLE)) |
||||
|
||||
#define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) || \ |
||||
((STRETCH) == SMBUS_NOSTRETCH_ENABLE)) |
||||
|
||||
#define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLE) || \ |
||||
((PEC) == SMBUS_PEC_ENABLE)) |
||||
|
||||
#define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \ |
||||
((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \
|
||||
((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)) |
||||
|
||||
#define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) || \ |
||||
((MODE) == SMBUS_AUTOEND_MODE) || \
|
||||
((MODE) == SMBUS_SOFTEND_MODE) || \
|
||||
((MODE) == SMBUS_SENDPEC_MODE) || \
|
||||
((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \
|
||||
((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) || \
|
||||
((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE)) || \
|
||||
((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE ))) |
||||
|
||||
|
||||
#define IS_SMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == SMBUS_GENERATE_STOP) || \ |
||||
((REQUEST) == SMBUS_GENERATE_START_READ) || \
|
||||
((REQUEST) == SMBUS_GENERATE_START_WRITE) || \
|
||||
((REQUEST) == SMBUS_NO_STARTSTOP)) |
||||
|
||||
|
||||
#define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \ |
||||
((REQUEST) == SMBUS_NEXT_FRAME) || \
|
||||
((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \
|
||||
((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \
|
||||
((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \
|
||||
((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC) || \
|
||||
IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) |
||||
|
||||
#define IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_OTHER_FRAME_NO_PEC) || \ |
||||
((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_NO_PEC) || \
|
||||
((REQUEST) == SMBUS_OTHER_FRAME_WITH_PEC) || \
|
||||
((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC)) |
||||
|
||||
#define SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN))) |
||||
#define SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) |
||||
|
||||
#define SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ |
||||
(uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) |
||||
|
||||
#define SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17U) |
||||
#define SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U) |
||||
#define SMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) |
||||
#define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE) |
||||
#define SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN) |
||||
|
||||
#define SMBUS_GET_ISR_REG(__HANDLE__) ((__HANDLE__)->Instance->ISR) |
||||
#define SMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) |
||||
|
||||
#define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) |
||||
#define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @addtogroup SMBUS_Exported_Functions SMBUS Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Initialization and de-initialization functions **********************************/ |
||||
HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus); |
||||
HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus); |
||||
void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus); |
||||
void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus); |
||||
HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter); |
||||
HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* IO operation functions *****************************************************/ |
||||
/** @addtogroup Blocking_mode_Polling Blocking mode Polling
|
||||
* @{ |
||||
*/ |
||||
/******* Blocking mode: Polling */ |
||||
HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt
|
||||
* @{ |
||||
*/ |
||||
/******* Non-Blocking mode: Interrupt */ |
||||
HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
||||
HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
||||
HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress); |
||||
HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
||||
HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
||||
|
||||
HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus); |
||||
HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus); |
||||
HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus); |
||||
HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
|
||||
* @{ |
||||
*/ |
||||
/******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */ |
||||
void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus); |
||||
void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus); |
||||
void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
||||
void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
||||
void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
||||
void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
||||
void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); |
||||
void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
||||
void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Peripheral State and Errors functions **************************************************/ |
||||
uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus); |
||||
uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private Functions ---------------------------------------------------------*/ |
||||
/** @defgroup SMBUS_Private_Functions SMBUS Private Functions
|
||||
* @{ |
||||
*/ |
||||
/* Private functions are defined in stm32l0xx_hal_smbus.c file */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
|
||||
#endif /* __STM32L0xx_HAL_SMBUS_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,659 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_tsc.h |
||||
* @author MCD Application Team |
||||
* @brief This file contains all the functions prototypes for the TSC firmware
|
||||
* library. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_TSC_H |
||||
#define __STM32L0xx_TSC_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup TSC TSC
|
||||
* @{ |
||||
*/
|
||||
|
||||
/** @defgroup TSC_Exported_Types TSC Exported Types
|
||||
* @{ |
||||
*/ |
||||
/* Exported types ------------------------------------------------------------*/ |
||||
|
||||
/**
|
||||
* @brief TSC state structure definition
|
||||
*/
|
||||
typedef enum |
||||
{ |
||||
HAL_TSC_STATE_RESET = 0x00U, /*!< TSC registers have their reset value */ |
||||
HAL_TSC_STATE_READY = 0x01U, /*!< TSC registers are initialized or acquisition is completed with success */ |
||||
HAL_TSC_STATE_BUSY = 0x02U, /*!< TSC initialization or acquisition is on-going */ |
||||
HAL_TSC_STATE_ERROR = 0x03U /*!< Acquisition is completed with max count error */ |
||||
} HAL_TSC_StateTypeDef; |
||||
|
||||
/**
|
||||
* @brief TSC group status structure definition
|
||||
*/
|
||||
typedef enum |
||||
{ |
||||
TSC_GROUP_ONGOING = 0x00U, /*!< Acquisition on group is on-going or not started */ |
||||
TSC_GROUP_COMPLETED = 0x01U /*!< Acquisition on group is completed with success (no max count error) */ |
||||
} TSC_GroupStatusTypeDef; |
||||
|
||||
/**
|
||||
* @brief TSC init structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
uint32_t CTPulseHighLength; /*!< Charge-transfer high pulse length */ |
||||
uint32_t CTPulseLowLength; /*!< Charge-transfer low pulse length */ |
||||
uint32_t SpreadSpectrum; /*!< Spread spectrum activation */ |
||||
uint32_t SpreadSpectrumDeviation; /*!< Spread spectrum deviation */ |
||||
uint32_t SpreadSpectrumPrescaler; /*!< Spread spectrum prescaler */ |
||||
uint32_t PulseGeneratorPrescaler; /*!< Pulse generator prescaler */ |
||||
uint32_t MaxCountValue; /*!< Max count value */ |
||||
uint32_t IODefaultMode; /*!< IO default mode */ |
||||
uint32_t SynchroPinPolarity; /*!< Synchro pin polarity */ |
||||
uint32_t AcquisitionMode; /*!< Acquisition mode */ |
||||
uint32_t MaxCountInterrupt; /*!< Max count interrupt activation */ |
||||
uint32_t ChannelIOs; /*!< Channel IOs mask */ |
||||
uint32_t ShieldIOs; /*!< Shield IOs mask */ |
||||
uint32_t SamplingIOs; /*!< Sampling IOs mask */ |
||||
} TSC_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief TSC IOs configuration structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
uint32_t ChannelIOs; /*!< Channel IOs mask */ |
||||
uint32_t ShieldIOs; /*!< Shield IOs mask */ |
||||
uint32_t SamplingIOs; /*!< Sampling IOs mask */ |
||||
} TSC_IOConfigTypeDef; |
||||
|
||||
/**
|
||||
* @brief TSC handle Structure definition
|
||||
*/
|
||||
typedef struct |
||||
{ |
||||
TSC_TypeDef *Instance; /*!< Register base address */ |
||||
TSC_InitTypeDef Init; /*!< Initialization parameters */ |
||||
__IO HAL_TSC_StateTypeDef State; /*!< Peripheral state */ |
||||
HAL_LockTypeDef Lock; /*!< Lock feature */ |
||||
} TSC_HandleTypeDef; |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup TSC_Exported_Constants TSC Exported Constants
|
||||
* @{ |
||||
*/
|
||||
|
||||
|
||||
#define TSC_CTPH_1CYCLE ((uint32_t)((uint32_t) 0U << 28U)) |
||||
#define TSC_CTPH_2CYCLES ((uint32_t)((uint32_t) 1U << 28U)) |
||||
#define TSC_CTPH_3CYCLES ((uint32_t)((uint32_t) 2U << 28U)) |
||||
#define TSC_CTPH_4CYCLES ((uint32_t)((uint32_t) 3U << 28U)) |
||||
#define TSC_CTPH_5CYCLES ((uint32_t)((uint32_t) 4U << 28U)) |
||||
#define TSC_CTPH_6CYCLES ((uint32_t)((uint32_t) 5U << 28U)) |
||||
#define TSC_CTPH_7CYCLES ((uint32_t)((uint32_t) 6U << 28U)) |
||||
#define TSC_CTPH_8CYCLES ((uint32_t)((uint32_t) 7U << 28U)) |
||||
#define TSC_CTPH_9CYCLES ((uint32_t)((uint32_t) 8U << 28U)) |
||||
#define TSC_CTPH_10CYCLES ((uint32_t)((uint32_t) 9U << 28U)) |
||||
#define TSC_CTPH_11CYCLES ((uint32_t)((uint32_t)10U << 28U)) |
||||
#define TSC_CTPH_12CYCLES ((uint32_t)((uint32_t)11U << 28U)) |
||||
#define TSC_CTPH_13CYCLES ((uint32_t)((uint32_t)12U << 28U)) |
||||
#define TSC_CTPH_14CYCLES ((uint32_t)((uint32_t)13U << 28U)) |
||||
#define TSC_CTPH_15CYCLES ((uint32_t)((uint32_t)14U << 28U)) |
||||
#define TSC_CTPH_16CYCLES ((uint32_t)((uint32_t)15U << 28U)) |
||||
|
||||
#define TSC_CTPL_1CYCLE ((uint32_t)((uint32_t) 0U << 24U)) |
||||
#define TSC_CTPL_2CYCLES ((uint32_t)((uint32_t) 1U << 24U)) |
||||
#define TSC_CTPL_3CYCLES ((uint32_t)((uint32_t) 2U << 24U)) |
||||
#define TSC_CTPL_4CYCLES ((uint32_t)((uint32_t) 3U << 24U)) |
||||
#define TSC_CTPL_5CYCLES ((uint32_t)((uint32_t) 4U << 24U)) |
||||
#define TSC_CTPL_6CYCLES ((uint32_t)((uint32_t) 5U << 24U)) |
||||
#define TSC_CTPL_7CYCLES ((uint32_t)((uint32_t) 6U << 24U)) |
||||
#define TSC_CTPL_8CYCLES ((uint32_t)((uint32_t) 7U << 24U)) |
||||
#define TSC_CTPL_9CYCLES ((uint32_t)((uint32_t) 8U << 24U)) |
||||
#define TSC_CTPL_10CYCLES ((uint32_t)((uint32_t) 9U << 24U)) |
||||
#define TSC_CTPL_11CYCLES ((uint32_t)((uint32_t)10U << 24U)) |
||||
#define TSC_CTPL_12CYCLES ((uint32_t)((uint32_t)11U << 24U)) |
||||
#define TSC_CTPL_13CYCLES ((uint32_t)((uint32_t)12U << 24U)) |
||||
#define TSC_CTPL_14CYCLES ((uint32_t)((uint32_t)13U << 24U)) |
||||
#define TSC_CTPL_15CYCLES ((uint32_t)((uint32_t)14U << 24U)) |
||||
#define TSC_CTPL_16CYCLES ((uint32_t)((uint32_t)15U << 24U)) |
||||
|
||||
#define TSC_SS_PRESC_DIV1 ((uint32_t)0U) |
||||
#define TSC_SS_PRESC_DIV2 (TSC_CR_SSPSC) |
||||
|
||||
#define TSC_PG_PRESC_DIV1 ((uint32_t)(0U << 12U)) |
||||
#define TSC_PG_PRESC_DIV2 ((uint32_t)(1U << 12U)) |
||||
#define TSC_PG_PRESC_DIV4 ((uint32_t)(2U << 12U)) |
||||
#define TSC_PG_PRESC_DIV8 ((uint32_t)(3U << 12U)) |
||||
#define TSC_PG_PRESC_DIV16 ((uint32_t)(4U << 12U)) |
||||
#define TSC_PG_PRESC_DIV32 ((uint32_t)(5U << 12U)) |
||||
#define TSC_PG_PRESC_DIV64 ((uint32_t)(6U << 12U)) |
||||
#define TSC_PG_PRESC_DIV128 ((uint32_t)(7U << 12U)) |
||||
#define TSC_MCV_255 ((uint32_t)(0U << 5U)) |
||||
#define TSC_MCV_511 ((uint32_t)(1U << 5U)) |
||||
#define TSC_MCV_1023 ((uint32_t)(2U << 5U)) |
||||
#define TSC_MCV_2047 ((uint32_t)(3U << 5U)) |
||||
#define TSC_MCV_4095 ((uint32_t)(4U << 5U)) |
||||
#define TSC_MCV_8191 ((uint32_t)(5U << 5U)) |
||||
#define TSC_MCV_16383 ((uint32_t)(6U << 5U)) |
||||
|
||||
#define TSC_IODEF_OUT_PP_LOW ((uint32_t)0U) |
||||
#define TSC_IODEF_IN_FLOAT (TSC_CR_IODEF) |
||||
|
||||
#define TSC_SYNC_POLARITY_FALLING ((uint32_t)0U) |
||||
#define TSC_SYNC_POLARITY_RISING (TSC_CR_SYNCPOL) |
||||
|
||||
#define TSC_ACQ_MODE_NORMAL ((uint32_t)0U) |
||||
#define TSC_ACQ_MODE_SYNCHRO (TSC_CR_AM) |
||||
|
||||
#define TSC_IOMODE_UNUSED ((uint32_t)0U) |
||||
#define TSC_IOMODE_CHANNEL ((uint32_t)1U) |
||||
#define TSC_IOMODE_SHIELD ((uint32_t)2U) |
||||
#define TSC_IOMODE_SAMPLING ((uint32_t)3U) |
||||
|
||||
/** @defgroup TSC_interrupts_definition TSC Interrupts Definition
|
||||
* @{ |
||||
*/ |
||||
#define TSC_IT_EOA ((uint32_t)TSC_IER_EOAIE) |
||||
#define TSC_IT_MCE ((uint32_t)TSC_IER_MCEIE) |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/** @defgroup TSC_flags_definition TSC Flags Definition
|
||||
* @{ |
||||
*/
|
||||
#define TSC_FLAG_EOA ((uint32_t)TSC_ISR_EOAF) |
||||
#define TSC_FLAG_MCE ((uint32_t)TSC_ISR_MCEF) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#define TSC_NB_OF_GROUPS (8) |
||||
|
||||
#define TSC_GROUP1 ((uint32_t)0x00000001U) |
||||
#define TSC_GROUP2 ((uint32_t)0x00000002U) |
||||
#define TSC_GROUP3 ((uint32_t)0x00000004U) |
||||
#define TSC_GROUP4 ((uint32_t)0x00000008U) |
||||
#define TSC_GROUP5 ((uint32_t)0x00000010U) |
||||
#define TSC_GROUP6 ((uint32_t)0x00000020U) |
||||
#define TSC_GROUP7 ((uint32_t)0x00000040U) |
||||
#define TSC_GROUP8 ((uint32_t)0x00000080U) |
||||
#define TSC_ALL_GROUPS ((uint32_t)0x000000FFU) |
||||
|
||||
#define TSC_GROUP1_IDX ((uint32_t)0U) |
||||
#define TSC_GROUP2_IDX ((uint32_t)1U) |
||||
#define TSC_GROUP3_IDX ((uint32_t)2U) |
||||
#define TSC_GROUP4_IDX ((uint32_t)3U) |
||||
#define TSC_GROUP5_IDX ((uint32_t)4U) |
||||
#define TSC_GROUP6_IDX ((uint32_t)5U) |
||||
#define TSC_GROUP7_IDX ((uint32_t)6U) |
||||
#define TSC_GROUP8_IDX ((uint32_t)7U) |
||||
|
||||
#define TSC_GROUP1_IO1 ((uint32_t)0x00000001U) |
||||
#define TSC_GROUP1_IO2 ((uint32_t)0x00000002U) |
||||
#define TSC_GROUP1_IO3 ((uint32_t)0x00000004U) |
||||
#define TSC_GROUP1_IO4 ((uint32_t)0x00000008U) |
||||
#define TSC_GROUP1_ALL_IOS ((uint32_t)0x0000000FU) |
||||
|
||||
#define TSC_GROUP2_IO1 ((uint32_t)0x00000010U) |
||||
#define TSC_GROUP2_IO2 ((uint32_t)0x00000020U) |
||||
#define TSC_GROUP2_IO3 ((uint32_t)0x00000040U) |
||||
#define TSC_GROUP2_IO4 ((uint32_t)0x00000080U) |
||||
#define TSC_GROUP2_ALL_IOS ((uint32_t)0x000000F0U) |
||||
|
||||
#define TSC_GROUP3_IO1 ((uint32_t)0x00000100U) |
||||
#define TSC_GROUP3_IO2 ((uint32_t)0x00000200U) |
||||
#define TSC_GROUP3_IO3 ((uint32_t)0x00000400U) |
||||
#define TSC_GROUP3_IO4 ((uint32_t)0x00000800U) |
||||
#define TSC_GROUP3_ALL_IOS ((uint32_t)0x00000F00U) |
||||
|
||||
#define TSC_GROUP4_IO1 ((uint32_t)0x00001000U) |
||||
#define TSC_GROUP4_IO2 ((uint32_t)0x00002000U) |
||||
#define TSC_GROUP4_IO3 ((uint32_t)0x00004000U) |
||||
#define TSC_GROUP4_IO4 ((uint32_t)0x00008000U) |
||||
#define TSC_GROUP4_ALL_IOS ((uint32_t)0x0000F000U) |
||||
|
||||
#define TSC_GROUP5_IO1 ((uint32_t)0x00010000U) |
||||
#define TSC_GROUP5_IO2 ((uint32_t)0x00020000U) |
||||
#define TSC_GROUP5_IO3 ((uint32_t)0x00040000U) |
||||
#define TSC_GROUP5_IO4 ((uint32_t)0x00080000U) |
||||
#define TSC_GROUP5_ALL_IOS ((uint32_t)0x000F0000U) |
||||
|
||||
#define TSC_GROUP6_IO1 ((uint32_t)0x00100000U) |
||||
#define TSC_GROUP6_IO2 ((uint32_t)0x00200000U) |
||||
#define TSC_GROUP6_IO3 ((uint32_t)0x00400000U) |
||||
#define TSC_GROUP6_IO4 ((uint32_t)0x00800000U) |
||||
#define TSC_GROUP6_ALL_IOS ((uint32_t)0x00F00000U) |
||||
|
||||
#define TSC_GROUP7_IO1 ((uint32_t)0x01000000U) |
||||
#define TSC_GROUP7_IO2 ((uint32_t)0x02000000U) |
||||
#define TSC_GROUP7_IO3 ((uint32_t)0x04000000U) |
||||
#define TSC_GROUP7_IO4 ((uint32_t)0x08000000U) |
||||
#define TSC_GROUP7_ALL_IOS ((uint32_t)0x0F000000U) |
||||
|
||||
#define TSC_GROUP8_IO1 ((uint32_t)0x10000000U) |
||||
#define TSC_GROUP8_IO2 ((uint32_t)0x20000000U) |
||||
#define TSC_GROUP8_IO3 ((uint32_t)0x40000000U) |
||||
#define TSC_GROUP8_IO4 ((uint32_t)0x80000000U) |
||||
#define TSC_GROUP8_ALL_IOS ((uint32_t)0xF0000000U) |
||||
|
||||
#define TSC_ALL_GROUPS_ALL_IOS ((uint32_t)0xFFFFFFFFU) |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
|
||||
/** @defgroup TSC_Exported_Macros TSC Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset TSC handle state
|
||||
* @param __HANDLE__: TSC handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TSC_STATE_RESET) |
||||
|
||||
/**
|
||||
* @brief Enable the TSC peripheral. |
||||
* @param __HANDLE__: TSC handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE) |
||||
|
||||
/**
|
||||
* @brief Disable the TSC peripheral. |
||||
* @param __HANDLE__: TSC handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_TSCE)) |
||||
|
||||
/**
|
||||
* @brief Start acquisition |
||||
* @param __HANDLE__: TSC handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START) |
||||
|
||||
/**
|
||||
* @brief Stop acquisition |
||||
* @param __HANDLE__: TSC handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_START)) |
||||
|
||||
/**
|
||||
* @brief Set IO default mode to output push-pull low |
||||
* @param __HANDLE__: TSC handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_IODEF)) |
||||
|
||||
/**
|
||||
* @brief Set IO default mode to input floating |
||||
* @param __HANDLE__: TSC handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF) |
||||
|
||||
/**
|
||||
* @brief Set synchronization polarity to falling edge |
||||
* @param __HANDLE__: TSC handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_SYNCPOL)) |
||||
|
||||
/**
|
||||
* @brief Set synchronization polarity to rising edge and high level |
||||
* @param __HANDLE__: TSC handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL) |
||||
|
||||
/**
|
||||
* @brief Enable TSC interrupt. |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __INTERRUPT__: TSC interrupt |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) |
||||
|
||||
/**
|
||||
* @brief Disable TSC interrupt. |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __INTERRUPT__: TSC interrupt |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (uint32_t)(~(__INTERRUPT__))) |
||||
|
||||
/** @brief Check if the specified TSC interrupt source is enabled or disabled.
|
||||
* @param __HANDLE__: TSC Handle |
||||
* @param __INTERRUPT__: TSC interrupt |
||||
* @retval SET or RESET |
||||
*/ |
||||
#define __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
||||
|
||||
/**
|
||||
* @brief Get the selected TSC's flag status. |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __FLAG__: TSC flag |
||||
* @retval SET or RESET |
||||
*/ |
||||
#define __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET) |
||||
|
||||
/**
|
||||
* @brief Clear the TSC's pending flag. |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __FLAG__: TSC flag |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
||||
|
||||
/**
|
||||
* @brief Enable schmitt trigger hysteresis on a group of IOs |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __GX_IOY_MASK__: IOs mask |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__)) |
||||
|
||||
/**
|
||||
* @brief Disable schmitt trigger hysteresis on a group of IOs |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __GX_IOY_MASK__: IOs mask |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (uint32_t)(~(__GX_IOY_MASK__))) |
||||
|
||||
/**
|
||||
* @brief Open analog switch on a group of IOs |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __GX_IOY_MASK__: IOs mask |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (uint32_t)(~(__GX_IOY_MASK__))) |
||||
|
||||
/**
|
||||
* @brief Close analog switch on a group of IOs |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __GX_IOY_MASK__: IOs mask |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_CLOSE_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR |= (__GX_IOY_MASK__)) |
||||
|
||||
/**
|
||||
* @brief Enable a group of IOs in channel mode |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __GX_IOY_MASK__: IOs mask |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__)) |
||||
|
||||
/**
|
||||
* @brief Disable a group of channel IOs |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __GX_IOY_MASK__: IOs mask |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (uint32_t)(~(__GX_IOY_MASK__))) |
||||
|
||||
/**
|
||||
* @brief Enable a group of IOs in sampling mode |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __GX_IOY_MASK__: IOs mask |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__)) |
||||
|
||||
/**
|
||||
* @brief Disable a group of sampling IOs |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __GX_IOY_MASK__: IOs mask |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (uint32_t)(~(__GX_IOY_MASK__))) |
||||
|
||||
/**
|
||||
* @brief Enable acquisition groups |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __GX_MASK__: Groups mask |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_ENABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR |= (__GX_MASK__)) |
||||
|
||||
/**
|
||||
* @brief Disable acquisition groups |
||||
* @param __HANDLE__: TSC handle |
||||
* @param __GX_MASK__: Groups mask |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (uint32_t)(~(__GX_MASK__))) |
||||
|
||||
/** @brief Gets acquisition group status
|
||||
* @param __HANDLE__: TSC Handle |
||||
* @param __GX_INDEX__: Group index |
||||
* @retval SET or RESET |
||||
*/ |
||||
#define __HAL_TSC_GET_GROUP_STATUS(__HANDLE__, __GX_INDEX__) \ |
||||
((((__HANDLE__)->Instance->IOGCSR & (uint32_t)((uint32_t)1U << ((__GX_INDEX__) + (uint32_t)16U))) == (uint32_t)((uint32_t)1U << ((__GX_INDEX__) + (uint32_t)16U))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup TSC_Private_Macros TSC Private Macros
|
||||
* @{ |
||||
*/ |
||||
#define IS_TSC_ALL_INSTANCE(PERIPH) ((PERIPH) == TSC) |
||||
|
||||
#define IS_TSC_CTPH(VAL) (((VAL) == TSC_CTPH_1CYCLE) || \ |
||||
((VAL) == TSC_CTPH_2CYCLES) || \
|
||||
((VAL) == TSC_CTPH_3CYCLES) || \
|
||||
((VAL) == TSC_CTPH_4CYCLES) || \
|
||||
((VAL) == TSC_CTPH_5CYCLES) || \
|
||||
((VAL) == TSC_CTPH_6CYCLES) || \
|
||||
((VAL) == TSC_CTPH_7CYCLES) || \
|
||||
((VAL) == TSC_CTPH_8CYCLES) || \
|
||||
((VAL) == TSC_CTPH_9CYCLES) || \
|
||||
((VAL) == TSC_CTPH_10CYCLES) || \
|
||||
((VAL) == TSC_CTPH_11CYCLES) || \
|
||||
((VAL) == TSC_CTPH_12CYCLES) || \
|
||||
((VAL) == TSC_CTPH_13CYCLES) || \
|
||||
((VAL) == TSC_CTPH_14CYCLES) || \
|
||||
((VAL) == TSC_CTPH_15CYCLES) || \
|
||||
((VAL) == TSC_CTPH_16CYCLES)) |
||||
#define IS_TSC_CTPL(VAL) (((VAL) == TSC_CTPL_1CYCLE) || \ |
||||
((VAL) == TSC_CTPL_2CYCLES) || \
|
||||
((VAL) == TSC_CTPL_3CYCLES) || \
|
||||
((VAL) == TSC_CTPL_4CYCLES) || \
|
||||
((VAL) == TSC_CTPL_5CYCLES) || \
|
||||
((VAL) == TSC_CTPL_6CYCLES) || \
|
||||
((VAL) == TSC_CTPL_7CYCLES) || \
|
||||
((VAL) == TSC_CTPL_8CYCLES) || \
|
||||
((VAL) == TSC_CTPL_9CYCLES) || \
|
||||
((VAL) == TSC_CTPL_10CYCLES) || \
|
||||
((VAL) == TSC_CTPL_11CYCLES) || \
|
||||
((VAL) == TSC_CTPL_12CYCLES) || \
|
||||
((VAL) == TSC_CTPL_13CYCLES) || \
|
||||
((VAL) == TSC_CTPL_14CYCLES) || \
|
||||
((VAL) == TSC_CTPL_15CYCLES) || \
|
||||
((VAL) == TSC_CTPL_16CYCLES)) |
||||
|
||||
#define IS_TSC_SS(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE)) |
||||
|
||||
#define IS_TSC_SSD(VAL) (((VAL) == 0U) || (((VAL) > 0U) && ((VAL) < 128U))) |
||||
#define IS_TSC_SS_PRESC(VAL) (((VAL) == TSC_SS_PRESC_DIV1) || ((VAL) == TSC_SS_PRESC_DIV2)) |
||||
#define IS_TSC_PG_PRESC(VAL) (((VAL) == TSC_PG_PRESC_DIV1) || \ |
||||
((VAL) == TSC_PG_PRESC_DIV2) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV4) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV8) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV16) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV32) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV64) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV128)) |
||||
|
||||
#define IS_TSC_MCV(VAL) (((VAL) == TSC_MCV_255) || \ |
||||
((VAL) == TSC_MCV_511) || \
|
||||
((VAL) == TSC_MCV_1023) || \
|
||||
((VAL) == TSC_MCV_2047) || \
|
||||
((VAL) == TSC_MCV_4095) || \
|
||||
((VAL) == TSC_MCV_8191) || \
|
||||
((VAL) == TSC_MCV_16383)) |
||||
#define IS_TSC_IODEF(VAL) (((VAL) == TSC_IODEF_OUT_PP_LOW) || ((VAL) == TSC_IODEF_IN_FLOAT)) |
||||
#define IS_TSC_SYNC_POL(VAL) (((VAL) == TSC_SYNC_POLARITY_FALLING) || ((VAL) == TSC_SYNC_POLARITY_RISING)) |
||||
#define IS_TSC_ACQ_MODE(VAL) (((VAL) == TSC_ACQ_MODE_NORMAL) || ((VAL) == TSC_ACQ_MODE_SYNCHRO)) |
||||
#define IS_TSC_IOMODE(VAL) (((VAL) == TSC_IOMODE_UNUSED) || \ |
||||
((VAL) == TSC_IOMODE_CHANNEL) || \
|
||||
((VAL) == TSC_IOMODE_SHIELD) || \
|
||||
((VAL) == TSC_IOMODE_SAMPLING)) |
||||
#define IS_TSC_MCE_IT(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE)) |
||||
|
||||
#define IS_TSC_GROUP_INDEX(VAL) (((VAL) == 0U) || (((VAL) > 0U) && ((VAL) < TSC_NB_OF_GROUPS))) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup TSC_Exported_Functions TSC Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup TSC_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
/* Initialization and de-initialization functions *****************************/ |
||||
HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc); |
||||
HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef *htsc); |
||||
void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc); |
||||
void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup HAL_TSC_Exported_Functions_Group2 IO operation functions
|
||||
* @{ |
||||
*/ |
||||
/* IO operation functions *****************************************************/ |
||||
HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc); |
||||
HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc); |
||||
HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc); |
||||
HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc); |
||||
HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc); |
||||
TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index); |
||||
uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
/** @defgroup HAL_TSC_Exported_Functions_Group3 Peripheral Control functions
|
||||
* @{ |
||||
*/ |
||||
/* Peripheral Control functions ***********************************************/ |
||||
HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config); |
||||
HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
/** @defgroup HAL_TSC_Exported_Functions_Group4 State callback and error Functions
|
||||
* @{ |
||||
*/ |
||||
/* Peripheral State and Error functions ***************************************/ |
||||
HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc); |
||||
void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc); |
||||
|
||||
/* Callback functions *********************************************************/ |
||||
void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc); |
||||
void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Define the private group ***********************************/ |
||||
/**************************************************************/ |
||||
/** @defgroup TSC_Private TSC Private
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
/**************************************************************/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /*__STM32L0xx_TSC_H */ |
||||
#endif /* #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,710 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_usart.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of USART HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_USART_H |
||||
#define __STM32L0xx_HAL_USART_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup USART
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/** @defgroup USART_Exported_Types USART Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief USART Init Structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
|
||||
The baud rate is computed using the following formula: |
||||
Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))). */ |
||||
|
||||
uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref USARTEx_Word_Length. */ |
||||
|
||||
uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
|
||||
This parameter can be a value of @ref USART_Stop_Bits. */ |
||||
|
||||
uint32_t Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of @ref USART_Parity |
||||
@note When parity is enabled, the computed parity is inserted |
||||
at the MSB position of the transmitted data (9th bit when |
||||
the word length is set to 9 data bits; 8th bit when the |
||||
word length is set to 8 data bits). */ |
||||
|
||||
uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_Mode. */ |
||||
|
||||
uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
|
||||
This parameter can be a value of @ref USART_Clock_Polarity. */ |
||||
|
||||
uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
|
||||
This parameter can be a value of @ref USART_Clock_Phase. */ |
||||
|
||||
uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
|
||||
data bit (MSB) has to be output on the SCLK pin in synchronous mode. |
||||
This parameter can be a value of @ref USART_Last_Bit. */ |
||||
}USART_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL USART State structures definition |
||||
*/ |
||||
typedef enum |
||||
{ |
||||
HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized */ |
||||
HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
||||
HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ |
||||
HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */ |
||||
HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
||||
HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */ |
||||
HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ |
||||
HAL_USART_STATE_ERROR = 0x04U /*!< Error */ |
||||
}HAL_USART_StateTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL USART Error Code structure definition |
||||
*/ |
||||
#define HAL_USART_ERROR_NONE ((uint32_t)0x00U) /*!< No error */ |
||||
#define HAL_USART_ERROR_PE ((uint32_t)0x01U) /*!< Parity error */ |
||||
#define HAL_USART_ERROR_NE ((uint32_t)0x02U) /*!< Noise error */ |
||||
#define HAL_USART_ERROR_FE ((uint32_t)0x04U) /*!< frame error */ |
||||
#define HAL_USART_ERROR_ORE ((uint32_t)0x08U) /*!< Overrun error */ |
||||
#define HAL_USART_ERROR_DMA ((uint32_t)0x10U) /*!< DMA transfer error */ |
||||
|
||||
/**
|
||||
* @brief USART clock sources definitions |
||||
*/ |
||||
typedef enum |
||||
{ |
||||
USART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ |
||||
USART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ |
||||
USART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ |
||||
USART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ |
||||
USART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ |
||||
USART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ |
||||
}USART_ClockSourceTypeDef; |
||||
|
||||
|
||||
/**
|
||||
* @brief USART handle Structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
USART_TypeDef *Instance; /*!< USART registers base address */ |
||||
|
||||
USART_InitTypeDef Init; /*!< USART communication parameters */ |
||||
|
||||
uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */ |
||||
|
||||
uint16_t TxXferSize; /*!< USART Tx Transfer size */ |
||||
|
||||
__IO uint16_t TxXferCount; /*!< USART Tx Transfer Counter */ |
||||
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */ |
||||
|
||||
uint16_t RxXferSize; /*!< USART Rx Transfer size */ |
||||
|
||||
__IO uint16_t RxXferCount; /*!< USART Rx Transfer Counter */ |
||||
|
||||
uint16_t Mask; /*!< USART Rx RDR register mask */ |
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */ |
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */ |
||||
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */ |
||||
|
||||
__IO HAL_USART_StateTypeDef State; /*!< USART communication state */ |
||||
|
||||
__IO uint32_t ErrorCode; /*!< USART Error code */ |
||||
|
||||
}USART_HandleTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup USART_Exported_Constants USART Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup USART_Stop_Bits USART Number of Stop Bits
|
||||
* @{ |
||||
*/ |
||||
#define USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< USART frame with 0.5 stop bit */ |
||||
#define USART_STOPBITS_1 ((uint32_t)0x00000000) /*!< USART frame with 1 stop bit */ |
||||
#define USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< USART frame with 1.5 stop bits */ |
||||
#define USART_STOPBITS_2 USART_CR2_STOP_1 /*!< USART frame with 2 stop bits */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup USART_Parity USART Parity
|
||||
* @{ |
||||
*/ |
||||
#define USART_PARITY_NONE ((uint32_t)0x00000000U) /*!< No parity */ |
||||
#define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */ |
||||
#define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup USART_Mode USART Mode
|
||||
* @{ |
||||
*/ |
||||
#define USART_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */ |
||||
#define USART_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */ |
||||
#define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup USART_Clock USART Clock
|
||||
* @{ |
||||
*/ |
||||
#define USART_CLOCK_DISABLE ((uint32_t)0x00000000U) /*!< USART clock disable */ |
||||
#define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN) /*!< USART clock enable */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup USART_Clock_Polarity USART Clock Polarity
|
||||
* @{ |
||||
*/ |
||||
#define USART_POLARITY_LOW ((uint32_t)0x00000000U) /*!< USART Clock signal is steady Low */ |
||||
#define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL) /*!< USART Clock signal is steady High */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup USART_Clock_Phase USART Clock Phase
|
||||
* @{ |
||||
*/ |
||||
#define USART_PHASE_1EDGE ((uint32_t)0x00000000U) /*!< USART frame phase on first clock transition */ |
||||
#define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA) /*!< USART frame phase on second clock transition */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup USART_Last_Bit USART Last Bit
|
||||
* @{ |
||||
*/ |
||||
#define USART_LASTBIT_DISABLE ((uint32_t)0x00000000U) /*!< USART frame last data bit clock pulse not output to SCLK pin */ |
||||
#define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL) /*!< USART frame last data bit clock pulse output to SCLK pin */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup USART_Request_Parameters USART Request Parameters
|
||||
* @{ |
||||
*/ |
||||
#define USART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */ |
||||
#define USART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup USART_Flags USART Flags
|
||||
* Elements values convention: 0xXXXX |
||||
* - 0xXXXX : Flag mask in the ISR register |
||||
* @{ |
||||
*/ |
||||
#define USART_FLAG_REACK USART_ISR_REACK /*!< USART receive enable acknowledge flag */ |
||||
#define USART_FLAG_TEACK USART_ISR_TEACK /*!< USART transmit enable acknowledge flag */ |
||||
#define USART_FLAG_BUSY USART_ISR_BUSY /*!< USART busy flag */ |
||||
#define USART_FLAG_CTS USART_ISR_CTS /*!< USART clear to send flag */ |
||||
#define USART_FLAG_CTSIF USART_ISR_CTSIF /*!< USART clear to send interrupt flag */ |
||||
#define USART_FLAG_LBDF USART_ISR_LBDF /*!< USART LIN break detection flag */ |
||||
#define USART_FLAG_TXE USART_ISR_TXE /*!< USART transmit data register empty */ |
||||
#define USART_FLAG_TC USART_ISR_TC /*!< USART transmission complete */ |
||||
#define USART_FLAG_RXNE USART_ISR_RXNE /*!< USART read data register not empty */ |
||||
#define USART_FLAG_IDLE USART_ISR_IDLE /*!< USART idle flag */ |
||||
#define USART_FLAG_ORE USART_ISR_ORE /*!< USART overrun error */ |
||||
#define USART_FLAG_NE USART_ISR_NE /*!< USART noise error */ |
||||
#define USART_FLAG_FE USART_ISR_FE /*!< USART frame error */ |
||||
#define USART_FLAG_PE USART_ISR_PE /*!< USART parity error */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup USART_Interrupt_definition USART Interrupts Definition
|
||||
* Elements values convention: 0000ZZZZ0XXYYYYYb |
||||
* - YYYYY : Interrupt source position in the XX register (5bits) |
||||
* - XX : Interrupt source register (2bits) |
||||
* - 01: CR1 register |
||||
* - 10: CR2 register |
||||
* - 11: CR3 register |
||||
* - ZZZZ : Flag position in the ISR register(4bits) |
||||
* @{ |
||||
*/ |
||||
|
||||
#define USART_IT_PE ((uint16_t)0x0028U) /*!< USART parity error interruption */ |
||||
#define USART_IT_TXE ((uint16_t)0x0727U) /*!< USART transmit data register empty interruption */ |
||||
#define USART_IT_TC ((uint16_t)0x0626U) /*!< USART transmission complete interruption */ |
||||
#define USART_IT_RXNE ((uint16_t)0x0525U) /*!< USART read data register not empty interruption */ |
||||
#define USART_IT_IDLE ((uint16_t)0x0424U) /*!< USART idle interruption */ |
||||
#define USART_IT_ERR ((uint16_t)0x0060U) /*!< USART error interruption */ |
||||
#define USART_IT_ORE ((uint16_t)0x0300U) /*!< USART overrun error interruption */ |
||||
#define USART_IT_NE ((uint16_t)0x0200U) /*!< USART noise error interruption */ |
||||
#define USART_IT_FE ((uint16_t)0x0100U) /*!< USART frame error interruption */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags
|
||||
* @{ |
||||
*/ |
||||
#define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ |
||||
#define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ |
||||
#define USART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ |
||||
#define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ |
||||
#define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ |
||||
#define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ |
||||
#define USART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup USART_Interruption_Mask USART Interruption Flags Mask
|
||||
* @{ |
||||
*/ |
||||
#define USART_IT_MASK ((uint16_t)0x001FU) /*!< USART interruptions flags mask */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
/** @defgroup USART_Exported_Macros USART Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Reset USART handle state.
|
||||
* @param __HANDLE__: USART handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET) |
||||
|
||||
/** @brief Flush the USART Data registers
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
*/ |
||||
#define __HAL_USART_FLUSH_DRREGISTER(__HANDLE__) \ |
||||
do{ \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, USART_RXDATA_FLUSH_REQUEST); \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, USART_TXDATA_FLUSH_REQUEST); \
|
||||
} while(0) |
||||
|
||||
|
||||
/** @brief Check whether the specified USART flag is set or not.
|
||||
* @param __HANDLE__: specifies the USART Handle |
||||
* @param __FLAG__: specifies the flag to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref USART_FLAG_REACK Receive enable acknowledge flag |
||||
* @arg @ref USART_FLAG_TEACK Transmit enable acknowledge flag |
||||
* @arg @ref USART_FLAG_BUSY Busy flag |
||||
* @arg @ref USART_FLAG_CTS CTS Change flag |
||||
* @arg @ref USART_FLAG_TXE Transmit data register empty flag |
||||
* @arg @ref USART_FLAG_TC Transmission Complete flag |
||||
* @arg @ref USART_FLAG_RXNE Receive data register not empty flag |
||||
* @arg @ref USART_FLAG_IDLE Idle Line detection flag |
||||
* @arg @ref USART_FLAG_ORE OverRun Error flag |
||||
* @arg @ref USART_FLAG_NE Noise Error flag |
||||
* @arg @ref USART_FLAG_FE Framing Error flag |
||||
* @arg @ref USART_FLAG_PE Parity Error flag |
||||
* @retval The new state of __FLAG__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
/** @brief Clear the specified USART pending flag.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @param __FLAG__: specifies the flag to check. |
||||
* This parameter can be any combination of the following values: |
||||
* @arg @ref USART_CLEAR_PEF |
||||
* @arg @ref USART_CLEAR_FEF |
||||
* @arg @ref USART_CLEAR_NEF |
||||
* @arg @ref USART_CLEAR_OREF |
||||
* @arg @ref USART_CLEAR_IDLEF |
||||
* @arg @ref USART_CLEAR_TCF |
||||
* @arg @ref USART_CLEAR_CTSF |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
||||
|
||||
/** @brief Clear the USART PE pending flag.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_PEF) |
||||
|
||||
/** @brief Clear the USART FE pending flag.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_FEF) |
||||
|
||||
/** @brief Clear the USART NE pending flag.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_NEF) |
||||
|
||||
/** @brief Clear the USART ORE pending flag.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_OREF) |
||||
|
||||
/** @brief Clear the USART IDLE pending flag.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF) |
||||
|
||||
/** @brief Enable the specified USART interrupt.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @param __INTERRUPT__: specifies the USART interrupt source to enable. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt |
||||
* @arg @ref USART_IT_TC Transmission complete interrupt |
||||
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt |
||||
* @arg @ref USART_IT_IDLE Idle line detection interrupt |
||||
* @arg @ref USART_IT_PE Parity Error interrupt |
||||
* @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error) |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
||||
((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) |
||||
|
||||
/** @brief Disable the specified USART interrupt.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @param __INTERRUPT__: specifies the USART interrupt source to disable. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt |
||||
* @arg @ref USART_IT_TC Transmission complete interrupt |
||||
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt |
||||
* @arg @ref USART_IT_IDLE Idle line detection interrupt |
||||
* @arg @ref USART_IT_PE Parity Error interrupt |
||||
* @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error) |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
||||
((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) |
||||
|
||||
|
||||
/** @brief Check whether the specified USART interrupt has occurred or not.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @param __IT__: specifies the USART interrupt source to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt |
||||
* @arg @ref USART_IT_TC Transmission complete interrupt |
||||
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt |
||||
* @arg @ref USART_IT_IDLE Idle line detection interrupt |
||||
* @arg @ref USART_IT_ORE OverRun Error interrupt |
||||
* @arg @ref USART_IT_NE Noise Error interrupt |
||||
* @arg @ref USART_IT_FE Framing Error interrupt |
||||
* @arg @ref USART_IT_PE Parity Error interrupt |
||||
* @retval The new state of __IT__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_USART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1U << ((__IT__)>> 0x08U))) |
||||
|
||||
/** @brief Check whether the specified USART interrupt source is enabled or not.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @param __IT__: specifies the USART interrupt source to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt |
||||
* @arg @ref USART_IT_TC Transmission complete interrupt |
||||
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt |
||||
* @arg @ref USART_IT_IDLE Idle line detection interrupt |
||||
* @arg @ref USART_IT_ORE OverRun Error interrupt |
||||
* @arg @ref USART_IT_NE Noise Error interrupt |
||||
* @arg @ref USART_IT_FE Framing Error interrupt |
||||
* @arg @ref USART_IT_PE Parity Error interrupt |
||||
* @retval The new state of __IT__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \ |
||||
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1U << \
|
||||
(((uint16_t)(__IT__)) & USART_IT_MASK))) |
||||
|
||||
|
||||
/** @brief Clear the specified USART ISR flag, in setting the proper ICR register flag.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set |
||||
* to clear the corresponding interrupt. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref USART_CLEAR_PEF Parity Error Clear Flag |
||||
* @arg @ref USART_CLEAR_FEF Framing Error Clear Flag |
||||
* @arg @ref USART_CLEAR_NEF Noise detected Clear Flag |
||||
* @arg @ref USART_CLEAR_OREF OverRun Error Clear Flag |
||||
* @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag |
||||
* @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag |
||||
* @arg @ref USART_CLEAR_CTSF CTS Interrupt Clear Flag |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) |
||||
|
||||
/** @brief Set a specific USART request flag.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @param __REQ__: specifies the request flag to set. |
||||
* This parameter can be one of the following values: |
||||
* @arg @ref USART_RXDATA_FLUSH_REQUEST Receive Data flush Request |
||||
* @arg @ref USART_TXDATA_FLUSH_REQUEST Transmit data flush Request |
||||
* |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint32_t)(__REQ__)) |
||||
|
||||
/** @brief Enable the USART one bit sample method.
|
||||
* @param __HANDLE__: specifies the USART Handle.
|
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
||||
|
||||
/** @brief Disable the USART one bit sample method.
|
||||
* @param __HANDLE__: specifies the USART Handle.
|
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT)) |
||||
|
||||
/** @brief Enable USART.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
||||
|
||||
/** @brief Disable USART.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros --------------------------------------------------------*/ |
||||
/** @defgroup USART_Private_Macros USART Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Check USART Baud rate.
|
||||
* @param __BAUDRATE__: Baudrate specified by the user. |
||||
* The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz) |
||||
* divided by the smallest oversampling used on the USART (i.e. 8). |
||||
* @retval Test result (TRUE or FALSE). |
||||
*/ |
||||
#define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 4000001U) |
||||
|
||||
|
||||
/**
|
||||
* @brief Ensure that USART frame number of stop bits is valid. |
||||
* @param __STOPBITS__: USART frame number of stop bits.
|
||||
* @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) |
||||
*/ |
||||
#define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_0_5) || \ |
||||
((__STOPBITS__) == USART_STOPBITS_1) || \
|
||||
((__STOPBITS__) == USART_STOPBITS_1_5) || \
|
||||
((__STOPBITS__) == USART_STOPBITS_2)) |
||||
|
||||
/**
|
||||
* @brief Ensure that USART frame parity is valid. |
||||
* @param __PARITY__: USART frame parity.
|
||||
* @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) |
||||
*/
|
||||
#define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \ |
||||
((__PARITY__) == USART_PARITY_EVEN) || \
|
||||
((__PARITY__) == USART_PARITY_ODD)) |
||||
|
||||
/**
|
||||
* @brief Ensure that USART communication mode is valid. |
||||
* @param __MODE__: USART communication mode.
|
||||
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
||||
*/
|
||||
#define IS_USART_MODE(MODE) (((MODE) == USART_MODE_RX) || \ |
||||
((MODE) == USART_MODE_TX) || \
|
||||
((MODE) == USART_MODE_TX_RX)) |
||||
|
||||
/**
|
||||
* @brief Ensure that USART clock state is valid. |
||||
* @param __CLOCK__: USART clock state.
|
||||
* @retval SET (__CLOCK__ is valid) or RESET (__CLOCK__ is invalid) |
||||
*/
|
||||
#define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__) == USART_CLOCK_DISABLE) || \ |
||||
((__CLOCK__) == USART_CLOCK_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that USART frame polarity is valid. |
||||
* @param __CPOL__: USART frame polarity.
|
||||
* @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid) |
||||
*/
|
||||
#define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH)) |
||||
|
||||
/**
|
||||
* @brief Ensure that USART frame phase is valid. |
||||
* @param __CPHA__: USART frame phase.
|
||||
* @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid) |
||||
*/ |
||||
#define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that USART frame last bit clock pulse setting is valid. |
||||
* @param __LASTBIT__: USART frame last bit clock pulse setting.
|
||||
* @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid) |
||||
*/ |
||||
#define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \ |
||||
((__LASTBIT__) == USART_LASTBIT_ENABLE)) |
||||
|
||||
/**
|
||||
* @brief Ensure that USART request parameter is valid. |
||||
* @param __PARAM__: USART request parameter.
|
||||
* @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) |
||||
*/ |
||||
#define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \ |
||||
((__PARAM__) == USART_TXDATA_FLUSH_REQUEST)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Include USART HAL Extended module */ |
||||
#include "stm32l0xx_hal_usart_ex.h" |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @addtogroup USART_Exported_Functions USART Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Initialization and de-initialization functions ****************************/ |
||||
HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart); |
||||
HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart); |
||||
void HAL_USART_MspInit(USART_HandleTypeDef *husart); |
||||
void HAL_USART_MspDeInit(USART_HandleTypeDef *husart); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup USART_Exported_Functions_Group2 IO operation functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* IO operation functions *****************************************************/ |
||||
HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
||||
HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
||||
HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart); |
||||
HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart); |
||||
HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart); |
||||
/* Transfer Abort functions */ |
||||
HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart); |
||||
HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart); |
||||
|
||||
void HAL_USART_IRQHandler(USART_HandleTypeDef *husart); |
||||
void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart); |
||||
void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart); |
||||
void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart); |
||||
void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart); |
||||
void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart); |
||||
void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart); |
||||
void HAL_USART_AbortCpltCallback (USART_HandleTypeDef *husart); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Peripheral Control functions ***********************************************/ |
||||
|
||||
/** @addtogroup USART_Exported_Functions_Group4 Peripheral State and Error functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Peripheral State and Error functions ***************************************/ |
||||
HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart); |
||||
uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_USART_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,297 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_usart_ex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of USART HAL Extended module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_USART_EX_H |
||||
#define __STM32L0xx_HAL_USART_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup USARTEx
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup USARTEx_Word_Length USARTEx Word Length
|
||||
* @{ |
||||
*/ |
||||
#define USART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long USART frame */ |
||||
#define USART_WORDLENGTH_8B ((uint32_t)0x00000000U) /*!< 8-bit long USART frame */ |
||||
#define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long USART frame */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
/** @defgroup USARTEx_Private_Macros USARTEx Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @brief Report the USART clock source.
|
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @param __CLOCKSOURCE__: output variable. |
||||
* @retval the USART clocking source, written in __CLOCKSOURCE__. |
||||
*/ |
||||
#if defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) |
||||
|
||||
#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
} while(0) |
||||
|
||||
#elif defined(STM32L071xx) || defined (STM32L081xx) || defined(STM32L072xx) || defined (STM32L082xx) || defined(STM32L073xx) || defined (STM32L083xx) |
||||
|
||||
#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART4) \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART5) \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
} \
|
||||
} while(0) |
||||
|
||||
#else |
||||
|
||||
#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
} while(0) |
||||
|
||||
#endif |
||||
|
||||
/** @brief Compute the USART mask to apply to retrieve the received data
|
||||
* according to the word length and to the parity bits activation. |
||||
* @note If PCE = 1, the parity bit is not included in the data extracted |
||||
* by the reception API(). |
||||
* This masking operation is not carried out in the case of |
||||
* DMA transfers. |
||||
* @param __HANDLE__: specifies the USART Handle. |
||||
* @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field. |
||||
*/ |
||||
#define USART_MASK_COMPUTATION(__HANDLE__) \ |
||||
do { \
|
||||
if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FF ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FF ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FF ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007F ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007F ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x003F ; \
|
||||
} \
|
||||
} \
|
||||
} while(0) |
||||
|
||||
|
||||
/**
|
||||
* @brief Ensure that USART frame length is valid. |
||||
* @param __LENGTH__: USART frame length.
|
||||
* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) |
||||
*/ |
||||
#define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \ |
||||
((__LENGTH__) == USART_WORDLENGTH_8B) || \
|
||||
((__LENGTH__) == USART_WORDLENGTH_9B)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_USART_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
@ -0,0 +1,283 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_hal_wwdg.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of WWDG HAL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_HAL_WWDG_H |
||||
#define __STM32L0xx_HAL_WWDG_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup WWDG
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup WWDG_Exported_Types WWDG Exported Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief WWDG Init structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Prescaler; /*!< Specifies the prescaler value of the WWDG.
|
||||
This parameter can be a value of @ref WWDG_Prescaler */ |
||||
|
||||
uint32_t Window; /*!< Specifies the WWDG window value to be compared to the downcounter.
|
||||
This parameter must be a number Min_Data = 0x40 and Max_Data = 0x7F */ |
||||
|
||||
uint32_t Counter; /*!< Specifies the WWDG free-running downcounter value.
|
||||
This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7F */ |
||||
|
||||
uint32_t EWIMode ; /*!< Specifies if WWDG Early Wakeup Interupt is enable or not.
|
||||
This parameter can be a value of @ref WWDG_EWI_Mode */ |
||||
|
||||
}WWDG_InitTypeDef; |
||||
|
||||
/**
|
||||
* @brief WWDG handle Structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
WWDG_TypeDef *Instance; /*!< Register base address */ |
||||
|
||||
WWDG_InitTypeDef Init; /*!< WWDG required parameters */ |
||||
|
||||
}WWDG_HandleTypeDef; |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup WWDG_Exported_Constants WWDG Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup WWDG_Interrupt_definition WWDG Interrupt definition
|
||||
* @{ |
||||
*/ |
||||
#define WWDG_IT_EWI WWDG_CFR_EWI /*!< Early wakeup interrupt */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup WWDG_Flag_definition WWDG Flag definition
|
||||
* @brief WWDG Flag definition |
||||
* @{ |
||||
*/ |
||||
#define WWDG_FLAG_EWIF WWDG_SR_EWIF /*!< Early wakeup interrupt flag */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup WWDG_Prescaler WWDG Prescaler
|
||||
* @{ |
||||
*/ |
||||
#define WWDG_PRESCALER_1 0x00000000U /*!< WWDG counter clock = (PCLK1/4096)/1 */ |
||||
#define WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */ |
||||
#define WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */ |
||||
#define WWDG_PRESCALER_8 WWDG_CFR_WDGTB /*!< WWDG counter clock = (PCLK1/4096)/8 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup WWDG_EWI_Mode WWDG Early Wakeup Interrupt Mode
|
||||
* @{ |
||||
*/ |
||||
#define WWDG_EWI_DISABLE 0x00000000U /*!< EWI Disable */ |
||||
#define WWDG_EWI_ENABLE WWDG_CFR_EWI /*!< EWI Enable */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup WWDG_Private_Macros WWDG Private Macros
|
||||
* @{ |
||||
*/ |
||||
#define IS_WWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == WWDG_PRESCALER_1) || \ |
||||
((__PRESCALER__) == WWDG_PRESCALER_2) || \
|
||||
((__PRESCALER__) == WWDG_PRESCALER_4) || \
|
||||
((__PRESCALER__) == WWDG_PRESCALER_8)) |
||||
|
||||
#define IS_WWDG_WINDOW(__WINDOW__) (((__WINDOW__) >= WWDG_CFR_W_6) && ((__WINDOW__) <= WWDG_CFR_W)) |
||||
|
||||
#define IS_WWDG_COUNTER(__COUNTER__) (((__COUNTER__) >= WWDG_CR_T_6) && ((__COUNTER__) <= WWDG_CR_T)) |
||||
|
||||
#define IS_WWDG_EWI_MODE(__MODE__) (((__MODE__) == WWDG_EWI_ENABLE) || \ |
||||
((__MODE__) == WWDG_EWI_DISABLE)) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Exported macros ------------------------------------------------------------*/ |
||||
|
||||
/** @defgroup WWDG_Exported_Macros WWDG Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable the WWDG peripheral. |
||||
* @param __HANDLE__ WWDG handle |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_WWDG_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, WWDG_CR_WDGA) |
||||
|
||||
/**
|
||||
* @brief Enable the WWDG early wakeup interrupt. |
||||
* @param __HANDLE__: WWDG handle |
||||
* @param __INTERRUPT__ specifies the interrupt to enable. |
||||
* This parameter can be one of the following values: |
||||
* @arg WWDG_IT_EWI: Early wakeup interrupt |
||||
* @note Once enabled this interrupt cannot be disabled except by a system reset. |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_WWDG_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFR, (__INTERRUPT__)) |
||||
|
||||
/**
|
||||
* @brief Check whether the selected WWDG interrupt has occurred or not. |
||||
* @param __HANDLE__ WWDG handle |
||||
* @param __INTERRUPT__ specifies the it to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt IT |
||||
* @retval The new state of WWDG_FLAG (SET or RESET). |
||||
*/ |
||||
#define __HAL_WWDG_GET_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_GET_FLAG((__HANDLE__),(__INTERRUPT__)) |
||||
|
||||
/** @brief Clear the WWDG interrupt pending bits.
|
||||
* bits to clear the selected interrupt pending bits. |
||||
* @param __HANDLE__ WWDG handle |
||||
* @param __INTERRUPT__ specifies the interrupt pending bit to clear. |
||||
* This parameter can be one of the following values: |
||||
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag |
||||
*/ |
||||
#define __HAL_WWDG_CLEAR_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_CLEAR_FLAG((__HANDLE__), (__INTERRUPT__)) |
||||
|
||||
/**
|
||||
* @brief Check whether the specified WWDG flag is set or not. |
||||
* @param __HANDLE__ WWDG handle |
||||
* @param __FLAG__ specifies the flag to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag |
||||
* @retval The new state of WWDG_FLAG (SET or RESET). |
||||
*/ |
||||
#define __HAL_WWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
||||
|
||||
/**
|
||||
* @brief Clear the WWDG's pending flags. |
||||
* @param __HANDLE__ WWDG handle |
||||
* @param __FLAG__ specifies the flag to clear. |
||||
* This parameter can be one of the following values: |
||||
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag |
||||
* @retval None |
||||
*/ |
||||
#define __HAL_WWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
||||
|
||||
/** @brief Check whether the specified WWDG interrupt source is enabled or not.
|
||||
* @param __HANDLE__ WWDG Handle. |
||||
* @param __INTERRUPT__ specifies the WWDG interrupt source to check. |
||||
* This parameter can be one of the following values: |
||||
* @arg WWDG_IT_EWI: Early Wakeup Interrupt |
||||
* @retval state of __INTERRUPT__ (TRUE or FALSE). |
||||
*/ |
||||
#define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR & (__INTERRUPT__)) == (__INTERRUPT__)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
|
||||
/** @addtogroup WWDG_Exported_Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup WWDG_Exported_Functions_Group1
|
||||
* @{ |
||||
*/ |
||||
/* Initialization/de-initialization functions **********************************/ |
||||
HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg); |
||||
void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup WWDG_Exported_Functions_Group2
|
||||
* @{ |
||||
*/ |
||||
/* I/O operation functions ******************************************************/ |
||||
HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg); |
||||
void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg); |
||||
void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef* hwwdg); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_HAL_WWDG_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,721 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_ll_comp.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of COMP LL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_LL_COMP_H |
||||
#define __STM32L0xx_LL_COMP_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx.h" |
||||
|
||||
/** @addtogroup STM32L0xx_LL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
#if defined (COMP1) || defined (COMP2) |
||||
|
||||
/** @defgroup COMP_LL COMP
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Private types -------------------------------------------------------------*/ |
||||
/* Private variables ---------------------------------------------------------*/ |
||||
/* Private constants ---------------------------------------------------------*/ |
||||
/** @defgroup COMP_LL_Private_Constants COMP Private Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* COMP registers bits positions */ |
||||
#define LL_COMP_OUTPUT_LEVEL_BITOFFSET_POS ((uint32_t)30U) /* Value equivalent to POSITION_VAL(COMP_CSR_COMP1VALUE) */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
/* Exported types ------------------------------------------------------------*/ |
||||
#if defined(USE_FULL_LL_DRIVER) |
||||
/** @defgroup COMP_LL_ES_INIT COMP Exported Init structure
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Structure definition of some features of COMP instance. |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t PowerMode; /*!< Set comparator operating mode to adjust power and speed.
|
||||
This parameter can be a value of @ref COMP_LL_EC_POWERMODE |
||||
|
||||
This feature can be modified afterwards using unitary function @ref LL_COMP_SetPowerMode(). */ |
||||
|
||||
uint32_t InputPlus; /*!< Set comparator input plus (non-inverting input).
|
||||
This parameter can be a value of @ref COMP_LL_EC_INPUT_PLUS |
||||
|
||||
This feature can be modified afterwards using unitary function @ref LL_COMP_SetInputPlus(). */ |
||||
|
||||
uint32_t InputMinus; /*!< Set comparator input minus (inverting input).
|
||||
This parameter can be a value of @ref COMP_LL_EC_INPUT_MINUS |
||||
|
||||
This feature can be modified afterwards using unitary function @ref LL_COMP_SetInputMinus(). */ |
||||
|
||||
uint32_t OutputPolarity; /*!< Set comparator output polarity.
|
||||
This parameter can be a value of @ref COMP_LL_EC_OUTPUT_POLARITY |
||||
|
||||
This feature can be modified afterwards using unitary function @ref LL_COMP_SetOutputPolarity(). */ |
||||
|
||||
} LL_COMP_InitTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* USE_FULL_LL_DRIVER */ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup COMP_LL_Exported_Constants COMP Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EC_COMMON_WINDOWMODE Comparator common modes - Window mode
|
||||
* @{ |
||||
*/ |
||||
#define LL_COMP_WINDOWMODE_DISABLE ((uint32_t)0x00000000U) /*!< Window mode disable: Comparators 1 and 2 are independent */ |
||||
#define LL_COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON (COMP_CSR_COMP1WM) /*!< Window mode enable: Comparators instances pair COMP1 and COMP2 have their input plus connected together. The common input is COMP1 input plus (COMP2 input plus is no more accessible). */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EC_POWERMODE Comparator modes - Power mode
|
||||
* @{ |
||||
*/ |
||||
#define LL_COMP_POWERMODE_ULTRALOWPOWER ((uint32_t)0x00000000U) /*!< COMP power mode to low speed (specific to COMP instance: COMP2) */ |
||||
#define LL_COMP_POWERMODE_MEDIUMSPEED (COMP_CSR_COMP2SPEED) /*!< COMP power mode to fast speed (specific to COMP instance: COMP2) */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EC_INPUT_PLUS Comparator inputs - Input plus (input non-inverting) selection
|
||||
* @{ |
||||
*/ |
||||
#define LL_COMP_INPUT_PLUS_IO1 ((uint32_t)0x00000000U) /*!< Comparator input plus connected to IO1 (pin PA1 for COMP1, pin PA3 for COMP2) */ |
||||
#define LL_COMP_INPUT_PLUS_IO2 (COMP_CSR_COMP2INPSEL_0) /*!< Comparator input plus connected to IO2 (pin PB4 for COMP2) (specific to COMP instance: COMP2) */ |
||||
#define LL_COMP_INPUT_PLUS_IO3 (COMP_CSR_COMP2INPSEL_1) /*!< Comparator input plus connected to IO3 (pin PA5 for COMP2) (specific to COMP instance: COMP2) */ |
||||
#define LL_COMP_INPUT_PLUS_IO4 (COMP_CSR_COMP2INPSEL_0 | COMP_CSR_COMP2INPSEL_1) /*!< Comparator input plus connected to IO4 (pin PB6 for COMP2) (specific to COMP instance: COMP2) */ |
||||
#define LL_COMP_INPUT_PLUS_IO5 (COMP_CSR_COMP2INPSEL_2) /*!< Comparator input plus connected to IO5 (pin PB7 for COMP2) (specific to COMP instance: COMP2) */ |
||||
#if defined (STM32L011xx) || defined (STM32L021xx) |
||||
#define LL_COMP_INPUT_PLUS_IO6 (COMP_CSR_COMP2INPSEL_2 | COMP_CSR_COMP2INPSEL_0) /*!< Comparator input plus connected to IO6 (pin PA7 for COMP2) (specific to COMP instance: COMP2) (Available only on devices STM32L0 category 1) */ |
||||
#endif |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EC_INPUT_MINUS Comparator inputs - Input minus (input inverting) selection
|
||||
* @{ |
||||
*/ |
||||
#define LL_COMP_INPUT_MINUS_1_4VREFINT (COMP_CSR_COMP2INNSEL_2 ) /*!< Comparator input minus connected to 1/4 VrefInt (specifity of COMP2 related to path to enable via SYSCFG: refer to comment in function @ref LL_COMP_SetInputMinus() ) (specific to COMP instance: COMP2) */ |
||||
#define LL_COMP_INPUT_MINUS_1_2VREFINT (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to 1/2 VrefInt (specifity of COMP2 related to path to enable via SYSCFG: refer to comment in function @ref LL_COMP_SetInputMinus() ) (specific to COMP instance: COMP2) */ |
||||
#define LL_COMP_INPUT_MINUS_3_4VREFINT (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_1 ) /*!< Comparator input minus connected to 3/4 VrefInt (specifity of COMP2 related to path to enable via SYSCFG: refer to comment in function @ref LL_COMP_SetInputMinus() ) (specific to COMP instance: COMP2) */ |
||||
#define LL_COMP_INPUT_MINUS_VREFINT ((uint32_t)0x00000000U) /*!< Comparator input minus connected to VrefInt (specifity of COMP2 related to path to enable via SYSCFG: refer to comment in function @ref LL_COMP_SetInputMinus() ) */ |
||||
#define LL_COMP_INPUT_MINUS_DAC1_CH1 ( COMP_CSR_COMP2INNSEL_1 ) /*!< Comparator input minus connected to DAC1 channel 1 (DAC_OUT1) */ |
||||
#define LL_COMP_INPUT_MINUS_DAC1_CH2 ( COMP_CSR_COMP2INNSEL_1 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to DAC1 channel 2 (DAC_OUT2) */ |
||||
#define LL_COMP_INPUT_MINUS_IO1 ( COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to IO1 (pin PA0 for COMP1, pin PA2 for COMP2) */ |
||||
#define LL_COMP_INPUT_MINUS_IO2 (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_1 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to IO2 (pin PB3 for COMP2) (specific to COMP instance: COMP2) */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EC_OUTPUT_SELECTION_LPTIM Comparator output - Output selection specific to LPTIM peripheral
|
||||
* @{ |
||||
*/ |
||||
#define LL_COMP_OUTPUT_LPTIM1_IN1_COMP1 (COMP_CSR_COMP1LPTIM1IN1) /*!< COMP output connected to TIM2 input capture 4 */ |
||||
#define LL_COMP_OUTPUT_LPTIM1_IN1_COMP2 (COMP_CSR_COMP2LPTIM1IN1) /*!< COMP output connected to TIM2 input capture 4 */ |
||||
#define LL_COMP_OUTPUT_LPTIM1_IN2_COMP2 (COMP_CSR_COMP2LPTIM1IN2) /*!< COMP output connected to TIM2 input capture 4 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EC_OUTPUT_POLARITY Comparator output - Output polarity
|
||||
* @{ |
||||
*/ |
||||
#define LL_COMP_OUTPUTPOL_NONINVERTED ((uint32_t)0x00000000U) /*!< COMP output polarity is not inverted: comparator output is high when the plus (non-inverting) input is at a higher voltage than the minus (inverting) input */ |
||||
#define LL_COMP_OUTPUTPOL_INVERTED (COMP_CSR_COMP1POLARITY) /*!< COMP output polarity is inverted: comparator output is low when the plus (non-inverting) input is at a lower voltage than the minus (inverting) input */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EC_OUTPUT_LEVEL Comparator output - Output level
|
||||
* @{ |
||||
*/ |
||||
#define LL_COMP_OUTPUT_LEVEL_LOW ((uint32_t)0x00000000U) /*!< Comparator output level low (if the polarity is not inverted, otherwise to be complemented) */ |
||||
#define LL_COMP_OUTPUT_LEVEL_HIGH ((uint32_t)0x00000001U) /*!< Comparator output level high (if the polarity is not inverted, otherwise to be complemented) */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EC_HW_DELAYS Definitions of COMP hardware constraints delays
|
||||
* @note Only COMP IP HW delays are defined in COMP LL driver driver, |
||||
* not timeout values. |
||||
* For details on delays values, refer to descriptions in source code |
||||
* above each literal definition. |
||||
* @{ |
||||
*/ |
||||
|
||||
/* Delay for comparator startup time. */ |
||||
/* Note: Delay required to reach propagation delay specification. */ |
||||
/* Literal set to maximum value (refer to device datasheet, */ |
||||
/* parameter "tSTART"). */ |
||||
/* Unit: us */ |
||||
#define LL_COMP_DELAY_STARTUP_US ((uint32_t) 25U) /*!< Delay for COMP startup time */ |
||||
|
||||
/* Delay for comparator voltage scaler stabilization time */ |
||||
/* (voltage from VrefInt, delay based on VrefInt startup time). */ |
||||
/* Literal set to maximum value (refer to device datasheet, */ |
||||
/* parameter "TVREFINT"). */ |
||||
/* Unit: us */ |
||||
#define LL_COMP_DELAY_VOLTAGE_SCALER_STAB_US ((uint32_t)3000U) /*!< Delay for COMP voltage scaler stabilization time */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
/** @defgroup COMP_LL_Exported_Macros COMP Exported Macros
|
||||
* @{ |
||||
*/ |
||||
/** @defgroup COMP_LL_EM_WRITE_READ Common write and read registers macro
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Write a value in COMP register |
||||
* @param __INSTANCE__ comparator instance |
||||
* @param __REG__ Register to be written |
||||
* @param __VALUE__ Value to be written in the register |
||||
* @retval None |
||||
*/ |
||||
#define LL_COMP_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
||||
|
||||
/**
|
||||
* @brief Read a value in COMP register |
||||
* @param __INSTANCE__ comparator instance |
||||
* @param __REG__ Register to be read |
||||
* @retval Register value |
||||
*/ |
||||
#define LL_COMP_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EM_HELPER_MACRO COMP helper macro
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Helper macro to select the COMP common instance |
||||
* to which is belonging the selected COMP instance. |
||||
* @note COMP common register instance can be used to |
||||
* set parameters common to several COMP instances. |
||||
* Refer to functions having argument "COMPxy_COMMON" as parameter. |
||||
* @param __COMPx__ COMP instance |
||||
* @retval COMP common instance or value "0" if there is no COMP common instance. |
||||
*/ |
||||
#define __LL_COMP_COMMON_INSTANCE(__COMPx__) \ |
||||
(COMP12_COMMON) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup COMP_LL_Exported_Functions COMP Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EF_Configuration_comparator_common Configuration of COMP hierarchical scope: common to several COMP instances
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Set window mode of a pair of comparators instances |
||||
* (2 consecutive COMP instances odd and even COMP<x> and COMP<x+1>). |
||||
* @rmtoll COMP1_CSR COMP1WM LL_COMP_SetCommonWindowMode |
||||
* @param COMPxy_COMMON Comparator common instance |
||||
* (can be set directly from CMSIS definition or by using helper macro @ref __LL_COMP_COMMON_INSTANCE() ) |
||||
* @param WindowMode This parameter can be one of the following values: |
||||
* @arg @ref LL_COMP_WINDOWMODE_DISABLE |
||||
* @arg @ref LL_COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_COMP_SetCommonWindowMode(COMP_Common_TypeDef *COMPxy_COMMON, uint32_t WindowMode) |
||||
{ |
||||
MODIFY_REG(COMPxy_COMMON->CSR, COMP_CSR_COMP1WM, WindowMode); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get window mode of a pair of comparators instances |
||||
* (2 consecutive COMP instances odd and even COMP<x> and COMP<x+1>). |
||||
* @rmtoll COMP1_CSR COMP1WM LL_COMP_GetCommonWindowMode |
||||
* @param COMPxy_COMMON Comparator common instance |
||||
* (can be set directly from CMSIS definition or by using helper macro @ref __LL_COMP_COMMON_INSTANCE() ) |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_COMP_WINDOWMODE_DISABLE |
||||
* @arg @ref LL_COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_COMP_GetCommonWindowMode(COMP_Common_TypeDef *COMPxy_COMMON) |
||||
{ |
||||
return (uint32_t)(READ_BIT(COMPxy_COMMON->CSR, COMP_CSR_COMP1WM)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EF_Configuration_comparator_modes Configuration of comparator modes
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Set comparator instance operating mode to adjust power and speed. |
||||
* @rmtoll COMP2_CSR COMP2SPEED LL_COMP_SetPowerMode |
||||
* @param COMPx Comparator instance |
||||
* @param PowerMode This parameter can be one of the following values: |
||||
* @arg @ref LL_COMP_POWERMODE_MEDIUMSPEED (1) |
||||
* @arg @ref LL_COMP_POWERMODE_ULTRALOWPOWER (1) |
||||
*
|
||||
* (1) Available only on COMP instance: COMP2. |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_COMP_SetPowerMode(COMP_TypeDef *COMPx, uint32_t PowerMode) |
||||
{ |
||||
MODIFY_REG(COMPx->CSR, COMP_CSR_COMP2SPEED, PowerMode); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get comparator instance operating mode to adjust power and speed. |
||||
* @note Available only on COMP instance: COMP2. |
||||
* @rmtoll COMP2_CSR COMP2SPEED LL_COMP_GetPowerMode\n |
||||
* @param COMPx Comparator instance |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_COMP_POWERMODE_MEDIUMSPEED (1) |
||||
* @arg @ref LL_COMP_POWERMODE_ULTRALOWPOWER (1) |
||||
*
|
||||
* (1) Available only on COMP instance: COMP2. |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_COMP_GetPowerMode(COMP_TypeDef *COMPx) |
||||
{ |
||||
return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMP2SPEED)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EF_Configuration_comparator_inputs Configuration of comparator inputs
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Set comparator inputs minus (inverting) and plus (non-inverting). |
||||
* @note This function shall only be used for COMP2. |
||||
* For setting COMP1 input it is recommended to use LL_COMP_SetInputMinus() |
||||
* Plus (non-inverting) input is not configurable on COMP1. |
||||
* Using this function for COMP1 will corrupt COMP1WM register |
||||
* @note On this STM32 serie, specificity if using COMP instance COMP2 |
||||
* with COMP input based on VrefInt (VrefInt or subdivision |
||||
* of VrefInt): scaler bridge is based on VrefInt and requires |
||||
* to enable path from VrefInt (refer to literal |
||||
* SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP). |
||||
* @rmtoll COMP2_CSR COMP2INNSEL LL_COMP_ConfigInputs\n |
||||
* COMP2_CSR COMP2INPSEL LL_COMP_ConfigInputs |
||||
* @param COMPx Comparator instance |
||||
* @param InputMinus This parameter can be one of the following values: |
||||
* @arg @ref LL_COMP_INPUT_MINUS_VREFINT |
||||
* @arg @ref LL_COMP_INPUT_MINUS_IO1 |
||||
* @arg @ref LL_COMP_INPUT_MINUS_DAC1_CH1 |
||||
* @arg @ref LL_COMP_INPUT_MINUS_DAC1_CH2 |
||||
* @arg @ref LL_COMP_INPUT_MINUS_1_4VREFINT |
||||
* @arg @ref LL_COMP_INPUT_MINUS_1_2VREFINT |
||||
* @arg @ref LL_COMP_INPUT_MINUS_3_4VREFINT |
||||
* @arg @ref LL_COMP_INPUT_MINUS_IO2 |
||||
* @param InputPlus This parameter can be one of the following values: |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO1 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO2 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO3 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO4 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO5 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO6 (1)(2) |
||||
* |
||||
* (1) Available only on COMP instance: COMP2. |
||||
* (2) Available only on devices STM32L0 category 1. |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_COMP_ConfigInputs(COMP_TypeDef *COMPx, uint32_t InputMinus, uint32_t InputPlus) |
||||
{ |
||||
MODIFY_REG(COMPx->CSR, |
||||
COMP_CSR_COMP2INNSEL | COMP_CSR_COMP2INPSEL, |
||||
InputMinus | InputPlus); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set comparator input plus (non-inverting). |
||||
* @note Only COMP2 allows to set the input plus (non-inverting). |
||||
* For COMP1 it is always PA1 IO, except when Windows Mode is selected. |
||||
* @rmtoll COMP2_CSR COMP2INPSEL LL_COMP_SetInputPlus |
||||
* @param COMPx Comparator instance |
||||
* @param InputPlus This parameter can be one of the following values: |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO1 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO2 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO3 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO4 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO5 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO6 (1)(2) |
||||
* |
||||
* (1) Available only on COMP instance: COMP2. |
||||
* (2) Available only on devices STM32L0 category 1. |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_COMP_SetInputPlus(COMP_TypeDef *COMPx, uint32_t InputPlus) |
||||
{ |
||||
MODIFY_REG(COMPx->CSR, COMP_CSR_COMP2INPSEL, InputPlus); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get comparator input plus (non-inverting). |
||||
* @note Only COMP2 allows to set the input plus (non-inverting). |
||||
* For COMP1 it is always PA1 IO, except when Windows Mode is selected. |
||||
* @rmtoll COMP2_CSR COMP2INPSEL LL_COMP_GetInputPlus |
||||
* @param COMPx Comparator instance |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO1 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO2 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO3 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO4 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO5 (1) |
||||
* @arg @ref LL_COMP_INPUT_PLUS_IO6 (1)(2) |
||||
* |
||||
* (1) Available only on COMP instance: COMP2. |
||||
* (2) Available only on devices STM32L0 category 1. |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_COMP_GetInputPlus(COMP_TypeDef *COMPx) |
||||
{ |
||||
return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMP2INPSEL)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set comparator input minus (inverting). |
||||
* @note In case of comparator input selected to be connected to IO: |
||||
* GPIO pins are specific to each comparator instance. |
||||
* Refer to description of parameters or to reference manual. |
||||
* @note On this STM32 serie, specificity if using COMP instance COMP2 |
||||
* with COMP input based on VrefInt (VrefInt or subdivision |
||||
* of VrefInt): scaler bridge is based on VrefInt and requires |
||||
* to enable path from VrefInt (refer to literal |
||||
* SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP). |
||||
* @rmtoll COMP1_CSR COMP1INNSEL LL_COMP_SetInputMinus\n |
||||
* COMP2_CSR COMP2INNSEL LL_COMP_SetInputMinus |
||||
* @param COMPx Comparator instance |
||||
* @param InputMinus This parameter can be one of the following values: |
||||
* @arg @ref LL_COMP_INPUT_MINUS_VREFINT |
||||
* @arg @ref LL_COMP_INPUT_MINUS_IO1 |
||||
* @arg @ref LL_COMP_INPUT_MINUS_DAC1_CH1 |
||||
* @arg @ref LL_COMP_INPUT_MINUS_DAC1_CH2 |
||||
* @arg @ref LL_COMP_INPUT_MINUS_1_4VREFINT (*) |
||||
* @arg @ref LL_COMP_INPUT_MINUS_1_2VREFINT (*) |
||||
* @arg @ref LL_COMP_INPUT_MINUS_3_4VREFINT (*) |
||||
* @arg @ref LL_COMP_INPUT_MINUS_IO2 (*) |
||||
*
|
||||
* (*) Available only on COMP instance: COMP2. |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_COMP_SetInputMinus(COMP_TypeDef *COMPx, uint32_t InputMinus) |
||||
{ |
||||
MODIFY_REG(COMPx->CSR, COMP_CSR_COMP2INNSEL, InputMinus); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get comparator input minus (inverting). |
||||
* @note In case of comparator input selected to be connected to IO: |
||||
* GPIO pins are specific to each comparator instance. |
||||
* Refer to description of parameters or to reference manual. |
||||
* @rmtoll COMP1_CSR COMP1INNSEL LL_COMP_GetInputMinus\n |
||||
* COMP2_CSR COMP2INNSEL LL_COMP_GetInputMinus |
||||
* @param COMPx Comparator instance |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_COMP_INPUT_MINUS_VREFINT |
||||
* @arg @ref LL_COMP_INPUT_MINUS_IO1 |
||||
* @arg @ref LL_COMP_INPUT_MINUS_DAC1_CH1 |
||||
* @arg @ref LL_COMP_INPUT_MINUS_DAC1_CH2 |
||||
* @arg @ref LL_COMP_INPUT_MINUS_1_4VREFINT (*) |
||||
* @arg @ref LL_COMP_INPUT_MINUS_1_2VREFINT (*) |
||||
* @arg @ref LL_COMP_INPUT_MINUS_3_4VREFINT (*) |
||||
* @arg @ref LL_COMP_INPUT_MINUS_IO2 (*) |
||||
*
|
||||
* (*) Available only on COMP instance: COMP2. |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_COMP_GetInputMinus(COMP_TypeDef *COMPx) |
||||
{ |
||||
return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMP2INNSEL)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EF_Configuration_comparator_output Configuration of comparator output
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Set comparator output LPTIM. |
||||
* @rmtoll COMP1_CSR COMP1LPTIMIN1 LL_COMP_SetOutputLPTIM\n |
||||
* COMP2_CSR COMP2LPTIMIN1 LL_COMP_SetOutputLPTIM\n |
||||
* COMP2_CSR COMP2LPTIMIN2 LL_COMP_SetOutputLPTIM |
||||
* @param COMPx Comparator instance |
||||
* @param OutputLptim This parameter can be one of the following values: |
||||
* @arg @ref LL_COMP_OUTPUT_LPTIM1_IN1_COMP1 (*) |
||||
* @arg @ref LL_COMP_OUTPUT_LPTIM1_IN1_COMP2 (**) |
||||
* @arg @ref LL_COMP_OUTPUT_LPTIM1_IN2_COMP2 (**) |
||||
*
|
||||
* (*) Available only on COMP instance: COMP1.\n |
||||
* (**) Available only on COMP instance: COMP2. |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_COMP_SetOutputLPTIM(COMP_TypeDef *COMPx, uint32_t OutputLptim) |
||||
{ |
||||
MODIFY_REG(COMPx->CSR, (COMP_CSR_COMP1LPTIM1IN1 | COMP_CSR_COMP2LPTIM1IN1 | COMP_CSR_COMP2LPTIM1IN2), OutputLptim); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get comparator output LPTIM. |
||||
* @rmtoll COMP1_CSR COMP1LPTIMIN1 LL_COMP_GetOutputLPTIM\n |
||||
* COMP2_CSR COMP2LPTIMIN1 LL_COMP_GetOutputLPTIM\n |
||||
* COMP2_CSR COMP2LPTIMIN2 LL_COMP_GetOutputLPTIM |
||||
* @param COMPx Comparator instance |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_COMP_OUTPUT_LPTIM1_IN1_COMP1 (*) |
||||
* @arg @ref LL_COMP_OUTPUT_LPTIM1_IN1_COMP2 (**) |
||||
* @arg @ref LL_COMP_OUTPUT_LPTIM1_IN2_COMP2 (**) |
||||
*
|
||||
* (*) Available only on COMP instance: COMP1.\n |
||||
* (**) Available only on COMP instance: COMP2. |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_COMP_GetOutputLPTIM(COMP_TypeDef *COMPx) |
||||
{ |
||||
return (uint32_t)(READ_BIT(COMPx->CSR, (COMP_CSR_COMP1LPTIM1IN1 | COMP_CSR_COMP2LPTIM1IN1 | COMP_CSR_COMP2LPTIM1IN2))); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set comparator instance output polarity. |
||||
* @rmtoll COMP COMP1POLARITY LL_COMP_SetOutputPolarity |
||||
* @param COMPx Comparator instance |
||||
* @param OutputPolarity This parameter can be one of the following values: |
||||
* @arg @ref LL_COMP_OUTPUTPOL_NONINVERTED |
||||
* @arg @ref LL_COMP_OUTPUTPOL_INVERTED |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_COMP_SetOutputPolarity(COMP_TypeDef *COMPx, uint32_t OutputPolarity) |
||||
{ |
||||
MODIFY_REG(COMPx->CSR, COMP_CSR_COMPxPOLARITY, OutputPolarity); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get comparator instance output polarity. |
||||
* @rmtoll COMP COMP1POLARITY LL_COMP_GetOutputPolarity |
||||
* @param COMPx Comparator instance |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_COMP_OUTPUTPOL_NONINVERTED |
||||
* @arg @ref LL_COMP_OUTPUTPOL_INVERTED |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_COMP_GetOutputPolarity(COMP_TypeDef *COMPx) |
||||
{ |
||||
return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMPxPOLARITY)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup COMP_LL_EF_Operation Operation on comparator instance
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable comparator instance. |
||||
* @note After enable from off state, comparator requires a delay |
||||
* to reach reach propagation delay specification. |
||||
* Refer to device datasheet, parameter "tSTART". |
||||
* @rmtoll COMP1_CSR COMP1EN LL_COMP_Enable\n |
||||
* COMP2_CSR COMP2EN LL_COMP_Enable |
||||
* @param COMPx Comparator instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_COMP_Enable(COMP_TypeDef *COMPx) |
||||
{ |
||||
SET_BIT(COMPx->CSR, COMP_CSR_COMPxEN); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable comparator instance. |
||||
* @rmtoll COMP1_CSR COMP1EN LL_COMP_Disable\n |
||||
* COMP2_CSR COMP2EN LL_COMP_Disable |
||||
* @param COMPx Comparator instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_COMP_Disable(COMP_TypeDef *COMPx) |
||||
{ |
||||
CLEAR_BIT(COMPx->CSR, COMP_CSR_COMPxEN); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get comparator enable state |
||||
* (0: COMP is disabled, 1: COMP is enabled) |
||||
* @rmtoll COMP1_CSR COMP1EN LL_COMP_IsEnabled\n |
||||
* COMP2_CSR COMP2EN LL_COMP_IsEnabled |
||||
* @param COMPx Comparator instance |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_COMP_IsEnabled(COMP_TypeDef *COMPx) |
||||
{ |
||||
return (READ_BIT(COMPx->CSR, COMP_CSR_COMPxEN) == (COMP_CSR_COMPxEN)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Lock comparator instance. |
||||
* @note Once locked, comparator configuration can be accessed in read-only. |
||||
* @note The only way to unlock the comparator is a device hardware reset. |
||||
* @rmtoll COMP1_CSR COMP1LOCK LL_COMP_Lock\n |
||||
* COMP2_CSR COMP2LOCK LL_COMP_Lock |
||||
* @param COMPx Comparator instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_COMP_Lock(COMP_TypeDef *COMPx) |
||||
{ |
||||
SET_BIT(COMPx->CSR, COMP_CSR_COMPxLOCK); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get comparator lock state |
||||
* (0: COMP is unlocked, 1: COMP is locked). |
||||
* @note Once locked, comparator configuration can be accessed in read-only. |
||||
* @note The only way to unlock the comparator is a device hardware reset. |
||||
* @rmtoll COMP1_CSR COMP1LOCK LL_COMP_IsLocked\n |
||||
* COMP2_CSR COMP2LOCK LL_COMP_IsLocked |
||||
* @param COMPx Comparator instance |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_COMP_IsLocked(COMP_TypeDef *COMPx) |
||||
{ |
||||
return (READ_BIT(COMPx->CSR, COMP_CSR_COMPxLOCK) == (COMP_CSR_COMPxLOCK)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Read comparator instance output level. |
||||
* @note The comparator output level depends on the selected polarity |
||||
* (Refer to function @ref LL_COMP_SetOutputPolarity()). |
||||
* If the comparator polarity is not inverted: |
||||
* - Comparator output is low when the input plus |
||||
* is at a lower voltage than the input minus |
||||
* - Comparator output is high when the input plus |
||||
* is at a higher voltage than the input minus |
||||
* If the comparator polarity is inverted: |
||||
* - Comparator output is high when the input plus |
||||
* is at a lower voltage than the input minus |
||||
* - Comparator output is low when the input plus |
||||
* is at a higher voltage than the input minus |
||||
* @rmtoll COMP1_CSR COMP1VALUE LL_COMP_ReadOutputLevel\n |
||||
* COMP2_CSR COMP2VALUE LL_COMP_ReadOutputLevel |
||||
* @param COMPx Comparator instance |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_COMP_OUTPUT_LEVEL_LOW |
||||
* @arg @ref LL_COMP_OUTPUT_LEVEL_HIGH |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_COMP_ReadOutputLevel(COMP_TypeDef *COMPx) |
||||
{ |
||||
return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMPxOUTVALUE) |
||||
>> LL_COMP_OUTPUT_LEVEL_BITOFFSET_POS); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#if defined(USE_FULL_LL_DRIVER) |
||||
/** @defgroup COMP_LL_EF_Init Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
ErrorStatus LL_COMP_DeInit(COMP_TypeDef *COMPx); |
||||
ErrorStatus LL_COMP_Init(COMP_TypeDef *COMPx, LL_COMP_InitTypeDef *COMP_InitStruct); |
||||
void LL_COMP_StructInit(LL_COMP_InitTypeDef *COMP_InitStruct); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* USE_FULL_LL_DRIVER */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* COMP1 || COMP2 */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_LL_COMP_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,606 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_ll_cortex.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of CORTEX LL module. |
||||
@verbatim |
||||
============================================================================== |
||||
##### How to use this driver ##### |
||||
============================================================================== |
||||
[..] |
||||
The LL CORTEX driver contains a set of generic APIs that can be |
||||
used by user: |
||||
(+) SYSTICK configuration used by @ref LL_mDelay and @ref LL_Init1msTick |
||||
functions |
||||
(+) Low power mode configuration (SCB register of Cortex-MCU) |
||||
(+) MPU API to configure and enable regions |
||||
(+) API to access to MCU info (CPUID register) |
||||
|
||||
@endverbatim |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_LL_CORTEX_H |
||||
#define __STM32L0xx_LL_CORTEX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx.h" |
||||
|
||||
/** @addtogroup STM32L0xx_LL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL CORTEX
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Private types -------------------------------------------------------------*/ |
||||
/* Private variables ---------------------------------------------------------*/ |
||||
|
||||
/* Private constants ---------------------------------------------------------*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup CORTEX_LL_Exported_Constants CORTEX Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL_EC_CLKSOURCE_HCLK SYSTICK Clock Source
|
||||
* @{ |
||||
*/ |
||||
#define LL_SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000U) /*!< AHB clock divided by 8 selected as SysTick clock source.*/ |
||||
#define LL_SYSTICK_CLKSOURCE_HCLK ((uint32_t)SysTick_CTRL_CLKSOURCE_Msk) /*!< AHB clock selected as SysTick clock source. */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#if __MPU_PRESENT |
||||
|
||||
/** @defgroup CORTEX_LL_EC_CTRL_HFNMI_PRIVDEF MPU Control
|
||||
* @{ |
||||
*/ |
||||
#define LL_MPU_CTRL_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000U) /*!< Disable NMI and privileged SW access */ |
||||
#define LL_MPU_CTRL_HARDFAULT_NMI MPU_CTRL_HFNMIENA_Msk /*!< Enables the operation of MPU during hard fault, NMI, and FAULTMASK handlers */ |
||||
#define LL_MPU_CTRL_PRIVILEGED_DEFAULT MPU_CTRL_PRIVDEFENA_Msk /*!< Enable privileged software access to default memory map */ |
||||
#define LL_MPU_CTRL_HFNMI_PRIVDEF (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk) /*!< Enable NMI and privileged SW access */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL_EC_REGION MPU Region Number
|
||||
* @{ |
||||
*/ |
||||
#define LL_MPU_REGION_NUMBER0 ((uint32_t)0x00U) /*!< REGION Number 0 */ |
||||
#define LL_MPU_REGION_NUMBER1 ((uint32_t)0x01U) /*!< REGION Number 1 */ |
||||
#define LL_MPU_REGION_NUMBER2 ((uint32_t)0x02U) /*!< REGION Number 2 */ |
||||
#define LL_MPU_REGION_NUMBER3 ((uint32_t)0x03U) /*!< REGION Number 3 */ |
||||
#define LL_MPU_REGION_NUMBER4 ((uint32_t)0x04U) /*!< REGION Number 4 */ |
||||
#define LL_MPU_REGION_NUMBER5 ((uint32_t)0x05U) /*!< REGION Number 5 */ |
||||
#define LL_MPU_REGION_NUMBER6 ((uint32_t)0x06U) /*!< REGION Number 6 */ |
||||
#define LL_MPU_REGION_NUMBER7 ((uint32_t)0x07U) /*!< REGION Number 7 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL_EC_REGION_SIZE MPU Region Size
|
||||
* @{ |
||||
*/ |
||||
#define LL_MPU_REGION_SIZE_32B ((uint32_t)(0x04U << MPU_RASR_SIZE_Pos)) /*!< 32B Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_64B ((uint32_t)(0x05U << MPU_RASR_SIZE_Pos)) /*!< 64B Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_128B ((uint32_t)(0x06U << MPU_RASR_SIZE_Pos)) /*!< 128B Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_256B ((uint32_t)(0x07U << MPU_RASR_SIZE_Pos)) /*!< 256B Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_512B ((uint32_t)(0x08U << MPU_RASR_SIZE_Pos)) /*!< 512B Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_1KB ((uint32_t)(0x09U << MPU_RASR_SIZE_Pos)) /*!< 1KB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_2KB ((uint32_t)(0x0AU << MPU_RASR_SIZE_Pos)) /*!< 2KB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_4KB ((uint32_t)(0x0BU << MPU_RASR_SIZE_Pos)) /*!< 4KB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_8KB ((uint32_t)(0x0CU << MPU_RASR_SIZE_Pos)) /*!< 8KB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_16KB ((uint32_t)(0x0DU << MPU_RASR_SIZE_Pos)) /*!< 16KB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_32KB ((uint32_t)(0x0EU << MPU_RASR_SIZE_Pos)) /*!< 32KB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_64KB ((uint32_t)(0x0FU << MPU_RASR_SIZE_Pos)) /*!< 64KB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_128KB ((uint32_t)(0x10U << MPU_RASR_SIZE_Pos)) /*!< 128KB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_256KB ((uint32_t)(0x11U << MPU_RASR_SIZE_Pos)) /*!< 256KB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_512KB ((uint32_t)(0x12U << MPU_RASR_SIZE_Pos)) /*!< 512KB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_1MB ((uint32_t)(0x13U << MPU_RASR_SIZE_Pos)) /*!< 1MB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_2MB ((uint32_t)(0x14U << MPU_RASR_SIZE_Pos)) /*!< 2MB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_4MB ((uint32_t)(0x15U << MPU_RASR_SIZE_Pos)) /*!< 4MB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_8MB ((uint32_t)(0x16U << MPU_RASR_SIZE_Pos)) /*!< 8MB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_16MB ((uint32_t)(0x17U << MPU_RASR_SIZE_Pos)) /*!< 16MB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_32MB ((uint32_t)(0x18U << MPU_RASR_SIZE_Pos)) /*!< 32MB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_64MB ((uint32_t)(0x19U << MPU_RASR_SIZE_Pos)) /*!< 64MB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_128MB ((uint32_t)(0x1AU << MPU_RASR_SIZE_Pos)) /*!< 128MB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_256MB ((uint32_t)(0x1BU << MPU_RASR_SIZE_Pos)) /*!< 256MB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_512MB ((uint32_t)(0x1CU << MPU_RASR_SIZE_Pos)) /*!< 512MB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_1GB ((uint32_t)(0x1DU << MPU_RASR_SIZE_Pos)) /*!< 1GB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_2GB ((uint32_t)(0x1EU << MPU_RASR_SIZE_Pos)) /*!< 2GB Size of the MPU protection region */ |
||||
#define LL_MPU_REGION_SIZE_4GB ((uint32_t)(0x1FU << MPU_RASR_SIZE_Pos)) /*!< 4GB Size of the MPU protection region */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL_EC_REGION_PRIVILEDGES MPU Region Privileges
|
||||
* @{ |
||||
*/ |
||||
#define LL_MPU_REGION_NO_ACCESS ((uint32_t)(0x00U << MPU_RASR_AP_Pos)) /*!< No access*/ |
||||
#define LL_MPU_REGION_PRIV_RW ((uint32_t)(0x01U << MPU_RASR_AP_Pos)) /*!< RW privileged (privileged access only)*/ |
||||
#define LL_MPU_REGION_PRIV_RW_URO ((uint32_t)(0x02U << MPU_RASR_AP_Pos)) /*!< RW privileged - RO user (Write in a user program generates a fault) */ |
||||
#define LL_MPU_REGION_FULL_ACCESS ((uint32_t)(0x03U << MPU_RASR_AP_Pos)) /*!< RW privileged & user (Full access) */ |
||||
#define LL_MPU_REGION_PRIV_RO ((uint32_t)(0x05U << MPU_RASR_AP_Pos)) /*!< RO privileged (privileged read only)*/ |
||||
#define LL_MPU_REGION_PRIV_RO_URO ((uint32_t)(0x06U << MPU_RASR_AP_Pos)) /*!< RO privileged & user (read only) */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL_EC_TEX MPU TEX Level
|
||||
* @{ |
||||
*/ |
||||
#define LL_MPU_TEX_LEVEL0 ((uint32_t)(0x00U << MPU_RASR_TEX_Pos)) /*!< b000 for TEX bits */ |
||||
#define LL_MPU_TEX_LEVEL1 ((uint32_t)(0x01U << MPU_RASR_TEX_Pos)) /*!< b001 for TEX bits */ |
||||
#define LL_MPU_TEX_LEVEL2 ((uint32_t)(0x02U << MPU_RASR_TEX_Pos)) /*!< b010 for TEX bits */ |
||||
#define LL_MPU_TEX_LEVEL4 ((uint32_t)(0x04U << MPU_RASR_TEX_Pos)) /*!< b100 for TEX bits */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL_EC_INSTRUCTION_ACCESS MPU Instruction Access
|
||||
* @{ |
||||
*/ |
||||
#define LL_MPU_INSTRUCTION_ACCESS_ENABLE ((uint32_t)0x00U) /*!< Instruction fetches enabled */ |
||||
#define LL_MPU_INSTRUCTION_ACCESS_DISABLE MPU_RASR_XN_Msk /*!< Instruction fetches disabled*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL_EC_SHAREABLE_ACCESS MPU Shareable Access
|
||||
* @{ |
||||
*/ |
||||
#define LL_MPU_ACCESS_SHAREABLE MPU_RASR_S_Msk /*!< Shareable memory attribute */ |
||||
#define LL_MPU_ACCESS_NOT_SHAREABLE ((uint32_t)0x00U) /*!< Not Shareable memory attribute */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL_EC_CACHEABLE_ACCESS MPU Cacheable Access
|
||||
* @{ |
||||
*/ |
||||
#define LL_MPU_ACCESS_CACHEABLE MPU_RASR_C_Msk /*!< Cacheable memory attribute */ |
||||
#define LL_MPU_ACCESS_NOT_CACHEABLE ((uint32_t)0x00U) /*!< Not Cacheable memory attribute */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL_EC_BUFFERABLE_ACCESS MPU Bufferable Access
|
||||
* @{ |
||||
*/ |
||||
#define LL_MPU_ACCESS_BUFFERABLE MPU_RASR_B_Msk /*!< Bufferable memory attribute */ |
||||
#define LL_MPU_ACCESS_NOT_BUFFERABLE ((uint32_t)0x00U) /*!< Not Bufferable memory attribute */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* __MPU_PRESENT */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup CORTEX_LL_Exported_Functions CORTEX Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL_EF_SYSTICK SYSTICK
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief This function checks if the Systick counter flag is active or not. |
||||
* @note It can be used in timeout function on application side. |
||||
* @rmtoll STK_CTRL COUNTFLAG LL_SYSTICK_IsActiveCounterFlag |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_SYSTICK_IsActiveCounterFlag(void) |
||||
{ |
||||
return ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == (SysTick_CTRL_COUNTFLAG_Msk)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configures the SysTick clock source |
||||
* @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_SetClkSource |
||||
* @param Source This parameter can be one of the following values: |
||||
* @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8 |
||||
* @arg @ref LL_SYSTICK_CLKSOURCE_HCLK |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_SYSTICK_SetClkSource(uint32_t Source) |
||||
{ |
||||
if (Source == LL_SYSTICK_CLKSOURCE_HCLK) |
||||
{ |
||||
SET_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); |
||||
} |
||||
else |
||||
{ |
||||
CLEAR_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get the SysTick clock source |
||||
* @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_GetClkSource |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8 |
||||
* @arg @ref LL_SYSTICK_CLKSOURCE_HCLK |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_SYSTICK_GetClkSource(void) |
||||
{ |
||||
return READ_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable SysTick exception request |
||||
* @rmtoll STK_CTRL TICKINT LL_SYSTICK_EnableIT |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_SYSTICK_EnableIT(void) |
||||
{ |
||||
SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable SysTick exception request |
||||
* @rmtoll STK_CTRL TICKINT LL_SYSTICK_DisableIT |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_SYSTICK_DisableIT(void) |
||||
{ |
||||
CLEAR_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Checks if the SYSTICK interrupt is enabled or disabled. |
||||
* @rmtoll STK_CTRL TICKINT LL_SYSTICK_IsEnabledIT |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_SYSTICK_IsEnabledIT(void) |
||||
{ |
||||
return (READ_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk) == (SysTick_CTRL_TICKINT_Msk)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL_EF_LOW_POWER_MODE LOW POWER MODE
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Processor uses sleep as its low power mode |
||||
* @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_LPM_EnableSleep(void) |
||||
{ |
||||
/* Clear SLEEPDEEP bit of Cortex System Control Register */ |
||||
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Processor uses deep sleep as its low power mode |
||||
* @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableDeepSleep |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_LPM_EnableDeepSleep(void) |
||||
{ |
||||
/* Set SLEEPDEEP bit of Cortex System Control Register */ |
||||
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configures sleep-on-exit when returning from Handler mode to Thread mode. |
||||
* @note Setting this bit to 1 enables an interrupt-driven application to avoid returning to an |
||||
* empty main application. |
||||
* @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_EnableSleepOnExit |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_LPM_EnableSleepOnExit(void) |
||||
{ |
||||
/* Set SLEEPONEXIT bit of Cortex System Control Register */ |
||||
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Do not sleep when returning to Thread mode. |
||||
* @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_DisableSleepOnExit |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_LPM_DisableSleepOnExit(void) |
||||
{ |
||||
/* Clear SLEEPONEXIT bit of Cortex System Control Register */ |
||||
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enabled events and all interrupts, including disabled interrupts, can wakeup the |
||||
* processor. |
||||
* @rmtoll SCB_SCR SEVEONPEND LL_LPM_EnableEventOnPend |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_LPM_EnableEventOnPend(void) |
||||
{ |
||||
/* Set SEVEONPEND bit of Cortex System Control Register */ |
||||
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Only enabled interrupts or events can wakeup the processor, disabled interrupts are |
||||
* excluded |
||||
* @rmtoll SCB_SCR SEVEONPEND LL_LPM_DisableEventOnPend |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_LPM_DisableEventOnPend(void) |
||||
{ |
||||
/* Clear SEVEONPEND bit of Cortex System Control Register */ |
||||
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CORTEX_LL_EF_MCU_INFO MCU INFO
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Get Implementer code |
||||
* @rmtoll SCB_CPUID IMPLEMENTER LL_CPUID_GetImplementer |
||||
* @retval Value should be equal to 0x41 for ARM |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CPUID_GetImplementer(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get Variant number (The r value in the rnpn product revision identifier) |
||||
* @rmtoll SCB_CPUID VARIANT LL_CPUID_GetVariant |
||||
* @retval Value between 0 and 255 (0x0: revision 0) |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CPUID_GetVariant(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get Architecture number
|
||||
* @rmtoll SCB_CPUID ARCHITECTURE LL_CPUID_GetArchitecture |
||||
* @retval Value should be equal to 0xC for Cortex-M0+ devices |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CPUID_GetArchitecture(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get Part number |
||||
* @rmtoll SCB_CPUID PARTNO LL_CPUID_GetParNo |
||||
* @retval Value should be equal to 0xC60 for Cortex-M0+ |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CPUID_GetParNo(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get Revision number (The p value in the rnpn product revision identifier, indicates patch release) |
||||
* @rmtoll SCB_CPUID REVISION LL_CPUID_GetRevision |
||||
* @retval Value between 0 and 255 (0x1: patch 1) |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CPUID_GetRevision(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#if __MPU_PRESENT |
||||
/** @defgroup CORTEX_LL_EF_MPU MPU
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable MPU with input options |
||||
* @rmtoll MPU_CTRL ENABLE LL_MPU_Enable |
||||
* @param Options This parameter can be one of the following values: |
||||
* @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF_NONE |
||||
* @arg @ref LL_MPU_CTRL_HARDFAULT_NMI |
||||
* @arg @ref LL_MPU_CTRL_PRIVILEGED_DEFAULT |
||||
* @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_MPU_Enable(uint32_t Options) |
||||
{ |
||||
/* Enable the MPU*/ |
||||
WRITE_REG(MPU->CTRL, (MPU_CTRL_ENABLE_Msk | Options)); |
||||
/* Ensure MPU settings take effects */ |
||||
__DSB(); |
||||
/* Sequence instruction fetches using update settings */ |
||||
__ISB(); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable MPU |
||||
* @rmtoll MPU_CTRL ENABLE LL_MPU_Disable |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_MPU_Disable(void) |
||||
{ |
||||
/* Make sure outstanding transfers are done */ |
||||
__DMB(); |
||||
/* Disable MPU*/ |
||||
WRITE_REG(MPU->CTRL, 0U); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if MPU is enabled or not |
||||
* @rmtoll MPU_CTRL ENABLE LL_MPU_IsEnabled |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_MPU_IsEnabled(void) |
||||
{ |
||||
return (READ_BIT(MPU->CTRL, MPU_CTRL_ENABLE_Msk) == (MPU_CTRL_ENABLE_Msk)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable a MPU region |
||||
* @rmtoll MPU_RASR ENABLE LL_MPU_EnableRegion |
||||
* @param Region This parameter can be one of the following values: |
||||
* @arg @ref LL_MPU_REGION_NUMBER0 |
||||
* @arg @ref LL_MPU_REGION_NUMBER1 |
||||
* @arg @ref LL_MPU_REGION_NUMBER2 |
||||
* @arg @ref LL_MPU_REGION_NUMBER3 |
||||
* @arg @ref LL_MPU_REGION_NUMBER4 |
||||
* @arg @ref LL_MPU_REGION_NUMBER5 |
||||
* @arg @ref LL_MPU_REGION_NUMBER6 |
||||
* @arg @ref LL_MPU_REGION_NUMBER7 |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_MPU_EnableRegion(uint32_t Region) |
||||
{ |
||||
/* Set Region number */ |
||||
WRITE_REG(MPU->RNR, Region); |
||||
/* Enable the MPU region */ |
||||
SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure and enable a region |
||||
* @rmtoll MPU_RNR REGION LL_MPU_ConfigRegion\n |
||||
* MPU_RBAR REGION LL_MPU_ConfigRegion\n |
||||
* MPU_RBAR ADDR LL_MPU_ConfigRegion\n |
||||
* MPU_RASR XN LL_MPU_ConfigRegion\n |
||||
* MPU_RASR AP LL_MPU_ConfigRegion\n |
||||
* MPU_RASR S LL_MPU_ConfigRegion\n |
||||
* MPU_RASR C LL_MPU_ConfigRegion\n |
||||
* MPU_RASR B LL_MPU_ConfigRegion\n |
||||
* MPU_RASR SIZE LL_MPU_ConfigRegion |
||||
* @param Region This parameter can be one of the following values: |
||||
* @arg @ref LL_MPU_REGION_NUMBER0 |
||||
* @arg @ref LL_MPU_REGION_NUMBER1 |
||||
* @arg @ref LL_MPU_REGION_NUMBER2 |
||||
* @arg @ref LL_MPU_REGION_NUMBER3 |
||||
* @arg @ref LL_MPU_REGION_NUMBER4 |
||||
* @arg @ref LL_MPU_REGION_NUMBER5 |
||||
* @arg @ref LL_MPU_REGION_NUMBER6 |
||||
* @arg @ref LL_MPU_REGION_NUMBER7 |
||||
* @param Address Value of region base address |
||||
* @param SubRegionDisable Sub-region disable value between Min_Data = 0x00 and Max_Data = 0xFF |
||||
* @param Attributes This parameter can be a combination of the following values: |
||||
* @arg @ref LL_MPU_REGION_SIZE_32B or @ref LL_MPU_REGION_SIZE_64B or @ref LL_MPU_REGION_SIZE_128B or @ref LL_MPU_REGION_SIZE_256B or @ref LL_MPU_REGION_SIZE_512B |
||||
* or @ref LL_MPU_REGION_SIZE_1KB or @ref LL_MPU_REGION_SIZE_2KB or @ref LL_MPU_REGION_SIZE_4KB or @ref LL_MPU_REGION_SIZE_8KB or @ref LL_MPU_REGION_SIZE_16KB |
||||
* or @ref LL_MPU_REGION_SIZE_32KB or @ref LL_MPU_REGION_SIZE_64KB or @ref LL_MPU_REGION_SIZE_128KB or @ref LL_MPU_REGION_SIZE_256KB or @ref LL_MPU_REGION_SIZE_512KB |
||||
* or @ref LL_MPU_REGION_SIZE_1MB or @ref LL_MPU_REGION_SIZE_2MB or @ref LL_MPU_REGION_SIZE_4MB or @ref LL_MPU_REGION_SIZE_8MB or @ref LL_MPU_REGION_SIZE_16MB |
||||
* or @ref LL_MPU_REGION_SIZE_32MB or @ref LL_MPU_REGION_SIZE_64MB or @ref LL_MPU_REGION_SIZE_128MB or @ref LL_MPU_REGION_SIZE_256MB or @ref LL_MPU_REGION_SIZE_512MB |
||||
* or @ref LL_MPU_REGION_SIZE_1GB or @ref LL_MPU_REGION_SIZE_2GB or @ref LL_MPU_REGION_SIZE_4GB |
||||
* @arg @ref LL_MPU_REGION_NO_ACCESS or @ref LL_MPU_REGION_PRIV_RW or @ref LL_MPU_REGION_PRIV_RW_URO or @ref LL_MPU_REGION_FULL_ACCESS |
||||
* or @ref LL_MPU_REGION_PRIV_RO or @ref LL_MPU_REGION_PRIV_RO_URO |
||||
* @arg @ref LL_MPU_TEX_LEVEL0 or @ref LL_MPU_TEX_LEVEL1 or @ref LL_MPU_TEX_LEVEL2 or @ref LL_MPU_TEX_LEVEL4 |
||||
* @arg @ref LL_MPU_INSTRUCTION_ACCESS_ENABLE or @ref LL_MPU_INSTRUCTION_ACCESS_DISABLE |
||||
* @arg @ref LL_MPU_ACCESS_SHAREABLE or @ref LL_MPU_ACCESS_NOT_SHAREABLE |
||||
* @arg @ref LL_MPU_ACCESS_CACHEABLE or @ref LL_MPU_ACCESS_NOT_CACHEABLE |
||||
* @arg @ref LL_MPU_ACCESS_BUFFERABLE or @ref LL_MPU_ACCESS_NOT_BUFFERABLE |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_MPU_ConfigRegion(uint32_t Region, uint32_t SubRegionDisable, uint32_t Address, uint32_t Attributes) |
||||
{ |
||||
/* Set Region number */ |
||||
WRITE_REG(MPU->RNR, Region); |
||||
/* Set base address */ |
||||
WRITE_REG(MPU->RBAR, (Address & 0xFFFFFFE0U)); |
||||
/* Configure MPU */ |
||||
WRITE_REG(MPU->RASR, (MPU_RASR_ENABLE_Msk | Attributes | SubRegionDisable << MPU_RASR_SRD_Pos)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable a region |
||||
* @rmtoll MPU_RNR REGION LL_MPU_DisableRegion\n |
||||
* MPU_RASR ENABLE LL_MPU_DisableRegion |
||||
* @param Region This parameter can be one of the following values: |
||||
* @arg @ref LL_MPU_REGION_NUMBER0 |
||||
* @arg @ref LL_MPU_REGION_NUMBER1 |
||||
* @arg @ref LL_MPU_REGION_NUMBER2 |
||||
* @arg @ref LL_MPU_REGION_NUMBER3 |
||||
* @arg @ref LL_MPU_REGION_NUMBER4 |
||||
* @arg @ref LL_MPU_REGION_NUMBER5 |
||||
* @arg @ref LL_MPU_REGION_NUMBER6 |
||||
* @arg @ref LL_MPU_REGION_NUMBER7 |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_MPU_DisableRegion(uint32_t Region) |
||||
{ |
||||
/* Set Region number */ |
||||
WRITE_REG(MPU->RNR, Region); |
||||
/* Disable the MPU region */ |
||||
CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* __MPU_PRESENT */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_LL_CORTEX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,477 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_ll_crc.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of CRC LL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_LL_CRC_H |
||||
#define __STM32L0xx_LL_CRC_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx.h" |
||||
|
||||
/** @addtogroup STM32L0xx_LL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
#if defined(CRC) |
||||
|
||||
/** @defgroup CRC_LL CRC
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Private types -------------------------------------------------------------*/ |
||||
/* Private variables ---------------------------------------------------------*/ |
||||
/* Private constants ---------------------------------------------------------*/ |
||||
/* Private macros ------------------------------------------------------------*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup CRC_LL_Exported_Constants CRC Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRC_LL_EC_POLYLENGTH Polynomial length
|
||||
* @{ |
||||
*/ |
||||
#define LL_CRC_POLYLENGTH_32B (uint32_t)0x00000000U /*!< 32 bits Polynomial size */ |
||||
#define LL_CRC_POLYLENGTH_16B CRC_CR_POLYSIZE_0 /*!< 16 bits Polynomial size */ |
||||
#define LL_CRC_POLYLENGTH_8B CRC_CR_POLYSIZE_1 /*!< 8 bits Polynomial size */ |
||||
#define LL_CRC_POLYLENGTH_7B (CRC_CR_POLYSIZE_1 | CRC_CR_POLYSIZE_0) /*!< 7 bits Polynomial size */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_LL_EC_INDATA_REVERSE Input Data Reverse
|
||||
* @{ |
||||
*/ |
||||
#define LL_CRC_INDATA_REVERSE_NONE (uint32_t)0x00000000U /*!< Input Data bit order not affected */ |
||||
#define LL_CRC_INDATA_REVERSE_BYTE CRC_CR_REV_IN_0 /*!< Input Data bit reversal done by byte */ |
||||
#define LL_CRC_INDATA_REVERSE_HALFWORD CRC_CR_REV_IN_1 /*!< Input Data bit reversal done by half-word */ |
||||
#define LL_CRC_INDATA_REVERSE_WORD (CRC_CR_REV_IN_1 | CRC_CR_REV_IN_0) /*!< Input Data bit reversal done by word */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_LL_EC_OUTDATA_REVERSE Output Data Reverse
|
||||
* @{ |
||||
*/ |
||||
#define LL_CRC_OUTDATA_REVERSE_NONE (uint32_t)0x00000000U /*!< Output Data bit order not affected */ |
||||
#define LL_CRC_OUTDATA_REVERSE_BIT CRC_CR_REV_OUT /*!< Output Data bit reversal done by bit */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_LL_EC_Default_Polynomial_Value Default CRC generating polynomial value
|
||||
* @brief Normal representation of this polynomial value is |
||||
* X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2 + X + 1 . |
||||
* @{ |
||||
*/ |
||||
#define LL_CRC_DEFAULT_CRC32_POLY (uint32_t)0x04C11DB7U /*!< Default CRC generating polynomial value */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_LL_EC_Default_InitValue Default CRC computation initialization value
|
||||
* @{ |
||||
*/ |
||||
#define LL_CRC_DEFAULT_CRC_INITVALUE (uint32_t)0xFFFFFFFFU /*!< Default CRC computation initialization value */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
/** @defgroup CRC_LL_Exported_Macros CRC Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRC_LL_EM_WRITE_READ Common Write and read registers Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Write a value in CRC register |
||||
* @param __INSTANCE__ CRC Instance |
||||
* @param __REG__ Register to be written |
||||
* @param __VALUE__ Value to be written in the register |
||||
* @retval None |
||||
*/ |
||||
#define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
||||
|
||||
/**
|
||||
* @brief Read a value in CRC register |
||||
* @param __INSTANCE__ CRC Instance |
||||
* @param __REG__ Register to be read |
||||
* @retval Register value |
||||
*/ |
||||
#define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup CRC_LL_Exported_Functions CRC Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRC_LL_EF_Configuration CRC Configuration functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Reset the CRC calculation unit. |
||||
* @note If Programmable Initial CRC value feature |
||||
* is available, also set the Data Register to the value stored in the |
||||
* CRC_INIT register, otherwise, reset Data Register to its default value. |
||||
* @rmtoll CR RESET LL_CRC_ResetCRCCalculationUnit |
||||
* @param CRCx CRC Instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRC_ResetCRCCalculationUnit(CRC_TypeDef *CRCx) |
||||
{ |
||||
SET_BIT(CRCx->CR, CRC_CR_RESET); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure size of the polynomial. |
||||
* @rmtoll CR POLYSIZE LL_CRC_SetPolynomialSize |
||||
* @param CRCx CRC Instance |
||||
* @param PolySize This parameter can be one of the following values: |
||||
* @arg @ref LL_CRC_POLYLENGTH_32B |
||||
* @arg @ref LL_CRC_POLYLENGTH_16B |
||||
* @arg @ref LL_CRC_POLYLENGTH_8B |
||||
* @arg @ref LL_CRC_POLYLENGTH_7B |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRC_SetPolynomialSize(CRC_TypeDef *CRCx, uint32_t PolySize) |
||||
{ |
||||
MODIFY_REG(CRCx->CR, CRC_CR_POLYSIZE, PolySize); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return size of the polynomial. |
||||
* @rmtoll CR POLYSIZE LL_CRC_GetPolynomialSize |
||||
* @param CRCx CRC Instance |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_CRC_POLYLENGTH_32B |
||||
* @arg @ref LL_CRC_POLYLENGTH_16B |
||||
* @arg @ref LL_CRC_POLYLENGTH_8B |
||||
* @arg @ref LL_CRC_POLYLENGTH_7B |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRC_GetPolynomialSize(CRC_TypeDef *CRCx) |
||||
{ |
||||
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_POLYSIZE)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure the reversal of the bit order of the input data |
||||
* @rmtoll CR REV_IN LL_CRC_SetInputDataReverseMode |
||||
* @param CRCx CRC Instance |
||||
* @param ReverseMode This parameter can be one of the following values: |
||||
* @arg @ref LL_CRC_INDATA_REVERSE_NONE |
||||
* @arg @ref LL_CRC_INDATA_REVERSE_BYTE |
||||
* @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD |
||||
* @arg @ref LL_CRC_INDATA_REVERSE_WORD |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRC_SetInputDataReverseMode(CRC_TypeDef *CRCx, uint32_t ReverseMode) |
||||
{ |
||||
MODIFY_REG(CRCx->CR, CRC_CR_REV_IN, ReverseMode); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return type of reversal for input data bit order |
||||
* @rmtoll CR REV_IN LL_CRC_GetInputDataReverseMode |
||||
* @param CRCx CRC Instance |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_CRC_INDATA_REVERSE_NONE |
||||
* @arg @ref LL_CRC_INDATA_REVERSE_BYTE |
||||
* @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD |
||||
* @arg @ref LL_CRC_INDATA_REVERSE_WORD |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRC_GetInputDataReverseMode(CRC_TypeDef *CRCx) |
||||
{ |
||||
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_IN)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure the reversal of the bit order of the Output data |
||||
* @rmtoll CR REV_OUT LL_CRC_SetOutputDataReverseMode |
||||
* @param CRCx CRC Instance |
||||
* @param ReverseMode This parameter can be one of the following values: |
||||
* @arg @ref LL_CRC_OUTDATA_REVERSE_NONE |
||||
* @arg @ref LL_CRC_OUTDATA_REVERSE_BIT |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRC_SetOutputDataReverseMode(CRC_TypeDef *CRCx, uint32_t ReverseMode) |
||||
{ |
||||
MODIFY_REG(CRCx->CR, CRC_CR_REV_OUT, ReverseMode); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure the reversal of the bit order of the Output data |
||||
* @rmtoll CR REV_OUT LL_CRC_GetOutputDataReverseMode |
||||
* @param CRCx CRC Instance |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_CRC_OUTDATA_REVERSE_NONE |
||||
* @arg @ref LL_CRC_OUTDATA_REVERSE_BIT |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRC_GetOutputDataReverseMode(CRC_TypeDef *CRCx) |
||||
{ |
||||
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_OUT)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Initialize the Programmable initial CRC value. |
||||
* @note If the CRC size is less than 32 bits, the least significant bits |
||||
* are used to write the correct value |
||||
* @note LL_CRC_DEFAULT_CRC_INITVALUE could be used as value for InitCrc parameter. |
||||
* @rmtoll INIT INIT LL_CRC_SetInitialData |
||||
* @param CRCx CRC Instance |
||||
* @param InitCrc Value to be programmed in Programmable initial CRC value register |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRC_SetInitialData(CRC_TypeDef *CRCx, uint32_t InitCrc) |
||||
{ |
||||
WRITE_REG(CRCx->INIT, InitCrc); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return current Initial CRC value. |
||||
* @note If the CRC size is less than 32 bits, the least significant bits |
||||
* are used to read the correct value |
||||
* @rmtoll INIT INIT LL_CRC_GetInitialData |
||||
* @param CRCx CRC Instance |
||||
* @retval Value programmed in Programmable initial CRC value register |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRC_GetInitialData(CRC_TypeDef *CRCx) |
||||
{ |
||||
return (uint32_t)(READ_REG(CRCx->INIT)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Initialize the Programmable polynomial value |
||||
* (coefficients of the polynomial to be used for CRC calculation). |
||||
* @note LL_CRC_DEFAULT_CRC32_POLY could be used as value for PolynomCoef parameter. |
||||
* @note Please check Reference Manual and existing Errata Sheets, |
||||
* regarding possible limitations for Polynomial values usage. |
||||
* For example, for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65 |
||||
* @rmtoll POL POL LL_CRC_SetPolynomialCoef |
||||
* @param CRCx CRC Instance |
||||
* @param PolynomCoef Value to be programmed in Programmable Polynomial value register |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRC_SetPolynomialCoef(CRC_TypeDef *CRCx, uint32_t PolynomCoef) |
||||
{ |
||||
WRITE_REG(CRCx->POL, PolynomCoef); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return current Programmable polynomial value |
||||
* @note Please check Reference Manual and existing Errata Sheets, |
||||
* regarding possible limitations for Polynomial values usage. |
||||
* For example, for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65 |
||||
* @rmtoll POL POL LL_CRC_GetPolynomialCoef |
||||
* @param CRCx CRC Instance |
||||
* @retval Value programmed in Programmable Polynomial value register |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRC_GetPolynomialCoef(CRC_TypeDef *CRCx) |
||||
{ |
||||
return (uint32_t)(READ_REG(CRCx->POL)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRC_LL_EF_Data_Management Data_Management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Write given 32-bit data to the CRC calculator |
||||
* @rmtoll DR DR LL_CRC_FeedData32 |
||||
* @param CRCx CRC Instance |
||||
* @param InData value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFFFFFF |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData) |
||||
{ |
||||
WRITE_REG(CRCx->DR, InData); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Write given 16-bit data to the CRC calculator |
||||
* @rmtoll DR DR LL_CRC_FeedData16 |
||||
* @param CRCx CRC Instance |
||||
* @param InData 16 bit value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFF |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRC_FeedData16(CRC_TypeDef *CRCx, uint16_t InData) |
||||
{ |
||||
*(uint16_t __IO *)(&CRCx->DR) = (uint16_t) InData; |
||||
} |
||||
|
||||
/**
|
||||
* @brief Write given 8-bit data to the CRC calculator |
||||
* @rmtoll DR DR LL_CRC_FeedData8 |
||||
* @param CRCx CRC Instance |
||||
* @param InData 8 bit value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFF |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRC_FeedData8(CRC_TypeDef *CRCx, uint8_t InData) |
||||
{ |
||||
*(uint8_t __IO *)(&CRCx->DR) = (uint8_t) InData; |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return current CRC calculation result. 32 bits value is returned. |
||||
* @rmtoll DR DR LL_CRC_ReadData32 |
||||
* @param CRCx CRC Instance |
||||
* @retval Current CRC calculation result as stored in CRC_DR register (32 bits). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx) |
||||
{ |
||||
return (uint32_t)(READ_REG(CRCx->DR)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return current CRC calculation result. 16 bits value is returned. |
||||
* @note This function is expected to be used in a 16 bits CRC polynomial size context. |
||||
* @rmtoll DR DR LL_CRC_ReadData16 |
||||
* @param CRCx CRC Instance |
||||
* @retval Current CRC calculation result as stored in CRC_DR register (16 bits). |
||||
*/ |
||||
__STATIC_INLINE uint16_t LL_CRC_ReadData16(CRC_TypeDef *CRCx) |
||||
{ |
||||
return (uint16_t)READ_REG(CRCx->DR); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return current CRC calculation result. 8 bits value is returned. |
||||
* @note This function is expected to be used in a 8 bits CRC polynomial size context. |
||||
* @rmtoll DR DR LL_CRC_ReadData8 |
||||
* @param CRCx CRC Instance |
||||
* @retval Current CRC calculation result as stored in CRC_DR register (8 bits). |
||||
*/ |
||||
__STATIC_INLINE uint8_t LL_CRC_ReadData8(CRC_TypeDef *CRCx) |
||||
{ |
||||
return (uint8_t)READ_REG(CRCx->DR); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return current CRC calculation result. 7 bits value is returned. |
||||
* @note This function is expected to be used in a 7 bits CRC polynomial size context. |
||||
* @rmtoll DR DR LL_CRC_ReadData7 |
||||
* @param CRCx CRC Instance |
||||
* @retval Current CRC calculation result as stored in CRC_DR register (7 bits). |
||||
*/ |
||||
__STATIC_INLINE uint8_t LL_CRC_ReadData7(CRC_TypeDef *CRCx) |
||||
{ |
||||
return (uint8_t)(READ_REG(CRCx->DR) & 0x7FU); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return data stored in the Independent Data(IDR) register. |
||||
* @note This register can be used as a temporary storage location for one byte. |
||||
* @rmtoll IDR IDR LL_CRC_Read_IDR |
||||
* @param CRCx CRC Instance |
||||
* @retval Value stored in CRC_IDR register (General-purpose 8-bit data register). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRC_Read_IDR(CRC_TypeDef *CRCx) |
||||
{ |
||||
return (uint32_t)(READ_REG(CRCx->IDR)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Store data in the Independent Data(IDR) register. |
||||
* @note This register can be used as a temporary storage location for one byte. |
||||
* @rmtoll IDR IDR LL_CRC_Write_IDR |
||||
* @param CRCx CRC Instance |
||||
* @param InData value to be stored in CRC_IDR register (8-bit) between between Min_Data=0 and Max_Data=0xFF |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData) |
||||
{ |
||||
*((uint8_t __IO *)(&CRCx->IDR)) = (uint8_t) InData; |
||||
} |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#if defined(USE_FULL_LL_DRIVER) |
||||
/** @defgroup CRC_LL_EF_Init Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* USE_FULL_LL_DRIVER */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* defined(CRC) */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_LL_CRC_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
@ -0,0 +1,814 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_ll_crs.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of CRS LL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_LL_CRS_H |
||||
#define __STM32L0xx_LL_CRS_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx.h" |
||||
|
||||
/** @addtogroup STM32L0xx_LL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
#if defined(CRS) |
||||
|
||||
/** @defgroup CRS_LL CRS
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Private types -------------------------------------------------------------*/ |
||||
/* Private variables ---------------------------------------------------------*/ |
||||
|
||||
/* Private constants ---------------------------------------------------------*/ |
||||
/** @defgroup CRS_LL_Private_Constants CRS Private Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Defines used for the bit position in the register and perform offsets*/ |
||||
#define CRS_POSITION_TRIM (CRS_CR_TRIM_Pos) /* bit position in CR reg */ |
||||
#define CRS_POSITION_FECAP (CRS_ISR_FECAP_Pos) /* bit position in ISR reg */ |
||||
#define CRS_POSITION_FELIM (CRS_CFGR_FELIM_Pos) /* bit position in CFGR reg */ |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup CRS_LL_Exported_Constants CRS Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EC_GET_FLAG Get Flags Defines
|
||||
* @brief Flags defines which can be used with LL_CRS_ReadReg function |
||||
* @{ |
||||
*/ |
||||
#define LL_CRS_ISR_SYNCOKF CRS_ISR_SYNCOKF |
||||
#define LL_CRS_ISR_SYNCWARNF CRS_ISR_SYNCWARNF |
||||
#define LL_CRS_ISR_ERRF CRS_ISR_ERRF |
||||
#define LL_CRS_ISR_ESYNCF CRS_ISR_ESYNCF |
||||
#define LL_CRS_ISR_SYNCERR CRS_ISR_SYNCERR |
||||
#define LL_CRS_ISR_SYNCMISS CRS_ISR_SYNCMISS |
||||
#define LL_CRS_ISR_TRIMOVF CRS_ISR_TRIMOVF |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EC_IT IT Defines
|
||||
* @brief IT defines which can be used with LL_CRS_ReadReg and LL_CRS_WriteReg functions |
||||
* @{ |
||||
*/ |
||||
#define LL_CRS_CR_SYNCOKIE CRS_CR_SYNCOKIE |
||||
#define LL_CRS_CR_SYNCWARNIE CRS_CR_SYNCWARNIE |
||||
#define LL_CRS_CR_ERRIE CRS_CR_ERRIE |
||||
#define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EC_SYNC_DIV Synchronization Signal Divider
|
||||
* @{ |
||||
*/ |
||||
#define LL_CRS_SYNC_DIV_1 ((uint32_t)0x00U) /*!< Synchro Signal not divided (default) */ |
||||
#define LL_CRS_SYNC_DIV_2 CRS_CFGR_SYNCDIV_0 /*!< Synchro Signal divided by 2 */ |
||||
#define LL_CRS_SYNC_DIV_4 CRS_CFGR_SYNCDIV_1 /*!< Synchro Signal divided by 4 */ |
||||
#define LL_CRS_SYNC_DIV_8 (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */ |
||||
#define LL_CRS_SYNC_DIV_16 CRS_CFGR_SYNCDIV_2 /*!< Synchro Signal divided by 16 */ |
||||
#define LL_CRS_SYNC_DIV_32 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */ |
||||
#define LL_CRS_SYNC_DIV_64 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */ |
||||
#define LL_CRS_SYNC_DIV_128 CRS_CFGR_SYNCDIV /*!< Synchro Signal divided by 128 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EC_SYNC_SOURCE Synchronization Signal Source
|
||||
* @{ |
||||
*/ |
||||
#define LL_CRS_SYNC_SOURCE_GPIO ((uint32_t)0x00U) /*!< Synchro Signal soucre GPIO */ |
||||
#define LL_CRS_SYNC_SOURCE_LSE CRS_CFGR_SYNCSRC_0 /*!< Synchro Signal source LSE */ |
||||
#define LL_CRS_SYNC_SOURCE_USB CRS_CFGR_SYNCSRC_1 /*!< Synchro Signal source USB SOF (default)*/ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EC_SYNC_POLARITY Synchronization Signal Polarity
|
||||
* @{ |
||||
*/ |
||||
#define LL_CRS_SYNC_POLARITY_RISING ((uint32_t)0x00U) /*!< Synchro Active on rising edge (default) */ |
||||
#define LL_CRS_SYNC_POLARITY_FALLING CRS_CFGR_SYNCPOL /*!< Synchro Active on falling edge */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EC_FREQERRORDIR Frequency Error Direction
|
||||
* @{ |
||||
*/ |
||||
#define LL_CRS_FREQ_ERROR_DIR_UP ((uint32_t)0x00U) /*!< Upcounting direction, the actual frequency is above the target */ |
||||
#define LL_CRS_FREQ_ERROR_DIR_DOWN ((uint32_t)CRS_ISR_FEDIR) /*!< Downcounting direction, the actual frequency is below the target */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EC_DEFAULTVALUES Default Values
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief Reset value of the RELOAD field |
||||
* @note The reset value of the RELOAD field corresponds to a target frequency of 48 MHz |
||||
* and a synchronization signal frequency of 1 kHz (SOF signal from USB) |
||||
*/ |
||||
#define LL_CRS_RELOADVALUE_DEFAULT ((uint32_t)0xBB7FU) |
||||
|
||||
/**
|
||||
* @brief Reset value of Frequency error limit. |
||||
*/ |
||||
#define LL_CRS_ERRORLIMIT_DEFAULT ((uint32_t)0x22U) |
||||
|
||||
/**
|
||||
* @brief Reset value of the HSI48 Calibration field |
||||
* @note The default value is 32, which corresponds to the middle of the trimming interval.
|
||||
* The trimming step is around 67 kHz between two consecutive TRIM steps.
|
||||
* A higher TRIM value corresponds to a higher output frequency |
||||
*/ |
||||
#define LL_CRS_HSI48CALIBRATION_DEFAULT ((uint32_t)0x20U) |
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
/** @defgroup CRS_LL_Exported_Macros CRS Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EM_WRITE_READ Common Write and read registers Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Write a value in CRS register |
||||
* @param __INSTANCE__ CRS Instance |
||||
* @param __REG__ Register to be written |
||||
* @param __VALUE__ Value to be written in the register |
||||
* @retval None |
||||
*/ |
||||
#define LL_CRS_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
||||
|
||||
/**
|
||||
* @brief Read a value in CRS register |
||||
* @param __INSTANCE__ CRS Instance |
||||
* @param __REG__ Register to be read |
||||
* @retval Register value |
||||
*/ |
||||
#define LL_CRS_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EM_Exported_Macros_Calculate_Reload Exported_Macros_Calculate_Reload
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Macro to calculate reload value to be set in CRS register according to target and sync frequencies |
||||
* @note The RELOAD value should be selected according to the ratio between
|
||||
* the target frequency and the frequency of the synchronization source after |
||||
* prescaling. It is then decreased by one in order to reach the expected |
||||
* synchronization on the zero value. The formula is the following: |
||||
* RELOAD = (fTARGET / fSYNC) -1 |
||||
* @param __FTARGET__ Target frequency (value in Hz) |
||||
* @param __FSYNC__ Synchronization signal frequency (value in Hz) |
||||
* @retval Reload value (in Hz) |
||||
*/ |
||||
#define __LL_CRS_CALC_CALCULATE_RELOADVALUE(__FTARGET__, __FSYNC__) (((__FTARGET__) / (__FSYNC__)) - 1U) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup CRS_LL_Exported_Functions CRS Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EF_Configuration Configuration
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable Frequency error counter |
||||
* @note When this bit is set, the CRS_CFGR register is write-protected and cannot be modified |
||||
* @rmtoll CR CEN LL_CRS_EnableFreqErrorCounter |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_EnableFreqErrorCounter(void) |
||||
{ |
||||
SET_BIT(CRS->CR, CRS_CR_CEN); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable Frequency error counter |
||||
* @rmtoll CR CEN LL_CRS_DisableFreqErrorCounter |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_DisableFreqErrorCounter(void) |
||||
{ |
||||
CLEAR_BIT(CRS->CR, CRS_CR_CEN); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if Frequency error counter is enabled or not |
||||
* @rmtoll CR CEN LL_CRS_IsEnabledFreqErrorCounter |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsEnabledFreqErrorCounter(void) |
||||
{ |
||||
return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable Automatic trimming counter |
||||
* @rmtoll CR AUTOTRIMEN LL_CRS_EnableAutoTrimming |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_EnableAutoTrimming(void) |
||||
{ |
||||
SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable Automatic trimming counter |
||||
* @rmtoll CR AUTOTRIMEN LL_CRS_DisableAutoTrimming |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_DisableAutoTrimming(void) |
||||
{ |
||||
CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if Automatic trimming is enabled or not |
||||
* @rmtoll CR AUTOTRIMEN LL_CRS_IsEnabledAutoTrimming |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsEnabledAutoTrimming(void) |
||||
{ |
||||
return (READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set HSI48 oscillator smooth trimming |
||||
* @note When the AUTOTRIMEN bit is set, this field is controlled by hardware and is read-only |
||||
* @rmtoll CR TRIM LL_CRS_SetHSI48SmoothTrimming |
||||
* @param Value a number between Min_Data = 0 and Max_Data = 63 |
||||
* @note Default value can be set thanks to @ref LL_CRS_HSI48CALIBRATION_DEFAULT
|
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_SetHSI48SmoothTrimming(uint32_t Value) |
||||
{ |
||||
MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_POSITION_TRIM); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get HSI48 oscillator smooth trimming |
||||
* @rmtoll CR TRIM LL_CRS_GetHSI48SmoothTrimming |
||||
* @retval a number between Min_Data = 0 and Max_Data = 63 |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_GetHSI48SmoothTrimming(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_POSITION_TRIM); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set counter reload value |
||||
* @rmtoll CFGR RELOAD LL_CRS_SetReloadCounter |
||||
* @param Value a number between Min_Data = 0 and Max_Data = 0xFFFF |
||||
* @note Default value can be set thanks to @ref LL_CRS_RELOADVALUE_DEFAULT
|
||||
* Otherwise it can be calculated in using macro @ref __LL_CRS_CALC_CALCULATE_RELOADVALUE (_FTARGET_, _FSYNC_) |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_SetReloadCounter(uint32_t Value) |
||||
{ |
||||
MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get counter reload value |
||||
* @rmtoll CFGR RELOAD LL_CRS_GetReloadCounter |
||||
* @retval a number between Min_Data = 0 and Max_Data = 0xFFFF |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_GetReloadCounter(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set frequency error limit |
||||
* @rmtoll CFGR FELIM LL_CRS_SetFreqErrorLimit |
||||
* @param Value a number between Min_Data = 0 and Max_Data = 255 |
||||
* @note Default value can be set thanks to @ref LL_CRS_ERRORLIMIT_DEFAULT
|
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_SetFreqErrorLimit(uint32_t Value) |
||||
{ |
||||
MODIFY_REG(CRS->CFGR, CRS_CFGR_FELIM, Value << CRS_POSITION_FELIM); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get frequency error limit |
||||
* @rmtoll CFGR FELIM LL_CRS_GetFreqErrorLimit |
||||
* @retval A number between Min_Data = 0 and Max_Data = 255 |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorLimit(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_FELIM) >> CRS_POSITION_FELIM); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set division factor for SYNC signal |
||||
* @rmtoll CFGR SYNCDIV LL_CRS_SetSyncDivider |
||||
* @param Divider This parameter can be one of the following values: |
||||
* @arg @ref LL_CRS_SYNC_DIV_1 |
||||
* @arg @ref LL_CRS_SYNC_DIV_2 |
||||
* @arg @ref LL_CRS_SYNC_DIV_4 |
||||
* @arg @ref LL_CRS_SYNC_DIV_8 |
||||
* @arg @ref LL_CRS_SYNC_DIV_16 |
||||
* @arg @ref LL_CRS_SYNC_DIV_32 |
||||
* @arg @ref LL_CRS_SYNC_DIV_64 |
||||
* @arg @ref LL_CRS_SYNC_DIV_128 |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_SetSyncDivider(uint32_t Divider) |
||||
{ |
||||
MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCDIV, Divider); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get division factor for SYNC signal |
||||
* @rmtoll CFGR SYNCDIV LL_CRS_GetSyncDivider |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_CRS_SYNC_DIV_1 |
||||
* @arg @ref LL_CRS_SYNC_DIV_2 |
||||
* @arg @ref LL_CRS_SYNC_DIV_4 |
||||
* @arg @ref LL_CRS_SYNC_DIV_8 |
||||
* @arg @ref LL_CRS_SYNC_DIV_16 |
||||
* @arg @ref LL_CRS_SYNC_DIV_32 |
||||
* @arg @ref LL_CRS_SYNC_DIV_64 |
||||
* @arg @ref LL_CRS_SYNC_DIV_128 |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_GetSyncDivider(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCDIV)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set SYNC signal source |
||||
* @rmtoll CFGR SYNCSRC LL_CRS_SetSyncSignalSource |
||||
* @param Source This parameter can be one of the following values: |
||||
* @arg @ref LL_CRS_SYNC_SOURCE_GPIO |
||||
* @arg @ref LL_CRS_SYNC_SOURCE_LSE |
||||
* @arg @ref LL_CRS_SYNC_SOURCE_USB |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_SetSyncSignalSource(uint32_t Source) |
||||
{ |
||||
MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCSRC, Source); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get SYNC signal source |
||||
* @rmtoll CFGR SYNCSRC LL_CRS_GetSyncSignalSource |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_CRS_SYNC_SOURCE_GPIO |
||||
* @arg @ref LL_CRS_SYNC_SOURCE_LSE |
||||
* @arg @ref LL_CRS_SYNC_SOURCE_USB |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_GetSyncSignalSource(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCSRC)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set input polarity for the SYNC signal source |
||||
* @rmtoll CFGR SYNCPOL LL_CRS_SetSyncPolarity |
||||
* @param Polarity This parameter can be one of the following values: |
||||
* @arg @ref LL_CRS_SYNC_POLARITY_RISING |
||||
* @arg @ref LL_CRS_SYNC_POLARITY_FALLING |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_SetSyncPolarity(uint32_t Polarity) |
||||
{ |
||||
MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCPOL, Polarity); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get input polarity for the SYNC signal source |
||||
* @rmtoll CFGR SYNCPOL LL_CRS_GetSyncPolarity |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_CRS_SYNC_POLARITY_RISING |
||||
* @arg @ref LL_CRS_SYNC_POLARITY_FALLING |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_GetSyncPolarity(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCPOL)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure CRS for the synchronization |
||||
* @rmtoll CR TRIM LL_CRS_ConfigSynchronization\n |
||||
* CFGR RELOAD LL_CRS_ConfigSynchronization\n |
||||
* CFGR FELIM LL_CRS_ConfigSynchronization\n |
||||
* CFGR SYNCDIV LL_CRS_ConfigSynchronization\n |
||||
* CFGR SYNCSRC LL_CRS_ConfigSynchronization\n |
||||
* CFGR SYNCPOL LL_CRS_ConfigSynchronization |
||||
* @param HSI48CalibrationValue a number between Min_Data = 0 and Max_Data = 63 |
||||
* @param ErrorLimitValue a number between Min_Data = 0 and Max_Data = 0xFFFF |
||||
* @param ReloadValue a number between Min_Data = 0 and Max_Data = 255 |
||||
* @param Settings This parameter can be a combination of the following values: |
||||
* @arg @ref LL_CRS_SYNC_DIV_1 or @ref LL_CRS_SYNC_DIV_2 or @ref LL_CRS_SYNC_DIV_4 or @ref LL_CRS_SYNC_DIV_8 |
||||
* or @ref LL_CRS_SYNC_DIV_16 or @ref LL_CRS_SYNC_DIV_32 or @ref LL_CRS_SYNC_DIV_64 or @ref LL_CRS_SYNC_DIV_128 |
||||
* @arg @ref LL_CRS_SYNC_SOURCE_GPIO or @ref LL_CRS_SYNC_SOURCE_LSE or @ref LL_CRS_SYNC_SOURCE_USB |
||||
* @arg @ref LL_CRS_SYNC_POLARITY_RISING or @ref LL_CRS_SYNC_POLARITY_FALLING |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_ConfigSynchronization(uint32_t HSI48CalibrationValue, uint32_t ErrorLimitValue, uint32_t ReloadValue, uint32_t Settings) |
||||
{ |
||||
MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue); |
||||
MODIFY_REG(CRS->CFGR,
|
||||
CRS_CFGR_RELOAD | CRS_CFGR_FELIM | CRS_CFGR_SYNCDIV | CRS_CFGR_SYNCSRC | CRS_CFGR_SYNCPOL,
|
||||
ReloadValue | (ErrorLimitValue << CRS_POSITION_FELIM) | Settings); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EF_CRS_Management CRS_Management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Generate software SYNC event |
||||
* @rmtoll CR SWSYNC LL_CRS_GenerateEvent_SWSYNC |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_GenerateEvent_SWSYNC(void) |
||||
{ |
||||
SET_BIT(CRS->CR, CRS_CR_SWSYNC); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get the frequency error direction latched in the time of the last
|
||||
* SYNC event |
||||
* @rmtoll ISR FEDIR LL_CRS_GetFreqErrorDirection |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_CRS_FREQ_ERROR_DIR_UP |
||||
* @arg @ref LL_CRS_FREQ_ERROR_DIR_DOWN |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorDirection(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get the frequency error counter value latched in the time of the last SYNC event |
||||
* @rmtoll ISR FECAP LL_CRS_GetFreqErrorCapture |
||||
* @retval A number between Min_Data = 0x0000 and Max_Data = 0xFFFF |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorCapture(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_POSITION_FECAP); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EF_FLAG_Management FLAG_Management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Check if SYNC event OK signal occurred or not |
||||
* @rmtoll ISR SYNCOKF LL_CRS_IsActiveFlag_SYNCOK |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCOK(void) |
||||
{ |
||||
return (READ_BIT(CRS->ISR, CRS_ISR_SYNCOKF) == (CRS_ISR_SYNCOKF)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if SYNC warning signal occurred or not |
||||
* @rmtoll ISR SYNCWARNF LL_CRS_IsActiveFlag_SYNCWARN |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCWARN(void) |
||||
{ |
||||
return (READ_BIT(CRS->ISR, CRS_ISR_SYNCWARNF) == (CRS_ISR_SYNCWARNF)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if Synchronization or trimming error signal occurred or not |
||||
* @rmtoll ISR ERRF LL_CRS_IsActiveFlag_ERR |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_ERR(void) |
||||
{ |
||||
return (READ_BIT(CRS->ISR, CRS_ISR_ERRF) == (CRS_ISR_ERRF)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if Expected SYNC signal occurred or not |
||||
* @rmtoll ISR ESYNCF LL_CRS_IsActiveFlag_ESYNC |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_ESYNC(void) |
||||
{ |
||||
return (READ_BIT(CRS->ISR, CRS_ISR_ESYNCF) == (CRS_ISR_ESYNCF)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if SYNC error signal occurred or not |
||||
* @rmtoll ISR SYNCERR LL_CRS_IsActiveFlag_SYNCERR |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCERR(void) |
||||
{ |
||||
return (READ_BIT(CRS->ISR, CRS_ISR_SYNCERR) == (CRS_ISR_SYNCERR)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if SYNC missed error signal occurred or not |
||||
* @rmtoll ISR SYNCMISS LL_CRS_IsActiveFlag_SYNCMISS |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCMISS(void) |
||||
{ |
||||
return (READ_BIT(CRS->ISR, CRS_ISR_SYNCMISS) == (CRS_ISR_SYNCMISS)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if Trimming overflow or underflow occurred or not |
||||
* @rmtoll ISR TRIMOVF LL_CRS_IsActiveFlag_TRIMOVF |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_TRIMOVF(void) |
||||
{ |
||||
return (READ_BIT(CRS->ISR, CRS_ISR_TRIMOVF) == (CRS_ISR_TRIMOVF)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clear the SYNC event OK flag |
||||
* @rmtoll ICR SYNCOKC LL_CRS_ClearFlag_SYNCOK |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_ClearFlag_SYNCOK(void) |
||||
{ |
||||
WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clear the SYNC warning flag |
||||
* @rmtoll ICR SYNCWARNC LL_CRS_ClearFlag_SYNCWARN |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_ClearFlag_SYNCWARN(void) |
||||
{ |
||||
WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clear TRIMOVF, SYNCMISS and SYNCERR bits and consequently also
|
||||
* the ERR flag |
||||
* @rmtoll ICR ERRC LL_CRS_ClearFlag_ERR |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_ClearFlag_ERR(void) |
||||
{ |
||||
WRITE_REG(CRS->ICR, CRS_ICR_ERRC); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clear Expected SYNC flag |
||||
* @rmtoll ICR ESYNCC LL_CRS_ClearFlag_ESYNC |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_ClearFlag_ESYNC(void) |
||||
{ |
||||
WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup CRS_LL_EF_IT_Management IT_Management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable SYNC event OK interrupt |
||||
* @rmtoll CR SYNCOKIE LL_CRS_EnableIT_SYNCOK |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_EnableIT_SYNCOK(void) |
||||
{ |
||||
SET_BIT(CRS->CR, CRS_CR_SYNCOKIE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable SYNC event OK interrupt |
||||
* @rmtoll CR SYNCOKIE LL_CRS_DisableIT_SYNCOK |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_DisableIT_SYNCOK(void) |
||||
{ |
||||
CLEAR_BIT(CRS->CR, CRS_CR_SYNCOKIE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if SYNC event OK interrupt is enabled or not |
||||
* @rmtoll CR SYNCOKIE LL_CRS_IsEnabledIT_SYNCOK |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_SYNCOK(void) |
||||
{ |
||||
return (READ_BIT(CRS->CR, CRS_CR_SYNCOKIE) == (CRS_CR_SYNCOKIE)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable SYNC warning interrupt |
||||
* @rmtoll CR SYNCWARNIE LL_CRS_EnableIT_SYNCWARN |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_EnableIT_SYNCWARN(void) |
||||
{ |
||||
SET_BIT(CRS->CR, CRS_CR_SYNCWARNIE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable SYNC warning interrupt |
||||
* @rmtoll CR SYNCWARNIE LL_CRS_DisableIT_SYNCWARN |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_DisableIT_SYNCWARN(void) |
||||
{ |
||||
CLEAR_BIT(CRS->CR, CRS_CR_SYNCWARNIE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if SYNC warning interrupt is enabled or not |
||||
* @rmtoll CR SYNCWARNIE LL_CRS_IsEnabledIT_SYNCWARN |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_SYNCWARN(void) |
||||
{ |
||||
return (READ_BIT(CRS->CR, CRS_CR_SYNCWARNIE) == (CRS_CR_SYNCWARNIE)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable Synchronization or trimming error interrupt |
||||
* @rmtoll CR ERRIE LL_CRS_EnableIT_ERR |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_EnableIT_ERR(void) |
||||
{ |
||||
SET_BIT(CRS->CR, CRS_CR_ERRIE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable Synchronization or trimming error interrupt |
||||
* @rmtoll CR ERRIE LL_CRS_DisableIT_ERR |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_DisableIT_ERR(void) |
||||
{ |
||||
CLEAR_BIT(CRS->CR, CRS_CR_ERRIE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if Synchronization or trimming error interrupt is enabled or not |
||||
* @rmtoll CR ERRIE LL_CRS_IsEnabledIT_ERR |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ERR(void) |
||||
{ |
||||
return (READ_BIT(CRS->CR, CRS_CR_ERRIE) == (CRS_CR_ERRIE)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable Expected SYNC interrupt |
||||
* @rmtoll CR ESYNCIE LL_CRS_EnableIT_ESYNC |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_EnableIT_ESYNC(void) |
||||
{ |
||||
SET_BIT(CRS->CR, CRS_CR_ESYNCIE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable Expected SYNC interrupt |
||||
* @rmtoll CR ESYNCIE LL_CRS_DisableIT_ESYNC |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_CRS_DisableIT_ESYNC(void) |
||||
{ |
||||
CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if Expected SYNC interrupt is enabled or not |
||||
* @rmtoll CR ESYNCIE LL_CRS_IsEnabledIT_ESYNC |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ESYNC(void) |
||||
{ |
||||
return (READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#if defined(USE_FULL_LL_DRIVER) |
||||
/** @defgroup CRS_LL_EF_Init Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
ErrorStatus LL_CRS_DeInit(void); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* USE_FULL_LL_DRIVER */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* defined(CRS) */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_LL_CRS_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,959 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_ll_gpio.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of GPIO LL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_LL_GPIO_H |
||||
#define __STM32L0xx_LL_GPIO_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx.h" |
||||
|
||||
/** @addtogroup STM32L0xx_LL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOH) |
||||
|
||||
/** @defgroup GPIO_LL GPIO
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Private types -------------------------------------------------------------*/ |
||||
/* Private variables ---------------------------------------------------------*/ |
||||
/* Private constants ---------------------------------------------------------*/ |
||||
/* Private macros ------------------------------------------------------------*/ |
||||
#if defined(USE_FULL_LL_DRIVER) |
||||
/** @defgroup GPIO_LL_Private_Macros GPIO Private Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /*USE_FULL_LL_DRIVER*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
#if defined(USE_FULL_LL_DRIVER) |
||||
/** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief LL GPIO Init Structure definition |
||||
*/ |
||||
typedef struct |
||||
{ |
||||
uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
|
||||
This parameter can be any value of @ref GPIO_LL_EC_PIN */ |
||||
|
||||
uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_LL_EC_MODE. |
||||
|
||||
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/ |
||||
|
||||
uint32_t Speed; /*!< Specifies the speed for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_LL_EC_SPEED. |
||||
|
||||
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/ |
||||
|
||||
uint32_t OutputType; /*!< Specifies the operating output type for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_LL_EC_OUTPUT. |
||||
|
||||
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/ |
||||
|
||||
uint32_t Pull; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_LL_EC_PULL. |
||||
|
||||
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/ |
||||
|
||||
uint32_t Alternate; /*!< Specifies the Peripheral to be connected to the selected pins.
|
||||
This parameter can be a value of @ref GPIO_LL_EC_AF. |
||||
|
||||
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetAFPin_0_7() and LL_GPIO_SetAFPin_8_15().*/ |
||||
} LL_GPIO_InitTypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* USE_FULL_LL_DRIVER */ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup GPIO_LL_EC_PIN PIN
|
||||
* @{ |
||||
*/ |
||||
#define LL_GPIO_PIN_0 GPIO_BSRR_BS_0 /*!< Select pin 0 */ |
||||
#define LL_GPIO_PIN_1 GPIO_BSRR_BS_1 /*!< Select pin 1 */ |
||||
#define LL_GPIO_PIN_2 GPIO_BSRR_BS_2 /*!< Select pin 2 */ |
||||
#define LL_GPIO_PIN_3 GPIO_BSRR_BS_3 /*!< Select pin 3 */ |
||||
#define LL_GPIO_PIN_4 GPIO_BSRR_BS_4 /*!< Select pin 4 */ |
||||
#define LL_GPIO_PIN_5 GPIO_BSRR_BS_5 /*!< Select pin 5 */ |
||||
#define LL_GPIO_PIN_6 GPIO_BSRR_BS_6 /*!< Select pin 6 */ |
||||
#define LL_GPIO_PIN_7 GPIO_BSRR_BS_7 /*!< Select pin 7 */ |
||||
#define LL_GPIO_PIN_8 GPIO_BSRR_BS_8 /*!< Select pin 8 */ |
||||
#define LL_GPIO_PIN_9 GPIO_BSRR_BS_9 /*!< Select pin 9 */ |
||||
#define LL_GPIO_PIN_10 GPIO_BSRR_BS_10 /*!< Select pin 10 */ |
||||
#define LL_GPIO_PIN_11 GPIO_BSRR_BS_11 /*!< Select pin 11 */ |
||||
#define LL_GPIO_PIN_12 GPIO_BSRR_BS_12 /*!< Select pin 12 */ |
||||
#define LL_GPIO_PIN_13 GPIO_BSRR_BS_13 /*!< Select pin 13 */ |
||||
#define LL_GPIO_PIN_14 GPIO_BSRR_BS_14 /*!< Select pin 14 */ |
||||
#define LL_GPIO_PIN_15 GPIO_BSRR_BS_15 /*!< Select pin 15 */ |
||||
#define LL_GPIO_PIN_ALL (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1 | GPIO_BSRR_BS_2 | \ |
||||
GPIO_BSRR_BS_3 | GPIO_BSRR_BS_4 | GPIO_BSRR_BS_5 | \
|
||||
GPIO_BSRR_BS_6 | GPIO_BSRR_BS_7 | GPIO_BSRR_BS_8 | \
|
||||
GPIO_BSRR_BS_9 | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
|
||||
GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
|
||||
GPIO_BSRR_BS_15) /*!< Select all pins */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup GPIO_LL_EC_MODE Mode
|
||||
* @{ |
||||
*/ |
||||
#define LL_GPIO_MODE_INPUT ((uint32_t)0x00000000U) /*!< Select input mode */ |
||||
#define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODE0_0 /*!< Select output mode */ |
||||
#define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODE0_1 /*!< Select alternate function mode */ |
||||
#define LL_GPIO_MODE_ANALOG GPIO_MODER_MODE0 /*!< Select analog mode */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup GPIO_LL_EC_OUTPUT Output Type
|
||||
* @{ |
||||
*/ |
||||
#define LL_GPIO_OUTPUT_PUSHPULL ((uint32_t)0x00000000U) /*!< Select push-pull as output type */ |
||||
#define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup GPIO_LL_EC_SPEED Output Speed
|
||||
* @{ |
||||
*/ |
||||
#define LL_GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000U) /*!< Select I/O low output speed */ |
||||
#define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDER_OSPEED0_0 /*!< Select I/O medium output speed */ |
||||
#define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDER_OSPEED0_1 /*!< Select I/O fast output speed */ |
||||
#define LL_GPIO_SPEED_FREQ_VERY_HIGH GPIO_OSPEEDER_OSPEED0 /*!< Select I/O high output speed */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#define LL_GPIO_SPEED_LOW LL_GPIO_SPEED_FREQ_LOW |
||||
#define LL_GPIO_SPEED_MEDIUM LL_GPIO_SPEED_FREQ_MEDIUM |
||||
#define LL_GPIO_SPEED_FAST LL_GPIO_SPEED_FREQ_HIGH |
||||
#define LL_GPIO_SPEED_HIGH LL_GPIO_SPEED_FREQ_VERY_HIGH |
||||
|
||||
/** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down
|
||||
* @{ |
||||
*/ |
||||
#define LL_GPIO_PULL_NO ((uint32_t)0x00000000U) /*!< Select I/O no pull */ |
||||
#define LL_GPIO_PULL_UP GPIO_PUPDR_PUPD0_0 /*!< Select I/O pull up */ |
||||
#define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPD0_1 /*!< Select I/O pull down */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup GPIO_LL_EC_AF Alternate Function
|
||||
* @{ |
||||
*/ |
||||
#define LL_GPIO_AF_0 ((uint32_t)0x0000000U) /*!< Select alternate function 0 */ |
||||
#define LL_GPIO_AF_1 ((uint32_t)0x0000001U) /*!< Select alternate function 1 */ |
||||
#define LL_GPIO_AF_2 ((uint32_t)0x0000002U) /*!< Select alternate function 2 */ |
||||
#define LL_GPIO_AF_3 ((uint32_t)0x0000003U) /*!< Select alternate function 3 */ |
||||
#define LL_GPIO_AF_4 ((uint32_t)0x0000004U) /*!< Select alternate function 4 */ |
||||
#define LL_GPIO_AF_5 ((uint32_t)0x0000005U) /*!< Select alternate function 5 */ |
||||
#define LL_GPIO_AF_6 ((uint32_t)0x0000006U) /*!< Select alternate function 6 */ |
||||
#define LL_GPIO_AF_7 ((uint32_t)0x0000007U) /*!< Select alternate function 7 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
/** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Write a value in GPIO register |
||||
* @param __INSTANCE__ GPIO Instance |
||||
* @param __REG__ Register to be written |
||||
* @param __VALUE__ Value to be written in the register |
||||
* @retval None |
||||
*/ |
||||
#define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
||||
|
||||
/**
|
||||
* @brief Read a value in GPIO register |
||||
* @param __INSTANCE__ GPIO Instance |
||||
* @param __REG__ Register to be read |
||||
* @retval Register value |
||||
*/ |
||||
#define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Configure gpio mode for a dedicated pin on dedicated port. |
||||
* @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog. |
||||
* @note Warning: only one pin can be passed as parameter. |
||||
* @rmtoll MODER MODEy LL_GPIO_SetPinMode |
||||
* @param GPIOx GPIO Port |
||||
* @param Pin This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @param Mode This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_MODE_INPUT |
||||
* @arg @ref LL_GPIO_MODE_OUTPUT |
||||
* @arg @ref LL_GPIO_MODE_ALTERNATE |
||||
* @arg @ref LL_GPIO_MODE_ANALOG |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode) |
||||
{ |
||||
MODIFY_REG(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODE0), ((Pin * Pin) * Mode)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return gpio mode for a dedicated pin on dedicated port. |
||||
* @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog. |
||||
* @note Warning: only one pin can be passed as parameter. |
||||
* @rmtoll MODER MODEy LL_GPIO_GetPinMode |
||||
* @param GPIOx GPIO Port |
||||
* @param Pin This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_GPIO_MODE_INPUT |
||||
* @arg @ref LL_GPIO_MODE_OUTPUT |
||||
* @arg @ref LL_GPIO_MODE_ALTERNATE |
||||
* @arg @ref LL_GPIO_MODE_ANALOG |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin) |
||||
{ |
||||
return (uint32_t)(READ_BIT(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODE0)) / (Pin * Pin)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure gpio output type for several pins on dedicated port. |
||||
* @note Output type as to be set when gpio pin is in output or |
||||
* alternate modes. Possible type are Push-pull or Open-drain. |
||||
* @rmtoll OTYPER OTy LL_GPIO_SetPinOutputType |
||||
* @param GPIOx GPIO Port |
||||
* @param PinMask This parameter can be a combination of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @arg @ref LL_GPIO_PIN_ALL |
||||
* @param OutputType This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_OUTPUT_PUSHPULL |
||||
* @arg @ref LL_GPIO_OUTPUT_OPENDRAIN |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType) |
||||
{ |
||||
MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return gpio output type for several pins on dedicated port. |
||||
* @note Output type as to be set when gpio pin is in output or |
||||
* alternate modes. Possible type are Push-pull or Open-drain. |
||||
* @note Warning: only one pin can be passed as parameter. |
||||
* @rmtoll OTYPER OTy LL_GPIO_GetPinOutputType |
||||
* @param GPIOx GPIO Port |
||||
* @param Pin This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @arg @ref LL_GPIO_PIN_ALL |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_GPIO_OUTPUT_PUSHPULL |
||||
* @arg @ref LL_GPIO_OUTPUT_OPENDRAIN |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin) |
||||
{ |
||||
return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) / Pin); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure gpio speed for a dedicated pin on dedicated port. |
||||
* @note I/O speed can be Low, Medium, Fast or High speed. |
||||
* @note Warning: only one pin can be passed as parameter. |
||||
* @note Refer to datasheet for frequency specifications and the power |
||||
* supply and load conditions for each speed. |
||||
* @rmtoll OSPEEDR OSPEEDy LL_GPIO_SetPinSpeed |
||||
* @param GPIOx GPIO Port |
||||
* @param Pin This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @param Speed This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_SPEED_FREQ_LOW |
||||
* @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM |
||||
* @arg @ref LL_GPIO_SPEED_FREQ_HIGH |
||||
* @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed) |
||||
{ |
||||
MODIFY_REG(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDER_OSPEED0), ((Pin * Pin) * Speed)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return gpio speed for a dedicated pin on dedicated port. |
||||
* @note I/O speed can be Low, Medium, Fast or High speed. |
||||
* @note Warning: only one pin can be passed as parameter. |
||||
* @note Refer to datasheet for frequency specifications and the power |
||||
* supply and load conditions for each speed. |
||||
* @rmtoll OSPEEDR OSPEEDy LL_GPIO_GetPinSpeed |
||||
* @param GPIOx GPIO Port |
||||
* @param Pin This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_GPIO_SPEED_FREQ_LOW |
||||
* @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM |
||||
* @arg @ref LL_GPIO_SPEED_FREQ_HIGH |
||||
* @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin) |
||||
{ |
||||
return (uint32_t)(READ_BIT(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDER_OSPEED0)) / (Pin * Pin)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port. |
||||
* @note Warning: only one pin can be passed as parameter. |
||||
* @rmtoll PUPDR PUPDy LL_GPIO_SetPinPull |
||||
* @param GPIOx GPIO Port |
||||
* @param Pin This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @param Pull This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_PULL_NO |
||||
* @arg @ref LL_GPIO_PULL_UP |
||||
* @arg @ref LL_GPIO_PULL_DOWN |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull) |
||||
{ |
||||
MODIFY_REG(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPD0), ((Pin * Pin) * Pull)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return gpio pull-up or pull-down for a dedicated pin on a dedicated port |
||||
* @note Warning: only one pin can be passed as parameter. |
||||
* @rmtoll PUPDR PUPDy LL_GPIO_GetPinPull |
||||
* @param GPIOx GPIO Port |
||||
* @param Pin This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_GPIO_PULL_NO |
||||
* @arg @ref LL_GPIO_PULL_UP |
||||
* @arg @ref LL_GPIO_PULL_DOWN |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin) |
||||
{ |
||||
return (uint32_t)(READ_BIT(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPD0)) / (Pin * Pin)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port. |
||||
* @note Possible values are from AF0 to AF7 depending on target. |
||||
* @note Warning: only one pin can be passed as parameter. |
||||
* @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7 |
||||
* @param GPIOx GPIO Port |
||||
* @param Pin This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @param Alternate This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_AF_0 |
||||
* @arg @ref LL_GPIO_AF_1 |
||||
* @arg @ref LL_GPIO_AF_2 |
||||
* @arg @ref LL_GPIO_AF_3 |
||||
* @arg @ref LL_GPIO_AF_4 |
||||
* @arg @ref LL_GPIO_AF_5 |
||||
* @arg @ref LL_GPIO_AF_6 |
||||
* @arg @ref LL_GPIO_AF_7 |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate) |
||||
{ |
||||
MODIFY_REG(GPIOx->AFR[0], ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFRL0), |
||||
((((Pin * Pin) * Pin) * Pin) * Alternate)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port. |
||||
* @rmtoll AFRL AFSELy LL_GPIO_GetAFPin_0_7 |
||||
* @param GPIOx GPIO Port |
||||
* @param Pin This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_GPIO_AF_0 |
||||
* @arg @ref LL_GPIO_AF_1 |
||||
* @arg @ref LL_GPIO_AF_2 |
||||
* @arg @ref LL_GPIO_AF_3 |
||||
* @arg @ref LL_GPIO_AF_4 |
||||
* @arg @ref LL_GPIO_AF_5 |
||||
* @arg @ref LL_GPIO_AF_6 |
||||
* @arg @ref LL_GPIO_AF_7 |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin) |
||||
{ |
||||
return (uint32_t)(READ_BIT(GPIOx->AFR[0], |
||||
((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFRL0)) / (((Pin * Pin) * Pin) * Pin)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port. |
||||
* @note Possible values are from AF0 to AF7 depending on target. |
||||
* @note Warning: only one pin can be passed as parameter. |
||||
* @rmtoll AFRH AFSELy LL_GPIO_SetAFPin_8_15 |
||||
* @param GPIOx GPIO Port |
||||
* @param Pin This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @param Alternate This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_AF_0 |
||||
* @arg @ref LL_GPIO_AF_1 |
||||
* @arg @ref LL_GPIO_AF_2 |
||||
* @arg @ref LL_GPIO_AF_3 |
||||
* @arg @ref LL_GPIO_AF_4 |
||||
* @arg @ref LL_GPIO_AF_5 |
||||
* @arg @ref LL_GPIO_AF_6 |
||||
* @arg @ref LL_GPIO_AF_7 |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate) |
||||
{ |
||||
MODIFY_REG(GPIOx->AFR[1], (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFRH0), |
||||
(((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * Alternate)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port. |
||||
* @note Possible values are from AF0 to AF7 depending on target. |
||||
* @rmtoll AFRH AFSELy LL_GPIO_GetAFPin_8_15 |
||||
* @param GPIOx GPIO Port |
||||
* @param Pin This parameter can be one of the following values: |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_GPIO_AF_0 |
||||
* @arg @ref LL_GPIO_AF_1 |
||||
* @arg @ref LL_GPIO_AF_2 |
||||
* @arg @ref LL_GPIO_AF_3 |
||||
* @arg @ref LL_GPIO_AF_4 |
||||
* @arg @ref LL_GPIO_AF_5 |
||||
* @arg @ref LL_GPIO_AF_6 |
||||
* @arg @ref LL_GPIO_AF_7 |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin) |
||||
{ |
||||
return (uint32_t)(READ_BIT(GPIOx->AFR[1], |
||||
(((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFRH0)) / ((((Pin >> 8U) * |
||||
(Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U))); |
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Lock configuration of several pins for a dedicated port. |
||||
* @note When the lock sequence has been applied on a port bit, the |
||||
* value of this port bit can no longer be modified until the |
||||
* next reset. |
||||
* @note Each lock bit freezes a specific configuration register |
||||
* (control and alternate function registers). |
||||
* @rmtoll LCKR LCKK LL_GPIO_LockPin |
||||
* @param GPIOx GPIO Port |
||||
* @param PinMask This parameter can be a combination of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @arg @ref LL_GPIO_PIN_ALL |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask) |
||||
{ |
||||
__IO uint32_t temp; |
||||
WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask); |
||||
WRITE_REG(GPIOx->LCKR, PinMask); |
||||
WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask); |
||||
temp = READ_REG(GPIOx->LCKR); |
||||
(void) temp; |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0. |
||||
* @rmtoll LCKR LCKy LL_GPIO_IsPinLocked |
||||
* @param GPIOx GPIO Port |
||||
* @param PinMask This parameter can be a combination of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @arg @ref LL_GPIO_PIN_ALL |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask) |
||||
{ |
||||
return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return 1 if one of the pin of a dedicated port is locked. else return 0. |
||||
* @rmtoll LCKR LCKK LL_GPIO_IsAnyPinLocked |
||||
* @param GPIOx GPIO Port |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx) |
||||
{ |
||||
return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup GPIO_LL_EF_Data_Access Data Access
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Return full input data register value for a dedicated port. |
||||
* @rmtoll IDR IDy LL_GPIO_ReadInputPort |
||||
* @param GPIOx GPIO Port |
||||
* @retval Input data register value of port |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx) |
||||
{ |
||||
return (uint32_t)(READ_REG(GPIOx->IDR)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return if input data level for several pins of dedicated port is high or low. |
||||
* @rmtoll IDR IDy LL_GPIO_IsInputPinSet |
||||
* @param GPIOx GPIO Port |
||||
* @param PinMask This parameter can be a combination of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @arg @ref LL_GPIO_PIN_ALL |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask) |
||||
{ |
||||
return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Write output data register for the port. |
||||
* @rmtoll ODR ODy LL_GPIO_WriteOutputPort |
||||
* @param GPIOx GPIO Port |
||||
* @param PortValue Level value for each pin of the port |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue) |
||||
{ |
||||
WRITE_REG(GPIOx->ODR, PortValue); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return full output data register value for a dedicated port. |
||||
* @rmtoll ODR ODy LL_GPIO_ReadOutputPort |
||||
* @param GPIOx GPIO Port |
||||
* @retval Output data register value of port |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx) |
||||
{ |
||||
return (uint32_t)(READ_REG(GPIOx->ODR)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Return if input data level for several pins of dedicated port is high or low. |
||||
* @rmtoll ODR ODy LL_GPIO_IsOutputPinSet |
||||
* @param GPIOx GPIO Port |
||||
* @param PinMask This parameter can be a combination of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @arg @ref LL_GPIO_PIN_ALL |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask) |
||||
{ |
||||
return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set several pins to high level on dedicated gpio port. |
||||
* @rmtoll BSRR BSy LL_GPIO_SetOutputPin |
||||
* @param GPIOx GPIO Port |
||||
* @param PinMask This parameter can be a combination of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @arg @ref LL_GPIO_PIN_ALL |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask) |
||||
{ |
||||
WRITE_REG(GPIOx->BSRR, PinMask); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set several pins to low level on dedicated gpio port. |
||||
* @rmtoll BRR BRy LL_GPIO_ResetOutputPin |
||||
* @param GPIOx GPIO Port |
||||
* @param PinMask This parameter can be a combination of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @arg @ref LL_GPIO_PIN_ALL |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask) |
||||
{ |
||||
WRITE_REG(GPIOx->BRR, PinMask); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Toggle data value for several pin of dedicated port. |
||||
* @rmtoll ODR ODy LL_GPIO_TogglePin |
||||
* @param GPIOx GPIO Port |
||||
* @param PinMask This parameter can be a combination of the following values: |
||||
* @arg @ref LL_GPIO_PIN_0 |
||||
* @arg @ref LL_GPIO_PIN_1 |
||||
* @arg @ref LL_GPIO_PIN_2 |
||||
* @arg @ref LL_GPIO_PIN_3 |
||||
* @arg @ref LL_GPIO_PIN_4 |
||||
* @arg @ref LL_GPIO_PIN_5 |
||||
* @arg @ref LL_GPIO_PIN_6 |
||||
* @arg @ref LL_GPIO_PIN_7 |
||||
* @arg @ref LL_GPIO_PIN_8 |
||||
* @arg @ref LL_GPIO_PIN_9 |
||||
* @arg @ref LL_GPIO_PIN_10 |
||||
* @arg @ref LL_GPIO_PIN_11 |
||||
* @arg @ref LL_GPIO_PIN_12 |
||||
* @arg @ref LL_GPIO_PIN_13 |
||||
* @arg @ref LL_GPIO_PIN_14 |
||||
* @arg @ref LL_GPIO_PIN_15 |
||||
* @arg @ref LL_GPIO_PIN_ALL |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask) |
||||
{ |
||||
WRITE_REG(GPIOx->ODR, READ_REG(GPIOx->ODR) ^ PinMask); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#if defined(USE_FULL_LL_DRIVER) |
||||
/** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx); |
||||
ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct); |
||||
void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* USE_FULL_LL_DRIVER */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOH) */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_LL_GPIO_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,361 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_ll_iwdg.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of IWDG LL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_LL_IWDG_H |
||||
#define __STM32L0xx_LL_IWDG_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx.h" |
||||
|
||||
/** @addtogroup STM32L0xx_LL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
#if defined(IWDG) |
||||
|
||||
/** @defgroup IWDG_LL IWDG
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Private types -------------------------------------------------------------*/ |
||||
/* Private variables ---------------------------------------------------------*/ |
||||
|
||||
/* Private constants ---------------------------------------------------------*/ |
||||
/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LL_IWDG_KEY_RELOAD ((uint32_t)0x0000AAAAU) /*!< IWDG Reload Counter Enable */ |
||||
#define LL_IWDG_KEY_ENABLE ((uint32_t)0x0000CCCCU) /*!< IWDG Peripheral Enable */ |
||||
#define LL_IWDG_KEY_WR_ACCESS_ENABLE ((uint32_t)0x00005555U) /*!< IWDG KR Write Access Enable */ |
||||
#define LL_IWDG_KEY_WR_ACCESS_DISABLE ((uint32_t)0x00000000U) /*!< IWDG KR Write Access Disable */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
|
||||
* @brief Flags defines which can be used with LL_IWDG_ReadReg function |
||||
* @{ |
||||
*/ |
||||
#define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */ |
||||
#define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */ |
||||
#define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider
|
||||
* @{ |
||||
*/ |
||||
#define LL_IWDG_PRESCALER_4 ((uint32_t)0x00000000U) /*!< Divider by 4 */ |
||||
#define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */ |
||||
#define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */ |
||||
#define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */ |
||||
#define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */ |
||||
#define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */ |
||||
#define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
/** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Write a value in IWDG register |
||||
* @param __INSTANCE__ IWDG Instance |
||||
* @param __REG__ Register to be written |
||||
* @param __VALUE__ Value to be written in the register |
||||
* @retval None |
||||
*/ |
||||
#define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
||||
|
||||
/**
|
||||
* @brief Read a value in IWDG register |
||||
* @param __INSTANCE__ IWDG Instance |
||||
* @param __REG__ Register to be read |
||||
* @retval Register value |
||||
*/ |
||||
#define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
|
||||
* @{ |
||||
*/ |
||||
/** @defgroup IWDG_LL_EF_Configuration Configuration
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Start the Independent Watchdog |
||||
* @note Except if the hardware watchdog option is selected |
||||
* @rmtoll KR KEY LL_IWDG_Enable |
||||
* @param IWDGx IWDG Instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx) |
||||
{ |
||||
WRITE_REG(IWDG->KR, LL_IWDG_KEY_ENABLE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Reloads IWDG counter with value defined in the reload register |
||||
* @rmtoll KR KEY LL_IWDG_ReloadCounter |
||||
* @param IWDGx IWDG Instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx) |
||||
{ |
||||
WRITE_REG(IWDG->KR, LL_IWDG_KEY_RELOAD); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers |
||||
* @rmtoll KR KEY LL_IWDG_EnableWriteAccess |
||||
* @param IWDGx IWDG Instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx) |
||||
{ |
||||
WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers |
||||
* @rmtoll KR KEY LL_IWDG_DisableWriteAccess |
||||
* @param IWDGx IWDG Instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx) |
||||
{ |
||||
WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Select the prescaler of the IWDG |
||||
* @rmtoll PR PR LL_IWDG_SetPrescaler |
||||
* @param IWDGx IWDG Instance |
||||
* @param Prescaler This parameter can be one of the following values: |
||||
* @arg @ref LL_IWDG_PRESCALER_4 |
||||
* @arg @ref LL_IWDG_PRESCALER_8 |
||||
* @arg @ref LL_IWDG_PRESCALER_16 |
||||
* @arg @ref LL_IWDG_PRESCALER_32 |
||||
* @arg @ref LL_IWDG_PRESCALER_64 |
||||
* @arg @ref LL_IWDG_PRESCALER_128 |
||||
* @arg @ref LL_IWDG_PRESCALER_256 |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler) |
||||
{ |
||||
WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get the selected prescaler of the IWDG |
||||
* @rmtoll PR PR LL_IWDG_GetPrescaler |
||||
* @param IWDGx IWDG Instance |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_IWDG_PRESCALER_4 |
||||
* @arg @ref LL_IWDG_PRESCALER_8 |
||||
* @arg @ref LL_IWDG_PRESCALER_16 |
||||
* @arg @ref LL_IWDG_PRESCALER_32 |
||||
* @arg @ref LL_IWDG_PRESCALER_64 |
||||
* @arg @ref LL_IWDG_PRESCALER_128 |
||||
* @arg @ref LL_IWDG_PRESCALER_256 |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx) |
||||
{ |
||||
return (uint32_t)(READ_REG(IWDGx->PR)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Specify the IWDG down-counter reload value |
||||
* @rmtoll RLR RL LL_IWDG_SetReloadCounter |
||||
* @param IWDGx IWDG Instance |
||||
* @param Counter Value between Min_Data=0 and Max_Data=0x0FFF |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter) |
||||
{ |
||||
WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get the specified IWDG down-counter reload value |
||||
* @rmtoll RLR RL LL_IWDG_GetReloadCounter |
||||
* @param IWDGx IWDG Instance |
||||
* @retval Value between Min_Data=0 and Max_Data=0x0FFF |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx) |
||||
{ |
||||
return (uint32_t)(READ_REG(IWDGx->RLR)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Specify high limit of the window value to be compared to the down-counter. |
||||
* @rmtoll WINR WIN LL_IWDG_SetWindow |
||||
* @param IWDGx IWDG Instance |
||||
* @param Window Value between Min_Data=0 and Max_Data=0x0FFF |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window) |
||||
{ |
||||
WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get the high limit of the window value specified. |
||||
* @rmtoll WINR WIN LL_IWDG_GetWindow |
||||
* @param IWDGx IWDG Instance |
||||
* @retval Value between Min_Data=0 and Max_Data=0x0FFF |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx) |
||||
{ |
||||
return (uint32_t)(READ_REG(IWDGx->WINR)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Check if flag Prescaler Value Update is set or not |
||||
* @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU |
||||
* @param IWDGx IWDG Instance |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) |
||||
{ |
||||
return (READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if flag Reload Value Update is set or not |
||||
* @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU |
||||
* @param IWDGx IWDG Instance |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) |
||||
{ |
||||
return (READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if flag Window Value Update is set or not |
||||
* @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU |
||||
* @param IWDGx IWDG Instance |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx) |
||||
{ |
||||
return (READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not |
||||
* @rmtoll SR PVU LL_IWDG_IsReady\n |
||||
* SR WVU LL_IWDG_IsReady\n |
||||
* SR RVU LL_IWDG_IsReady |
||||
* @param IWDGx IWDG Instance |
||||
* @retval State of bits (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx) |
||||
{ |
||||
return (READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* IWDG) */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_LL_IWDG_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,759 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_ll_pwr.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of PWR LL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_LL_PWR_H |
||||
#define __STM32L0xx_LL_PWR_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx.h" |
||||
|
||||
/** @addtogroup STM32L0xx_LL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
#if defined(PWR) |
||||
|
||||
/** @defgroup PWR_LL PWR
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Private types -------------------------------------------------------------*/ |
||||
/* Private variables ---------------------------------------------------------*/ |
||||
/* Private constants ---------------------------------------------------------*/ |
||||
/* Private macros ------------------------------------------------------------*/ |
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
|
||||
* @brief Flags defines which can be used with LL_PWR_WriteReg function |
||||
* @{ |
||||
*/ |
||||
#define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */ |
||||
#define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
|
||||
* @brief Flags defines which can be used with LL_PWR_ReadReg function |
||||
* @{ |
||||
*/ |
||||
#define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */ |
||||
#define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */ |
||||
#if defined(PWR_PVD_SUPPORT) |
||||
#define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */ |
||||
#endif /* PWR_PVD_SUPPORT */ |
||||
#if defined(PWR_CSR_VREFINTRDYF) |
||||
#define LL_PWR_CSR_VREFINTRDYF PWR_CSR_VREFINTRDYF /*!< VREFINT ready flag */ |
||||
#endif /* PWR_CSR_VREFINTRDYF */ |
||||
#define LL_PWR_CSR_VOS PWR_CSR_VOSF /*!< Voltage scaling select flag */ |
||||
#define LL_PWR_CSR_REGLPF PWR_CSR_REGLPF /*!< Regulator low power flag */ |
||||
#define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP1 /*!< Enable WKUP pin 1 */ |
||||
#define LL_PWR_CSR_EWUP2 PWR_CSR_EWUP2 /*!< Enable WKUP pin 2 */ |
||||
#if defined(PWR_CSR_EWUP3) |
||||
#define LL_PWR_CSR_EWUP3 PWR_CSR_EWUP3 /*!< Enable WKUP pin 3 */ |
||||
#endif /* PWR_CSR_EWUP3 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup PWR_LL_EC_REGU_VOLTAGE Regulator Voltage
|
||||
* @{ |
||||
*/ |
||||
#define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR_VOS_0) /*!< 1.8V (range 1) */ |
||||
#define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR_VOS_1) /*!< 1.5V (range 2) */ |
||||
#define LL_PWR_REGU_VOLTAGE_SCALE3 (PWR_CR_VOS_0 | PWR_CR_VOS_1) /*!< 1.2V (range 3) */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup PWR_LL_EC_MODE_PWR Mode Power
|
||||
* @{ |
||||
*/ |
||||
#define LL_PWR_MODE_STOP 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */ |
||||
#define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup PWR_LL_EC_REGU_MODE_LP_MODES Regulator Mode In Low Power Modes
|
||||
* @{ |
||||
*/ |
||||
#define LL_PWR_REGU_LPMODES_MAIN 0x00000000U /*!< Voltage regulator in main mode during deepsleep/sleep/low-power run mode */ |
||||
#define LL_PWR_REGU_LPMODES_LOW_POWER (PWR_CR_LPSDSR) /*!< Voltage regulator in low-power mode during deepsleep/sleep/low-power run mode */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#if defined(PWR_CR_LPDS) |
||||
/** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
|
||||
* @{ |
||||
*/ |
||||
#define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage regulator in main mode during deepsleep mode when PWR_CR_LPSDSR = 0 */ |
||||
#define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage regulator in low-power mode during deepsleep mode when PWR_CR_LPSDSR = 0 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* PWR_CR_LPDS */ |
||||
|
||||
#if defined(PWR_PVD_SUPPORT) |
||||
/** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
|
||||
* @{ |
||||
*/ |
||||
#define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 1.9 V */ |
||||
#define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.1 V */ |
||||
#define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.3 V */ |
||||
#define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */ |
||||
#define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.7 V */ |
||||
#define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.9 V */ |
||||
#define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 3.1 V */ |
||||
#define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< External input analog voltage (Compare internally to VREFINT) */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* PWR_PVD_SUPPORT */ |
||||
/** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
|
||||
* @{ |
||||
*/ |
||||
#define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP1) /*!< WKUP pin 1 : PA0 */ |
||||
#define LL_PWR_WAKEUP_PIN2 (PWR_CSR_EWUP2) /*!< WKUP pin 2 : PC13 */ |
||||
#if defined(PWR_CSR_EWUP3) |
||||
#define LL_PWR_WAKEUP_PIN3 (PWR_CSR_EWUP3) /*!< WKUP pin 3 : PE6 or PA2 according to device */ |
||||
#endif /* PWR_CSR_EWUP3 */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
/** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Write a value in PWR register |
||||
* @param __REG__ Register to be written |
||||
* @param __VALUE__ Value to be written in the register |
||||
* @retval None |
||||
*/ |
||||
#define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__)) |
||||
|
||||
/**
|
||||
* @brief Read a value in PWR register |
||||
* @param __REG__ Register to be read |
||||
* @retval Register value |
||||
*/ |
||||
#define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup PWR_LL_EF_Configuration Configuration
|
||||
* @{ |
||||
*/ |
||||
/**
|
||||
* @brief Switch the regulator from main mode to low-power mode |
||||
* @rmtoll CR LPRUN LL_PWR_EnableLowPowerRunMode |
||||
* @note Remind to set the regulator to low power before enabling |
||||
* LowPower run mode (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER). |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void) |
||||
{ |
||||
SET_BIT(PWR->CR, PWR_CR_LPRUN); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Switch the regulator from low-power mode to main mode |
||||
* @rmtoll CR LPRUN LL_PWR_DisableLowPowerRunMode |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void) |
||||
{ |
||||
CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if the regulator is in low-power mode |
||||
* @rmtoll CR LPRUN LL_PWR_IsEnabledLowPowerRunMode |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void) |
||||
{ |
||||
return (READ_BIT(PWR->CR, PWR_CR_LPRUN) == (PWR_CR_LPRUN)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set voltage regulator to low-power and switch from
|
||||
* run main mode to run low-power mode. |
||||
* @rmtoll CR LPSDSR LL_PWR_EnterLowPowerRunMode\n |
||||
* CR LPRUN LL_PWR_EnterLowPowerRunMode |
||||
* @note This "high level" function is introduced to provide functional |
||||
* compatibility with other families. Notice that the two registers |
||||
* have to be written sequentially, so this function is not atomic. |
||||
* To assure atomicity you can call separately the following functions: |
||||
* - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_LOW_POWER); |
||||
* - @ref LL_PWR_EnableLowPowerRunMode(); |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void) |
||||
{ |
||||
SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */ |
||||
SET_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_EnableLowPowerRunMode() */ |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set voltage regulator to main and switch from
|
||||
* run main mode to low-power mode. |
||||
* @rmtoll CR LPSDSR LL_PWR_ExitLowPowerRunMode\n |
||||
* CR LPRUN LL_PWR_ExitLowPowerRunMode |
||||
* @note This "high level" function is introduced to provide functional
|
||||
* compatibility with other families. Notice that the two registers
|
||||
* have to be written sequentially, so this function is not atomic. |
||||
* To assure atomicity you can call separately the following functions: |
||||
* - @ref LL_PWR_DisableLowPowerRunMode(); |
||||
* - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_MAIN); |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void) |
||||
{ |
||||
CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_DisableLowPowerRunMode() */ |
||||
CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */ |
||||
} |
||||
/**
|
||||
* @brief Set the main internal regulator output voltage |
||||
* @rmtoll CR VOS LL_PWR_SetRegulVoltageScaling |
||||
* @param VoltageScaling This parameter can be one of the following values: |
||||
* @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 |
||||
* @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 |
||||
* @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3 |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling) |
||||
{ |
||||
MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get the main internal regulator output voltage |
||||
* @rmtoll CR VOS LL_PWR_GetRegulVoltageScaling |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 |
||||
* @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 |
||||
* @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3 |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable access to the backup domain |
||||
* @rmtoll CR DBP LL_PWR_EnableBkUpAccess |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void) |
||||
{ |
||||
SET_BIT(PWR->CR, PWR_CR_DBP); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable access to the backup domain |
||||
* @rmtoll CR DBP LL_PWR_DisableBkUpAccess |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_DisableBkUpAccess(void) |
||||
{ |
||||
CLEAR_BIT(PWR->CR, PWR_CR_DBP); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if the backup domain is enabled |
||||
* @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void) |
||||
{ |
||||
return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Set voltage regulator mode during low power modes |
||||
* @rmtoll CR LPSDSR LL_PWR_SetRegulModeLP |
||||
* @param RegulMode This parameter can be one of the following values: |
||||
* @arg @ref LL_PWR_REGU_LPMODES_MAIN |
||||
* @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_SetRegulModeLP(uint32_t RegulMode) |
||||
{ |
||||
MODIFY_REG(PWR->CR, PWR_CR_LPSDSR, RegulMode); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get voltage regulator mode during low power modes |
||||
* @rmtoll CR LPSDSR LL_PWR_GetRegulModeLP |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_PWR_REGU_LPMODES_MAIN |
||||
* @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_GetRegulModeLP(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPSDSR)); |
||||
} |
||||
|
||||
#if defined(PWR_CR_LPDS) |
||||
/**
|
||||
* @brief Set voltage regulator mode during deep sleep mode |
||||
* @rmtoll CR LPDS LL_PWR_SetRegulModeDS |
||||
* @param RegulMode This parameter can be one of the following values: |
||||
* @arg @ref LL_PWR_REGU_DSMODE_MAIN |
||||
* @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode) |
||||
{ |
||||
MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get voltage regulator mode during deep sleep mode |
||||
* @rmtoll CR LPDS LL_PWR_GetRegulModeDS |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_PWR_REGU_DSMODE_MAIN |
||||
* @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS)); |
||||
} |
||||
#endif /* PWR_CR_LPDS */ |
||||
|
||||
/**
|
||||
* @brief Set power down mode when CPU enters deepsleep |
||||
* @rmtoll CR PDDS LL_PWR_SetPowerMode |
||||
* @param PDMode This parameter can be one of the following values: |
||||
* @arg @ref LL_PWR_MODE_STOP |
||||
* @arg @ref LL_PWR_MODE_STANDBY |
||||
* @note Set the regulator to low power (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER)
|
||||
* before setting MODE_STOP. If the regulator remains in "main mode",
|
||||
* it consumes more power without providing any additional feature.
|
||||
* In MODE_STANDBY the regulator is automatically off. |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode) |
||||
{ |
||||
MODIFY_REG(PWR->CR, PWR_CR_PDDS, PDMode); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get power down mode when CPU enters deepsleep |
||||
* @rmtoll CR PDDS LL_PWR_GetPowerMode |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_PWR_MODE_STOP |
||||
* @arg @ref LL_PWR_MODE_STANDBY |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PDDS)); |
||||
} |
||||
|
||||
#if defined(PWR_PVD_SUPPORT) |
||||
/**
|
||||
* @brief Configure the voltage threshold detected by the Power Voltage Detector |
||||
* @rmtoll CR PLS LL_PWR_SetPVDLevel |
||||
* @param PVDLevel This parameter can be one of the following values: |
||||
* @arg @ref LL_PWR_PVDLEVEL_0 |
||||
* @arg @ref LL_PWR_PVDLEVEL_1 |
||||
* @arg @ref LL_PWR_PVDLEVEL_2 |
||||
* @arg @ref LL_PWR_PVDLEVEL_3 |
||||
* @arg @ref LL_PWR_PVDLEVEL_4 |
||||
* @arg @ref LL_PWR_PVDLEVEL_5 |
||||
* @arg @ref LL_PWR_PVDLEVEL_6 |
||||
* @arg @ref LL_PWR_PVDLEVEL_7 |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel) |
||||
{ |
||||
MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get the voltage threshold detection |
||||
* @rmtoll CR PLS LL_PWR_GetPVDLevel |
||||
* @retval Returned value can be one of the following values: |
||||
* @arg @ref LL_PWR_PVDLEVEL_0 |
||||
* @arg @ref LL_PWR_PVDLEVEL_1 |
||||
* @arg @ref LL_PWR_PVDLEVEL_2 |
||||
* @arg @ref LL_PWR_PVDLEVEL_3 |
||||
* @arg @ref LL_PWR_PVDLEVEL_4 |
||||
* @arg @ref LL_PWR_PVDLEVEL_5 |
||||
* @arg @ref LL_PWR_PVDLEVEL_6 |
||||
* @arg @ref LL_PWR_PVDLEVEL_7 |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void) |
||||
{ |
||||
return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable Power Voltage Detector |
||||
* @rmtoll CR PVDE LL_PWR_EnablePVD |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_EnablePVD(void) |
||||
{ |
||||
SET_BIT(PWR->CR, PWR_CR_PVDE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable Power Voltage Detector |
||||
* @rmtoll CR PVDE LL_PWR_DisablePVD |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_DisablePVD(void) |
||||
{ |
||||
CLEAR_BIT(PWR->CR, PWR_CR_PVDE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if Power Voltage Detector is enabled |
||||
* @rmtoll CR PVDE LL_PWR_IsEnabledPVD |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void) |
||||
{ |
||||
return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE)); |
||||
} |
||||
#endif /* PWR_PVD_SUPPORT */ |
||||
|
||||
/**
|
||||
* @brief Enable the WakeUp PINx functionality |
||||
* @rmtoll CSR EWUP1 LL_PWR_EnableWakeUpPin\n |
||||
* @rmtoll CSR EWUP2 LL_PWR_EnableWakeUpPin\n |
||||
* @rmtoll CSR EWUP3 LL_PWR_EnableWakeUpPin |
||||
* @param WakeUpPin This parameter can be one of the following values: |
||||
* @arg @ref LL_PWR_WAKEUP_PIN1 |
||||
* @arg @ref LL_PWR_WAKEUP_PIN2 |
||||
* @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
||||
* |
||||
* (*) not available on all devices |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin) |
||||
{ |
||||
SET_BIT(PWR->CSR, WakeUpPin); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable the WakeUp PINx functionality |
||||
* @rmtoll CSR EWUP1 LL_PWR_DisableWakeUpPin\n |
||||
* @rmtoll CSR EWUP2 LL_PWR_DisableWakeUpPin\n |
||||
* @rmtoll CSR EWUP3 LL_PWR_DisableWakeUpPin |
||||
* @param WakeUpPin This parameter can be one of the following values: |
||||
* @arg @ref LL_PWR_WAKEUP_PIN1 |
||||
* @arg @ref LL_PWR_WAKEUP_PIN2 |
||||
* @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
||||
* |
||||
* (*) not available on all devices |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin) |
||||
{ |
||||
CLEAR_BIT(PWR->CSR, WakeUpPin); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if the WakeUp PINx functionality is enabled |
||||
* @rmtoll CSR EWUP1 LL_PWR_IsEnabledWakeUpPin\n |
||||
* @rmtoll CSR EWUP2 LL_PWR_IsEnabledWakeUpPin\n |
||||
* @rmtoll CSR EWUP3 LL_PWR_IsEnabledWakeUpPin |
||||
* @param WakeUpPin This parameter can be one of the following values: |
||||
* @arg @ref LL_PWR_WAKEUP_PIN1 |
||||
* @arg @ref LL_PWR_WAKEUP_PIN2 |
||||
* @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
||||
* |
||||
* (*) not available on all devices |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin) |
||||
{ |
||||
return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable ultra low-power mode by enabling VREFINT switch off in low-power modes |
||||
* @rmtoll CR ULP LL_PWR_EnableUltraLowPower |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_EnableUltraLowPower(void) |
||||
{ |
||||
SET_BIT(PWR->CR, PWR_CR_ULP); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable ultra low-power mode by disabling VREFINT switch off in low-power modes |
||||
* @rmtoll CR ULP LL_PWR_DisableUltraLowPower |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_DisableUltraLowPower(void) |
||||
{ |
||||
CLEAR_BIT(PWR->CR, PWR_CR_ULP); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if ultra low-power mode is enabled by checking if VREFINT switch off in low-power modes is enabled |
||||
* @rmtoll CR ULP LL_PWR_IsEnabledUltraLowPower |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsEnabledUltraLowPower(void) |
||||
{ |
||||
return (READ_BIT(PWR->CR, PWR_CR_ULP) == (PWR_CR_ULP)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable fast wakeup by ignoring VREFINT startup time when exiting from low-power mode |
||||
* @rmtoll CR FWU LL_PWR_EnableFastWakeUp |
||||
* @note Works in conjunction with ultra low power mode. |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_EnableFastWakeUp(void) |
||||
{ |
||||
SET_BIT(PWR->CR, PWR_CR_FWU); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable fast wakeup by waiting VREFINT startup time when exiting from low-power mode |
||||
* @rmtoll CR FWU LL_PWR_DisableFastWakeUp |
||||
* @note Works in conjunction with ultra low power mode. |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_DisableFastWakeUp(void) |
||||
{ |
||||
CLEAR_BIT(PWR->CR, PWR_CR_FWU); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if fast wakeup is enabled by checking if VREFINT startup time when exiting from low-power mode is ignored |
||||
* @rmtoll CR FWU LL_PWR_IsEnabledFastWakeUp |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsEnabledFastWakeUp(void) |
||||
{ |
||||
return (READ_BIT(PWR->CR, PWR_CR_FWU) == (PWR_CR_FWU)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable non-volatile memory (Flash and EEPROM) keeping off feature when exiting from low-power mode |
||||
* @rmtoll CR DS_EE_KOFF LL_PWR_EnableNVMKeptOff |
||||
* @note When enabled, after entering low-power mode (Stop or Standby only), if RUN_PD of FLASH_ACR register |
||||
* is also set, the Flash memory will not be woken up when exiting from deepsleep mode. |
||||
* When enabled, the EEPROM will not be woken up when exiting from low-power mode (if the bit RUN_PD is set) |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_EnableNVMKeptOff(void) |
||||
{ |
||||
SET_BIT(PWR->CR, PWR_CR_DSEEKOFF); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable non-volatile memory (Flash and EEPROM) keeping off feature when exiting from low-power mode |
||||
* @rmtoll CR DS_EE_KOFF LL_PWR_DisableNVMKeptOff |
||||
* @note When disabled, Flash memory is woken up when exiting from deepsleep mode even if the bit RUN_PD is set |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_DisableNVMKeptOff(void) |
||||
{ |
||||
CLEAR_BIT(PWR->CR, PWR_CR_DSEEKOFF); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if non-volatile memory (Flash and EEPROM) keeping off feature when exiting from low-power mode is enabled |
||||
* @rmtoll CR DS_EE_KOFF LL_PWR_IsEnabledNVMKeptOff |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsEnabledNVMKeptOff(void) |
||||
{ |
||||
return (READ_BIT(PWR->CR, PWR_CR_DSEEKOFF) == (PWR_CR_DSEEKOFF)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Get Wake-up Flag |
||||
* @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void) |
||||
{ |
||||
return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get Standby Flag |
||||
* @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void) |
||||
{ |
||||
return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF)); |
||||
} |
||||
|
||||
#if defined(PWR_PVD_SUPPORT) |
||||
/**
|
||||
* @brief Indicate whether VDD voltage is below the selected PVD threshold |
||||
* @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void) |
||||
{ |
||||
return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO)); |
||||
} |
||||
#endif /* PWR_PVD_SUPPORT */ |
||||
|
||||
#if defined(PWR_CSR_VREFINTRDYF) |
||||
/**
|
||||
* @brief Get Internal Reference VrefInt Flag |
||||
* @rmtoll CSR VREFINTRDYF LL_PWR_IsActiveFlag_VREFINTRDY |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void) |
||||
{ |
||||
return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF)); |
||||
} |
||||
#endif /* PWR_CSR_VREFINTRDYF */ |
||||
/**
|
||||
* @brief Indicate whether the regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level |
||||
* @rmtoll CSR VOSF LL_PWR_IsActiveFlag_VOSF |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOSF(void) |
||||
{ |
||||
return (READ_BIT(PWR->CSR, LL_PWR_CSR_VOS) == (LL_PWR_CSR_VOS)); |
||||
} |
||||
/**
|
||||
* @brief Indicate whether the regulator is ready in main mode or is in low-power mode |
||||
* @rmtoll CSR REGLPF LL_PWR_IsActiveFlag_REGLPF |
||||
* @note Take care, return value "0" means the regulator is ready. Return value "1" means the output voltage range is still changing. |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void) |
||||
{ |
||||
return (READ_BIT(PWR->CSR, PWR_CSR_REGLPF) == (PWR_CSR_REGLPF)); |
||||
} |
||||
/**
|
||||
* @brief Clear Standby Flag |
||||
* @rmtoll CR CSBF LL_PWR_ClearFlag_SB |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_ClearFlag_SB(void) |
||||
{ |
||||
SET_BIT(PWR->CR, PWR_CR_CSBF); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clear Wake-up Flags |
||||
* @rmtoll CR CWUF LL_PWR_ClearFlag_WU |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_PWR_ClearFlag_WU(void) |
||||
{ |
||||
SET_BIT(PWR->CR, PWR_CR_CWUF); |
||||
} |
||||
#if defined(USE_FULL_LL_DRIVER) |
||||
/** @defgroup PWR_LL_EF_Init De-initialization function
|
||||
* @{ |
||||
*/ |
||||
ErrorStatus LL_PWR_DeInit(void); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* USE_FULL_LL_DRIVER */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* defined(PWR) */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_LL_PWR_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
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||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32l0xx_ll_rng.h |
||||
* @author MCD Application Team |
||||
* @brief Header file of RNG LL module. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32L0xx_LL_RNG_H |
||||
#define __STM32L0xx_LL_RNG_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32l0xx.h" |
||||
|
||||
/** @addtogroup STM32L0xx_LL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
#if defined(RNG) |
||||
|
||||
/** @defgroup RNG_LL RNG
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Private types -------------------------------------------------------------*/ |
||||
/* Private variables ---------------------------------------------------------*/ |
||||
/* Private constants ---------------------------------------------------------*/ |
||||
/* Private macros ------------------------------------------------------------*/ |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
/* Exported constants --------------------------------------------------------*/ |
||||
/** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines
|
||||
* @brief Flags defines which can be used with LL_RNG_ReadReg function |
||||
* @{ |
||||
*/ |
||||
#define LL_RNG_SR_DRDY RNG_SR_DRDY /*!< Register contains valid random data */ |
||||
#define LL_RNG_SR_CECS RNG_SR_CECS /*!< Clock error current status */ |
||||
#define LL_RNG_SR_SECS RNG_SR_SECS /*!< Seed error current status */ |
||||
#define LL_RNG_SR_CEIS RNG_SR_CEIS /*!< Clock error interrupt status */ |
||||
#define LL_RNG_SR_SEIS RNG_SR_SEIS /*!< Seed error interrupt status */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup RNG_LL_EC_IT IT Defines
|
||||
* @brief IT defines which can be used with LL_RNG_ReadReg and LL_RNG_WriteReg macros |
||||
* @{ |
||||
*/ |
||||
#define LL_RNG_CR_IE RNG_CR_IE /*!< RNG Interrupt enable */ |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
/** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Write a value in RNG register |
||||
* @param __INSTANCE__ RNG Instance |
||||
* @param __REG__ Register to be written |
||||
* @param __VALUE__ Value to be written in the register |
||||
* @retval None |
||||
*/ |
||||
#define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
||||
|
||||
/**
|
||||
* @brief Read a value in RNG register |
||||
* @param __INSTANCE__ RNG Instance |
||||
* @param __REG__ Register to be read |
||||
* @retval Register value |
||||
*/ |
||||
#define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/ |
||||
/** @defgroup RNG_LL_Exported_Functions RNG Exported Functions
|
||||
* @{ |
||||
*/ |
||||
/** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable Random Number Generation |
||||
* @rmtoll CR RNGEN LL_RNG_Enable |
||||
* @param RNGx RNG Instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx) |
||||
{ |
||||
SET_BIT(RNGx->CR, RNG_CR_RNGEN); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable Random Number Generation |
||||
* @rmtoll CR RNGEN LL_RNG_Disable |
||||
* @param RNGx RNG Instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx) |
||||
{ |
||||
CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if Random Number Generator is enabled |
||||
* @rmtoll CR RNGEN LL_RNG_IsEnabled |
||||
* @param RNGx RNG Instance |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx) |
||||
{ |
||||
return (READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Indicate if the RNG Data ready Flag is set or not |
||||
* @rmtoll SR DRDY LL_RNG_IsActiveFlag_DRDY |
||||
* @param RNGx RNG Instance |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx) |
||||
{ |
||||
return (READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Indicate if the Clock Error Current Status Flag is set or not |
||||
* @rmtoll SR CECS LL_RNG_IsActiveFlag_CECS |
||||
* @param RNGx RNG Instance |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx) |
||||
{ |
||||
return (READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Indicate if the Seed Error Current Status Flag is set or not |
||||
* @rmtoll SR SECS LL_RNG_IsActiveFlag_SECS |
||||
* @param RNGx RNG Instance |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx) |
||||
{ |
||||
return (READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Indicate if the Clock Error Interrupt Status Flag is set or not |
||||
* @rmtoll SR CEIS LL_RNG_IsActiveFlag_CEIS |
||||
* @param RNGx RNG Instance |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx) |
||||
{ |
||||
return (READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Indicate if the Seed Error Interrupt Status Flag is set or not |
||||
* @rmtoll SR SEIS LL_RNG_IsActiveFlag_SEIS |
||||
* @param RNGx RNG Instance |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx) |
||||
{ |
||||
return (READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS)); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clear Clock Error interrupt Status (CEIS) Flag |
||||
* @rmtoll SR CEIS LL_RNG_ClearFlag_CEIS |
||||
* @param RNGx RNG Instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx) |
||||
{ |
||||
WRITE_REG(RNGx->SR, ~RNG_SR_CEIS); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clear Seed Error interrupt Status (SEIS) Flag |
||||
* @rmtoll SR SEIS LL_RNG_ClearFlag_SEIS |
||||
* @param RNGx RNG Instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx) |
||||
{ |
||||
WRITE_REG(RNGx->SR, ~RNG_SR_SEIS); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup RNG_LL_EF_IT_Management IT Management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Enable Random Number Generator Interrupt |
||||
* (applies for either Seed error, Clock Error or Data ready interrupts) |
||||
* @rmtoll CR IE LL_RNG_EnableIT |
||||
* @param RNGx RNG Instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx) |
||||
{ |
||||
SET_BIT(RNGx->CR, RNG_CR_IE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Disable Random Number Generator Interrupt |
||||
* (applies for either Seed error, Clock Error or Data ready interrupts) |
||||
* @rmtoll CR IE LL_RNG_DisableIT |
||||
* @param RNGx RNG Instance |
||||
* @retval None |
||||
*/ |
||||
__STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx) |
||||
{ |
||||
CLEAR_BIT(RNGx->CR, RNG_CR_IE); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Check if Random Number Generator Interrupt is enabled |
||||
* (applies for either Seed error, Clock Error or Data ready interrupts) |
||||
* @rmtoll CR IE LL_RNG_IsEnabledIT |
||||
* @param RNGx RNG Instance |
||||
* @retval State of bit (1 or 0). |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx) |
||||
{ |
||||
return (READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @defgroup RNG_LL_EF_Data_Management Data Management
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Return32-bit Random Number value |
||||
* @rmtoll DR RNDATA LL_RNG_ReadRandData32 |
||||
* @param RNGx RNG Instance |
||||
* @retval Generated 32-bit random value |
||||
*/ |
||||
__STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx) |
||||
{ |
||||
return (uint32_t)(READ_REG(RNGx->DR)); |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#if defined(USE_FULL_LL_DRIVER) |
||||
/** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx); |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
#endif /* USE_FULL_LL_DRIVER */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#endif /* defined(RNG) */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32L0xx_LL_RNG_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
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