parent
							
								
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						commit
						5e8886579f
					
				@ -1,147 +0,0 @@ | 
				
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TEMPLATE = app | 
				
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CONFIG += console | 
				
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CONFIG -= app_bundle | 
				
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CONFIG -= qt | 
				
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 | 
				
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INCLUDEPATH += \ | 
				
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	project \ | 
				
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	lib/spl/inc \ | 
				
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	lib/cmsis \ | 
				
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	lib/sbmp/library \ | 
				
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	/usr/arm-none-eabi/include \ | 
				
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	/usr/lib/gcc/arm-none-eabi/5.3.0/include/ | 
				
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 | 
				
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DEFINES += F_CPU=72000000UL \ | 
				
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		   STM32F10X_MD \ | 
				
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		   USE_STDPERIPH_DRIVER \ | 
				
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		   __null=0 \ | 
				
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		   __STATIC_INLINE="static inline" \ | 
				
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		   __INLINE="inline" \ | 
				
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		   __ASM=__asm \ | 
				
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		   __CORTEX_M=3 \ | 
				
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		   VERBOSE_LOGGING=1 | 
				
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 | 
				
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HEADERS += \ | 
				
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	lib/cmsis/core_cm3.h \ | 
				
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	lib/cmsis/stm32f10x.h \ | 
				
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	lib/sbmp/library/crc32.h \ | 
				
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	lib/sbmp/library/payload_builder.h \ | 
				
			||||
	lib/sbmp/library/payload_parser.h \ | 
				
			||||
	lib/sbmp/library/sbmp.h \ | 
				
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	lib/sbmp/library/sbmp_bulk.h \ | 
				
			||||
	lib/sbmp/library/sbmp_checksum.h \ | 
				
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	lib/sbmp/library/sbmp_config.example.h \ | 
				
			||||
	lib/sbmp/library/sbmp_datagram.h \ | 
				
			||||
	lib/sbmp/library/sbmp_frame.h \ | 
				
			||||
	lib/sbmp/library/sbmp_session.h \ | 
				
			||||
	lib/sbmp/library/type_coerce.h \ | 
				
			||||
	lib/spl/inc/misc.h \ | 
				
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	lib/spl/inc/stm32f10x_adc.h \ | 
				
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	lib/spl/inc/stm32f10x_bkp.h \ | 
				
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	lib/spl/inc/stm32f10x_can.h \ | 
				
			||||
	lib/spl/inc/stm32f10x_cec.h \ | 
				
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	lib/spl/inc/stm32f10x_crc.h \ | 
				
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	lib/spl/inc/stm32f10x_dac.h \ | 
				
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	lib/spl/inc/stm32f10x_dbgmcu.h \ | 
				
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	lib/spl/inc/stm32f10x_dma.h \ | 
				
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	lib/spl/inc/stm32f10x_exti.h \ | 
				
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	lib/spl/inc/stm32f10x_flash.h \ | 
				
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	lib/spl/inc/stm32f10x_fsmc.h \ | 
				
			||||
	lib/spl/inc/stm32f10x_gpio.h \ | 
				
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	lib/spl/inc/stm32f10x_i2c.h \ | 
				
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	lib/spl/inc/stm32f10x_iwdg.h \ | 
				
			||||
	lib/spl/inc/stm32f10x_pwr.h \ | 
				
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	lib/spl/inc/stm32f10x_rcc.h \ | 
				
			||||
	lib/spl/inc/stm32f10x_rtc.h \ | 
				
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	lib/spl/inc/stm32f10x_sdio.h \ | 
				
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	lib/spl/inc/stm32f10x_spi.h \ | 
				
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	lib/spl/inc/stm32f10x_tim.h \ | 
				
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	lib/spl/inc/stm32f10x_usart.h \ | 
				
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	lib/spl/inc/stm32f10x_wwdg.h \ | 
				
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	project/stm32f10x_conf.h \ | 
				
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	project/stm32f10x_it.h \ | 
				
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	project/system_stm32f10x.h \ | 
				
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	project/sbmp_config.h \ | 
				
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	project/com/com_fileio.h \ | 
				
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	project/com/com_iface.h \ | 
				
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	project/com/datalink.h \ | 
				
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	project/com/debug.h \ | 
				
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	project/com/iface_noop.h \ | 
				
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	project/com/iface_usart.h \ | 
				
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	project/utils/circbuf.h \ | 
				
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	project/utils/minmax.h \ | 
				
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	project/utils/timebase.h \ | 
				
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	project/colorled.h \ | 
				
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	project/malloc_safe.h \ | 
				
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	project/hw_init.h \ | 
				
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	project/utils/debounce.h \ | 
				
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	project/bus/event_handler.h \ | 
				
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	project/bus/event_queue.h \ | 
				
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	project/utils/str_utils.h \ | 
				
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	project/main.h \ | 
				
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	project/utils/matcher.h \ | 
				
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	project/utils/meanbuf.h \ | 
				
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    project/display.h | 
				
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 | 
				
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SOURCES += \ | 
				
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	lib/cmsis/core_cm3.c \ | 
				
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	lib/sbmp/library/crc32.c \ | 
				
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	lib/sbmp/library/payload_builder.c \ | 
				
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	lib/sbmp/library/payload_parser.c \ | 
				
			||||
	lib/sbmp/library/sbmp_bulk.c \ | 
				
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	lib/sbmp/library/sbmp_checksum.c \ | 
				
			||||
	lib/sbmp/library/sbmp_datagram.c \ | 
				
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	lib/sbmp/library/sbmp_frame.c \ | 
				
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	lib/sbmp/library/sbmp_session.c \ | 
				
			||||
	lib/spl/src/misc.c \ | 
				
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	lib/spl/src/stm32f10x_adc.c \ | 
				
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	lib/spl/src/stm32f10x_bkp.c \ | 
				
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	lib/spl/src/stm32f10x_can.c \ | 
				
			||||
	lib/spl/src/stm32f10x_cec.c \ | 
				
			||||
	lib/spl/src/stm32f10x_crc.c \ | 
				
			||||
	lib/spl/src/stm32f10x_dac.c \ | 
				
			||||
	lib/spl/src/stm32f10x_dbgmcu.c \ | 
				
			||||
	lib/spl/src/stm32f10x_dma.c \ | 
				
			||||
	lib/spl/src/stm32f10x_exti.c \ | 
				
			||||
	lib/spl/src/stm32f10x_flash.c \ | 
				
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	lib/spl/src/stm32f10x_fsmc.c \ | 
				
			||||
	lib/spl/src/stm32f10x_gpio.c \ | 
				
			||||
	lib/spl/src/stm32f10x_i2c.c \ | 
				
			||||
	lib/spl/src/stm32f10x_iwdg.c \ | 
				
			||||
	lib/spl/src/stm32f10x_pwr.c \ | 
				
			||||
	lib/spl/src/stm32f10x_rcc.c \ | 
				
			||||
	lib/spl/src/stm32f10x_rtc.c \ | 
				
			||||
	lib/spl/src/stm32f10x_sdio.c \ | 
				
			||||
	lib/spl/src/stm32f10x_spi.c \ | 
				
			||||
	lib/spl/src/stm32f10x_tim.c \ | 
				
			||||
	lib/spl/src/stm32f10x_usart.c \ | 
				
			||||
	lib/spl/src/stm32f10x_wwdg.c \ | 
				
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	project/main.c \ | 
				
			||||
	project/stm32f10x_it.c \ | 
				
			||||
	project/system_stm32f10x.c \ | 
				
			||||
	project/com/com_fileio.c \ | 
				
			||||
	project/com/com_iface.c \ | 
				
			||||
	project/com/datalink.c \ | 
				
			||||
	project/com/debug.c \ | 
				
			||||
	project/com/iface_noop.c \ | 
				
			||||
	project/com/iface_usart.c \ | 
				
			||||
	project/utils/circbuf.c \ | 
				
			||||
	project/utils/debounce.c \ | 
				
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	project/utils/timebase.c \ | 
				
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	project/colorled.c \ | 
				
			||||
	project/hw_init.c \ | 
				
			||||
	project/malloc_safe.c \ | 
				
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	project/spl_assert.c \ | 
				
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	project/syscalls.c \ | 
				
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	project/bus/event_handler.c \ | 
				
			||||
	project/bus/event_queue.c \ | 
				
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	project/utils/str_utils.c \ | 
				
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	project/utils/matcher.c \ | 
				
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	project/utils/meanbuf.c \ | 
				
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    project/display.c | 
				
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 | 
				
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DISTFILES += \ | 
				
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	style.astylerc \ | 
				
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	Makefile \ | 
				
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	lib/cmsis/startup_stm32f10x_md.s \ | 
				
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	lib/cmsis/stm32_flash.ld | 
				
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@ -1,299 +0,0 @@ | 
				
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<?xml version="1.0" encoding="UTF-8"?> | 
				
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<!DOCTYPE QtCreatorProject> | 
				
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<!-- Written by QtCreator 3.6.1, 2016-05-12T09:24:15. --> | 
				
			||||
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  <variable>ProjectExplorer.Project.ActiveTarget</variable> | 
				
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   <value type="bool" key="EditorConfiguration.CamelCaseNavigation">true</value> | 
				
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   <valuemap type="QVariantMap" key="EditorConfiguration.CodeStyle.0"> | 
				
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    <value type="QString" key="language">Cpp</value> | 
				
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     <value type="QByteArray" key="CurrentPreferences">CppGlobal</value> | 
				
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			||||
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			||||
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			||||
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			||||
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			||||
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			||||
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			||||
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			||||
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			||||
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			||||
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			||||
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			||||
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			||||
    <value type="int" key="PE.EnvironmentAspect.Base">2</value> | 
				
			||||
    <valuelist type="QVariantList" key="PE.EnvironmentAspect.Changes"/> | 
				
			||||
    <value type="QString" key="ProjectExplorer.CustomExecutableRunConfiguration.Arguments">flash</value> | 
				
			||||
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			||||
    <value type="QString" key="ProjectExplorer.CustomExecutableRunConfiguration.WorkingDirectory">%{buildDir}</value> | 
				
			||||
    <value type="QString" key="ProjectExplorer.ProjectConfiguration.DefaultDisplayName">Run /usr/bin/make</value> | 
				
			||||
    <value type="QString" key="ProjectExplorer.ProjectConfiguration.DisplayName">make flash</value> | 
				
			||||
    <value type="QString" key="ProjectExplorer.ProjectConfiguration.Id">ProjectExplorer.CustomExecutableRunConfiguration</value> | 
				
			||||
    <value type="uint" key="RunConfiguration.QmlDebugServerPort">3768</value> | 
				
			||||
    <value type="bool" key="RunConfiguration.UseCppDebugger">false</value> | 
				
			||||
    <value type="bool" key="RunConfiguration.UseCppDebuggerAuto">true</value> | 
				
			||||
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			||||
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			||||
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			||||
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			||||
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			||||
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			||||
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			||||
    <value type="bool" key="Analyzer.Valgrind.Callgrind.EnableEventToolTips">true</value> | 
				
			||||
    <value type="double" key="Analyzer.Valgrind.Callgrind.MinimumCostRatio">0.01</value> | 
				
			||||
    <value type="double" key="Analyzer.Valgrind.Callgrind.VisualisationMinimumCostRatio">10</value> | 
				
			||||
    <value type="bool" key="Analyzer.Valgrind.FilterExternalIssues">true</value> | 
				
			||||
    <value type="int" key="Analyzer.Valgrind.LeakCheckOnFinish">1</value> | 
				
			||||
    <value type="int" key="Analyzer.Valgrind.NumCallers">25</value> | 
				
			||||
    <valuelist type="QVariantList" key="Analyzer.Valgrind.RemovedSuppressionFiles"/> | 
				
			||||
    <value type="int" key="Analyzer.Valgrind.SelfModifyingCodeDetection">1</value> | 
				
			||||
    <value type="bool" key="Analyzer.Valgrind.Settings.UseGlobalSettings">true</value> | 
				
			||||
    <value type="bool" key="Analyzer.Valgrind.ShowReachable">false</value> | 
				
			||||
    <value type="bool" key="Analyzer.Valgrind.TrackOrigins">true</value> | 
				
			||||
    <value type="QString" key="Analyzer.Valgrind.ValgrindExecutable">valgrind</value> | 
				
			||||
    <valuelist type="QVariantList" key="Analyzer.Valgrind.VisibleErrorKinds"> | 
				
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     <value type="int">14</value> | 
				
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    </valuelist> | 
				
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    <value type="QString" key="BareMetal.RunConfig.WorkingDirectory"></value> | 
				
			||||
    <value type="QString" key="ProjectExplorer.ProjectConfiguration.DefaultDisplayName">f103 (via GDB server or hardware debugger)</value> | 
				
			||||
    <value type="QString" key="ProjectExplorer.ProjectConfiguration.DisplayName"></value> | 
				
			||||
    <value type="QString" key="ProjectExplorer.ProjectConfiguration.Id">BareMetal/home/ondra/devel/f103/f103.pro</value> | 
				
			||||
    <value type="QString" key="Qt4ProjectManager.MaemoRunConfiguration.Arguments"></value> | 
				
			||||
    <value type="QString" key="Qt4ProjectManager.MaemoRunConfiguration.ProFile">f103.pro</value> | 
				
			||||
    <value type="uint" key="RunConfiguration.QmlDebugServerPort">3768</value> | 
				
			||||
    <value type="bool" key="RunConfiguration.UseCppDebugger">false</value> | 
				
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    <value type="bool" key="RunConfiguration.UseCppDebuggerAuto">true</value> | 
				
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    <value type="bool" key="RunConfiguration.UseQmlDebuggerAuto">true</value> | 
				
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   </valuemap> | 
				
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    <value type="bool" key="Analyzer.QmlProfiler.FlushEnabled">false</value> | 
				
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    <value type="uint" key="Analyzer.QmlProfiler.FlushInterval">1000</value> | 
				
			||||
    <value type="QString" key="Analyzer.QmlProfiler.LastTraceFile"></value> | 
				
			||||
    <value type="bool" key="Analyzer.QmlProfiler.Settings.UseGlobalSettings">true</value> | 
				
			||||
    <valuelist type="QVariantList" key="Analyzer.Valgrind.AddedSuppressionFiles"/> | 
				
			||||
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			||||
    <value type="bool" key="Analyzer.Valgrind.Callgrind.CollectSystime">false</value> | 
				
			||||
    <value type="bool" key="Analyzer.Valgrind.Callgrind.EnableBranchSim">false</value> | 
				
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    <value type="bool" key="Analyzer.Valgrind.Callgrind.EnableCacheSim">false</value> | 
				
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    <value type="bool" key="Analyzer.Valgrind.Callgrind.EnableEventToolTips">true</value> | 
				
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    <value type="double" key="Analyzer.Valgrind.Callgrind.MinimumCostRatio">0.01</value> | 
				
			||||
    <value type="double" key="Analyzer.Valgrind.Callgrind.VisualisationMinimumCostRatio">10</value> | 
				
			||||
    <value type="bool" key="Analyzer.Valgrind.FilterExternalIssues">true</value> | 
				
			||||
    <value type="int" key="Analyzer.Valgrind.LeakCheckOnFinish">1</value> | 
				
			||||
    <value type="int" key="Analyzer.Valgrind.NumCallers">25</value> | 
				
			||||
    <valuelist type="QVariantList" key="Analyzer.Valgrind.RemovedSuppressionFiles"/> | 
				
			||||
    <value type="int" key="Analyzer.Valgrind.SelfModifyingCodeDetection">1</value> | 
				
			||||
    <value type="bool" key="Analyzer.Valgrind.Settings.UseGlobalSettings">true</value> | 
				
			||||
    <value type="bool" key="Analyzer.Valgrind.ShowReachable">false</value> | 
				
			||||
    <value type="bool" key="Analyzer.Valgrind.TrackOrigins">true</value> | 
				
			||||
    <value type="QString" key="Analyzer.Valgrind.ValgrindExecutable">valgrind</value> | 
				
			||||
    <valuelist type="QVariantList" key="Analyzer.Valgrind.VisibleErrorKinds"> | 
				
			||||
     <value type="int">0</value> | 
				
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     <value type="int">2</value> | 
				
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     <value type="int">3</value> | 
				
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     <value type="int">4</value> | 
				
			||||
     <value type="int">5</value> | 
				
			||||
     <value type="int">6</value> | 
				
			||||
     <value type="int">7</value> | 
				
			||||
     <value type="int">8</value> | 
				
			||||
     <value type="int">9</value> | 
				
			||||
     <value type="int">10</value> | 
				
			||||
     <value type="int">11</value> | 
				
			||||
     <value type="int">12</value> | 
				
			||||
     <value type="int">13</value> | 
				
			||||
     <value type="int">14</value> | 
				
			||||
    </valuelist> | 
				
			||||
    <value type="int" key="PE.EnvironmentAspect.Base">2</value> | 
				
			||||
    <valuelist type="QVariantList" key="PE.EnvironmentAspect.Changes"/> | 
				
			||||
    <value type="QString" key="ProjectExplorer.CustomExecutableRunConfiguration.Arguments"></value> | 
				
			||||
    <value type="QString" key="ProjectExplorer.CustomExecutableRunConfiguration.Executable">/home/ondra/devel/f103/main.elf</value> | 
				
			||||
    <value type="QString" key="ProjectExplorer.CustomExecutableRunConfiguration.WorkingDirectory">/home/ondra/devel/f103</value> | 
				
			||||
    <value type="QString" key="ProjectExplorer.ProjectConfiguration.DefaultDisplayName">Run /home/ondra/devel/f103/main.elf</value> | 
				
			||||
    <value type="QString" key="ProjectExplorer.ProjectConfiguration.DisplayName"></value> | 
				
			||||
    <value type="QString" key="ProjectExplorer.ProjectConfiguration.Id">ProjectExplorer.CustomExecutableRunConfiguration</value> | 
				
			||||
    <value type="uint" key="RunConfiguration.QmlDebugServerPort">3768</value> | 
				
			||||
    <value type="bool" key="RunConfiguration.UseCppDebugger">false</value> | 
				
			||||
    <value type="bool" key="RunConfiguration.UseCppDebuggerAuto">true</value> | 
				
			||||
    <value type="bool" key="RunConfiguration.UseMultiProcess">false</value> | 
				
			||||
    <value type="bool" key="RunConfiguration.UseQmlDebugger">false</value> | 
				
			||||
    <value type="bool" key="RunConfiguration.UseQmlDebuggerAuto">true</value> | 
				
			||||
   </valuemap> | 
				
			||||
   <value type="int" key="ProjectExplorer.Target.RunConfigurationCount">3</value> | 
				
			||||
  </valuemap> | 
				
			||||
 </data> | 
				
			||||
 <data> | 
				
			||||
  <variable>ProjectExplorer.Project.TargetCount</variable> | 
				
			||||
  <value type="int">1</value> | 
				
			||||
 </data> | 
				
			||||
 <data> | 
				
			||||
  <variable>ProjectExplorer.Project.Updater.FileVersion</variable> | 
				
			||||
  <value type="int">18</value> | 
				
			||||
 </data> | 
				
			||||
 <data> | 
				
			||||
  <variable>Version</variable> | 
				
			||||
  <value type="int">18</value> | 
				
			||||
 </data> | 
				
			||||
</qtcreator> | 
				
			||||
@ -0,0 +1,149 @@ | 
				
			||||
TEMPLATE = app | 
				
			||||
CONFIG += console | 
				
			||||
CONFIG -= app_bundle | 
				
			||||
CONFIG -= qt | 
				
			||||
 | 
				
			||||
INCLUDEPATH += \ | 
				
			||||
    project \ | 
				
			||||
    lib/spl/inc \ | 
				
			||||
    lib/cmsis \ | 
				
			||||
    lib/sbmp/library \ | 
				
			||||
    /usr/arm-none-eabi/include \ | 
				
			||||
    /usr/lib/gcc/arm-none-eabi/5.3.0/include/ | 
				
			||||
 | 
				
			||||
DEFINES += F_CPU=72000000UL \ | 
				
			||||
           STM32F10X_MD \ | 
				
			||||
           USE_STDPERIPH_DRIVER \ | 
				
			||||
           __null=0 \ | 
				
			||||
           __STATIC_INLINE="static inline" \ | 
				
			||||
           __INLINE="inline" \ | 
				
			||||
           __ASM=__asm \ | 
				
			||||
           __CORTEX_M=3 \ | 
				
			||||
           VERBOSE_LOGGING=1 \ | 
				
			||||
        ST_DSPIN_6470H_DISCOVERY | 
				
			||||
 | 
				
			||||
HEADERS += \ | 
				
			||||
    lib/cmsis/core_cm3.h \ | 
				
			||||
    lib/cmsis/stm32f10x.h \ | 
				
			||||
    lib/sbmp/library/crc32.h \ | 
				
			||||
    lib/sbmp/library/payload_builder.h \ | 
				
			||||
    lib/sbmp/library/payload_parser.h \ | 
				
			||||
    lib/sbmp/library/sbmp.h \ | 
				
			||||
    lib/sbmp/library/sbmp_bulk.h \ | 
				
			||||
    lib/sbmp/library/sbmp_checksum.h \ | 
				
			||||
    lib/sbmp/library/sbmp_config.example.h \ | 
				
			||||
    lib/sbmp/library/sbmp_datagram.h \ | 
				
			||||
    lib/sbmp/library/sbmp_frame.h \ | 
				
			||||
    lib/sbmp/library/sbmp_session.h \ | 
				
			||||
    lib/sbmp/library/type_coerce.h \ | 
				
			||||
    lib/spl/inc/misc.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_adc.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_bkp.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_can.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_cec.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_crc.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_dac.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_dbgmcu.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_dma.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_exti.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_flash.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_fsmc.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_gpio.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_i2c.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_iwdg.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_pwr.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_rcc.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_rtc.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_sdio.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_spi.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_tim.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_usart.h \ | 
				
			||||
    lib/spl/inc/stm32f10x_wwdg.h \ | 
				
			||||
    project/stm32f10x_conf.h \ | 
				
			||||
    project/stm32f10x_it.h \ | 
				
			||||
    project/system_stm32f10x.h \ | 
				
			||||
    project/sbmp_config.h \ | 
				
			||||
    project/com/com_fileio.h \ | 
				
			||||
    project/com/com_iface.h \ | 
				
			||||
    project/com/datalink.h \ | 
				
			||||
    project/com/debug.h \ | 
				
			||||
    project/com/iface_noop.h \ | 
				
			||||
    project/com/iface_usart.h \ | 
				
			||||
    project/utils/circbuf.h \ | 
				
			||||
    project/utils/minmax.h \ | 
				
			||||
    project/utils/timebase.h \ | 
				
			||||
    project/malloc_safe.h \ | 
				
			||||
    project/hw_init.h \ | 
				
			||||
    project/utils/debounce.h \ | 
				
			||||
    project/bus/event_handler.h \ | 
				
			||||
    project/bus/event_queue.h \ | 
				
			||||
    project/utils/str_utils.h \ | 
				
			||||
    project/main.h \ | 
				
			||||
    project/utils/matcher.h \ | 
				
			||||
    project/utils/meanbuf.h \ | 
				
			||||
    project/dspin.h \ | 
				
			||||
    project/dspin_config.h \ | 
				
			||||
    project/blinky.h | 
				
			||||
 | 
				
			||||
SOURCES += \ | 
				
			||||
    lib/cmsis/core_cm3.c \ | 
				
			||||
    lib/sbmp/library/crc32.c \ | 
				
			||||
    lib/sbmp/library/payload_builder.c \ | 
				
			||||
    lib/sbmp/library/payload_parser.c \ | 
				
			||||
    lib/sbmp/library/sbmp_bulk.c \ | 
				
			||||
    lib/sbmp/library/sbmp_checksum.c \ | 
				
			||||
    lib/sbmp/library/sbmp_datagram.c \ | 
				
			||||
    lib/sbmp/library/sbmp_frame.c \ | 
				
			||||
    lib/sbmp/library/sbmp_session.c \ | 
				
			||||
    lib/spl/src/misc.c \ | 
				
			||||
    lib/spl/src/stm32f10x_adc.c \ | 
				
			||||
    lib/spl/src/stm32f10x_bkp.c \ | 
				
			||||
    lib/spl/src/stm32f10x_can.c \ | 
				
			||||
    lib/spl/src/stm32f10x_cec.c \ | 
				
			||||
    lib/spl/src/stm32f10x_crc.c \ | 
				
			||||
    lib/spl/src/stm32f10x_dac.c \ | 
				
			||||
    lib/spl/src/stm32f10x_dbgmcu.c \ | 
				
			||||
    lib/spl/src/stm32f10x_dma.c \ | 
				
			||||
    lib/spl/src/stm32f10x_exti.c \ | 
				
			||||
    lib/spl/src/stm32f10x_flash.c \ | 
				
			||||
    lib/spl/src/stm32f10x_fsmc.c \ | 
				
			||||
    lib/spl/src/stm32f10x_gpio.c \ | 
				
			||||
    lib/spl/src/stm32f10x_i2c.c \ | 
				
			||||
    lib/spl/src/stm32f10x_iwdg.c \ | 
				
			||||
    lib/spl/src/stm32f10x_pwr.c \ | 
				
			||||
    lib/spl/src/stm32f10x_rcc.c \ | 
				
			||||
    lib/spl/src/stm32f10x_rtc.c \ | 
				
			||||
    lib/spl/src/stm32f10x_sdio.c \ | 
				
			||||
    lib/spl/src/stm32f10x_spi.c \ | 
				
			||||
    lib/spl/src/stm32f10x_tim.c \ | 
				
			||||
    lib/spl/src/stm32f10x_usart.c \ | 
				
			||||
    lib/spl/src/stm32f10x_wwdg.c \ | 
				
			||||
    project/main.c \ | 
				
			||||
    project/stm32f10x_it.c \ | 
				
			||||
    project/system_stm32f10x.c \ | 
				
			||||
    project/com/com_fileio.c \ | 
				
			||||
    project/com/com_iface.c \ | 
				
			||||
    project/com/datalink.c \ | 
				
			||||
    project/com/debug.c \ | 
				
			||||
    project/com/iface_noop.c \ | 
				
			||||
    project/com/iface_usart.c \ | 
				
			||||
    project/utils/circbuf.c \ | 
				
			||||
    project/utils/debounce.c \ | 
				
			||||
    project/utils/timebase.c \ | 
				
			||||
    project/hw_init.c \ | 
				
			||||
    project/malloc_safe.c \ | 
				
			||||
    project/spl_assert.c \ | 
				
			||||
    project/syscalls.c \ | 
				
			||||
    project/bus/event_handler.c \ | 
				
			||||
    project/bus/event_queue.c \ | 
				
			||||
    project/utils/str_utils.c \ | 
				
			||||
    project/utils/matcher.c \ | 
				
			||||
    project/utils/meanbuf.c \ | 
				
			||||
    project/dspin.c \ | 
				
			||||
    project/blinky.c | 
				
			||||
 | 
				
			||||
DISTFILES += \ | 
				
			||||
    style.astylerc \ | 
				
			||||
    Makefile \ | 
				
			||||
    lib/cmsis/startup_stm32f10x_md.s \ | 
				
			||||
    lib/cmsis/stm32_flash.ld | 
				
			||||
@ -0,0 +1,53 @@ | 
				
			||||
#include "main.h" | 
				
			||||
#include "utils/timebase.h" | 
				
			||||
#include "blinky.h" | 
				
			||||
#include "dspin.h" | 
				
			||||
 | 
				
			||||
typedef struct { | 
				
			||||
	GPIO_TypeDef* GPIOx; | 
				
			||||
	uint32_t pin; | 
				
			||||
	task_pid_t blink_task; | 
				
			||||
} LedInfo; | 
				
			||||
 | 
				
			||||
static LedInfo leds[4] = { | 
				
			||||
	{GPIOC, GPIO_Pin_3, 0}, // LED_READY
 | 
				
			||||
	{GPIOC, GPIO_Pin_2, 0}, // LED_BUSY
 | 
				
			||||
	{GPIOC, GPIO_Pin_1, 0}, // LED_ERROR
 | 
				
			||||
	{GPIOC, GPIO_Pin_0, 0}, // LED_SPARE
 | 
				
			||||
}; | 
				
			||||
 | 
				
			||||
void led_on(enum led_nr led) | 
				
			||||
{ | 
				
			||||
	leds[led].GPIOx->BSRR = leds[led].pin; | 
				
			||||
} | 
				
			||||
 | 
				
			||||
void led_off(enum led_nr led) | 
				
			||||
{ | 
				
			||||
	leds[led].GPIOx->BRR = leds[led].pin; | 
				
			||||
} | 
				
			||||
 | 
				
			||||
void led_toggle(enum led_nr led) | 
				
			||||
{ | 
				
			||||
	leds[led].GPIOx->ODR ^= leds[led].pin; | 
				
			||||
} | 
				
			||||
 | 
				
			||||
static void led_off_cb(void *arg) | 
				
			||||
{ | 
				
			||||
	enum led_nr led = (uint32_t)arg; | 
				
			||||
 | 
				
			||||
	led_off(led); | 
				
			||||
	leds[led].blink_task = 0; | 
				
			||||
} | 
				
			||||
 | 
				
			||||
void led_blink(enum led_nr led, ms_time_t ms) | 
				
			||||
{ | 
				
			||||
	LedInfo *L = &leds[led]; | 
				
			||||
 | 
				
			||||
	if (L->blink_task) { | 
				
			||||
		// re-schedule
 | 
				
			||||
		abort_scheduled_task(L->blink_task); | 
				
			||||
	} | 
				
			||||
 | 
				
			||||
	led_on(led); | 
				
			||||
	L->blink_task = schedule_task(led_off_cb, (uint32_t*)led, ms, false); | 
				
			||||
} | 
				
			||||
@ -0,0 +1,17 @@ | 
				
			||||
#ifndef BLINKY_H | 
				
			||||
#define BLINKY_H | 
				
			||||
#include "utils/timebase.h" | 
				
			||||
 | 
				
			||||
enum led_nr { | 
				
			||||
	LED_READY, | 
				
			||||
	LED_BUSY, | 
				
			||||
	LED_ERROR, | 
				
			||||
	LED_SPARE | 
				
			||||
}; | 
				
			||||
 | 
				
			||||
void led_on(enum led_nr led); | 
				
			||||
void led_off(enum led_nr led); | 
				
			||||
void led_toggle(enum led_nr led); | 
				
			||||
void led_blink(enum led_nr led, ms_time_t ms); | 
				
			||||
 | 
				
			||||
#endif // BLINKY_H
 | 
				
			||||
@ -1,66 +0,0 @@ | 
				
			||||
#include "colorled.h" | 
				
			||||
#include "utils/timebase.h" | 
				
			||||
 | 
				
			||||
#define LONG_DELAY() for (volatile uint32_t __j = 4; __j > 0; __j--) | 
				
			||||
#define SHORT_DELAY() for (volatile uint32_t __j = 1; __j > 0; __j--) | 
				
			||||
 | 
				
			||||
static inline | 
				
			||||
__attribute__((always_inline)) | 
				
			||||
void colorled_byte(uint8_t b) | 
				
			||||
{ | 
				
			||||
	for (register volatile uint8_t i = 0; i < 8; i++) { | 
				
			||||
		COLORLED_GPIO->BSRR = COLORLED_PIN; // set pin high
 | 
				
			||||
 | 
				
			||||
		// duty cycle determines bit value
 | 
				
			||||
		if (b & 0x80) { | 
				
			||||
			LONG_DELAY(); | 
				
			||||
			COLORLED_GPIO->BRR = COLORLED_PIN; // set pin low
 | 
				
			||||
			SHORT_DELAY(); | 
				
			||||
		} else { | 
				
			||||
			SHORT_DELAY(); | 
				
			||||
			COLORLED_GPIO->BRR = COLORLED_PIN; // set pin low
 | 
				
			||||
			LONG_DELAY(); | 
				
			||||
		} | 
				
			||||
 | 
				
			||||
		b <<= 1; // shift to next bit
 | 
				
			||||
	} | 
				
			||||
} | 
				
			||||
 | 
				
			||||
 | 
				
			||||
/** Set one RGB LED color */ | 
				
			||||
void colorled_set(uint32_t rgb) | 
				
			||||
{ | 
				
			||||
	__disable_irq(); // SysTick interrupt when sending data would break the timing
 | 
				
			||||
 | 
				
			||||
	colorled_byte((rgb & 0x00FF00) >> 8); | 
				
			||||
	colorled_byte((rgb & 0xFF0000) >> 16); | 
				
			||||
	colorled_byte(rgb & 0x0000FF); | 
				
			||||
 | 
				
			||||
	__enable_irq(); | 
				
			||||
 | 
				
			||||
	delay_us(50); // show
 | 
				
			||||
} | 
				
			||||
 | 
				
			||||
 | 
				
			||||
/** Set many RGBs */ | 
				
			||||
void colorled_set_many(uint32_t *rgbs, int count) | 
				
			||||
{ | 
				
			||||
	__disable_irq(); | 
				
			||||
 | 
				
			||||
	for (int i = 0; i < count; i++) { | 
				
			||||
		uint32_t rgb = *rgbs++; | 
				
			||||
		colorled_byte((rgb & 0x00FF00) >> 8); | 
				
			||||
		colorled_byte((rgb & 0xFF0000) >> 16); | 
				
			||||
		colorled_byte(rgb & 0x0000FF); | 
				
			||||
	} | 
				
			||||
 | 
				
			||||
	__enable_irq(); | 
				
			||||
 | 
				
			||||
	delay_us(50); // show
 | 
				
			||||
} | 
				
			||||
 | 
				
			||||
 | 
				
			||||
void colorled_off(void) | 
				
			||||
{ | 
				
			||||
	colorled_set(RGB_BLACK); | 
				
			||||
} | 
				
			||||
@ -1,79 +0,0 @@ | 
				
			||||
#pragma once | 
				
			||||
 | 
				
			||||
/* Includes ------------------------------------------------------------------*/ | 
				
			||||
 | 
				
			||||
#include "main.h" | 
				
			||||
 | 
				
			||||
/* Exported types ------------------------------------------------------------*/ | 
				
			||||
/* Exported constants --------------------------------------------------------*/ | 
				
			||||
 | 
				
			||||
// PB8 - WS2812B data line
 | 
				
			||||
#define COLORLED_GPIO GPIOB | 
				
			||||
#define COLORLED_PIN GPIO_Pin_12 | 
				
			||||
 | 
				
			||||
#define RGB_RED     rgb(255,   0,   0) | 
				
			||||
#define RGB_ORANGE  rgb(255, 110,   0) | 
				
			||||
#define RGB_YELLOW  rgb(255, 255,   0) | 
				
			||||
#define RGB_LIME    rgb(160, 255,   0) | 
				
			||||
#define RGB_GREEN   rgb(  0, 255,   0) | 
				
			||||
#define RGB_CYAN    rgb(  0, 255, 120) | 
				
			||||
#define RGB_BLUE    rgb(  0,   0, 255) | 
				
			||||
#define RGB_MAGENTA rgb(255,   0, 255) | 
				
			||||
#define RGB_WHITE   rgb(255, 255, 255) | 
				
			||||
#define RGB_BLACK   rgb(  0,   0,   0) | 
				
			||||
 | 
				
			||||
/**
 | 
				
			||||
 * @brief Struct for easy manipulation of RGB colors. | 
				
			||||
 * | 
				
			||||
 * Set components in the xrgb.r (etc.) and you will get | 
				
			||||
 * the hex in xrgb.num. | 
				
			||||
 */ | 
				
			||||
typedef union { | 
				
			||||
 | 
				
			||||
	/** Struct for access to individual color components */ | 
				
			||||
	struct __attribute__((packed)) { | 
				
			||||
		uint8_t b; | 
				
			||||
		uint8_t g; | 
				
			||||
		uint8_t r; | 
				
			||||
	}; | 
				
			||||
 | 
				
			||||
	/** RGB color as a single uint32_t */ | 
				
			||||
	uint32_t num; | 
				
			||||
 | 
				
			||||
} ws2812_rgb_t; | 
				
			||||
 | 
				
			||||
/* Exported macros -----------------------------------------------------------*/ | 
				
			||||
 | 
				
			||||
/**
 | 
				
			||||
 * @brief Compose an RGB color. | 
				
			||||
 * @param r, g, b - components 0xFF | 
				
			||||
 * @returns integer 0xRRGGBB | 
				
			||||
 */ | 
				
			||||
#define rgb(r, g, b) (((0xFF & (r)) << 16) | ((0xFF & (g)) << 8) | (0xFF & (b))) | 
				
			||||
 | 
				
			||||
/* Get components */ | 
				
			||||
#define rgb_r(rgb) (((rgb) >> 16) & 0xFF) | 
				
			||||
#define rgb_g(rgb) (((rgb) >> 8) & 0xFF) | 
				
			||||
#define rgb_b(rgb) ((rgb) & 0xFF) | 
				
			||||
 | 
				
			||||
/* Exported functions --------------------------------------------------------*/ | 
				
			||||
 | 
				
			||||
/**
 | 
				
			||||
 * @brief Turn OFF the rgb LED | 
				
			||||
 */ | 
				
			||||
void colorled_off(void); | 
				
			||||
 | 
				
			||||
 | 
				
			||||
/**
 | 
				
			||||
 * @brief Set color of a WS2812B | 
				
			||||
 * @param rgb - color 0xRRGGBB | 
				
			||||
 */ | 
				
			||||
void colorled_set(uint32_t rgb); | 
				
			||||
 | 
				
			||||
 | 
				
			||||
/**
 | 
				
			||||
 * @brief Set color of multiple chained RGB leds | 
				
			||||
 * @param rgbs - array of colors (0xRRGGBB) | 
				
			||||
 * @param count - number of LEDs | 
				
			||||
 */ | 
				
			||||
void colorled_set_many(uint32_t *rgbs, int count); | 
				
			||||
@ -1,120 +0,0 @@ | 
				
			||||
#include "display.h" | 
				
			||||
#include "com/debug.h" | 
				
			||||
#include "utils/timebase.h" | 
				
			||||
#include "utils/meanbuf.h" | 
				
			||||
 | 
				
			||||
#include <math.h> | 
				
			||||
 | 
				
			||||
#define PIXEL_COUNT 30 | 
				
			||||
 | 
				
			||||
#define WAVEGRID_DEPTH 5 | 
				
			||||
#define WAVEGRID_LEN PIXEL_COUNT*WAVEGRID_DEPTH | 
				
			||||
static float wavegrid[WAVEGRID_LEN]; | 
				
			||||
 | 
				
			||||
#define WAVE_DISSIPATION 0.011f | 
				
			||||
 | 
				
			||||
 | 
				
			||||
static ws2812_rgb_t pixels[PIXEL_COUNT] = {}; | 
				
			||||
 | 
				
			||||
static MeanBuf *mb; | 
				
			||||
 | 
				
			||||
void display_show(void) | 
				
			||||
{ | 
				
			||||
	for (int i = 0; i < PIXEL_COUNT; i++) { | 
				
			||||
 | 
				
			||||
		// 0 1 2 3 #0+i
 | 
				
			||||
		// 7 6 5 4 #2-i-1
 | 
				
			||||
		// 8 9 A B #2+i
 | 
				
			||||
		// F E D C #
 | 
				
			||||
		// G I J K
 | 
				
			||||
 | 
				
			||||
		float x = wavegrid[i] + | 
				
			||||
				wavegrid[PIXEL_COUNT*2-i-1] + | 
				
			||||
				wavegrid[PIXEL_COUNT*2+i] + | 
				
			||||
				wavegrid[PIXEL_COUNT*4-i-1] + | 
				
			||||
				wavegrid[PIXEL_COUNT*4+i]; | 
				
			||||
 | 
				
			||||
		if (x > 255) x = 255; | 
				
			||||
 | 
				
			||||
		pixels[i].r = (x); | 
				
			||||
		pixels[i].b = (255.0f-x); | 
				
			||||
	} | 
				
			||||
 | 
				
			||||
	colorled_set_many((uint32_t*) pixels, PIXEL_COUNT); | 
				
			||||
} | 
				
			||||
 | 
				
			||||
 | 
				
			||||
static void handle_sonar_value(float mm) | 
				
			||||
{ | 
				
			||||
	for (int i = WAVEGRID_LEN-1; i > 0; i--) { | 
				
			||||
		wavegrid[i] = wavegrid[i-1] * (1.0f - WAVE_DISSIPATION); | 
				
			||||
	} | 
				
			||||
 | 
				
			||||
	float x = mm/5.0f; | 
				
			||||
	if (x>255) x = 255; | 
				
			||||
 | 
				
			||||
	wavegrid[0] = 255 - x; | 
				
			||||
 | 
				
			||||
	display_show(); | 
				
			||||
} | 
				
			||||
 | 
				
			||||
 | 
				
			||||
static void show(void*arg) | 
				
			||||
{ | 
				
			||||
	(void)arg; | 
				
			||||
 | 
				
			||||
	handle_sonar_value(meanbuf_current(mb)); | 
				
			||||
} | 
				
			||||
 | 
				
			||||
 | 
				
			||||
static void sonar(void* arg) | 
				
			||||
{ | 
				
			||||
	(void)arg; | 
				
			||||
 | 
				
			||||
	//info("Sonar");
 | 
				
			||||
 | 
				
			||||
	GPIOB->BSRR = GPIO_Pin_13; | 
				
			||||
	delay_us(10); | 
				
			||||
	GPIOB->BRR = GPIO_Pin_13; | 
				
			||||
 | 
				
			||||
	// wait for response
 | 
				
			||||
 | 
				
			||||
	bool suc = false; | 
				
			||||
	until_timeout(50) { | 
				
			||||
		if((GPIOB->IDR & (1 << 14)) != 0) { | 
				
			||||
			suc = true; | 
				
			||||
			break; | 
				
			||||
		} | 
				
			||||
	} | 
				
			||||
 | 
				
			||||
	if (!suc) { | 
				
			||||
		dbg("Not suc"); | 
				
			||||
		return; | 
				
			||||
	} | 
				
			||||
 | 
				
			||||
	uint32_t cnt = 0; | 
				
			||||
	until_timeout(50) { | 
				
			||||
		if((GPIOB->IDR & (1 << 14)) == 0) break; | 
				
			||||
		cnt++; | 
				
			||||
	} | 
				
			||||
 | 
				
			||||
	float t = cnt / 11.2f; | 
				
			||||
 | 
				
			||||
	meanbuf_add(mb, t); | 
				
			||||
} | 
				
			||||
 | 
				
			||||
 | 
				
			||||
void display_init(void) | 
				
			||||
{ | 
				
			||||
	mb = meanbuf_create(10); | 
				
			||||
 | 
				
			||||
	for (int i = 0; i < WAVEGRID_LEN; i++) { | 
				
			||||
		wavegrid[i] = 0; | 
				
			||||
	} | 
				
			||||
 | 
				
			||||
	display_show(); | 
				
			||||
 | 
				
			||||
	add_periodic_task(sonar, NULL, 50, true); | 
				
			||||
 | 
				
			||||
	add_periodic_task(show, NULL, 75, true); | 
				
			||||
} | 
				
			||||
@ -1,11 +0,0 @@ | 
				
			||||
#ifndef DISPLAY_H | 
				
			||||
#define DISPLAY_H | 
				
			||||
 | 
				
			||||
#include "main.h" | 
				
			||||
#include "colorled.h" | 
				
			||||
 | 
				
			||||
void display_show(void); | 
				
			||||
 | 
				
			||||
void display_init(void); | 
				
			||||
 | 
				
			||||
#endif // DISPLAY_H
 | 
				
			||||
									
										
											File diff suppressed because it is too large
											Load Diff
										
									
								
							
						@ -0,0 +1,925 @@ | 
				
			||||
/**
 | 
				
			||||
  ****************************************************************************** | 
				
			||||
  * @file    dspin.h | 
				
			||||
  * @author  IPC Rennes | 
				
			||||
  * @version V2.0 | 
				
			||||
  * @date    October 4, 2013 | 
				
			||||
  * @brief   Header for dspin.c module | 
				
			||||
  * @note    (C) COPYRIGHT 2013 STMicroelectronics | 
				
			||||
  ****************************************************************************** | 
				
			||||
  * @copy | 
				
			||||
  * | 
				
			||||
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | 
				
			||||
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE | 
				
			||||
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY | 
				
			||||
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING | 
				
			||||
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE | 
				
			||||
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | 
				
			||||
  * | 
				
			||||
  * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> | 
				
			||||
  */ | 
				
			||||
 | 
				
			||||
/* Define to prevent recursive inclusion -------------------------------------*/ | 
				
			||||
#ifndef __DSPIN_H | 
				
			||||
#define __DSPIN_H | 
				
			||||
 | 
				
			||||
/* Includes ------------------------------------------------------------------*/ | 
				
			||||
#include "stm32f10x.h" | 
				
			||||
#include "dspin_config.h" | 
				
			||||
 | 
				
			||||
/* Exported constants --------------------------------------------------------*/ | 
				
			||||
 | 
				
			||||
/* Select one of the following two evalboard options, comment the other one --*/ | 
				
			||||
/* #define STEVAL_PCC009V2 */ | 
				
			||||
/* #define STM32_VL_Discovery */ | 
				
			||||
/* #define ST_DSPIN_6470H_DISCOVERY*/ | 
				
			||||
 | 
				
			||||
/** @defgroup  dSPIN FW library interface
 | 
				
			||||
  * | 
				
			||||
  * { | 
				
			||||
  */ | 
				
			||||
 | 
				
			||||
#define FALSE (0) | 
				
			||||
#define TRUE  (1) | 
				
			||||
 | 
				
			||||
 | 
				
			||||
#ifdef STEVAL_PCC009V2 | 
				
			||||
#define dSPIN_SPI           SPI2 | 
				
			||||
 | 
				
			||||
#define dSPIN_SCK_Pin       GPIO_Pin_13 | 
				
			||||
#define dSPIN_SCK_Port      GPIOB | 
				
			||||
 | 
				
			||||
#define dSPIN_MOSI_Pin      GPIO_Pin_15 | 
				
			||||
#define dSPIN_MOSI_Port     GPIOB | 
				
			||||
 | 
				
			||||
#define dSPIN_MISO_Pin      GPIO_Pin_14 | 
				
			||||
#define dSPIN_MISO_Port     GPIOB | 
				
			||||
 | 
				
			||||
#define dSPIN_nSS_Pin       GPIO_Pin_12 | 
				
			||||
#define dSPIN_nSS_Port      GPIOB | 
				
			||||
 | 
				
			||||
#define dSPIN_BUSY_Pin      GPIO_Pin_10 | 
				
			||||
#define dSPIN_BUSY_Port     GPIOB | 
				
			||||
 | 
				
			||||
#define dSPIN_FLAG_Pin      GPIO_Pin_11 | 
				
			||||
#define dSPIN_FLAG_Port     GPIOB | 
				
			||||
 | 
				
			||||
#define dSPIN_PWM1_Pin      GPIO_Pin_0 | 
				
			||||
#define dSPIN_PWM1_Port     GPIOB | 
				
			||||
 | 
				
			||||
#define dSPIN_PWM2_Pin      GPIO_Pin_1 | 
				
			||||
#define dSPIN_PWM2_Port     GPIOB | 
				
			||||
 | 
				
			||||
#define POWER_LED_Pin       GPIO_Pin_4 | 
				
			||||
#define POWER_LED_Port      GPIOC | 
				
			||||
 | 
				
			||||
#define STATUS_LED_Pin      GPIO_Pin_8 | 
				
			||||
#define STATUS_LED_Port     GPIOC | 
				
			||||
 | 
				
			||||
#define dSPIN_STBY_RESET_Pin    GPIO_Pin_1 | 
				
			||||
#define dSPIN_STBY_RESET_Port   GPIOB | 
				
			||||
 | 
				
			||||
#define TIM_PWM                 TIM3 | 
				
			||||
 | 
				
			||||
/* List all the peripherals, which CLKs have to be enabled! */ | 
				
			||||
#define dSPIN_PERIPHERAL_CLKs_APB1  (RCC_APB1Periph_SPI2|RCC_APB1Periph_TIM3) | 
				
			||||
#define dSPIN_PERIPHERAL_CLKs_APB2  (RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO) | 
				
			||||
/* Note : RCC_APB2Periph_AFIO is mandatory for interrupt enabling */ | 
				
			||||
#endif | 
				
			||||
 | 
				
			||||
/* dSPIN maximum number of bytes of command and arguments to set a parameter */ | 
				
			||||
#define dSPIN_CMD_ARG_MAX_NB_BYTES (4) | 
				
			||||
/* dSPIN command + argument bytes number */ | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_NOP              (1) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_RUN              (4) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_STEP_CLOCK       (1) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_MOVE             (4) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_GO_TO            (4) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_GO_TO_DIR        (4) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_GO_UNTIL         (4) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_RELEASE_SW       (1) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_GO_HOME          (1) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_GO_MARK          (1) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_RESET_POS        (1) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_RESET_DEVICE     (1) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_SOFT_STOP        (1) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_HARD_STOP        (1) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_SOFT_HIZ         (1) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_HARD_HIZ         (1) | 
				
			||||
#define dSPIN_CMD_ARG_NB_BYTES_GET_STATUS       (1) | 
				
			||||
/* dSPIN response bytes number */ | 
				
			||||
#define dSPIN_RSP_NB_BYTES_GET_STATUS           (2) | 
				
			||||
/* Daisy chain command mask */ | 
				
			||||
#define DAISY_CHAIN_COMMAND_MASK (0xFA) | 
				
			||||
 | 
				
			||||
/**  dSPIN signals - Used for connection with STM32 discovery kit
 | 
				
			||||
  *  If another control board is used, please change the following settings | 
				
			||||
  *  according to the application board wiring diagram. | 
				
			||||
  *  Do not touch if STEVAL-PCC009V2 is used, see defs below for that evalboard. | 
				
			||||
  * | 
				
			||||
  */ | 
				
			||||
#ifdef STM32_VL_Discovery | 
				
			||||
#define dSPIN_SPI           SPI1 | 
				
			||||
 | 
				
			||||
#define dSPIN_SCK_Pin       GPIO_Pin_5 | 
				
			||||
#define dSPIN_SCK_Port      GPIOA | 
				
			||||
 | 
				
			||||
#define dSPIN_MOSI_Pin      GPIO_Pin_7 | 
				
			||||
#define dSPIN_MOSI_Port     GPIOA | 
				
			||||
 | 
				
			||||
#define dSPIN_MISO_Pin      GPIO_Pin_6 | 
				
			||||
#define dSPIN_MISO_Port     GPIOA | 
				
			||||
 | 
				
			||||
#define dSPIN_nSS_Pin       GPIO_Pin_4 | 
				
			||||
#define dSPIN_nSS_Port      GPIOA | 
				
			||||
 | 
				
			||||
#define dSPIN_BUSY_Pin      GPIO_Pin_4 | 
				
			||||
#define dSPIN_BUSY_Port     GPIOC | 
				
			||||
 | 
				
			||||
#define dSPIN_FLAG_Pin      GPIO_Pin_5 | 
				
			||||
#define dSPIN_FLAG_Port     GPIOC | 
				
			||||
 | 
				
			||||
#define dSPIN_PWM1_Pin      GPIO_Pin_1 | 
				
			||||
#define dSPIN_PWM1_Port     GPIOA | 
				
			||||
 | 
				
			||||
#define dSPIN_PWM2_Pin      GPIO_Pin_0 | 
				
			||||
#define dSPIN_PWM2_Port     GPIOB | 
				
			||||
 | 
				
			||||
/* List all the peripherals, which CLKs have to be enabled! */ | 
				
			||||
#define dSPIN_PERIPHERAL_CLKs_APB1  (0x00) | 
				
			||||
#define dSPIN_PERIPHERAL_CLKs_APB2  (RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_SPI1) | 
				
			||||
#endif | 
				
			||||
 | 
				
			||||
/**  dSPIN signals - Used for connection with ST_DSPIN_6470H_DISCOVERY
 | 
				
			||||
  */ | 
				
			||||
 | 
				
			||||
#ifdef ST_DSPIN_6470H_DISCOVERY | 
				
			||||
#define dSPIN_SPI       SPI1 | 
				
			||||
 | 
				
			||||
#define dSPIN_SCK_Pin       GPIO_Pin_5 | 
				
			||||
#define dSPIN_SCK_Port      GPIOA | 
				
			||||
 | 
				
			||||
#define dSPIN_MOSI_Pin      GPIO_Pin_7 | 
				
			||||
#define dSPIN_MOSI_Port     GPIOA | 
				
			||||
 | 
				
			||||
#define dSPIN_MISO_Pin      GPIO_Pin_6 | 
				
			||||
#define dSPIN_MISO_Port     GPIOA | 
				
			||||
 | 
				
			||||
#define dSPIN_nSS_Pin       GPIO_Pin_4 | 
				
			||||
#define dSPIN_nSS_Port      GPIOA | 
				
			||||
 | 
				
			||||
#define dSPIN_BUSY_Pin      GPIO_Pin_11 | 
				
			||||
#define dSPIN_BUSY_Port     GPIOB | 
				
			||||
 | 
				
			||||
#define dSPIN_FLAG_Pin      GPIO_Pin_10 | 
				
			||||
#define dSPIN_FLAG_Port     GPIOB | 
				
			||||
 | 
				
			||||
/* LED_READY, GREEN*/ | 
				
			||||
#define POWER_LED_Pin       GPIO_Pin_3 | 
				
			||||
#define POWER_LED_Port      GPIOC | 
				
			||||
 | 
				
			||||
/* LED_BUSY, ORANGE */ | 
				
			||||
#define LED_BUSY_Pin        GPIO_Pin_2 | 
				
			||||
#define LED_BUSY_Port       GPIOC | 
				
			||||
 | 
				
			||||
/* LED_ERROR, RED */ | 
				
			||||
#define STATUS_LED_Pin      GPIO_Pin_1 | 
				
			||||
#define STATUS_LED_Port     GPIOC | 
				
			||||
 | 
				
			||||
/* LED_SPARE, YELLOW */ | 
				
			||||
#define LED_SPARE_Pin       GPIO_Pin_0 | 
				
			||||
#define LED_SPARE_Port      GPIOC | 
				
			||||
 | 
				
			||||
#define dSPIN_PWM1_Pin      GPIO_Pin_3 | 
				
			||||
#define dSPIN_PWM1_Port     GPIOA | 
				
			||||
 | 
				
			||||
#define SW_MOTOR_Pin            GPIO_Pin_0 | 
				
			||||
#define SW_MOTOR_Port           GPIOA | 
				
			||||
 | 
				
			||||
#define dSPIN_SW_Pin            GPIO_Pin_4 | 
				
			||||
#define dSPIN_SW_Port           GPIOC | 
				
			||||
 | 
				
			||||
#define BUTTON_A_Pin        GPIO_Pin_1 | 
				
			||||
#define BUTTON_A_Port       GPIOA | 
				
			||||
 | 
				
			||||
#define BUTTON_B_Pin        GPIO_Pin_2 | 
				
			||||
#define BUTTON_B_Port       GPIOA | 
				
			||||
 | 
				
			||||
#define dSPIN_STBY_RESET_Pin    GPIO_Pin_5 | 
				
			||||
#define dSPIN_STBY_RESET_Port   GPIOC | 
				
			||||
 | 
				
			||||
#define TIM_PWM                 TIM5 | 
				
			||||
 | 
				
			||||
/* List all the peripherals, which CLKs have to be enabled! */ | 
				
			||||
/* Note : RCC_APB2Periph_AFIO is mandatory for interrupt enabling */ | 
				
			||||
#define dSPIN_PERIPHERAL_CLKs_APB1      (RCC_APB1Periph_TIM5) | 
				
			||||
#define dSPIN_PERIPHERAL_CLKs_APB2  (RCC_APB2Periph_SPI1 | \ | 
				
			||||
												 RCC_APB2Periph_GPIOA | \
 | 
				
			||||
												 RCC_APB2Periph_GPIOB | \
 | 
				
			||||
												 RCC_APB2Periph_GPIOC | \
 | 
				
			||||
												 RCC_APB2Periph_AFIO) | 
				
			||||
#endif | 
				
			||||
 | 
				
			||||
/** dSPIN parameter min and max values
 | 
				
			||||
  */ | 
				
			||||
#define dSPIN_CONF_PARAM_STALL_TH_MA_MAX           ((uint16_t)(4000)) /* current in mA */ | 
				
			||||
 | 
				
			||||
/** Register bits / masks
 | 
				
			||||
 */ | 
				
			||||
 | 
				
			||||
/* dSPIN electrical position register masks */ | 
				
			||||
#define dSPIN_ELPOS_STEP_MASK           ((uint8_t)0xC0) | 
				
			||||
#define dSPIN_ELPOS_MICROSTEP_MASK      ((uint8_t)0x3F) | 
				
			||||
 | 
				
			||||
/* dSPIN min speed register bit / mask */ | 
				
			||||
#define dSPIN_LSPD_OPT          ((uint16_t)0x1000) | 
				
			||||
#define dSPIN_MIN_SPEED_MASK    ((uint16_t)0x0FFF) | 
				
			||||
 | 
				
			||||
/* dSPIN Sync Output frequency enabling bit */ | 
				
			||||
#define dSPIN_SYNC_EN       0x80 | 
				
			||||
 | 
				
			||||
#if defined(L6472) | 
				
			||||
/* dSPIN step mode bit3 must be 1 */ | 
				
			||||
#define dSPIN_STEP_MODE_BIT3    0x08 | 
				
			||||
#endif /* defined(L6472) */ | 
				
			||||
 | 
				
			||||
/* Exported types ------------------------------------------------------------*/ | 
				
			||||
 | 
				
			||||
#if defined(L6470) | 
				
			||||
/**
 | 
				
			||||
  * @brief dSPIN Init structure definition | 
				
			||||
  */ | 
				
			||||
typedef struct { | 
				
			||||
	uint32_t ABS_POS; | 
				
			||||
	uint16_t EL_POS; | 
				
			||||
	uint32_t MARK; | 
				
			||||
	uint32_t SPEED; | 
				
			||||
	uint16_t ACC; | 
				
			||||
	uint16_t DEC; | 
				
			||||
	uint16_t MAX_SPEED; | 
				
			||||
	uint16_t MIN_SPEED; | 
				
			||||
	uint16_t FS_SPD; | 
				
			||||
	uint8_t  KVAL_HOLD; | 
				
			||||
	uint8_t  KVAL_RUN; | 
				
			||||
	uint8_t  KVAL_ACC; | 
				
			||||
	uint8_t  KVAL_DEC; | 
				
			||||
	uint16_t INT_SPD; | 
				
			||||
	uint8_t  ST_SLP; | 
				
			||||
	uint8_t  FN_SLP_ACC; | 
				
			||||
	uint8_t  FN_SLP_DEC; | 
				
			||||
	uint8_t  K_THERM; | 
				
			||||
	uint8_t  ADC_OUT; | 
				
			||||
	uint8_t  OCD_TH; | 
				
			||||
	uint8_t  STALL_TH; | 
				
			||||
	uint8_t  STEP_MODE; | 
				
			||||
	uint8_t  ALARM_EN; | 
				
			||||
	uint16_t CONFIG; | 
				
			||||
	uint16_t STATUS; | 
				
			||||
} dSPIN_RegsStruct_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN Low speed optimization */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_LSPD_OPT_OFF      = ((uint16_t)0x0000), | 
				
			||||
	dSPIN_LSPD_OPT_ON       = ((uint16_t)dSPIN_LSPD_OPT) | 
				
			||||
} dSPIN_LSPD_OPT_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN overcurrent threshold options */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_OCD_TH_375mA      = ((uint8_t)0x00), | 
				
			||||
	dSPIN_OCD_TH_750mA      = ((uint8_t)0x01), | 
				
			||||
	dSPIN_OCD_TH_1125mA     = ((uint8_t)0x02), | 
				
			||||
	dSPIN_OCD_TH_1500mA     = ((uint8_t)0x03), | 
				
			||||
	dSPIN_OCD_TH_1875mA     = ((uint8_t)0x04), | 
				
			||||
	dSPIN_OCD_TH_2250mA     = ((uint8_t)0x05), | 
				
			||||
	dSPIN_OCD_TH_2625mA     = ((uint8_t)0x06), | 
				
			||||
	dSPIN_OCD_TH_3000mA     = ((uint8_t)0x07), | 
				
			||||
	dSPIN_OCD_TH_3375mA     = ((uint8_t)0x08), | 
				
			||||
	dSPIN_OCD_TH_3750mA     = ((uint8_t)0x09), | 
				
			||||
	dSPIN_OCD_TH_4125mA     = ((uint8_t)0x0A), | 
				
			||||
	dSPIN_OCD_TH_4500mA     = ((uint8_t)0x0B), | 
				
			||||
	dSPIN_OCD_TH_4875mA     = ((uint8_t)0x0C), | 
				
			||||
	dSPIN_OCD_TH_5250mA     = ((uint8_t)0x0D), | 
				
			||||
	dSPIN_OCD_TH_5625mA     = ((uint8_t)0x0E), | 
				
			||||
	dSPIN_OCD_TH_6000mA     = ((uint8_t)0x0F) | 
				
			||||
} dSPIN_OCD_TH_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN STEP_MODE register masks */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_STEP_MODE_STEP_SEL        = ((uint8_t)0x07), | 
				
			||||
	dSPIN_STEP_MODE_SYNC_SEL        = ((uint8_t)0x70), | 
				
			||||
	dSPIN_STEP_MODE_SYNC_EN         = ((uint8_t)0x80) | 
				
			||||
} dSPIN_STEP_MODE_Masks_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN STEP_MODE register options */ | 
				
			||||
/* dSPIN STEP_SEL options */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_STEP_SEL_1        = ((uint8_t)0x00), | 
				
			||||
	dSPIN_STEP_SEL_1_2      = ((uint8_t)0x01), | 
				
			||||
	dSPIN_STEP_SEL_1_4      = ((uint8_t)0x02), | 
				
			||||
	dSPIN_STEP_SEL_1_8      = ((uint8_t)0x03), | 
				
			||||
	dSPIN_STEP_SEL_1_16     = ((uint8_t)0x04), | 
				
			||||
	dSPIN_STEP_SEL_1_32     = ((uint8_t)0x05), | 
				
			||||
	dSPIN_STEP_SEL_1_64     = ((uint8_t)0x06), | 
				
			||||
	dSPIN_STEP_SEL_1_128    = ((uint8_t)0x07) | 
				
			||||
} dSPIN_STEP_SEL_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN SYNC_SEL options */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_SYNC_SEL_DISABLED     = ((uint8_t)0x00), | 
				
			||||
	dSPIN_SYNC_SEL_1_2      = ((uint8_t)(dSPIN_SYNC_EN | 0x00)), | 
				
			||||
	dSPIN_SYNC_SEL_1        = ((uint8_t)(dSPIN_SYNC_EN | 0x10)), | 
				
			||||
	dSPIN_SYNC_SEL_2        = ((uint8_t)(dSPIN_SYNC_EN | 0x20)), | 
				
			||||
	dSPIN_SYNC_SEL_4        = ((uint8_t)(dSPIN_SYNC_EN | 0x30)), | 
				
			||||
	dSPIN_SYNC_SEL_8        = ((uint8_t)(dSPIN_SYNC_EN | 0x40)), | 
				
			||||
	dSPIN_SYNC_SEL_16       = ((uint8_t)(dSPIN_SYNC_EN | 0x50)), | 
				
			||||
	dSPIN_SYNC_SEL_32       = ((uint8_t)(dSPIN_SYNC_EN | 0x60)), | 
				
			||||
	dSPIN_SYNC_SEL_64       = ((uint8_t)(dSPIN_SYNC_EN | 0x70)) | 
				
			||||
} dSPIN_SYNC_SEL_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN ALARM_EN register options */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_ALARM_EN_OVERCURRENT          = ((uint8_t)0x01), | 
				
			||||
	dSPIN_ALARM_EN_THERMAL_SHUTDOWN     = ((uint8_t)0x02), | 
				
			||||
	dSPIN_ALARM_EN_THERMAL_WARNING      = ((uint8_t)0x04), | 
				
			||||
	dSPIN_ALARM_EN_UNDER_VOLTAGE        = ((uint8_t)0x08), | 
				
			||||
	dSPIN_ALARM_EN_STALL_DET_A          = ((uint8_t)0x10), | 
				
			||||
	dSPIN_ALARM_EN_STALL_DET_B          = ((uint8_t)0x20), | 
				
			||||
	dSPIN_ALARM_EN_SW_TURN_ON           = ((uint8_t)0x40), | 
				
			||||
	dSPIN_ALARM_EN_WRONG_NPERF_CMD      = ((uint8_t)0x80) | 
				
			||||
} dSPIN_ALARM_EN_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN Config register masks */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_OSC_SEL                    = ((uint16_t)0x0007), | 
				
			||||
	dSPIN_CONFIG_EXT_CLK                    = ((uint16_t)0x0008), | 
				
			||||
	dSPIN_CONFIG_SW_MODE                    = ((uint16_t)0x0010), | 
				
			||||
	dSPIN_CONFIG_EN_VSCOMP                  = ((uint16_t)0x0020), | 
				
			||||
	dSPIN_CONFIG_OC_SD                      = ((uint16_t)0x0080), | 
				
			||||
	dSPIN_CONFIG_POW_SR                     = ((uint16_t)0x0300), | 
				
			||||
	dSPIN_CONFIG_F_PWM_DEC                  = ((uint16_t)0x1C00), | 
				
			||||
	dSPIN_CONFIG_F_PWM_INT                  = ((uint16_t)0xE000) | 
				
			||||
} dSPIN_CONFIG_Masks_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN Config register options */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_INT_16MHZ                  = ((uint16_t)0x0000), | 
				
			||||
	dSPIN_CONFIG_INT_16MHZ_OSCOUT_2MHZ      = ((uint16_t)0x0008), | 
				
			||||
	dSPIN_CONFIG_INT_16MHZ_OSCOUT_4MHZ      = ((uint16_t)0x0009), | 
				
			||||
	dSPIN_CONFIG_INT_16MHZ_OSCOUT_8MHZ      = ((uint16_t)0x000A), | 
				
			||||
	dSPIN_CONFIG_INT_16MHZ_OSCOUT_16MHZ     = ((uint16_t)0x000B), | 
				
			||||
	dSPIN_CONFIG_EXT_8MHZ_XTAL_DRIVE        = ((uint16_t)0x0004), | 
				
			||||
	dSPIN_CONFIG_EXT_16MHZ_XTAL_DRIVE       = ((uint16_t)0x0005), | 
				
			||||
	dSPIN_CONFIG_EXT_24MHZ_XTAL_DRIVE       = ((uint16_t)0x0006), | 
				
			||||
	dSPIN_CONFIG_EXT_32MHZ_XTAL_DRIVE       = ((uint16_t)0x0007), | 
				
			||||
	dSPIN_CONFIG_EXT_8MHZ_OSCOUT_INVERT     = ((uint16_t)0x000C), | 
				
			||||
	dSPIN_CONFIG_EXT_16MHZ_OSCOUT_INVERT    = ((uint16_t)0x000D), | 
				
			||||
	dSPIN_CONFIG_EXT_24MHZ_OSCOUT_INVERT    = ((uint16_t)0x000E), | 
				
			||||
	dSPIN_CONFIG_EXT_32MHZ_OSCOUT_INVERT    = ((uint16_t)0x000F) | 
				
			||||
} dSPIN_CONFIG_OSC_MGMT_TypeDef; | 
				
			||||
 | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_SW_HARD_STOP       = ((uint16_t)0x0000), | 
				
			||||
	dSPIN_CONFIG_SW_USER            = ((uint16_t)0x0010) | 
				
			||||
} dSPIN_CONFIG_SW_MODE_TypeDef; | 
				
			||||
 | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_VS_COMP_DISABLE    = ((uint16_t)0x0000), | 
				
			||||
	dSPIN_CONFIG_VS_COMP_ENABLE     = ((uint16_t)0x0020) | 
				
			||||
} dSPIN_CONFIG_EN_VSCOMP_TypeDef; | 
				
			||||
 | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_OC_SD_DISABLE      = ((uint16_t)0x0000), | 
				
			||||
	dSPIN_CONFIG_OC_SD_ENABLE       = ((uint16_t)0x0080) | 
				
			||||
} dSPIN_CONFIG_OC_SD_TypeDef; | 
				
			||||
 | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_SR_320V_us     = ((uint16_t)0x0000), | 
				
			||||
	dSPIN_CONFIG_SR_075V_us     = ((uint16_t)0x0100), | 
				
			||||
	dSPIN_CONFIG_SR_110V_us     = ((uint16_t)0x0200), | 
				
			||||
	dSPIN_CONFIG_SR_260V_us     = ((uint16_t)0x0300) | 
				
			||||
} dSPIN_CONFIG_POW_SR_TypeDef; | 
				
			||||
 | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_PWM_DIV_1      = (((uint16_t)0x00) << 13), | 
				
			||||
	dSPIN_CONFIG_PWM_DIV_2      = (((uint16_t)0x01) << 13), | 
				
			||||
	dSPIN_CONFIG_PWM_DIV_3      = (((uint16_t)0x02) << 13), | 
				
			||||
	dSPIN_CONFIG_PWM_DIV_4      = (((uint16_t)0x03) << 13), | 
				
			||||
	dSPIN_CONFIG_PWM_DIV_5      = (((uint16_t)0x04) << 13), | 
				
			||||
	dSPIN_CONFIG_PWM_DIV_6      = (((uint16_t)0x05) << 13), | 
				
			||||
	dSPIN_CONFIG_PWM_DIV_7      = (((uint16_t)0x06) << 13) | 
				
			||||
} dSPIN_CONFIG_F_PWM_INT_TypeDef; | 
				
			||||
 | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_PWM_MUL_0_625      = (((uint16_t)0x00) << 10), | 
				
			||||
	dSPIN_CONFIG_PWM_MUL_0_75       = (((uint16_t)0x01) << 10), | 
				
			||||
	dSPIN_CONFIG_PWM_MUL_0_875      = (((uint16_t)0x02) << 10), | 
				
			||||
	dSPIN_CONFIG_PWM_MUL_1          = (((uint16_t)0x03) << 10), | 
				
			||||
	dSPIN_CONFIG_PWM_MUL_1_25       = (((uint16_t)0x04) << 10), | 
				
			||||
	dSPIN_CONFIG_PWM_MUL_1_5        = (((uint16_t)0x05) << 10), | 
				
			||||
	dSPIN_CONFIG_PWM_MUL_1_75       = (((uint16_t)0x06) << 10), | 
				
			||||
	dSPIN_CONFIG_PWM_MUL_2          = (((uint16_t)0x07) << 10) | 
				
			||||
} dSPIN_CONFIG_F_PWM_DEC_TypeDef; | 
				
			||||
 | 
				
			||||
/* Status Register bit masks */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_STATUS_HIZ            = (((uint16_t)0x0001)), | 
				
			||||
	dSPIN_STATUS_BUSY           = (((uint16_t)0x0002)), | 
				
			||||
	dSPIN_STATUS_SW_F           = (((uint16_t)0x0004)), | 
				
			||||
	dSPIN_STATUS_SW_EVN         = (((uint16_t)0x0008)), | 
				
			||||
	dSPIN_STATUS_DIR            = (((uint16_t)0x0010)), | 
				
			||||
	dSPIN_STATUS_MOT_STATUS     = (((uint16_t)0x0060)), | 
				
			||||
	dSPIN_STATUS_NOTPERF_CMD    = (((uint16_t)0x0080)), | 
				
			||||
	dSPIN_STATUS_WRONG_CMD      = (((uint16_t)0x0100)), | 
				
			||||
	dSPIN_STATUS_UVLO           = (((uint16_t)0x0200)), | 
				
			||||
	dSPIN_STATUS_TH_WRN         = (((uint16_t)0x0400)), | 
				
			||||
	dSPIN_STATUS_TH_SD          = (((uint16_t)0x0800)), | 
				
			||||
	dSPIN_STATUS_OCD            = (((uint16_t)0x1000)), | 
				
			||||
	dSPIN_STATUS_STEP_LOSS_A    = (((uint16_t)0x2000)), | 
				
			||||
	dSPIN_STATUS_STEP_LOSS_B    = (((uint16_t)0x4000)), | 
				
			||||
	dSPIN_STATUS_SCK_MOD        = (((uint16_t)0x8000)) | 
				
			||||
} dSPIN_STATUS_Masks_TypeDef; | 
				
			||||
 | 
				
			||||
/* Status Register options */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_STATUS_MOT_STATUS_STOPPED         = (((uint16_t)0x0000) << 5), | 
				
			||||
	dSPIN_STATUS_MOT_STATUS_ACCELERATION    = (((uint16_t)0x0001) << 5), | 
				
			||||
	dSPIN_STATUS_MOT_STATUS_DECELERATION    = (((uint16_t)0x0002) << 5), | 
				
			||||
	dSPIN_STATUS_MOT_STATUS_CONST_SPD       = (((uint16_t)0x0003) << 5) | 
				
			||||
} dSPIN_STATUS_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN internal register addresses */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_ABS_POS           = ((uint8_t)0x01), | 
				
			||||
	dSPIN_EL_POS            = ((uint8_t)0x02), | 
				
			||||
	dSPIN_MARK              = ((uint8_t)0x03), | 
				
			||||
	dSPIN_SPEED             = ((uint8_t)0x04), | 
				
			||||
	dSPIN_ACC               = ((uint8_t)0x05), | 
				
			||||
	dSPIN_DEC               = ((uint8_t)0x06), | 
				
			||||
	dSPIN_MAX_SPEED         = ((uint8_t)0x07), | 
				
			||||
	dSPIN_MIN_SPEED         = ((uint8_t)0x08), | 
				
			||||
	dSPIN_FS_SPD            = ((uint8_t)0x15), | 
				
			||||
	dSPIN_KVAL_HOLD         = ((uint8_t)0x09), | 
				
			||||
	dSPIN_KVAL_RUN          = ((uint8_t)0x0A), | 
				
			||||
	dSPIN_KVAL_ACC          = ((uint8_t)0x0B), | 
				
			||||
	dSPIN_KVAL_DEC          = ((uint8_t)0x0C), | 
				
			||||
	dSPIN_INT_SPD           = ((uint8_t)0x0D), | 
				
			||||
	dSPIN_ST_SLP            = ((uint8_t)0x0E), | 
				
			||||
	dSPIN_FN_SLP_ACC        = ((uint8_t)0x0F), | 
				
			||||
	dSPIN_FN_SLP_DEC        = ((uint8_t)0x10), | 
				
			||||
	dSPIN_K_THERM           = ((uint8_t)0x11), | 
				
			||||
	dSPIN_ADC_OUT           = ((uint8_t)0x12), | 
				
			||||
	dSPIN_OCD_TH            = ((uint8_t)0x13), | 
				
			||||
	dSPIN_STALL_TH          = ((uint8_t)0x14), | 
				
			||||
	dSPIN_STEP_MODE         = ((uint8_t)0x16), | 
				
			||||
	dSPIN_ALARM_EN          = ((uint8_t)0x17), | 
				
			||||
	dSPIN_CONFIG            = ((uint8_t)0x18), | 
				
			||||
	dSPIN_STATUS            = ((uint8_t)0x19), | 
				
			||||
	dSPIN_RESERVED_REG2     = ((uint8_t)0x1A), | 
				
			||||
	dSPIN_RESERVED_REG1     = ((uint8_t)0x1B) | 
				
			||||
} dSPIN_Registers_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN command set */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_NOP           = ((uint8_t)0x00), | 
				
			||||
	dSPIN_SET_PARAM     = ((uint8_t)0x00), | 
				
			||||
	dSPIN_GET_PARAM     = ((uint8_t)0x20), | 
				
			||||
	dSPIN_RUN           = ((uint8_t)0x50), | 
				
			||||
	dSPIN_STEP_CLOCK    = ((uint8_t)0x58), | 
				
			||||
	dSPIN_MOVE          = ((uint8_t)0x40), | 
				
			||||
	dSPIN_GO_TO         = ((uint8_t)0x60), | 
				
			||||
	dSPIN_GO_TO_DIR     = ((uint8_t)0x68), | 
				
			||||
	dSPIN_GO_UNTIL      = ((uint8_t)0x82), | 
				
			||||
	dSPIN_GO_UNTIL_ACT_CPY  = ((uint8_t)0x8A), | 
				
			||||
	dSPIN_RELEASE_SW    = ((uint8_t)0x92), | 
				
			||||
	dSPIN_GO_HOME       = ((uint8_t)0x70), | 
				
			||||
	dSPIN_GO_MARK       = ((uint8_t)0x78), | 
				
			||||
	dSPIN_RESET_POS     = ((uint8_t)0xD8), | 
				
			||||
	dSPIN_RESET_DEVICE  = ((uint8_t)0xC0), | 
				
			||||
	dSPIN_SOFT_STOP     = ((uint8_t)0xB0), | 
				
			||||
	dSPIN_HARD_STOP     = ((uint8_t)0xB8), | 
				
			||||
	dSPIN_SOFT_HIZ      = ((uint8_t)0xA0), | 
				
			||||
	dSPIN_HARD_HIZ      = ((uint8_t)0xA8), | 
				
			||||
	dSPIN_GET_STATUS    = ((uint8_t)0xD0), | 
				
			||||
	dSPIN_RESERVED_CMD2 = ((uint8_t)0xEB), | 
				
			||||
	dSPIN_RESERVED_CMD1 = ((uint8_t)0xF8) | 
				
			||||
} dSPIN_Commands_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN direction options */ | 
				
			||||
typedef enum { | 
				
			||||
	FWD     = ((uint8_t)0x01), | 
				
			||||
	REV     = ((uint8_t)0x00) | 
				
			||||
} dSPIN_Direction_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN action options */ | 
				
			||||
typedef enum { | 
				
			||||
	ACTION_RESET    = ((uint8_t)0x00), | 
				
			||||
	ACTION_COPY = ((uint8_t)0x08) | 
				
			||||
} dSPIN_Action_TypeDef; | 
				
			||||
/**
 | 
				
			||||
  * @} | 
				
			||||
  */ | 
				
			||||
#endif /* defined(L6470) */ | 
				
			||||
 | 
				
			||||
#if defined(L6472) | 
				
			||||
/**
 | 
				
			||||
  * @brief dSPIN Init structure definition | 
				
			||||
  */ | 
				
			||||
typedef struct { | 
				
			||||
	uint32_t ABS_POS; | 
				
			||||
	uint16_t EL_POS; | 
				
			||||
	uint32_t MARK; | 
				
			||||
	uint32_t SPEED; | 
				
			||||
	uint16_t ACC; | 
				
			||||
	uint16_t DEC; | 
				
			||||
	uint16_t MAX_SPEED; | 
				
			||||
	uint16_t MIN_SPEED; | 
				
			||||
	uint16_t FS_SPD; | 
				
			||||
	uint8_t  TVAL_HOLD; | 
				
			||||
	uint8_t  TVAL_RUN; | 
				
			||||
	uint8_t  TVAL_ACC; | 
				
			||||
	uint8_t  TVAL_DEC; | 
				
			||||
	uint16_t RESERVED_3; | 
				
			||||
	uint8_t  T_FAST; | 
				
			||||
	uint8_t  TON_MIN; | 
				
			||||
	uint8_t  TOFF_MIN; | 
				
			||||
	uint8_t  RESERVED_2; | 
				
			||||
	uint8_t  ADC_OUT; | 
				
			||||
	uint8_t  OCD_TH; | 
				
			||||
	uint8_t  RESERVED_1; | 
				
			||||
	uint8_t  STEP_MODE; | 
				
			||||
	uint8_t  ALARM_EN; | 
				
			||||
	uint16_t CONFIG; | 
				
			||||
} dSPIN_RegsStruct_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN maximum fall step times */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_FAST_STEP_2us     = ((uint8_t)0x00), | 
				
			||||
	dSPIN_FAST_STEP_4us     = ((uint8_t)0x01), | 
				
			||||
	dSPIN_FAST_STEP_6us     = ((uint8_t)0x02), | 
				
			||||
	dSPIN_FAST_STEP_8us     = ((uint8_t)0x03), | 
				
			||||
	dSPIN_FAST_STEP_10us        = ((uint8_t)0x04), | 
				
			||||
	dSPIN_FAST_STEP_12us        = ((uint8_t)0x05), | 
				
			||||
	dSPIN_FAST_STEP_14us        = ((uint8_t)0x06), | 
				
			||||
	dSPIN_FAST_STEP_16us        = ((uint8_t)0x07), | 
				
			||||
	dSPIN_FAST_STEP_18us        = ((uint8_t)0x08), | 
				
			||||
	dSPIN_FAST_STEP_20us        = ((uint8_t)0x09), | 
				
			||||
	dSPIN_FAST_STEP_22us        = ((uint8_t)0x0A), | 
				
			||||
	dSPIN_FAST_STEP_24s     = ((uint8_t)0x0B), | 
				
			||||
	dSPIN_FAST_STEP_26us        = ((uint8_t)0x0C), | 
				
			||||
	dSPIN_FAST_STEP_28us        = ((uint8_t)0x0D), | 
				
			||||
	dSPIN_FAST_STEP_30us        = ((uint8_t)0x0E), | 
				
			||||
	dSPIN_FAST_STEP_32us        = ((uint8_t)0x0F) | 
				
			||||
} dSPIN_FAST_STEP_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN maximum fast decay times */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_TOFF_FAST_2us     = (((uint8_t)0x00) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_4us     = (((uint8_t)0x01) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_6us     = (((uint8_t)0x02) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_8us     = (((uint8_t)0x03) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_10us        = (((uint8_t)0x04) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_12us        = (((uint8_t)0x05) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_14us        = (((uint8_t)0x06) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_16us        = (((uint8_t)0x07) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_18us        = (((uint8_t)0x08) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_20us        = (((uint8_t)0x09) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_22us        = (((uint8_t)0x0A) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_24us        = (((uint8_t)0x0B) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_26us        = (((uint8_t)0x0C) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_28us        = (((uint8_t)0x0D) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_30us        = (((uint8_t)0x0E) << 4), | 
				
			||||
	dSPIN_TOFF_FAST_32us        = (((uint8_t)0x0F) << 4) | 
				
			||||
} dSPIN_TOFF_FAST_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN overcurrent threshold options */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_OCD_TH_375mA      = ((uint8_t)0x00), | 
				
			||||
	dSPIN_OCD_TH_750mA      = ((uint8_t)0x01), | 
				
			||||
	dSPIN_OCD_TH_1125mA     = ((uint8_t)0x02), | 
				
			||||
	dSPIN_OCD_TH_1500mA     = ((uint8_t)0x03), | 
				
			||||
	dSPIN_OCD_TH_1875mA     = ((uint8_t)0x04), | 
				
			||||
	dSPIN_OCD_TH_2250mA     = ((uint8_t)0x05), | 
				
			||||
	dSPIN_OCD_TH_2625mA     = ((uint8_t)0x06), | 
				
			||||
	dSPIN_OCD_TH_3000mA     = ((uint8_t)0x07), | 
				
			||||
	dSPIN_OCD_TH_3375mA     = ((uint8_t)0x08), | 
				
			||||
	dSPIN_OCD_TH_3750mA     = ((uint8_t)0x09), | 
				
			||||
	dSPIN_OCD_TH_4125mA     = ((uint8_t)0x0A), | 
				
			||||
	dSPIN_OCD_TH_4500mA     = ((uint8_t)0x0B), | 
				
			||||
	dSPIN_OCD_TH_4875mA     = ((uint8_t)0x0C), | 
				
			||||
	dSPIN_OCD_TH_5250mA     = ((uint8_t)0x0D), | 
				
			||||
	dSPIN_OCD_TH_5625mA     = ((uint8_t)0x0E), | 
				
			||||
	dSPIN_OCD_TH_6000mA     = ((uint8_t)0x0F) | 
				
			||||
} dSPIN_OCD_TH_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN STEP_MODE register masks */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_STEP_MODE_STEP_SEL        = ((uint8_t)0x07), | 
				
			||||
	dSPIN_STEP_MODE_SYNC_SEL        = ((uint8_t)0x70), | 
				
			||||
	dSPIN_STEP_MODE_SYNC_EN         = ((uint8_t)0x80) | 
				
			||||
} dSPIN_STEP_MODE_Masks_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN STEP_MODE register options */ | 
				
			||||
/* dSPIN STEP_SEL options */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_STEP_SEL_1        = ((uint8_t)(dSPIN_STEP_MODE_BIT3 | 0x00)), | 
				
			||||
	dSPIN_STEP_SEL_1_2      = ((uint8_t)(dSPIN_STEP_MODE_BIT3 | 0x01)), | 
				
			||||
	dSPIN_STEP_SEL_1_4      = ((uint8_t)(dSPIN_STEP_MODE_BIT3 | 0x02)), | 
				
			||||
	dSPIN_STEP_SEL_1_8      = ((uint8_t)(dSPIN_STEP_MODE_BIT3 | 0x03)), | 
				
			||||
	dSPIN_STEP_SEL_1_16     = ((uint8_t)(dSPIN_STEP_MODE_BIT3 | 0x04)) | 
				
			||||
} dSPIN_STEP_SEL_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN SYNC_SEL options */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_SYNC_SEL_DISABLED     = ((uint8_t)0x00), | 
				
			||||
	dSPIN_SYNC_SEL_1_2      = ((uint8_t)(dSPIN_SYNC_EN | 0x00)), | 
				
			||||
	dSPIN_SYNC_SEL_1        = ((uint8_t)(dSPIN_SYNC_EN | 0x10)), | 
				
			||||
	dSPIN_SYNC_SEL_2        = ((uint8_t)(dSPIN_SYNC_EN | 0x20)), | 
				
			||||
	dSPIN_SYNC_SEL_4        = ((uint8_t)(dSPIN_SYNC_EN | 0x30)), | 
				
			||||
	dSPIN_SYNC_SEL_8        = ((uint8_t)(dSPIN_SYNC_EN | 0x40)) | 
				
			||||
} dSPIN_SYNC_SEL_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN ALARM_EN register options */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_ALARM_EN_OVERCURRENT      = ((uint8_t)0x01), | 
				
			||||
	dSPIN_ALARM_EN_THERMAL_SHUTDOWN     = ((uint8_t)0x02), | 
				
			||||
	dSPIN_ALARM_EN_THERMAL_WARNING      = ((uint8_t)0x04), | 
				
			||||
	dSPIN_ALARM_EN_UNDER_VOLTAGE        = ((uint8_t)0x08), | 
				
			||||
	dSPIN_ALARM_EN_SW_TURN_ON       = ((uint8_t)0x40), | 
				
			||||
	dSPIN_ALARM_EN_WRONG_NPERF_CMD      = ((uint8_t)0x80) | 
				
			||||
} dSPIN_ALARM_EN_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN Config register masks */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_OSC_SEL                    = ((uint16_t)0x0007), | 
				
			||||
	dSPIN_CONFIG_EXT_CLK                    = ((uint16_t)0x0008), | 
				
			||||
	dSPIN_CONFIG_SW_MODE                    = ((uint16_t)0x0010), | 
				
			||||
	dSPIN_CONFIG_EN_VSCOMP                  = ((uint16_t)0x0020), | 
				
			||||
	dSPIN_CONFIG_OC_SD                  = ((uint16_t)0x0080), | 
				
			||||
	dSPIN_CONFIG_POW_SR                 = ((uint16_t)0x0300), | 
				
			||||
	dSPIN_CONFIG_TSW                    = ((uint16_t)0x7C00), | 
				
			||||
	dSPIN_CONFIG_PRED_EN                    = ((uint16_t)0x8000) | 
				
			||||
} dSPIN_CONFIG_Masks_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN Config register options */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_INT_16MHZ              = ((uint16_t)0x0000), | 
				
			||||
	dSPIN_CONFIG_INT_16MHZ_OSCOUT_2MHZ      = ((uint16_t)0x0008), | 
				
			||||
	dSPIN_CONFIG_INT_16MHZ_OSCOUT_4MHZ      = ((uint16_t)0x0009), | 
				
			||||
	dSPIN_CONFIG_INT_16MHZ_OSCOUT_8MHZ      = ((uint16_t)0x000A), | 
				
			||||
	dSPIN_CONFIG_INT_16MHZ_OSCOUT_16MHZ     = ((uint16_t)0x000B), | 
				
			||||
	dSPIN_CONFIG_EXT_8MHZ_XTAL_DRIVE        = ((uint16_t)0x0004), | 
				
			||||
	dSPIN_CONFIG_EXT_16MHZ_XTAL_DRIVE       = ((uint16_t)0x0005), | 
				
			||||
	dSPIN_CONFIG_EXT_24MHZ_XTAL_DRIVE       = ((uint16_t)0x0006), | 
				
			||||
	dSPIN_CONFIG_EXT_32MHZ_XTAL_DRIVE       = ((uint16_t)0x0007), | 
				
			||||
	dSPIN_CONFIG_EXT_8MHZ_OSCOUT_INVERT     = ((uint16_t)0x000C), | 
				
			||||
	dSPIN_CONFIG_EXT_16MHZ_OSCOUT_INVERT    = ((uint16_t)0x000D), | 
				
			||||
	dSPIN_CONFIG_EXT_24MHZ_OSCOUT_INVERT    = ((uint16_t)0x000E), | 
				
			||||
	dSPIN_CONFIG_EXT_32MHZ_OSCOUT_INVERT    = ((uint16_t)0x000F) | 
				
			||||
} dSPIN_CONFIG_OSC_MGMT_TypeDef; | 
				
			||||
 | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_SW_HARD_STOP       = ((uint16_t)0x0000), | 
				
			||||
	dSPIN_CONFIG_SW_USER            = ((uint16_t)0x0010) | 
				
			||||
} dSPIN_CONFIG_SW_MODE_TypeDef; | 
				
			||||
 | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_TQ_REG_TVAL_USED           = ((uint16_t)0x0000), | 
				
			||||
	dSPIN_CONFIG_TQ_REG_ADC_OUT     = ((uint16_t)0x0020) | 
				
			||||
} dSPIN_CONFIG_EN_TQREG_TypeDef; | 
				
			||||
 | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_OC_SD_DISABLE      = ((uint16_t)0x0000), | 
				
			||||
	dSPIN_CONFIG_OC_SD_ENABLE       = ((uint16_t)0x0080) | 
				
			||||
} dSPIN_CONFIG_OC_SD_TypeDef; | 
				
			||||
 | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_SR_320V_us     = ((uint16_t)0x0000), | 
				
			||||
	dSPIN_CONFIG_SR_075V_us     = ((uint16_t)0x0100), | 
				
			||||
	dSPIN_CONFIG_SR_110V_us     = ((uint16_t)0x0200), | 
				
			||||
	dSPIN_CONFIG_SR_260V_us     = ((uint16_t)0x0300) | 
				
			||||
} dSPIN_CONFIG_POW_SR_TypeDef; | 
				
			||||
 | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_PRED_DISABLE   = ((uint16_t)0x0000), | 
				
			||||
	dSPIN_CONFIG_PRED_ENABLE    = ((uint16_t)0x8000) | 
				
			||||
} dSPIN_CONFIG_PRED_EN_TypeDef; | 
				
			||||
 | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_CONFIG_TSW_004us      = (((uint16_t)0x01) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_008us      = (((uint16_t)0x02) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_012us      = (((uint16_t)0x03) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_016us      = (((uint16_t)0x04) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_020us      = (((uint16_t)0x05) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_024us      = (((uint16_t)0x06) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_028us      = (((uint16_t)0x07) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_032us      = (((uint16_t)0x08) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_036us      = (((uint16_t)0x09) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_040us      = (((uint16_t)0x0A) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_044us      = (((uint16_t)0x0B) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_048us      = (((uint16_t)0x0C) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_052us      = (((uint16_t)0x0D) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_056us      = (((uint16_t)0x0E) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_060us      = (((uint16_t)0x0F) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_064us      = (((uint16_t)0x10) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_068us      = (((uint16_t)0x11) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_072us      = (((uint16_t)0x12) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_076us      = (((uint16_t)0x13) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_080us      = (((uint16_t)0x14) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_084us      = (((uint16_t)0x15) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_088us      = (((uint16_t)0x16) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_092us      = (((uint16_t)0x17) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_096us      = (((uint16_t)0x18) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_100us      = (((uint16_t)0x19) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_104us      = (((uint16_t)0x1A) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_108us      = (((uint16_t)0x1B) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_112us      = (((uint16_t)0x1C) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_116us      = (((uint16_t)0x1D) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_120us      = (((uint16_t)0x1E) << 10), | 
				
			||||
	dSPIN_CONFIG_TSW_124us      = (((uint16_t)0x1F) << 10) | 
				
			||||
} dSPIN_CONFIG_TSW_TypeDef; | 
				
			||||
 | 
				
			||||
/* Status Register bit masks */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_STATUS_HIZ            = (((uint16_t)0x0001)), | 
				
			||||
	dSPIN_STATUS_BUSY           = (((uint16_t)0x0002)), | 
				
			||||
	dSPIN_STATUS_SW_F           = (((uint16_t)0x0004)), | 
				
			||||
	dSPIN_STATUS_SW_EVN         = (((uint16_t)0x0008)), | 
				
			||||
	dSPIN_STATUS_DIR            = (((uint16_t)0x0010)), | 
				
			||||
	dSPIN_STATUS_MOT_STATUS     = (((uint16_t)0x0060)), | 
				
			||||
	dSPIN_STATUS_NOTPERF_CMD    = (((uint16_t)0x0080)), | 
				
			||||
	dSPIN_STATUS_WRONG_CMD      = (((uint16_t)0x0100)), | 
				
			||||
	dSPIN_STATUS_UVLO           = (((uint16_t)0x0200)), | 
				
			||||
	dSPIN_STATUS_TH_WRN         = (((uint16_t)0x0400)), | 
				
			||||
	dSPIN_STATUS_TH_SD          = (((uint16_t)0x0800)), | 
				
			||||
	dSPIN_STATUS_OCD            = (((uint16_t)0x1000)), | 
				
			||||
	dSPIN_STATUS_SCK_MOD        = (((uint16_t)0x8000)) | 
				
			||||
} dSPIN_STATUS_Masks_TypeDef; | 
				
			||||
 | 
				
			||||
/* Status Register options */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_STATUS_MOT_STATUS_STOPPED         = (((uint16_t)0x0000) << 5), | 
				
			||||
	dSPIN_STATUS_MOT_STATUS_ACCELERATION    = (((uint16_t)0x0001) << 5), | 
				
			||||
	dSPIN_STATUS_MOT_STATUS_DECELERATION    = (((uint16_t)0x0002) << 5), | 
				
			||||
	dSPIN_STATUS_MOT_STATUS_CONST_SPD       = (((uint16_t)0x0003) << 5) | 
				
			||||
} dSPIN_STATUS_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN internal register addresses */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_ABS_POS           = ((uint8_t)0x01), | 
				
			||||
	dSPIN_EL_POS            = ((uint8_t)0x02), | 
				
			||||
	dSPIN_MARK          = ((uint8_t)0x03), | 
				
			||||
	dSPIN_SPEED         = ((uint8_t)0x04), | 
				
			||||
	dSPIN_ACC           = ((uint8_t)0x05), | 
				
			||||
	dSPIN_DEC           = ((uint8_t)0x06), | 
				
			||||
	dSPIN_MAX_SPEED         = ((uint8_t)0x07), | 
				
			||||
	dSPIN_MIN_SPEED         = ((uint8_t)0x08), | 
				
			||||
	dSPIN_FS_SPD            = ((uint8_t)0x15), | 
				
			||||
	dSPIN_TVAL_HOLD         = ((uint8_t)0x09), | 
				
			||||
	dSPIN_TVAL_RUN          = ((uint8_t)0x0A), | 
				
			||||
	dSPIN_TVAL_ACC          = ((uint8_t)0x0B), | 
				
			||||
	dSPIN_TVAL_DEC          = ((uint8_t)0x0C), | 
				
			||||
	dSPIN_RESERVED_REG5     = ((uint8_t)0x0D), | 
				
			||||
	dSPIN_T_FAST            = ((uint8_t)0x0E), | 
				
			||||
	dSPIN_TON_MIN               = ((uint8_t)0x0F), | 
				
			||||
	dSPIN_TOFF_MIN              = ((uint8_t)0x10), | 
				
			||||
	dSPIN_RESERVED_REG4     = ((uint8_t)0x11), | 
				
			||||
	dSPIN_ADC_OUT           = ((uint8_t)0x12), | 
				
			||||
	dSPIN_OCD_TH            = ((uint8_t)0x13), | 
				
			||||
	dSPIN_RESERVED_REG3     = ((uint8_t)0x14), | 
				
			||||
	dSPIN_STEP_MODE         = ((uint8_t)0x16), | 
				
			||||
	dSPIN_ALARM_EN          = ((uint8_t)0x17), | 
				
			||||
	dSPIN_CONFIG            = ((uint8_t)0x18), | 
				
			||||
	dSPIN_STATUS            = ((uint8_t)0x19), | 
				
			||||
	dSPIN_RESERVED_REG2     = ((uint8_t)0x1A), | 
				
			||||
	dSPIN_RESERVED_REG1     = ((uint8_t)0x1B) | 
				
			||||
} dSPIN_Registers_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN command set */ | 
				
			||||
typedef enum { | 
				
			||||
	dSPIN_NOP       = ((uint8_t)0x00), | 
				
			||||
	dSPIN_SET_PARAM     = ((uint8_t)0x00), | 
				
			||||
	dSPIN_GET_PARAM     = ((uint8_t)0x20), | 
				
			||||
	dSPIN_RUN       = ((uint8_t)0x50), | 
				
			||||
	dSPIN_STEP_CLOCK    = ((uint8_t)0x58), | 
				
			||||
	dSPIN_MOVE      = ((uint8_t)0x40), | 
				
			||||
	dSPIN_GO_TO     = ((uint8_t)0x60), | 
				
			||||
	dSPIN_GO_TO_DIR     = ((uint8_t)0x68), | 
				
			||||
	dSPIN_GO_UNTIL      = ((uint8_t)0x82), | 
				
			||||
	dSPIN_GO_UNTIL_ACT_CPY  = ((uint8_t)0x8A), | 
				
			||||
	dSPIN_RELEASE_SW    = ((uint8_t)0x92), | 
				
			||||
	dSPIN_GO_HOME       = ((uint8_t)0x70), | 
				
			||||
	dSPIN_GO_MARK       = ((uint8_t)0x78), | 
				
			||||
	dSPIN_RESET_POS     = ((uint8_t)0xD8), | 
				
			||||
	dSPIN_RESET_DEVICE  = ((uint8_t)0xC0), | 
				
			||||
	dSPIN_SOFT_STOP     = ((uint8_t)0xB0), | 
				
			||||
	dSPIN_HARD_STOP     = ((uint8_t)0xB8), | 
				
			||||
	dSPIN_SOFT_HIZ      = ((uint8_t)0xA0), | 
				
			||||
	dSPIN_HARD_HIZ      = ((uint8_t)0xA8), | 
				
			||||
	dSPIN_GET_STATUS    = ((uint8_t)0xD0), | 
				
			||||
	dSPIN_RESERVED_CMD2 = ((uint8_t)0xEB), | 
				
			||||
	dSPIN_RESERVED_CMD1 = ((uint8_t)0xF8) | 
				
			||||
} dSPIN_Commands_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN direction options */ | 
				
			||||
typedef enum { | 
				
			||||
	FWD     = ((uint8_t)0x01), | 
				
			||||
	REV     = ((uint8_t)0x00) | 
				
			||||
} dSPIN_Direction_TypeDef; | 
				
			||||
 | 
				
			||||
/* dSPIN action options */ | 
				
			||||
typedef enum { | 
				
			||||
	ACTION_RESET    = ((uint8_t)0x00), | 
				
			||||
	ACTION_COPY = ((uint8_t)0x08) | 
				
			||||
} dSPIN_Action_TypeDef; | 
				
			||||
/**
 | 
				
			||||
  * @} | 
				
			||||
  */ | 
				
			||||
#endif /* defined(L6472) */ | 
				
			||||
 | 
				
			||||
/* Exported macro ------------------------------------------------------------*/ | 
				
			||||
#define Speed_Steps_to_Par(steps) ((uint32_t)(((steps)*67.108864)+0.5))         /* Speed conversion, range 0 to 15625 steps/s */ | 
				
			||||
#define AccDec_Steps_to_Par(steps) ((uint16_t)(((steps)*0.068719476736)+0.5))   /* Acc/Dec rates conversion, range 14.55 to 59590 steps/s2 */ | 
				
			||||
#define MaxSpd_Steps_to_Par(steps) ((uint16_t)(((steps)*0.065536)+0.5))         /* Max Speed conversion, range 15.25 to 15610 steps/s */ | 
				
			||||
#define MinSpd_Steps_to_Par(steps) ((uint16_t)(((steps)*4.194304)+0.5))         /* Min Speed conversion, range 0 to 976.3 steps/s */ | 
				
			||||
#define FSSpd_Steps_to_Par(steps) ((uint16_t)((steps)*0.065536))                /* Full Step Speed conversion, range 7.63 to 15625 steps/s */ | 
				
			||||
#if defined(L6470) | 
				
			||||
#define IntSpd_Steps_to_Par(steps) ((uint16_t)(((steps)*4.194304)+0.5))         /* Intersect Speed conversion, range 0 to 3906 steps/s */ | 
				
			||||
#define Kval_Perc_to_Par(perc) ((uint8_t)(((perc)/0.390625)+0.5))               /* KVAL conversions, range 0.4% to 99.6% */ | 
				
			||||
#define BEMF_Slope_Perc_to_Par(perc) ((uint8_t)(((perc)/0.00156862745098)+0.5)) /* BEMF compensation slopes, range 0 to 0.4% s/step */ | 
				
			||||
#define KTherm_to_Par(KTherm) ((uint8_t)(((KTherm - 1)/0.03125)+0.5))           /* K_THERM compensation conversion, range 1 to 1.46875 */ | 
				
			||||
#define StallTh_to_Par(StallTh) ((uint8_t)(((StallTh - 31.25)/31.25)+0.5))      /* Stall Threshold conversion, range 31.25mA to 4000mA */ | 
				
			||||
#endif /* defined(L6470) */ | 
				
			||||
#if defined(L6472) | 
				
			||||
#define Tval_Current_to_Par(Tval) ((uint8_t)(((Tval - 31.25)/31.25)+0.5))       /* Torque regulation DAC current conversion, range 31.25mA to 4000mA */ | 
				
			||||
#define Tmin_Time_to_Par(Tmin) ((uint8_t)(((Tmin - 0.5)*2)+0.5))                /* Minimum time conversion, range 0.5us to 64us */ | 
				
			||||
#endif /* defined(L6472) */ | 
				
			||||
 | 
				
			||||
/* Exported functions ------------------------------------------------------- */ | 
				
			||||
 | 
				
			||||
void dSPIN_Delay(__IO uint32_t nCount); | 
				
			||||
void dSPIN_Gpio_Toggle(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); | 
				
			||||
void dSPIN_Led_Check(void); | 
				
			||||
 | 
				
			||||
void dSPIN_Reset_And_Standby(void); | 
				
			||||
void dSPIN_Peripherals_Init(void); | 
				
			||||
 | 
				
			||||
void dSPIN_PWM_Enable(uint16_t Period); | 
				
			||||
void dSPIN_PWM_DISABLE(void); | 
				
			||||
 | 
				
			||||
void dSPIN_Interrupt_Channel_Config(void); | 
				
			||||
void dSPIN_Flag_Interrupt_GPIO_Config(void); | 
				
			||||
void dSPIN_Busy_Interrupt_GPIO_Config(void); | 
				
			||||
void dSPIN_Busy_Interrupt_GPIO_DeConfig(void); | 
				
			||||
void dSPIN_Buttons_Interrupts_GPIO_Config(void); | 
				
			||||
void dSPIN_Switch_Motor_Interrupt_Config(void); | 
				
			||||
 | 
				
			||||
/* Config */ | 
				
			||||
void dSPIN_Regs_Struct_Reset(dSPIN_RegsStruct_TypeDef* dSPIN_RegsStruct); | 
				
			||||
void dSPIN_Registers_Set(dSPIN_RegsStruct_TypeDef* dSPIN_RegsStruct); | 
				
			||||
 | 
				
			||||
/* Commands */ | 
				
			||||
void dSPIN_Nop(void); | 
				
			||||
void dSPIN_Run(dSPIN_Direction_TypeDef direction, uint32_t speed); | 
				
			||||
void dSPIN_Step_Clock(dSPIN_Direction_TypeDef direction); | 
				
			||||
void dSPIN_Move(dSPIN_Direction_TypeDef direction, uint32_t n_step); | 
				
			||||
void dSPIN_Go_To(uint32_t abs_pos); | 
				
			||||
void dSPIN_Go_To_Dir(dSPIN_Direction_TypeDef direction, uint32_t abs_pos); | 
				
			||||
void dSPIN_Go_Until(dSPIN_Action_TypeDef action, dSPIN_Direction_TypeDef direction, uint32_t speed); | 
				
			||||
void dSPIN_Release_SW(dSPIN_Action_TypeDef action, dSPIN_Direction_TypeDef direction); | 
				
			||||
void dSPIN_Go_Home(void); | 
				
			||||
void dSPIN_Go_Mark(void); | 
				
			||||
void dSPIN_Reset_Pos(void); | 
				
			||||
void dSPIN_Reset_Device(void); | 
				
			||||
void dSPIN_Soft_Stop(void); | 
				
			||||
void dSPIN_Hard_Stop(void); | 
				
			||||
void dSPIN_Soft_HiZ(void); | 
				
			||||
void dSPIN_Hard_HiZ(void); | 
				
			||||
 | 
				
			||||
/* Low level commands */ | 
				
			||||
void dSPIN_Set_Param(dSPIN_Registers_TypeDef param, uint32_t value); | 
				
			||||
uint32_t dSPIN_Get_Param(dSPIN_Registers_TypeDef param); | 
				
			||||
 | 
				
			||||
/* Low level stuff */ | 
				
			||||
uint16_t dSPIN_Get_Status(void); | 
				
			||||
uint8_t dSPIN_Busy_HW(void); | 
				
			||||
uint8_t dSPIN_Busy_SW(void); | 
				
			||||
uint8_t dSPIN_Flag(void); | 
				
			||||
uint8_t dSPIN_Write_Byte(uint8_t byte); | 
				
			||||
 | 
				
			||||
/* TRASH */ | 
				
			||||
void dSPIN_Write_Daisy_Chain_Bytes(uint8_t *pTxByte, uint8_t *pRxByte, uint8_t nBytes); | 
				
			||||
void dSPIN_All_Slaves_Registers_Set(uint8_t slaves_number, dSPIN_RegsStruct_TypeDef *dSPIN_RegsStructArray); | 
				
			||||
void dSPIN_All_Slaves_Set_Param(uint8_t slaves_number, uint8_t *pParam, uint32_t *pValue); | 
				
			||||
void dSPIN_All_Slaves_Get_Param(uint8_t slaves_number, uint8_t *pParam, uint32_t *pValue); | 
				
			||||
void dSPIN_One_Slave_Move(uint8_t slaveNumber, uint8_t slaves_number, dSPIN_Direction_TypeDef direction, uint32_t n_step); | 
				
			||||
void dSPIN_One_Slave_Run(uint8_t slaveNumber, uint8_t slaves_number, dSPIN_Direction_TypeDef direction, uint32_t speed); | 
				
			||||
void dSPIN_One_Slave_Send_Command(uint8_t slaveNumber, uint8_t slaves_number, uint8_t param, uint32_t value); | 
				
			||||
void dSPIN_All_Slaves_Send_Command(uint8_t slaves_number, uint8_t *pParam, uint32_t *pValue); | 
				
			||||
void dSPIN_All_Slaves_Get_Status(uint8_t slaves_number, uint32_t *pValue); | 
				
			||||
uint8_t dSPIN_One_Or_More_Slaves_Busy_SW(uint8_t slaves_number); | 
				
			||||
 | 
				
			||||
/** @} */ | 
				
			||||
 | 
				
			||||
#endif /* __DSPIN_H */ | 
				
			||||
 | 
				
			||||
/******************* (C) COPYRIGHT 2013 STMicroelectronics *****END OF FILE****/ | 
				
			||||
@ -0,0 +1,344 @@ | 
				
			||||
/**
 | 
				
			||||
  ****************************************************************************** | 
				
			||||
  * @file    dspin_config.h | 
				
			||||
  * @author  IPC Rennes | 
				
			||||
  * @version V2.0 | 
				
			||||
  * @date    octobre 15, 2013 | 
				
			||||
  * @brief   Header with configuration parameters for dspin.c module | 
				
			||||
  * @note    (C) COPYRIGHT 2013 STMicroelectronics | 
				
			||||
  ****************************************************************************** | 
				
			||||
  * @copy | 
				
			||||
  * | 
				
			||||
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS | 
				
			||||
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE | 
				
			||||
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY | 
				
			||||
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING | 
				
			||||
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE | 
				
			||||
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. | 
				
			||||
  * | 
				
			||||
  * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> | 
				
			||||
  */ | 
				
			||||
 | 
				
			||||
/* Define to prevent recursive inclusion -------------------------------------*/ | 
				
			||||
#ifndef __DSPIN_CONFIG_H | 
				
			||||
#define __DSPIN_CONFIG_H | 
				
			||||
 | 
				
			||||
/* Includes ------------------------------------------------------------------*/ | 
				
			||||
#include "stm32f10x.h" | 
				
			||||
#include "dspin.h" | 
				
			||||
 | 
				
			||||
/* Exported constants --------------------------------------------------------*/ | 
				
			||||
 | 
				
			||||
  /****************************************************************************/ | 
				
			||||
  /***************** DSPIN chip type ******************************************/ | 
				
			||||
  /****************************************************************************/ | 
				
			||||
  #define L6470 (1) | 
				
			||||
 | 
				
			||||
  /****************************************************************************/ | 
				
			||||
  /***************** Operation Mode Choice ************************************/ | 
				
			||||
  /***************** 1 if daisy chain for one device or more, else 0 **********/ | 
				
			||||
  /****************************************************************************/ | 
				
			||||
  #define DAISY_CHAIN              (0) | 
				
			||||
 | 
				
			||||
  /****************************************************************************/ | 
				
			||||
  /******************Daisy Chain Mode *****************************************/ | 
				
			||||
  /****************************************************************************/ | 
				
			||||
 | 
				
			||||
///* Exported constants --------------------------------------------------------*/
 | 
				
			||||
 | 
				
			||||
//  /**************************** Slaves numbering ******************************/
 | 
				
			||||
//		/* Number of dPIN slaves */
 | 
				
			||||
		#define NUMBER_OF_SLAVES         (1) | 
				
			||||
//		/* Devices */
 | 
				
			||||
//		/* The first device of the chain receives the last byte transmitted by the master */
 | 
				
			||||
//		/* The last device of the chain receives the first byte transmitted by the master */
 | 
				
			||||
		#define DEVICE_1                 (NUMBER_OF_SLAVES-1) | 
				
			||||
//#if (DEVICE_1>0)
 | 
				
			||||
//		#define DEVICE_2                 (NUMBER_OF_SLAVES-2)
 | 
				
			||||
//#else
 | 
				
			||||
//		#define DEVICE_2                 (DEVICE_1)
 | 
				
			||||
//#endif
 | 
				
			||||
//#if (DEVICE_2>0)
 | 
				
			||||
//		#define DEVICE_3                 (NUMBER_OF_SLAVES-3)
 | 
				
			||||
//#else
 | 
				
			||||
//		#define DEVICE_3                 (DEVICE_2)
 | 
				
			||||
//#endif
 | 
				
			||||
//#if (DEVICE_3>0)
 | 
				
			||||
//		#define DEVICE_4                 (NUMBER_OF_SLAVES-4)
 | 
				
			||||
//#else
 | 
				
			||||
//		#define DEVICE_4                 (DEVICE_3)
 | 
				
			||||
//#endif
 | 
				
			||||
//#if (DEVICE_4>0)
 | 
				
			||||
//		#define DEVICE_5                 (NUMBER_OF_SLAVES-5)
 | 
				
			||||
//#else
 | 
				
			||||
//		#define DEVICE_5                 (DEVICE_4)
 | 
				
			||||
//#endif
 | 
				
			||||
//#if (DEVICE_5>0)
 | 
				
			||||
//		#define DEVICE_6                 (NUMBER_OF_SLAVES-6)
 | 
				
			||||
//#else
 | 
				
			||||
//		#define DEVICE_6                 (DEVICE_5)
 | 
				
			||||
//#endif
 | 
				
			||||
//#if (DEVICE_6>0)
 | 
				
			||||
//		#define DEVICE_7                 (NUMBER_OF_SLAVES-7)
 | 
				
			||||
//#else
 | 
				
			||||
//		#define DEVICE_7                 (DEVICE_6)
 | 
				
			||||
//#endif
 | 
				
			||||
//#if (DEVICE_7>0)
 | 
				
			||||
//		#define DEVICE_8                 (NUMBER_OF_SLAVES-8)
 | 
				
			||||
//#else
 | 
				
			||||
//		#define DEVICE_8                 (DEVICE_7)
 | 
				
			||||
//#endif
 | 
				
			||||
 | 
				
			||||
//  /****************************************************************************/
 | 
				
			||||
//  /***** #define dSPIN_CONF_PARAM_XXX (DEVICE_N, DEVICE_N-1, ..., DEVICE_1) ***/
 | 
				
			||||
//  /****************************************************************************/
 | 
				
			||||
 | 
				
			||||
 | 
				
			||||
//  /**************************** Speed Profile *********************************/
 | 
				
			||||
 | 
				
			||||
//	/* Register : ACC */
 | 
				
			||||
//		/* Acceleration rate in step/s2, range 14.55 to 59590 steps/s2 */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_ACC {2008.164}
 | 
				
			||||
 | 
				
			||||
//	/* Register : DEC */
 | 
				
			||||
//		/* Deceleration rate in step/s2, range 14.55 to 59590 steps/s2 */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_DEC {2008.164}
 | 
				
			||||
 | 
				
			||||
//	/* Register : MAX_SPEED */
 | 
				
			||||
//		/* Maximum speed in step/s, range 15.25 to 15610 steps/s */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_MAX_SPEED {991.821}
 | 
				
			||||
 | 
				
			||||
//	/* Register : MIN_SPEED */
 | 
				
			||||
//	/* Minimum speed in step/s, range 0 to 976.3 steps/s */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_MIN_SPEED {0}
 | 
				
			||||
 | 
				
			||||
//	/* Register : FS_SPD */
 | 
				
			||||
//		/* Full step speed in step/s, range 7.63 to 15625 steps/s */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_FS_SPD {595.093}
 | 
				
			||||
 | 
				
			||||
//  /************************ Phase Current Control *****************************/
 | 
				
			||||
 | 
				
			||||
//  /* Register : KVAL_HOLD */
 | 
				
			||||
//	/* Hold duty cycle (torque) in %, range 0 to 99.6% */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_KVAL_HOLD {16.02}
 | 
				
			||||
 | 
				
			||||
//	/* Register : KVAL_RUN */
 | 
				
			||||
//	/* Run duty cycle (torque) in %, range 0 to 99.6% */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_KVAL_RUN {16.02}
 | 
				
			||||
 | 
				
			||||
//	/* Register : KVAL_ACC */
 | 
				
			||||
//  /* Acceleration duty cycle (torque) in %, range 0 to 99.6% */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_KVAL_ACC {16.02}
 | 
				
			||||
 | 
				
			||||
//	/* Register : KVAL_DEC */
 | 
				
			||||
//	/* Deceleration duty cycle (torque) in %, range 0 to 99.6% */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_KVAL_DEC {16.02}
 | 
				
			||||
 | 
				
			||||
//	/* Register : CONFIG - field : EN_VSCOMP */
 | 
				
			||||
//	/* Motor Supply Voltage Compensation enabling , enum dSPIN_CONFIG_EN_VSCOMP_TypeDef */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_VS_COMP {dSPIN_CONFIG_VS_COMP_DISABLE}
 | 
				
			||||
 | 
				
			||||
//	/* Register : MIN_SPEED - field : LSPD_OPT */
 | 
				
			||||
//	/* Low speed optimization bit, enum dSPIN_LSPD_OPT_TypeDef */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_LSPD_BIT {dSPIN_LSPD_OPT_OFF}
 | 
				
			||||
 | 
				
			||||
//	/* Register : K_THERM */
 | 
				
			||||
//	/* Thermal compensation param, range 1 to 1.46875 */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_K_THERM {1}
 | 
				
			||||
 | 
				
			||||
//	/* Register : INT_SPEED */
 | 
				
			||||
//	/* Intersect speed settings for BEMF compensation in steps/s, range 0 to 3906 steps/s */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_INT_SPD {61.512}
 | 
				
			||||
 | 
				
			||||
//	/* Register : ST_SLP */
 | 
				
			||||
//	/* BEMF start slope settings for BEMF compensation in % step/s, range 0 to 0.4% s/step */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_ST_SLP {0.03815}
 | 
				
			||||
 | 
				
			||||
//	/* Register : FN_SLP_ACC */
 | 
				
			||||
//	/* BEMF final acc slope settings for BEMF compensation in % step/s, range 0 to 0.4% s/step  */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_FN_SLP_ACC {0.06256}
 | 
				
			||||
 | 
				
			||||
//	/* Register : FN_SLP_DEC */
 | 
				
			||||
//	/* BEMF final dec slope settings for BEMF compensation in % step/s, range 0 to 0.4% s/step */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_FN_SLP_DEC {0.06256}
 | 
				
			||||
 | 
				
			||||
//	/* Register : CONFIG - field : F_PWM_INT */
 | 
				
			||||
//	/* PWM Frequency Integer division, enum dSPIN_CONFIG_F_PWM_INT_TypeDef */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_PWM_DIV {dSPIN_CONFIG_PWM_DIV_2}
 | 
				
			||||
 | 
				
			||||
//	/* Register : CONFIG - field : F_PWM_DEC */
 | 
				
			||||
//	/* PWM Frequency Integer Multiplier, enum dSPIN_CONFIG_F_PWM_INT_TypeDef */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_PWM_MUL {dSPIN_CONFIG_PWM_MUL_1}
 | 
				
			||||
 | 
				
			||||
//  /******************************* Others *************************************/
 | 
				
			||||
//	/* Register : OCD_TH */
 | 
				
			||||
//		/* Overcurrent threshold settings via enum dSPIN_OCD_TH_TypeDef */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_OCD_TH {dSPIN_OCD_TH_3375mA}
 | 
				
			||||
 | 
				
			||||
//	/* Register : STALL_TH */
 | 
				
			||||
//	/* Stall threshold settings in mA, range 31.25mA to 4000mA */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_STALL_TH {2031.25}
 | 
				
			||||
 | 
				
			||||
//	/* Register : ALARM_EN */
 | 
				
			||||
//	/* Alarm settings via bitmap enum dSPIN_ALARM_EN_TypeDef */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_ALARM_EN {dSPIN_ALARM_EN_OVERCURRENT | dSPIN_ALARM_EN_THERMAL_SHUTDOWN | dSPIN_ALARM_EN_THERMAL_WARNING | dSPIN_ALARM_EN_UNDER_VOLTAGE | dSPIN_ALARM_EN_STALL_DET_A | dSPIN_ALARM_EN_STALL_DET_B | dSPIN_ALARM_EN_SW_TURN_ON | dSPIN_ALARM_EN_WRONG_NPERF_CMD}
 | 
				
			||||
 | 
				
			||||
//	/* Register : STEP_MODE - field : STEP_MODE */
 | 
				
			||||
//		/* Step mode settings via enum dSPIN_STEP_SEL_TypeDef */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_STEP_MODE {dSPIN_STEP_SEL_1_128}
 | 
				
			||||
 | 
				
			||||
//	  /* Register : STEP_MODE - Field : SYNC_MODE and SYNC_EN */
 | 
				
			||||
//	/* Synch. Mode settings via enum dSPIN_SYNC_SEL_TypeDef */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_SYNC_MODE {dSPIN_SYNC_SEL_DISABLED}
 | 
				
			||||
 | 
				
			||||
//	/* Register : CONFIG - field : POW_SR */
 | 
				
			||||
//		/* Slew rate, enum dSPIN_CONFIG_POW_SR_TypeDef */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_SR {dSPIN_CONFIG_SR_110V_us}
 | 
				
			||||
 | 
				
			||||
//	/* Register : CONFIG - field : OC_SD */
 | 
				
			||||
//		/* Over current shutwdown enabling, enum dSPIN_CONFIG_OC_SD_TypeDef */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_OC_SD {dSPIN_CONFIG_OC_SD_DISABLE}
 | 
				
			||||
 | 
				
			||||
//	/* Register : CONFIG - field : SW_MODE */
 | 
				
			||||
//		/* External switch hard stop interrupt mode, enum dSPIN_CONFIG_SW_MODE_TypeDef */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_SW_MODE {dSPIN_CONFIG_SW_HARD_STOP}
 | 
				
			||||
 | 
				
			||||
//	/* Register : CONFIG - field : OSC_CLK_SEL */
 | 
				
			||||
//		/* Clock setting , enum dSPIN_CONFIG_OSC_MGMT_TypeDef */
 | 
				
			||||
//	#define dSPIN_DC_CONF_PARAM_CLOCK_SETTING {dSPIN_CONFIG_INT_16MHZ_OSCOUT_2MHZ}
 | 
				
			||||
 | 
				
			||||
 | 
				
			||||
/* Exported types ------------------------------------------------------------*/ | 
				
			||||
 | 
				
			||||
/* Exported macro ------------------------------------------------------------*/ | 
				
			||||
 | 
				
			||||
/* Exported functions ------------------------------------------------------- */ | 
				
			||||
 | 
				
			||||
  /****************************************************************************/ | 
				
			||||
  /******************No Daisy Chain Mode **************************************/ | 
				
			||||
  /****************************************************************************/ | 
				
			||||
 | 
				
			||||
/* Exported constants --------------------------------------------------------*/ | 
				
			||||
 | 
				
			||||
  /**************************** Speed Profile *********************************/ | 
				
			||||
 | 
				
			||||
	/* Register : ACC */ | 
				
			||||
		/* Acceleration rate in step/s2, range 14.55 to 59590 steps/s2 */ | 
				
			||||
	#define dSPIN_CONF_PARAM_ACC  500//(2008.164)
 | 
				
			||||
 | 
				
			||||
	/* Register : DEC */ | 
				
			||||
		/* Deceleration rate in step/s2, range 14.55 to 59590 steps/s2 */ | 
				
			||||
	#define dSPIN_CONF_PARAM_DEC 500//(2008.164)
 | 
				
			||||
 | 
				
			||||
	/* Register : MAX_SPEED */ | 
				
			||||
		/* Maximum speed in step/s, range 15.25 to 15610 steps/s */ | 
				
			||||
	#define dSPIN_CONF_PARAM_MAX_SPEED 220//(991.821)
 | 
				
			||||
 | 
				
			||||
	/* Register : MIN_SPEED */ | 
				
			||||
	/* Minimum speed in step/s, range 0 to 976.3 steps/s */ | 
				
			||||
	#define dSPIN_CONF_PARAM_MIN_SPEED (0) | 
				
			||||
 | 
				
			||||
	/* Register : FS_SPD */ | 
				
			||||
		/* Full step speed in step/s, range 7.63 to 15625 steps/s */ | 
				
			||||
	#define dSPIN_CONF_PARAM_FS_SPD (595.093) | 
				
			||||
 | 
				
			||||
  /************************ Phase Current Control *****************************/ | 
				
			||||
 | 
				
			||||
		/* Register : KVAL_HOLD */ | 
				
			||||
	/* Hold duty cycle (torque) in %, range 0 to 99.6% */ | 
				
			||||
	#define dSPIN_CONF_PARAM_KVAL_HOLD 10//(16.02)
 | 
				
			||||
 | 
				
			||||
	/* Register : KVAL_RUN */ | 
				
			||||
	/* Run duty cycle (torque) in %, range 0 to 99.6% */ | 
				
			||||
	#define dSPIN_CONF_PARAM_KVAL_RUN 30//(16.02)
 | 
				
			||||
 | 
				
			||||
	/* Register : KVAL_ACC */ | 
				
			||||
		/* Acceleration duty cycle (torque) in %, range 0 to 99.6% */ | 
				
			||||
	#define dSPIN_CONF_PARAM_KVAL_ACC 30//(16.02)
 | 
				
			||||
 | 
				
			||||
	/* Register : KVAL_DEC */ | 
				
			||||
	/* Deceleration duty cycle (torque) in %, range 0 to 99.6% */ | 
				
			||||
	#define dSPIN_CONF_PARAM_KVAL_DEC 30//(16.02)
 | 
				
			||||
 | 
				
			||||
	/* Register : CONFIG - field : EN_VSCOMP */ | 
				
			||||
	/* Motor Supply Voltage Compensation enabling , enum dSPIN_CONFIG_EN_VSCOMP_TypeDef */ | 
				
			||||
	#define dSPIN_CONF_PARAM_VS_COMP (dSPIN_CONFIG_VS_COMP_DISABLE) | 
				
			||||
 | 
				
			||||
	/* Register : MIN_SPEED - field : LSPD_OPT */ | 
				
			||||
	/* Low speed optimization bit, enum dSPIN_LSPD_OPT_TypeDef */ | 
				
			||||
	#define dSPIN_CONF_PARAM_LSPD_BIT (dSPIN_LSPD_OPT_ON) // ??
 | 
				
			||||
 | 
				
			||||
	/* Register : K_THERM */ | 
				
			||||
	/* Thermal compensation param, range 1 to 1.46875 */ | 
				
			||||
	#define dSPIN_CONF_PARAM_K_THERM (1) | 
				
			||||
 | 
				
			||||
	/* Register : INT_SPEED */ | 
				
			||||
	/* Intersect speed settings for BEMF compensation in steps/s, range 0 to 3906 steps/s */ | 
				
			||||
	#define dSPIN_CONF_PARAM_INT_SPD (61.512) | 
				
			||||
 | 
				
			||||
	/* Register : ST_SLP */ | 
				
			||||
	/* BEMF start slope settings for BEMF compensation in % step/s, range 0 to 0.4% s/step */ | 
				
			||||
	#define dSPIN_CONF_PARAM_ST_SLP (0.03815) | 
				
			||||
 | 
				
			||||
	/* Register : FN_SLP_ACC */ | 
				
			||||
	/* BEMF final acc slope settings for BEMF compensation in % step/s, range 0 to 0.4% s/step  */ | 
				
			||||
	#define dSPIN_CONF_PARAM_FN_SLP_ACC (0.06256) | 
				
			||||
 | 
				
			||||
	/* Register : FN_SLP_DEC */ | 
				
			||||
	/* BEMF final dec slope settings for BEMF compensation in % step/s, range 0 to 0.4% s/step */ | 
				
			||||
	#define dSPIN_CONF_PARAM_FN_SLP_DEC (0.06256) | 
				
			||||
 | 
				
			||||
	/* Register : CONFIG - field : F_PWM_INT */ | 
				
			||||
	/* PWM Frequency Integer division, enum dSPIN_CONFIG_F_PWM_INT_TypeDef */ | 
				
			||||
	#define dSPIN_CONF_PARAM_PWM_DIV (dSPIN_CONFIG_PWM_DIV_2) | 
				
			||||
 | 
				
			||||
	/* Register : CONFIG - field : F_PWM_DEC */ | 
				
			||||
	/* PWM Frequency Integer Multiplier, enum dSPIN_CONFIG_F_PWM_INT_TypeDef */ | 
				
			||||
	#define dSPIN_CONF_PARAM_PWM_MUL (dSPIN_CONFIG_PWM_MUL_1) | 
				
			||||
 | 
				
			||||
  /******************************* Others *************************************/ | 
				
			||||
	/* Register : OCD_TH */ | 
				
			||||
		/* Overcurrent threshold settings via enum dSPIN_OCD_TH_TypeDef */ | 
				
			||||
	#define dSPIN_CONF_PARAM_OCD_TH (dSPIN_OCD_TH_3375mA) | 
				
			||||
 | 
				
			||||
	/* Register : STALL_TH */ | 
				
			||||
	/* Stall threshold settings in mA, range 31.25mA to 4000mA */ | 
				
			||||
	#define dSPIN_CONF_PARAM_STALL_TH (2031.25) | 
				
			||||
 | 
				
			||||
	/* Register : ALARM_EN */ | 
				
			||||
	/* Alarm settings via bitmap enum dSPIN_ALARM_EN_TypeDef */ | 
				
			||||
	#define dSPIN_CONF_PARAM_ALARM_EN (dSPIN_ALARM_EN_OVERCURRENT | dSPIN_ALARM_EN_THERMAL_SHUTDOWN | dSPIN_ALARM_EN_THERMAL_WARNING | dSPIN_ALARM_EN_UNDER_VOLTAGE | dSPIN_ALARM_EN_STALL_DET_A | dSPIN_ALARM_EN_STALL_DET_B | dSPIN_ALARM_EN_SW_TURN_ON | dSPIN_ALARM_EN_WRONG_NPERF_CMD) | 
				
			||||
 | 
				
			||||
	/* Register : STEP_MODE - field : STEP_MODE */ | 
				
			||||
		/* Step mode settings via enum dSPIN_STEP_SEL_TypeDef */ | 
				
			||||
	#define dSPIN_CONF_PARAM_STEP_MODE (dSPIN_STEP_SEL_1_128) | 
				
			||||
 | 
				
			||||
	/* Register : STEP_MODE - Field : SYNC_MODE and SYNC_EN */ | 
				
			||||
		/* Synch. Mode settings via enum dSPIN_SYNC_SEL_TypeDef */ | 
				
			||||
	#define dSPIN_CONF_PARAM_SYNC_MODE (dSPIN_SYNC_SEL_DISABLED) | 
				
			||||
 | 
				
			||||
		/* Register : CONFIG - field : POW_SR */ | 
				
			||||
		/* Slew rate, enum dSPIN_CONFIG_POW_SR_TypeDef */ | 
				
			||||
	#define dSPIN_CONF_PARAM_SR (dSPIN_CONFIG_SR_110V_us) | 
				
			||||
 | 
				
			||||
	/* Register : CONFIG - field : OC_SD */ | 
				
			||||
		/* Over current shutwdown enabling, enum dSPIN_CONFIG_OC_SD_TypeDef */ | 
				
			||||
	#define dSPIN_CONF_PARAM_OC_SD (dSPIN_CONFIG_OC_SD_DISABLE) | 
				
			||||
 | 
				
			||||
	/* Register : CONFIG - field : SW_MODE */ | 
				
			||||
		/* External switch hard stop interrupt mode, enum dSPIN_CONFIG_SW_MODE_TypeDef */ | 
				
			||||
	#define dSPIN_CONF_PARAM_SW_MODE 	(dSPIN_CONFIG_SW_HARD_STOP) | 
				
			||||
 | 
				
			||||
	/* Register : CONFIG - field : OSC_CLK_SEL */ | 
				
			||||
		/* Clock setting , enum dSPIN_CONFIG_OSC_MGMT_TypeDef */ | 
				
			||||
	#define dSPIN_CONF_PARAM_CLOCK_SETTING (dSPIN_CONFIG_INT_16MHZ_OSCOUT_2MHZ) | 
				
			||||
 | 
				
			||||
 | 
				
			||||
/* Exported types ------------------------------------------------------------*/ | 
				
			||||
 | 
				
			||||
/* Exported macro ------------------------------------------------------------*/ | 
				
			||||
 | 
				
			||||
/* Exported functions ------------------------------------------------------- */ | 
				
			||||
#endif /* __DSPIN_CONFIG_H */ | 
				
			||||
 | 
				
			||||
/******************* (C) COPYRIGHT 2013 STMicroelectronics *****END OF FILE****/ | 
				
			||||
@ -1,69 +1,136 @@ | 
				
			||||
#include "main.h" | 
				
			||||
#include "hw_init.h" | 
				
			||||
 | 
				
			||||
#include "com/datalink.h" | 
				
			||||
#include "com/debug.h" | 
				
			||||
#include "com/com_fileio.h" | 
				
			||||
#include "com/com_iface.h" | 
				
			||||
#include "bus/event_queue.h" | 
				
			||||
#include "bus/event_handler.h" | 
				
			||||
#include "utils/timebase.h" | 
				
			||||
#include "utils/debounce.h" | 
				
			||||
 | 
				
			||||
#include "colorled.h" | 
				
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#include "display.h" | 
				
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#include <math.h> | 
				
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#include <sbmp.h> | 
				
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 | 
				
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void poll_subsystems(void) | 
				
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#include "dspin.h" | 
				
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#include "blinky.h" | 
				
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 | 
				
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 // 7.5deg motor -> 48 full steps. We use 128 step mode -> 6144 = full circle
 | 
				
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#define STEPS_360 6144 | 
				
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 | 
				
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 | 
				
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static void poll_subsystems(void); | 
				
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static void conf_buttons(void); | 
				
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 | 
				
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 | 
				
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int main(void) | 
				
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{ | 
				
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	// poll serial buffers (runs callback)
 | 
				
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	com_poll(debug_iface); | 
				
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	com_poll(data_iface); | 
				
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	hw_init(); | 
				
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	conf_buttons(); | 
				
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 | 
				
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	// run queued tasks
 | 
				
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	tq_poll(); | 
				
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	banner("*** STM32F105 stepper motor demo ***"); | 
				
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	banner_info("(c) Ondrej Hruska, 2016"); | 
				
			||||
	banner_info("Katedra mereni K338, CVUT FEL"); | 
				
			||||
 | 
				
			||||
	// handle queued events
 | 
				
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	Event evt; | 
				
			||||
	// Intro animation
 | 
				
			||||
	led_blink(LED_SPARE, 200); | 
				
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	delay_ms(100); | 
				
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	led_blink(LED_ERROR, 200); | 
				
			||||
	delay_ms(100); | 
				
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	led_blink(LED_BUSY, 200); | 
				
			||||
	delay_ms(100); | 
				
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	led_toggle(LED_READY); | 
				
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 | 
				
			||||
	until_timeout(2) { // take 2 ms max
 | 
				
			||||
		if (eq_take(&evt)) { | 
				
			||||
			run_event_handler(&evt); | 
				
			||||
		} else { | 
				
			||||
			break; | 
				
			||||
	// Green LED starts flashing...
 | 
				
			||||
 | 
				
			||||
	ms_time_t t = ms_now(); | 
				
			||||
	while (1) { | 
				
			||||
		poll_subsystems(); | 
				
			||||
 | 
				
			||||
		// blink to indicate we're working OK
 | 
				
			||||
		if (ms_loop_elapsed(&t, 500)) { | 
				
			||||
			led_toggle(LED_READY); | 
				
			||||
		} | 
				
			||||
	} | 
				
			||||
} | 
				
			||||
 | 
				
			||||
 | 
				
			||||
 | 
				
			||||
void blinky(void* arg) | 
				
			||||
void left_btn_click(void) | 
				
			||||
{ | 
				
			||||
	(void)arg; | 
				
			||||
	GPIOC->ODR ^= 1<<13; | 
				
			||||
	led_blink(LED_BUSY, 500); | 
				
			||||
	dSPIN_Move(FWD, STEPS_360/4); | 
				
			||||
} | 
				
			||||
 | 
				
			||||
 | 
				
			||||
void right_btn_click(void) | 
				
			||||
{ | 
				
			||||
	led_blink(LED_ERROR, 250); | 
				
			||||
	dSPIN_Move(REV, STEPS_360/4); | 
				
			||||
} | 
				
			||||
 | 
				
			||||
 | 
				
			||||
int main(void) | 
				
			||||
void dlnk_rx(SBMP_Datagram *dg) | 
				
			||||
{ | 
				
			||||
	hw_init(); | 
				
			||||
	display_init(); | 
				
			||||
 | 
				
			||||
	banner("*** STM32F103K8T6 RGB LED demo ***"); | 
				
			||||
	banner_info("(c) Ondrej Hruska, 2016"); | 
				
			||||
	banner_info("Katedra mereni K338, CVUT FEL"); | 
				
			||||
	(void)dg; | 
				
			||||
 | 
				
			||||
	PayloadParser pp = pp_start(dg->payload, dg->length); | 
				
			||||
 | 
				
			||||
	add_periodic_task(blinky, NULL, 500, false); | 
				
			||||
	switch (dg->type) { | 
				
			||||
		case DG_MOTOR_HOME: | 
				
			||||
			dSPIN_Go_Home(); | 
				
			||||
			break; | 
				
			||||
 | 
				
			||||
	while (1) { | 
				
			||||
		poll_subsystems(); | 
				
			||||
		case DG_MOTOR_GOTO:; | 
				
			||||
			int32_t pos = pp_i32(&pp); | 
				
			||||
			dSPIN_Go_To(pos); | 
				
			||||
			break; | 
				
			||||
	} | 
				
			||||
} | 
				
			||||
 | 
				
			||||
 | 
				
			||||
void dlnk_rx(SBMP_Datagram *dg) | 
				
			||||
static void conf_buttons(void) | 
				
			||||
{ | 
				
			||||
	dbg("Rx dg type %d", dg->type); | 
				
			||||
	debounce_init(2); | 
				
			||||
 | 
				
			||||
	// setup debouncer
 | 
				
			||||
	debo_init_t debo = {}; | 
				
			||||
	debo.debo_time = 10; | 
				
			||||
	debo.invert = true; | 
				
			||||
 | 
				
			||||
	// button A
 | 
				
			||||
	debo.GPIOx = BUTTON_A_Port; | 
				
			||||
	debo.pin = BUTTON_A_Pin; | 
				
			||||
	debo.rising_cb = left_btn_click; | 
				
			||||
	debo_register_pin(&debo); | 
				
			||||
 | 
				
			||||
	// Button B
 | 
				
			||||
	debo.GPIOx = BUTTON_B_Port; | 
				
			||||
	debo.pin = BUTTON_B_Pin; | 
				
			||||
	debo.rising_cb = right_btn_click; | 
				
			||||
	debo_register_pin(&debo); | 
				
			||||
 | 
				
			||||
	add_periodic_task(debo_periodic_task, NULL, 10, true); | 
				
			||||
} | 
				
			||||
 | 
				
			||||
 | 
				
			||||
static void poll_subsystems(void) | 
				
			||||
{ | 
				
			||||
	// poll serial buffers (runs callback)
 | 
				
			||||
	com_poll(debug_iface); | 
				
			||||
	com_poll(data_iface); | 
				
			||||
 | 
				
			||||
	// run queued tasks
 | 
				
			||||
	tq_poll(); | 
				
			||||
 | 
				
			||||
	// handle queued events
 | 
				
			||||
	Event evt; | 
				
			||||
 | 
				
			||||
	until_timeout(2) { // take 2 ms max
 | 
				
			||||
		if (eq_take(&evt)) { | 
				
			||||
			run_event_handler(&evt); | 
				
			||||
		} else { | 
				
			||||
			break; | 
				
			||||
		} | 
				
			||||
	} | 
				
			||||
} | 
				
			||||
 | 
				
			||||
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