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/**
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******************************************************************************
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* @file stm8s_tim6.c
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* @author MCD Application Team
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* @version V2.2.0
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* @date 30-September-2014
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* @brief This file contains all the functions for the TIM6 peripheral.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm8s_tim6.h"
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/** @addtogroup STM8S_StdPeriph_Driver
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @addtogroup STM8S_StdPeriph_Driver
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/**
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* @addtogroup TIM6_Public_Functions
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* @{
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*/
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/**
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* @brief Deinitializes the TIM6 peripheral registers to their default reset values.
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* @param None
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* @retval None
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*/
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void TIM6_DeInit(void)
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{
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TIM6->CR1 = TIM6_CR1_RESET_VALUE;
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TIM6->CR2 = TIM6_CR2_RESET_VALUE;
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TIM6->SMCR = TIM6_SMCR_RESET_VALUE;
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TIM6->IER = TIM6_IER_RESET_VALUE;
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TIM6->CNTR = TIM6_CNTR_RESET_VALUE;
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TIM6->PSCR = TIM6_PSCR_RESET_VALUE;
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TIM6->ARR = TIM6_ARR_RESET_VALUE;
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TIM6->SR1 = TIM6_SR1_RESET_VALUE;
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}
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/**
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* @brief Initializes the TIM6 Time Base Unit according to the specified
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* parameters.
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* @param TIM6_Prescaler : This parameter can be any of the @Ref TIM5_Prescaler_TypeDef enumeration.
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* @param TIM6_Period : This parameter must be a value between 0x00 and 0xFF.
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* @retval None
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*/
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void TIM6_TimeBaseInit(TIM6_Prescaler_TypeDef TIM6_Prescaler,
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uint8_t TIM6_Period)
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{
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/* Check TIM6 prescaler value */
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assert_param(IS_TIM6_PRESCALER_OK(TIM6_Prescaler));
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/* Set the Autoreload value */
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TIM6->ARR = (uint8_t)(TIM6_Period);
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/* Set the Prescaler value */
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TIM6->PSCR = (uint8_t)(TIM6_Prescaler);
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}
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/**
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* @brief Enables or disables the TIM6 peripheral.
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* @param NewState : The new state of the TIM6 peripheral.
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* This parameter can be any of the @ref FunctionalState enumeration.
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* @retval None
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*/
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void TIM6_Cmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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/* set or Reset the CEN Bit */
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if (NewState == ENABLE)
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{
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TIM6->CR1 |= TIM6_CR1_CEN ;
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}
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else
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{
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TIM6->CR1 &= (uint8_t)(~TIM6_CR1_CEN) ;
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}
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}
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/**
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* @brief Enables or Disables the TIM6 Update event.
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* @param NewState : The new state of the TIM6 peripheral Preload register.
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* This parameter can be any of the @ref FunctionalState enumeration.
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* @retval None
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*/
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void TIM6_UpdateDisableConfig(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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/* Set or Reset the UDIS Bit */
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if (NewState == ENABLE)
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{
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TIM6->CR1 |= TIM6_CR1_UDIS ;
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}
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else
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{
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TIM6->CR1 &= (uint8_t)(~TIM6_CR1_UDIS) ;
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}
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}
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/**
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* @brief Selects the TIM6 Update Request Interrupt source.
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* @param TIM6_UpdateSource : Specifies the Update source.
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* This parameter can be one of the @ref TIM6_UpdateSource_TypeDef enumeration.
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* @retval None
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*/
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void TIM6_UpdateRequestConfig(TIM6_UpdateSource_TypeDef TIM6_UpdateSource)
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{
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/* Check the parameters */
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assert_param(IS_TIM6_UPDATE_SOURCE_OK(TIM6_UpdateSource));
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/* Set or Reset the URS Bit */
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if (TIM6_UpdateSource == TIM6_UPDATESOURCE_REGULAR)
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{
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TIM6->CR1 |= TIM6_CR1_URS ;
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}
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else
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{
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TIM6->CR1 &= (uint8_t)(~TIM6_CR1_URS) ;
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}
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}
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/**
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* @brief Selects the TIM6<EFBFBD>s One Pulse Mode.
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* @param TIM6_OPMode : Specifies the OPM Mode to be used.
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* This parameter can be one of the @ref TIM6_OPMode_TypeDef enumeration.
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* @retval None
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*/
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void TIM6_SelectOnePulseMode(TIM6_OPMode_TypeDef TIM6_OPMode)
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{
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/* Check the parameters */
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assert_param(IS_TIM6_OPM_MODE_OK(TIM6_OPMode));
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/* Set or Reset the OPM Bit */
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if (TIM6_OPMode == TIM6_OPMODE_SINGLE)
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{
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TIM6->CR1 |= TIM6_CR1_OPM ;
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}
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else
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{
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TIM6->CR1 &= (uint8_t)(~TIM6_CR1_OPM) ;
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}
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}
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/**
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* @brief Configures the TIM6 Prescaler.
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* @param Prescaler : Specifies the Prescaler Register value
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* This parameter can be one of the @ref TIM6_Prescaler_TypeDef enumeration.
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* @param TIM6_PSCReloadMode : Specifies the TIM6 Prescaler Reload mode.
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* This parameter can be one of the @ref TIM6_PSCReloadMode_TypeDef enumeration.
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* @retval None
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*/
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void TIM6_PrescalerConfig(TIM6_Prescaler_TypeDef Prescaler,
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TIM6_PSCReloadMode_TypeDef TIM6_PSCReloadMode)
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{
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/* Check the parameters */
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assert_param(IS_TIM6_PRESCALER_RELOAD_OK(TIM6_PSCReloadMode));
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assert_param(IS_TIM6_PRESCALER_OK(Prescaler));
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/* Set the Prescaler value */
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TIM6->PSCR = (uint8_t)Prescaler;
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/* Set or reset the UG Bit */
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if (TIM6_PSCReloadMode == TIM6_PSCRELOADMODE_IMMEDIATE)
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{
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TIM6->EGR |= TIM6_EGR_UG ;
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}
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else
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{
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TIM6->EGR &= (uint8_t)(~TIM6_EGR_UG) ;
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}
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}
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/**
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* @brief Enables or disables TIM6 peripheral Preload register on ARR.
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* @param NewState : The new state of the TIM6 peripheral Preload register.
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* This parameter can be any of the @ref FunctionalState enumeration.
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* @retval None
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*/
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void TIM6_ARRPreloadConfig(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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/* Set or Reset the ARPE Bit */
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if (NewState == ENABLE)
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{
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TIM6->CR1 |= TIM6_CR1_ARPE ;
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}
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else
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{
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TIM6->CR1 &= (uint8_t)(~TIM6_CR1_ARPE) ;
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}
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}
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/**
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* @brief Sets the TIM6 Counter Register value.
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* @param Counter : Specifies the Counter register new value.
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* This parameter is between 0x00 and 0xFF.
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* @retval None
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*/
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void TIM6_SetCounter(uint8_t Counter)
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{
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/* Set the Counter Register value */
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TIM6->CNTR = (uint8_t)(Counter);
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}
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/**
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* @brief Sets the TIM6 Autoreload Register value.
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* @param Autoreload : Specifies the Autoreload register new value.
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* This parameter is between 0x00 and 0xFF.
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* @retval None
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*/
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void TIM6_SetAutoreload(uint8_t Autoreload)
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{
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/* Set the Autoreload Register value */
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TIM6->ARR = (uint8_t)(Autoreload);
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}
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/**
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* @brief Gets the TIM6 Counter value.
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* @param None
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* @retval uint8_t: Counter Register value.
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*/
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uint8_t TIM6_GetCounter(void)
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{
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uint8_t tmpcntr=0;
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tmpcntr = TIM6->CNTR;
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/* Get the Counter Register value */
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return ((uint8_t)tmpcntr);
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}
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/**
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* @brief Gets the TIM6 Prescaler value.
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* @param None
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* @retval TIM6_Prescaler_TypeDef : Prescaler Register configuration value.
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*/
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TIM6_Prescaler_TypeDef TIM6_GetPrescaler(void)
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{
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/* Get the Prescaler Register value */
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return ((TIM6_Prescaler_TypeDef)TIM6->PSCR);
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}
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/**
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* @brief Enables or disables the specified TIM6 interrupts.
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* @param TIM6_IT : Specifies the TIM6 interrupts sources to be enabled or disabled.
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* This parameter can be any combination of the @ref TIM6_IT_TypeDef enumeration.
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* @param NewState : The new state of the TIM6 peripheral.
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* This parameter can be any of the @ref FunctionalState enumeration.
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* @retval None
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* @par Required preconditions:
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* If QST option bit is enabled, the TIM6 Interrupt vector will be mapped on IRQ number 2 (irq0).
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* Otherwise, it will be mapped on IRQ number 27 (irq25).
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*/
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void TIM6_ITConfig(TIM6_IT_TypeDef TIM6_IT, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_TIM6_IT_OK(TIM6_IT));
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState == ENABLE)
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{
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/* Enable the Interrupt sources */
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TIM6->IER |= (uint8_t)TIM6_IT;
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}
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else
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{
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/* Disable the Interrupt sources */
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TIM6->IER &= (uint8_t)(~(uint8_t)TIM6_IT);
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}
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}
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/**
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* @brief Clears the TIM<EFBFBD>s pending flags.
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* @param TIM6_FLAG : Specifies the flag to clear.
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* This parameter can be one of the @ref TIM6_FLAG_TypeDef enumeration.
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* @retval None
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*/
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void TIM6_ClearFlag(TIM6_FLAG_TypeDef TIM6_FLAG)
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{
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/* Check the parameters */
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assert_param(IS_TIM6_CLEAR_FLAG_OK((uint8_t)TIM6_FLAG));
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/* Clear the flags (rc_w0) clear this bit by writing 0. Writing <EFBFBD>1<EFBFBD> has no effect*/
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TIM6->SR1 &= (uint8_t)(~((uint8_t)TIM6_FLAG));
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}
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/**
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* @brief Checks whether the TIM6 interrupt has occurred or not.
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* @param TIM6_IT : Specifies the TIM6 interrupt source to check.
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* This parameter can be one of the @ref TIM6_IT_TypeDef enumeration.
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* @retval ITStatus : The new state of the TIM6_IT.
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* This parameter can be any of the @ref ITStatus enumeration.
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*/
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ITStatus TIM6_GetITStatus(TIM6_IT_TypeDef TIM6_IT)
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{
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ITStatus bitstatus = RESET;
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uint8_t itStatus = 0, itEnable = 0;
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/* Check the parameters */
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assert_param(IS_TIM6_GET_IT_OK(TIM6_IT));
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itStatus = (uint8_t)(TIM6->SR1 & (uint8_t)TIM6_IT);
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itEnable = (uint8_t)(TIM6->IER & (uint8_t)TIM6_IT);
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if ((itStatus != (uint8_t)RESET ) && (itEnable != (uint8_t)RESET ))
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{
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bitstatus = (ITStatus)SET;
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}
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else
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{
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bitstatus = (ITStatus)RESET;
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}
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return ((ITStatus)bitstatus);
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}
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/**
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* @brief Configures the TIM6 event to be generated by software.
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* @param TIM6_EventSource : Specifies the event source.
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* This parameter can be one of the @ref TIM6_EventSource_TypeDef enumeration.
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* @retval None
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*/
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void TIM6_GenerateEvent(TIM6_EventSource_TypeDef TIM6_EventSource)
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{
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/* Check the parameters */
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assert_param(IS_TIM6_EVENT_SOURCE_OK((uint8_t)TIM6_EventSource));
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/* Set the event sources */
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TIM6->EGR |= (uint8_t)TIM6_EventSource;
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}
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/**
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* @brief Checks whether the specified TIM6 flag is set or not.
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* @param TIM6_FLAG : Specifies the flag to check.
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* This parameter can be one of the @ref TIM6_FLAG_TypeDef enumeration.
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* @retval FlagStatus : The new state of TIM6_FLAG.
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* This parameter can be any of the @ref FlagStatus enumeration.
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*/
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FlagStatus TIM6_GetFlagStatus(TIM6_FLAG_TypeDef TIM6_FLAG)
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{
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volatile FlagStatus bitstatus = RESET;
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/* Check the parameters */
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assert_param(IS_TIM6_GET_FLAG_OK(TIM6_FLAG));
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if ((TIM6->SR1 & (uint8_t)TIM6_FLAG) != 0)
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{
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bitstatus = SET;
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}
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else
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{
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bitstatus = RESET;
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}
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return ((FlagStatus)bitstatus);
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}
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/**
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* @brief Clears the TIM6's interrupt pending bits.
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* @param TIM6_IT : Specifies the pending bit to clear.
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* This parameter can be one of the @ref TIM6_IT_TypeDef enumeration.
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* @retval None
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*/
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void TIM6_ClearITPendingBit(TIM6_IT_TypeDef TIM6_IT)
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{
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/* Check the parameters */
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assert_param(IS_TIM6_IT_OK(TIM6_IT));
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/* Clear the IT pending Bit */
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TIM6->SR1 &= (uint8_t)(~(uint8_t)TIM6_IT);
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}
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/**
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* @brief Selects the TIM6 Trigger Output Mode.
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* @param TIM6_TRGOSource : Specifies the Trigger Output source.
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* This parameter can be one of the @ref TIM6_TRGOSource_TypeDef enumeration.
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* @retval None
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*/
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void TIM6_SelectOutputTrigger(TIM6_TRGOSource_TypeDef TIM6_TRGOSource)
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{
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uint8_t tmpcr2 = 0;
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/* Check the parameters */
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assert_param(IS_TIM6_TRGO_SOURCE_OK(TIM6_TRGOSource));
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tmpcr2 = TIM6->CR2;
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/* Reset the MMS Bits */
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tmpcr2 &= (uint8_t)(~TIM6_CR2_MMS);
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/* Select the TRGO source */
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tmpcr2 |= (uint8_t)TIM6_TRGOSource;
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TIM6->CR2 = tmpcr2;
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}
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/**
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* @brief Sets or Resets the TIM6 Master/Slave Mode.
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* @param NewState : The new state of the synchronization between TIM6 and its slaves (through TRGO).
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* This parameter can be any of the @ref FunctionalState enumeration.
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* @retval None
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*/
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void TIM6_SelectMasterSlaveMode(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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|
|
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/* Set or Reset the MSM Bit */
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if (NewState == ENABLE)
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|
{
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TIM6->SMCR |= TIM6_SMCR_MSM;
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}
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else
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{
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TIM6->SMCR &= (uint8_t)(~TIM6_SMCR_MSM);
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}
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}
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/**
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* @brief Selects the TIM6 Input Trigger source.
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* @param TIM6_InputTriggerSource : Specifies Input Trigger source.
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* This parameter can be one of the @ref TIM6_TS_TypeDef enumeration.
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* @retval None
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*/
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void TIM6_SelectInputTrigger(TIM6_TS_TypeDef TIM6_InputTriggerSource)
|
|
|
{
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uint8_t tmpsmcr = 0;
|
|
|
|
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|
/* Check the parameters */
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assert_param(IS_TIM6_TRIGGER_SELECTION_OK(TIM6_InputTriggerSource));
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tmpsmcr = TIM6->SMCR;
|
|
|
|
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/* Select the Trigger Source */
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tmpsmcr &= (uint8_t)(~TIM6_SMCR_TS);
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tmpsmcr |= (uint8_t)TIM6_InputTriggerSource;
|
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|
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TIM6->SMCR = (uint8_t)tmpsmcr;
|
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|
}
|
|
|
|
|
|
/**
|
|
|
* @brief Enables the TIM6 internal Clock.
|
|
|
* @param None
|
|
|
* @retval None
|
|
|
*/
|
|
|
void TIM6_InternalClockConfig(void)
|
|
|
{
|
|
|
/* Disable slave mode to clock the prescaler directly with the internal clock */
|
|
|
TIM6->SMCR &= (uint8_t)(~TIM6_SMCR_SMS);
|
|
|
}
|
|
|
|
|
|
/**
|
|
|
* @brief Selects the TIM6 Slave Mode.
|
|
|
* @param TIM6_SlaveMode : Specifies the TIM6 Slave Mode.
|
|
|
* This parameter can be one of the @ref TIM6_SlaveMode_TypeDef enumeration.
|
|
|
* @retval None
|
|
|
*/
|
|
|
void TIM6_SelectSlaveMode(TIM6_SlaveMode_TypeDef TIM6_SlaveMode)
|
|
|
{
|
|
|
uint8_t tmpsmcr = 0;
|
|
|
|
|
|
/* Check the parameters */
|
|
|
assert_param(IS_TIM6_SLAVE_MODE_OK(TIM6_SlaveMode));
|
|
|
|
|
|
tmpsmcr = TIM6->SMCR;
|
|
|
|
|
|
/* Reset the SMS Bits */
|
|
|
tmpsmcr &= (uint8_t)(~TIM6_SMCR_SMS);
|
|
|
|
|
|
/* Select the Slave Mode */
|
|
|
tmpsmcr |= (uint8_t)TIM6_SlaveMode;
|
|
|
|
|
|
TIM6->SMCR = tmpsmcr;
|
|
|
}
|
|
|
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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