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697 lines
22 KiB
697 lines
22 KiB
/**
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******************************************************************************
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* @file stm8s_adc1.c
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* @author MCD Application Team
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* @version V2.2.0
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* @date 30-September-2014
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* @brief This file contains all the functions/macros for the ADC1 peripheral.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm8s_adc1.h"
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/** @addtogroup STM8S_StdPeriph_Driver
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/* Public functions ----------------------------------------------------------*/
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/**
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* @addtogroup ADC1_Public_Functions
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* @{
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*/
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/**
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* @brief Deinitializes the ADC1 peripheral registers to their default reset values.
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* @param None
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* @retval None
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*/
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void ADC1_DeInit(void)
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{
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ADC1->CSR = ADC1_CSR_RESET_VALUE;
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ADC1->CR1 = ADC1_CR1_RESET_VALUE;
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ADC1->CR2 = ADC1_CR2_RESET_VALUE;
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ADC1->CR3 = ADC1_CR3_RESET_VALUE;
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ADC1->TDRH = ADC1_TDRH_RESET_VALUE;
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ADC1->TDRL = ADC1_TDRL_RESET_VALUE;
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ADC1->HTRH = ADC1_HTRH_RESET_VALUE;
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ADC1->HTRL = ADC1_HTRL_RESET_VALUE;
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ADC1->LTRH = ADC1_LTRH_RESET_VALUE;
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ADC1->LTRL = ADC1_LTRL_RESET_VALUE;
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ADC1->AWCRH = ADC1_AWCRH_RESET_VALUE;
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ADC1->AWCRL = ADC1_AWCRL_RESET_VALUE;
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}
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/**
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* @brief Initializes the ADC1 peripheral according to the specified parameters
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* @param ADC1_ConversionMode: specifies the conversion mode
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* can be one of the values of @ref ADC1_ConvMode_TypeDef.
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* @param ADC1_Channel: specifies the channel to convert
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* can be one of the values of @ref ADC1_Channel_TypeDef.
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* @param ADC1_PrescalerSelection: specifies the ADC1 prescaler
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* can be one of the values of @ref ADC1_PresSel_TypeDef.
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* @param ADC1_ExtTrigger: specifies the external trigger
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* can be one of the values of @ref ADC1_ExtTrig_TypeDef.
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* @param ADC1_ExtTriggerState: specifies the external trigger new state
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* can be one of the values of @ref FunctionalState.
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* @param ADC1_Align: specifies the converted data alignment
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* can be one of the values of @ref ADC1_Align_TypeDef.
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* @param ADC1_SchmittTriggerChannel: specifies the schmitt trigger channel
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* can be one of the values of @ref ADC1_SchmittTrigg_TypeDef.
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* @param ADC1_SchmittTriggerState: specifies the schmitt trigger state
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* can be one of the values of @ref FunctionalState.
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* @retval None
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*/
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void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel, ADC1_PresSel_TypeDef ADC1_PrescalerSelection, ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align, ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState ADC1_SchmittTriggerState)
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{
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/* Check the parameters */
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assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode));
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assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel));
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assert_param(IS_ADC1_PRESSEL_OK(ADC1_PrescalerSelection));
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assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger));
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assert_param(IS_FUNCTIONALSTATE_OK(((ADC1_ExtTriggerState))));
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assert_param(IS_ADC1_ALIGN_OK(ADC1_Align));
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assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel));
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assert_param(IS_FUNCTIONALSTATE_OK(ADC1_SchmittTriggerState));
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/*-----------------CR1 & CSR configuration --------------------*/
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/* Configure the conversion mode and the channel to convert
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respectively according to ADC1_ConversionMode & ADC1_Channel values & ADC1_Align values */
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ADC1_ConversionConfig(ADC1_ConversionMode, ADC1_Channel, ADC1_Align);
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/* Select the prescaler division factor according to ADC1_PrescalerSelection values */
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ADC1_PrescalerConfig(ADC1_PrescalerSelection);
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/*-----------------CR2 configuration --------------------*/
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/* Configure the external trigger state and event respectively
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according to NewState, ADC1_ExtTrigger */
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ADC1_ExternalTriggerConfig(ADC1_ExtTrigger, ADC1_ExtTriggerState);
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/*------------------TDR configuration ---------------------------*/
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/* Configure the schmitt trigger channel and state respectively
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according to ADC1_SchmittTriggerChannel & ADC1_SchmittTriggerNewState values */
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ADC1_SchmittTriggerConfig(ADC1_SchmittTriggerChannel, ADC1_SchmittTriggerState);
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/* Enable the ADC1 peripheral */
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ADC1->CR1 |= ADC1_CR1_ADON;
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}
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/**
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* @brief Enables or Disables the ADC1 peripheral.
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* @param NewState: specifies the peripheral enabled or disabled state.
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* @retval None
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*/
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void ADC1_Cmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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ADC1->CR1 |= ADC1_CR1_ADON;
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}
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else /* NewState == DISABLE */
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{
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ADC1->CR1 &= (uint8_t)(~ADC1_CR1_ADON);
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}
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}
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/**
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* @brief Enables or Disables the ADC1 scan mode.
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* @param NewState: specifies the selected mode enabled or disabled state.
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* @retval None
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*/
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void ADC1_ScanModeCmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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ADC1->CR2 |= ADC1_CR2_SCAN;
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}
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else /* NewState == DISABLE */
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{
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ADC1->CR2 &= (uint8_t)(~ADC1_CR2_SCAN);
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}
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}
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/**
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* @brief Enables or Disables the ADC1 data store into the Data Buffer registers rather than in the Data Register
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* @param NewState: specifies the selected mode enabled or disabled state.
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* @retval None
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*/
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void ADC1_DataBufferCmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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ADC1->CR3 |= ADC1_CR3_DBUF;
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}
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else /* NewState == DISABLE */
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{
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ADC1->CR3 &= (uint8_t)(~ADC1_CR3_DBUF);
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}
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}
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/**
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* @brief Enables or disables the ADC1 interrupt.
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* @param ADC1_IT specifies the name of the interrupt to enable or disable.
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* This parameter can be one of the following values:
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* - ADC1_IT_AWDITEN : Analog WDG interrupt enable
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* - ADC1_IT_EOCITEN : EOC iterrupt enable
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* @param NewState specifies the state of the interrupt to apply.
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* @retval None
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*/
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void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_ADC1_IT_OK(ADC1_IT));
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the ADC1 interrupts */
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ADC1->CSR |= (uint8_t)ADC1_IT;
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}
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else /* NewState == DISABLE */
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{
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/* Disable the ADC1 interrupts */
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ADC1->CSR &= (uint8_t)((uint16_t)~(uint16_t)ADC1_IT);
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}
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}
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/**
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* @brief Configure the ADC1 prescaler division factor.
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* @param ADC1_Prescaler: the selected precaler.
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* It can be one of the values of @ref ADC1_PresSel_TypeDef.
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* @retval None
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*/
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void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler)
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{
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/* Check the parameter */
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assert_param(IS_ADC1_PRESSEL_OK(ADC1_Prescaler));
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/* Clear the SPSEL bits */
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ADC1->CR1 &= (uint8_t)(~ADC1_CR1_SPSEL);
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/* Select the prescaler division factor according to ADC1_PrescalerSelection values */
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ADC1->CR1 |= (uint8_t)(ADC1_Prescaler);
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}
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/**
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* @brief Enables or disables the ADC1 Schmitt Trigger on a selected channel.
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* @param ADC1_SchmittTriggerChannel specifies the desired Channel.
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* It can be set of the values of @ref ADC1_SchmittTrigg_TypeDef.
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* @param NewState specifies Channel new status.
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* can have one of the values of @ref FunctionalState.
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* @retval None
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*/
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void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel));
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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if (ADC1_SchmittTriggerChannel == ADC1_SCHMITTTRIG_ALL)
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{
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if (NewState != DISABLE)
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{
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ADC1->TDRL &= (uint8_t)0x0;
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ADC1->TDRH &= (uint8_t)0x0;
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}
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else /* NewState == DISABLE */
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{
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ADC1->TDRL |= (uint8_t)0xFF;
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ADC1->TDRH |= (uint8_t)0xFF;
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}
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}
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else if (ADC1_SchmittTriggerChannel < ADC1_SCHMITTTRIG_CHANNEL8)
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{
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if (NewState != DISABLE)
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{
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ADC1->TDRL &= (uint8_t)(~(uint8_t)((uint8_t)0x01 << (uint8_t)ADC1_SchmittTriggerChannel));
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}
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else /* NewState == DISABLE */
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{
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ADC1->TDRL |= (uint8_t)((uint8_t)0x01 << (uint8_t)ADC1_SchmittTriggerChannel);
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}
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}
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else /* ADC1_SchmittTriggerChannel >= ADC1_SCHMITTTRIG_CHANNEL8 */
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{
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if (NewState != DISABLE)
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{
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ADC1->TDRH &= (uint8_t)(~(uint8_t)((uint8_t)0x01 << ((uint8_t)ADC1_SchmittTriggerChannel - (uint8_t)8)));
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}
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else /* NewState == DISABLE */
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{
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ADC1->TDRH |= (uint8_t)((uint8_t)0x01 << ((uint8_t)ADC1_SchmittTriggerChannel - (uint8_t)8));
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}
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}
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}
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/**
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* @brief Configure the ADC1 conversion on selected channel.
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* @param ADC1_ConversionMode Specifies the conversion type.
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* It can be set of the values of @ref ADC1_ConvMode_TypeDef
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* @param ADC1_Channel specifies the ADC1 Channel.
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* It can be set of the values of @ref ADC1_Channel_TypeDef
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* @param ADC1_Align specifies the converted data alignment.
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* It can be set of the values of @ref ADC1_Align_TypeDef
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* @retval None
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*/
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void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel, ADC1_Align_TypeDef ADC1_Align)
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{
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/* Check the parameters */
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assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode));
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assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel));
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assert_param(IS_ADC1_ALIGN_OK(ADC1_Align));
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/* Clear the align bit */
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ADC1->CR2 &= (uint8_t)(~ADC1_CR2_ALIGN);
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/* Configure the data alignment */
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ADC1->CR2 |= (uint8_t)(ADC1_Align);
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if (ADC1_ConversionMode == ADC1_CONVERSIONMODE_CONTINUOUS)
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{
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/* Set the continuous conversion mode */
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ADC1->CR1 |= ADC1_CR1_CONT;
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}
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else /* ADC1_ConversionMode == ADC1_CONVERSIONMODE_SINGLE */
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{
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/* Set the single conversion mode */
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ADC1->CR1 &= (uint8_t)(~ADC1_CR1_CONT);
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}
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/* Clear the ADC1 channels */
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ADC1->CSR &= (uint8_t)(~ADC1_CSR_CH);
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/* Select the ADC1 channel */
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ADC1->CSR |= (uint8_t)(ADC1_Channel);
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}
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/**
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* @brief Configure the ADC1 conversion on external trigger event.
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* @par Full description:
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* The selected external trigger event can be enabled or disabled.
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* @param ADC1_ExtTrigger to select the External trigger event.
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* can have one of the values of @ref ADC1_ExtTrig_TypeDef.
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* @param NewState to enable/disable the selected external trigger
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* can have one of the values of @ref FunctionalState.
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* @retval None
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*/
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void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger));
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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/* Clear the external trigger selection bits */
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ADC1->CR2 &= (uint8_t)(~ADC1_CR2_EXTSEL);
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if (NewState != DISABLE)
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{
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/* Enable the selected external Trigger */
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ADC1->CR2 |= (uint8_t)(ADC1_CR2_EXTTRIG);
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}
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else /* NewState == DISABLE */
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{
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/* Disable the selected external trigger */
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ADC1->CR2 &= (uint8_t)(~ADC1_CR2_EXTTRIG);
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}
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/* Set the selected external trigger */
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ADC1->CR2 |= (uint8_t)(ADC1_ExtTrigger);
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}
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/**
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* @brief Start ADC1 conversion
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* @par Full description:
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* This function triggers the start of conversion, after ADC1 configuration.
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* @param None
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* @retval None
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* @par Required preconditions:
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* Enable the ADC1 peripheral before calling this function
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*/
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void ADC1_StartConversion(void)
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{
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ADC1->CR1 |= ADC1_CR1_ADON;
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}
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/**
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* @brief Get one sample of measured signal.
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* @param None
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* @retval ConversionValue: value of the measured signal.
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* @par Required preconditions:
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* ADC1 conversion finished.
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*/
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uint16_t ADC1_GetConversionValue(void)
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{
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uint16_t temph = 0;
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uint8_t templ = 0;
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if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */
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{
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/* Read LSB first */
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templ = ADC1->DRL;
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/* Then read MSB */
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temph = ADC1->DRH;
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temph = (uint16_t)(templ | (uint16_t)(temph << (uint8_t)8));
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}
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else /* Left alignment */
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{
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/* Read MSB first*/
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temph = ADC1->DRH;
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/* Then read LSB */
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templ = ADC1->DRL;
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temph = (uint16_t)((uint16_t)((uint16_t)templ << 6) | (uint16_t)((uint16_t)temph << 8));
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}
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return ((uint16_t)temph);
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}
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/**
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* @brief Enables or disables the analog watchdog for the given channel.
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* @param Channel specifies the desired Channel.
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* It can be set of the values of @ref ADC1_Channel_TypeDef.
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* @param NewState specifies the analog watchdog new state.
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* can have one of the values of @ref FunctionalState.
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* @retval None
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*/
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void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONALSTATE_OK(NewState));
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assert_param(IS_ADC1_CHANNEL_OK(Channel));
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if (Channel < (uint8_t)8)
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{
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if (NewState != DISABLE)
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{
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ADC1->AWCRL |= (uint8_t)((uint8_t)1 << Channel);
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}
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else /* NewState == DISABLE */
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{
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ADC1->AWCRL &= (uint8_t)~(uint8_t)((uint8_t)1 << Channel);
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}
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}
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else
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{
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if (NewState != DISABLE)
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{
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ADC1->AWCRH |= (uint8_t)((uint8_t)1 << (Channel - (uint8_t)8));
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}
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else /* NewState == DISABLE */
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{
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ADC1->AWCRH &= (uint8_t)~(uint8_t)((uint8_t)1 << (uint8_t)(Channel - (uint8_t)8));
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}
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}
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}
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/**
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* @brief Sets the high threshold of the analog watchdog.
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* @param Threshold specifies the high threshold value.
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* this value depends on the reference voltage range.
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* @retval None
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*/
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void ADC1_SetHighThreshold(uint16_t Threshold)
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{
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ADC1->HTRH = (uint8_t)(Threshold >> (uint8_t)2);
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ADC1->HTRL = (uint8_t)Threshold;
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}
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/**
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* @brief Sets the low threshold of the analog watchdog.
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* @param Threshold specifies the low threshold value.
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* this value depends on the reference voltage range.
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* @retval None
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*/
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void ADC1_SetLowThreshold(uint16_t Threshold)
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{
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ADC1->LTRL = (uint8_t)Threshold;
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ADC1->LTRH = (uint8_t)(Threshold >> (uint8_t)2);
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}
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/**
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* @brief Get one sample of measured signal.
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* @param Buffer specifies the buffer to read.
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* @retval BufferValue: value read from the given buffer.
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* @par Required preconditions:
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* ADC1 conversion finished.
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*/
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uint16_t ADC1_GetBufferValue(uint8_t Buffer)
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{
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uint16_t temph = 0;
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uint8_t templ = 0;
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/* Check the parameters */
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assert_param(IS_ADC1_BUFFER_OK(Buffer));
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if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */
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{
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/* Read LSB first */
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templ = *(uint8_t*)(uint16_t)((uint16_t)ADC1_BaseAddress + (uint8_t)(Buffer << 1) + 1);
|
|
/* Then read MSB */
|
|
temph = *(uint8_t*)(uint16_t)((uint16_t)ADC1_BaseAddress + (uint8_t)(Buffer << 1));
|
|
|
|
temph = (uint16_t)(templ | (uint16_t)(temph << (uint8_t)8));
|
|
}
|
|
else /* Left alignment */
|
|
{
|
|
/* Read MSB first*/
|
|
temph = *(uint8_t*)(uint16_t)((uint16_t)ADC1_BaseAddress + (uint8_t)(Buffer << 1));
|
|
/* Then read LSB */
|
|
templ = *(uint8_t*)(uint16_t)((uint16_t)ADC1_BaseAddress + (uint8_t)(Buffer << 1) + 1);
|
|
|
|
temph = (uint16_t)((uint16_t)((uint16_t)templ << 6) | (uint16_t)(temph << 8));
|
|
}
|
|
|
|
return ((uint16_t)temph);
|
|
}
|
|
|
|
/**
|
|
* @brief Checks the specified analog watchdog channel status.
|
|
* @param Channel: specify the channel of which to check the analog watchdog
|
|
* can be one of the values of @ref ADC1_Channel_TypeDef.
|
|
* @retval FlagStatus Status of the analog watchdog.
|
|
*/
|
|
FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel)
|
|
{
|
|
uint8_t status = 0;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_ADC1_CHANNEL_OK(Channel));
|
|
|
|
if (Channel < (uint8_t)8)
|
|
{
|
|
status = (uint8_t)(ADC1->AWSRL & (uint8_t)((uint8_t)1 << Channel));
|
|
}
|
|
else /* Channel = 8 | 9 */
|
|
{
|
|
status = (uint8_t)(ADC1->AWSRH & (uint8_t)((uint8_t)1 << (Channel - (uint8_t)8)));
|
|
}
|
|
|
|
return ((FlagStatus)status);
|
|
}
|
|
|
|
/**
|
|
* @brief Checks the specified ADC1 flag status.
|
|
* @param Flag: ADC1 flag.
|
|
* can be one of the values of @ref ADC1_Flag_TypeDef.
|
|
* @retval FlagStatus Status of the ADC1 flag.
|
|
*/
|
|
FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag)
|
|
{
|
|
uint8_t flagstatus = 0;
|
|
uint8_t temp = 0;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_ADC1_FLAG_OK(Flag));
|
|
|
|
if ((Flag & 0x0F) == 0x01)
|
|
{
|
|
/* Get OVR flag status */
|
|
flagstatus = (uint8_t)(ADC1->CR3 & ADC1_CR3_OVR);
|
|
}
|
|
else if ((Flag & 0xF0) == 0x10)
|
|
{
|
|
/* Get analog watchdog channel status */
|
|
temp = (uint8_t)(Flag & (uint8_t)0x0F);
|
|
if (temp < 8)
|
|
{
|
|
flagstatus = (uint8_t)(ADC1->AWSRL & (uint8_t)((uint8_t)1 << temp));
|
|
}
|
|
else
|
|
{
|
|
flagstatus = (uint8_t)(ADC1->AWSRH & (uint8_t)((uint8_t)1 << (temp - 8)));
|
|
}
|
|
}
|
|
else /* Get EOC | AWD flag status */
|
|
{
|
|
flagstatus = (uint8_t)(ADC1->CSR & Flag);
|
|
}
|
|
return ((FlagStatus)flagstatus);
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief Clear the specified ADC1 Flag.
|
|
* @param Flag: ADC1 flag.
|
|
* can be one of the values of @ref ADC1_Flag_TypeDef.
|
|
* @retval None
|
|
*/
|
|
void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag)
|
|
{
|
|
uint8_t temp = 0;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_ADC1_FLAG_OK(Flag));
|
|
|
|
if ((Flag & 0x0F) == 0x01)
|
|
{
|
|
/* Clear OVR flag status */
|
|
ADC1->CR3 &= (uint8_t)(~ADC1_CR3_OVR);
|
|
}
|
|
else if ((Flag & 0xF0) == 0x10)
|
|
{
|
|
/* Clear analog watchdog channel status */
|
|
temp = (uint8_t)(Flag & (uint8_t)0x0F);
|
|
if (temp < 8)
|
|
{
|
|
ADC1->AWSRL &= (uint8_t)~(uint8_t)((uint8_t)1 << temp);
|
|
}
|
|
else
|
|
{
|
|
ADC1->AWSRH &= (uint8_t)~(uint8_t)((uint8_t)1 << (temp - 8));
|
|
}
|
|
}
|
|
else /* Clear EOC | AWD flag status */
|
|
{
|
|
ADC1->CSR &= (uint8_t) (~Flag);
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Returns the specified pending bit status
|
|
* @param ITPendingBit : the IT pending bit to check.
|
|
* This parameter can be one of the following values:
|
|
* - ADC1_IT_AWD : Analog WDG IT status
|
|
* - ADC1_IT_AWS0 : Analog channel 0 IT status
|
|
* - ADC1_IT_AWS1 : Analog channel 1 IT status
|
|
* - ADC1_IT_AWS2 : Analog channel 2 IT status
|
|
* - ADC1_IT_AWS3 : Analog channel 3 IT status
|
|
* - ADC1_IT_AWS4 : Analog channel 4 IT status
|
|
* - ADC1_IT_AWS5 : Analog channel 5 IT status
|
|
* - ADC1_IT_AWS6 : Analog channel 6 IT status
|
|
* - ADC1_IT_AWS7 : Analog channel 7 IT status
|
|
* - ADC1_IT_AWS8 : Analog channel 8 IT status
|
|
* - ADC1_IT_AWS9 : Analog channel 9 IT status
|
|
* - ADC1_IT_EOC : EOC pending bit
|
|
* @retval ITStatus: status of the specified pending bit.
|
|
*/
|
|
ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit)
|
|
{
|
|
ITStatus itstatus = RESET;
|
|
uint8_t temp = 0;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit));
|
|
|
|
if (((uint16_t)ITPendingBit & 0xF0) == 0x10)
|
|
{
|
|
/* Get analog watchdog channel status */
|
|
temp = (uint8_t)((uint16_t)ITPendingBit & 0x0F);
|
|
if (temp < 8)
|
|
{
|
|
itstatus = (ITStatus)(ADC1->AWSRL & (uint8_t)((uint8_t)1 << temp));
|
|
}
|
|
else
|
|
{
|
|
itstatus = (ITStatus)(ADC1->AWSRH & (uint8_t)((uint8_t)1 << (temp - 8)));
|
|
}
|
|
}
|
|
else /* Get EOC | AWD flag status */
|
|
{
|
|
itstatus = (ITStatus)(ADC1->CSR & (uint8_t)ITPendingBit);
|
|
}
|
|
return ((ITStatus)itstatus);
|
|
}
|
|
|
|
/**
|
|
* @brief Clear the ADC1 End of Conversion pending bit.
|
|
* @param ITPendingBit : the IT pending bit to clear.
|
|
* This parameter can be one of the following values:
|
|
* - ADC1_IT_AWD : Analog WDG IT status
|
|
* - ADC1_IT_AWS0 : Analog channel 0 IT status
|
|
* - ADC1_IT_AWS1 : Analog channel 1 IT status
|
|
* - ADC1_IT_AWS2 : Analog channel 2 IT status
|
|
* - ADC1_IT_AWS3 : Analog channel 3 IT status
|
|
* - ADC1_IT_AWS4 : Analog channel 4 IT status
|
|
* - ADC1_IT_AWS5 : Analog channel 5 IT status
|
|
* - ADC1_IT_AWS6 : Analog channel 6 IT status
|
|
* - ADC1_IT_AWS7 : Analog channel 7 IT status
|
|
* - ADC1_IT_AWS8 : Analog channel 8 IT status
|
|
* - ADC1_IT_AWS9 : Analog channel 9 IT status
|
|
* - ADC1_IT_EOC : EOC pending bit
|
|
* @retval None
|
|
*/
|
|
void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit)
|
|
{
|
|
uint8_t temp = 0;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit));
|
|
|
|
if (((uint16_t)ITPendingBit & 0xF0) == 0x10)
|
|
{
|
|
/* Clear analog watchdog channel status */
|
|
temp = (uint8_t)((uint16_t)ITPendingBit & 0x0F);
|
|
if (temp < 8)
|
|
{
|
|
ADC1->AWSRL &= (uint8_t)~(uint8_t)((uint8_t)1 << temp);
|
|
}
|
|
else
|
|
{
|
|
ADC1->AWSRH &= (uint8_t)~(uint8_t)((uint8_t)1 << (temp - 8));
|
|
}
|
|
}
|
|
else /* Clear EOC | AWD flag status */
|
|
{
|
|
ADC1->CSR &= (uint8_t)((uint16_t)~(uint16_t)ITPendingBit);
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
|