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100 lines
4.6 KiB
100 lines
4.6 KiB
#pragma once
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#include "common.h"
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// AUTHOR : Ondrej Hruska
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// DATE : 12/2015
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// DESCR : Base library file. This file must be included before any other library
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// files. This file defines memory map and base addresses of peripherals.
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#define FLASH_BASE 0x08000000 // FLASH base address in the alias region
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#define SRAM_BASE 0x20000000 // SRAM base address in the alias region
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#define PERIPH_BASE 0x40000000 // Peripheral base address in the alias region
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#define SRAM_BB_BASE (SRAM_BASE + 0x02000000) // SRAM base address in the bit-band region
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#define PERIPH_BB_BASE (PERIPH_BASE + 0x02000000) // Peripheral base address in the bit-band region
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// ------------------------- System Config Blocks -----------------------------
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#define _SCS_BASE 0xE000E000 // System Control Space base
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#define _SCB (_SCS_BASE + 0x0D00) // System Control Block base
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#define _NVIC (_SCS_BASE + 0x0100) // Nested Interrupt Vector Controller base
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#define _OB 0x1FF80000 // FLASH Option Bytes base address
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#define _AES 0x50060000 // Encryption module
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#define _FSMC 0xA0000000 // External Memory Control base
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#define _DBGMCU 0xE0042000 // Debug MCU registers base address
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// ----------------------------- Peripherals ----------------------------------
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// *** Peripheral bus bases ***
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#define _APB1 PERIPH_BASE // Advanced Peripheral Bus 1 base
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#define _APB2 (PERIPH_BASE + 0x10000) // Advanced Peripheral Bus 2 base
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#define _AHB (PERIPH_BASE + 0x20000) // Advanced High-speed Bus base
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// *** Peripheral Bus 1 devices ***
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#define _TIM2 (_APB1 + 0x0000) // Timer bases
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#define _TIM3 (_APB1 + 0x0400)
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#define _TIM4 (_APB1 + 0x0800)
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#define _TIM5 (_APB1 + 0x0C00)
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#define _TIM6 (_APB1 + 0x1000)
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#define _TIM7 (_APB1 + 0x1400)
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#define _LCD (_APB1 + 0x2400) // LCD controller base
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#define _RTC (_APB1 + 0x2800) // RTC base
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#define _WWDG (_APB1 + 0x2C00) // Window Watchdog base
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#define _IWDG (_APB1 + 0x3000) // Independent Watchdog base
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#define _SPI2 (_APB1 + 0x3800) // SPI base
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#define _SPI3 (_APB1 + 0x3C00)
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#define _USART2 (_APB1 + 0x4400) // USART base
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#define _USART3 (_APB1 + 0x4800)
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#define _UART4 (_APB1 + 0x4C00) // UART base (?)
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#define _UART5 (_APB1 + 0x5000)
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#define _I2C1 (_APB1 + 0x5400) // I2C base
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#define _I2C2 (_APB1 + 0x5800)
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#define _PWR (_APB1 + 0x7000) // Power Control block base
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#define _DAC (_APB1 + 0x7400) // D/A config base
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#define _COMP (_APB1 + 0x7C00) // Analog Comparator base
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#define _RI (_APB1 + 0x7C04) // Routing Interface base (analog pin connections)
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#define _OPAMP (_APB1 + 0x7C5C) // OpAmp config base
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#define _USB (_APB1 + 0x5C00) // USB registers base
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// *** Peripheral Bus 2 devices ***
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#define _TIM9 (_APB2 + 0x0800) // Timer base
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#define _TIM10 (_APB2 + 0x0C00)
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#define _TIM11 (_APB2 + 0x1000)
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#define _SYSCFG (_APB2 + 0x0000) // System config block base
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#define _EXTI (_APB2 + 0x0400) // External interrupt settings base
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#define _ADC1 (_APB2 + 0x2400) // A/D 1
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#define _ADCC (_APB2 + 0x2700) // common A/D registers base
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#define _SDIO (_APB2 + 0x2C00) // SD host
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#define _SPI1 (_APB2 + 0x3000) // SPI
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#define _USART1 (_APB2 + 0x3800)
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// *** High Speed Bus devices ***
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#define _GPIO (_AHB + 0x0000) // GPIO block base
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#define _CRC (_AHB + 0x3000) // CRC module base
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#define _RCC (_AHB + 0x3800) // Reset and Clock Config base
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#define _DMA1 (_AHB + 0x6000) // DMA control base
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#define _DMA2 (_AHB + 0x6400)
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#define _FLASH (_AHB + 0x3C00) // FLASH control base
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