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59 lines
1.2 KiB
59 lines
1.2 KiB
#include "init.h"
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#include "utils/gpio.h"
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#include "utils/usart.h"
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void init_gpios(void)
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{
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gpio_enable(GPIOA);
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gpio_enable(GPIOB);
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gpio_enable(GPIOC);
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gpio_set_mode(GPIOC, BIT8 | BIT9 | BIT7, MODER_OUTPUT);
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}
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void init_clock(void)
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{
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// Flash timing - 64-bit access, pre-fetch, latency = 1
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FLASH_ACR |= FLASH_ACR_ACC64; // Cannot write both at once
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FLASH_ACR |= FLASH_ACR_PRFTEN | FLASH_ACR_LATENCY;
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// Power on HSI (runs from MSI on start)
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RCC_CR |= RCC_CR_HSION;
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// Wait for HSIRDY
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while (!(RCC_CR & RCC_CR_HSIRDY));
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// Select HSI as the core clock source
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RCC_CFGR &= ~RCC_CFGR_SW;
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RCC_CFGR |= RCC_CFGR_SW_HSI;
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}
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void init_usart(void)
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{
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gpio_set_af(GPIOC, BIT10 | BIT11, AF7);
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// USART at C10 (tx), C11 (rx)
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RCC_APB1ENR |= RCC_APB1ENR_USART3EN;
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// RATE 9600Bd 104.1875 (see datasheet for reference)
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//USART3_BRR = 0x00683; // 9600 @ 16MHz
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USART3_BRR = 0x0008A; // 115200 @ 16MHz
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// USART enable
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USART3_CR1 = USART_CR1_UE | USART_CR1_RE | USART_CR1_TE;
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}
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void init_systick(void)
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{
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SysTick_CSR = (SysTick_CSR & ~SysTick_CSR_CLKSOURCE) | SysTick_CSR_CLKSOURCE_CORE;
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SysTick_RELOAD = 16000; // 1ms interrupt @ 16MHz core clock
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SysTick_CSR |= SysTick_CSR_TICKINT | SysTick_CSR_ENABLE;
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}
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