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print the frequency for which the PLL couldn't lock

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master
Dimitri Stolnikov 13 years ago
parent 352e50df43
commit d5bfa3867f
1 changed files with 8 additions and 8 deletions
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  1. 16
      src/tuner_e4k.c

16
src/tuner_e4k.c
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@ -360,7 +360,7 @@ static int is_fvco_valid(uint32_t fvco_z)
/* check if the resulting fosc is valid */ /* check if the resulting fosc is valid */
if (fvco_z/1000 < E4K_FVCO_MIN_KHZ || if (fvco_z/1000 < E4K_FVCO_MIN_KHZ ||
fvco_z/1000 > E4K_FVCO_MAX_KHZ) { fvco_z/1000 > E4K_FVCO_MAX_KHZ) {
fprintf(stderr, "Fvco %u invalid\n", fvco_z); fprintf(stderr, "[E4K] Fvco %u invalid\n", fvco_z);
return 0; return 0;
} }
@ -370,7 +370,7 @@ static int is_fvco_valid(uint32_t fvco_z)
static int is_fosc_valid(uint32_t fosc) static int is_fosc_valid(uint32_t fosc)
{ {
if (fosc < MHZ(16) || fosc > MHZ(30)) { if (fosc < MHZ(16) || fosc > MHZ(30)) {
fprintf(stderr, "Fosc %u invalid\n", fosc); fprintf(stderr, "[E4K] Fosc %u invalid\n", fosc);
return 0; return 0;
} }
@ -380,7 +380,7 @@ static int is_fosc_valid(uint32_t fosc)
static int is_z_valid(uint32_t z) static int is_z_valid(uint32_t z)
{ {
if (z > 255) { if (z > 255) {
fprintf(stderr, "Z %u invalid\n", z); fprintf(stderr, "[E4K] Z %u invalid\n", z);
return 0; return 0;
} }
@ -487,7 +487,7 @@ uint32_t e4k_compute_pll_params(struct e4k_pll_params *oscp, uint32_t fosc, uint
} }
} }
//fprintf(stderr, "Fint=%u, R=%u\n", intended_flo, r); //fprintf(stderr, "[E4K] Fint=%u, R=%u\n", intended_flo, r);
/* flo(max) = 1700MHz, R(max) = 48, we need 64bit! */ /* flo(max) = 1700MHz, R(max) = 48, we need 64bit! */
intended_fvco = (uint64_t)intended_flo * r; intended_fvco = (uint64_t)intended_flo * r;
@ -573,7 +573,7 @@ int e4k_tune_freq(struct e4k_state *e4k, uint32_t freq)
/* check PLL lock */ /* check PLL lock */
rc = e4k_reg_read(e4k, E4K_REG_SYNTH1); rc = e4k_reg_read(e4k, E4K_REG_SYNTH1);
if (!(rc & 0x01)) { if (!(rc & 0x01)) {
fprintf(stderr, "[E4K] PLL not locked!\n"); fprintf(stderr, "[E4K] PLL not locked for %u Hz!\n", freq);
return -1; return -1;
} }
@ -717,7 +717,7 @@ static int find_stage_gain(uint8_t stage, int8_t val)
} }
/*! \brief Set the gain of one of the IF gain stages /*! \brief Set the gain of one of the IF gain stages
* \param[e4k] handle to the tuner chip * \param [e4k] handle to the tuner chip
* \param [stage] numbere of the stage (1..6) * \param [stage] numbere of the stage (1..6)
* \param [value] gain value in dBm * \param [value] gain value in dBm
* \returns 0 on success, negative in case of error * \returns 0 on success, negative in case of error
@ -796,7 +796,7 @@ int e4k_manual_dc_offset(struct e4k_state *e4k, int8_t iofs, int8_t irange, int8
} }
/*! \brief Perform a DC offset calibration right now /*! \brief Perform a DC offset calibration right now
* \param[e4k] handle to the tuner chip * \param [e4k] handle to the tuner chip
*/ */
int e4k_dc_offset_calibrate(struct e4k_state *e4k) int e4k_dc_offset_calibrate(struct e4k_state *e4k)
{ {
@ -862,7 +862,7 @@ int e4k_dc_offset_gen_table(struct e4k_state *e4k)
range_i = range & 0x3; range_i = range & 0x3;
range_q = (range >> 4) & 0x3; range_q = (range >> 4) & 0x3;
fprintf(stderr, "Table %u I=%u/%u, Q=%u/%u\n", fprintf(stderr, "[E4K] Table %u I=%u/%u, Q=%u/%u\n",
i, range_i, offs_i, range_q, offs_q); i, range_i, offs_i, range_q, offs_q);
/* write into the table */ /* write into the table */

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