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573 lines
21 KiB
573 lines
21 KiB
/*
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FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ARM CM0 port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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#ifndef configSYSTICK_CLOCK_HZ
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#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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#endif
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/* Constants required to manipulate the NVIC. */
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#define portNVIC_SYSTICK_CTRL (* ( ( volatile uint32_t *) 0xe000e010 ) )
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#define portNVIC_SYSTICK_LOAD (* ( ( volatile uint32_t *) 0xe000e014 ) )
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#define portNVIC_SYSTICK_CURRENT_VALUE (* ( ( volatile uint32_t * ) 0xe000e018 ))
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#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )
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#define portNVIC_SYSPRI2 ( ( volatile uint32_t *) 0xe000ed20 )
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#define portNVIC_SYSTICK_CLK 0x00000004
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#define portNVIC_SYSTICK_INT 0x00000002
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#define portNVIC_SYSTICK_ENABLE 0x00000001
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#define portNVIC_SYSTICK_COUNT_FLAG ( 1UL << 16UL )
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#define portNVIC_PENDSVSET 0x10000000
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#define portMIN_INTERRUPT_PRIORITY ( 255UL )
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#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
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#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
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/* Constants required to set up the initial stack. */
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#define portINITIAL_XPSR ( 0x01000000 )
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/* The systick is a 24-bit counter. */
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#define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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/* A fiddle factor to estimate the number of SysTick counts that would have
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occurred while the SysTick counter is stopped during tickless idle
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calculations. */
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#define portMISSED_COUNTS_FACTOR ( 45UL )
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/* Let the user override the pre-loading of the initial LR with the address of
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prvTaskExitError() in case it messes up unwinding of the stack in the
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debugger. */
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#ifdef configTASK_RETURN_ADDRESS
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#define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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#else
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#define portTASK_RETURN_ADDRESS prvTaskExitError
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#endif
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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/*
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* Setup the timer to generate the tick interrupts. The implementation in this
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* file is weak to allow application writers to change the timer used to
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* generate the tick interrupt.
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*/
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void vPortSetupTimerInterrupt( void );
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/*
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* Exception handlers.
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*/
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void xPortPendSVHandler( void ) __attribute__ (( naked ));
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void xPortSysTickHandler( void );
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void vPortSVCHandler( void );
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/*
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* Start first task is a separate function so it can be tested in isolation.
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*/
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static void vPortStartFirstTask( void ) __attribute__ (( naked ));
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/*
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* Used to catch tasks that attempt to return from their implementing function.
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*/
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static void prvTaskExitError( void );
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/*-----------------------------------------------------------*/
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/*
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* The number of SysTick increments that make up one tick period.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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static unsigned long ulTimerCountsForOneTick = 0;
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#endif /* configUSE_TICKLESS_IDLE */
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/*
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* The maximum number of tick periods that can be suppressed is limited by the
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* 24 bit resolution of the SysTick timer.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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static unsigned long xMaximumPossibleSuppressedTicks = 0;
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#endif /* configUSE_TICKLESS_IDLE */
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/*
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* Compensate for the CPU cycles that pass while the SysTick is stopped (low
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* power functionality only.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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static unsigned long ulStoppedTimerCompensation = 0;
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#endif /* configUSE_TICKLESS_IDLE */
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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/* Simulate the stack frame as it would be created by a context switch
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interrupt. */
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pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxCode; /* PC */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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pxTopOfStack -= 8; /* R11..R4. */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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static void prvTaskExitError( void )
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{
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/* A function that implements a task must not exit or attempt to return to
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its caller as there is nothing to return to. If a task wants to exit it
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should instead call vTaskDelete( NULL ).
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Artificially force an assert() to be triggered if configASSERT() is
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defined, then stop here so application writers can catch the error. */
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configASSERT( uxCriticalNesting == ~0UL );
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portDISABLE_INTERRUPTS();
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for( ;; );
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}
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/*-----------------------------------------------------------*/
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void vPortSVCHandler( void )
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{
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/* This function is no longer used, but retained for backward
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compatibility. */
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}
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/*-----------------------------------------------------------*/
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void vPortStartFirstTask( void )
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{
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/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
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table offset register that can be used to locate the initial stack value.
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Not all M0 parts have the application vector table at address 0. */
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__asm volatile(
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" ldr r2, pxCurrentTCBConst2 \n" /* Obtain location of pxCurrentTCB. */
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" ldr r3, [r2] \n"
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" ldr r0, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" add r0, #32 \n" /* Discard everything up to r0. */
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" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */
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" movs r0, #2 \n" /* Switch to the psp stack. */
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" msr CONTROL, r0 \n"
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" isb \n"
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" pop {r0-r5} \n" /* Pop the registers that are saved automatically. */
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" mov lr, r5 \n" /* lr is now in r5. */
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" pop {r3} \n" /* Return address is now in r3. */
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" pop {r2} \n" /* Pop and discard XPSR. */
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" cpsie i \n" /* The first task has its context and interrupts can be enabled. */
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" bx r3 \n" /* Finally, jump to the user defined task code. */
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" \n"
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" .align 4 \n"
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"pxCurrentTCBConst2: .word pxCurrentTCB "
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);
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}
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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BaseType_t xPortStartScheduler( void )
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{
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/* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
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*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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*(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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vPortSetupTimerInterrupt();
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/* Initialise the critical nesting count ready for the first task. */
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uxCriticalNesting = 0;
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/* Start the first task. */
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vPortStartFirstTask();
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/* Should never get here as the tasks will now be executing! Call the task
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exit error function to prevent compiler warnings about a static function
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not being called in the case that the application writer overrides this
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functionality by defining configTASK_RETURN_ADDRESS. */
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prvTaskExitError();
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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configASSERT( uxCriticalNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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void vPortYield( void )
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{
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/* Set a PendSV to request a context switch. */
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*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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/* Barriers are normally not required but do ensure the code is completely
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within the specified behaviour for the architecture. */
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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uxCriticalNesting++;
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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configASSERT( uxCriticalNesting );
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uxCriticalNesting--;
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if( uxCriticalNesting == 0 )
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{
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portENABLE_INTERRUPTS();
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}
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}
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/*-----------------------------------------------------------*/
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uint32_t ulSetInterruptMaskFromISR( void )
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{
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__asm volatile(
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" mrs r0, PRIMASK \n"
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" cpsid i \n"
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" bx lr "
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);
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/* To avoid compiler warnings. This line will never be reached. */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vClearInterruptMaskFromISR( uint32_t ulMask )
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{
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__asm volatile(
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" msr PRIMASK, r0 \n"
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" bx lr "
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);
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/* Just to avoid compiler warning. */
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( void ) ulMask;
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}
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/*-----------------------------------------------------------*/
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void xPortPendSVHandler( void )
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{
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/* This is a naked function. */
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__asm volatile
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(
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" mrs r0, psp \n"
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" \n"
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" ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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" ldr r2, [r3] \n"
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" \n"
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" sub r0, r0, #32 \n" /* Make space for the remaining low registers. */
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" str r0, [r2] \n" /* Save the new top of stack. */
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" stmia r0!, {r4-r7} \n" /* Store the low registers that are not saved automatically. */
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" mov r4, r8 \n" /* Store the high registers. */
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" mov r5, r9 \n"
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" mov r6, r10 \n"
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" mov r7, r11 \n"
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" stmia r0!, {r4-r7} \n"
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" \n"
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" push {r3, r14} \n"
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" cpsid i \n"
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" bl vTaskSwitchContext \n"
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" cpsie i \n"
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" pop {r2, r3} \n" /* lr goes in r3. r2 now holds tcb pointer. */
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" \n"
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" ldr r1, [r2] \n"
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" add r0, r0, #16 \n" /* Move to the high registers. */
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" ldmia r0!, {r4-r7} \n" /* Pop the high registers. */
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" mov r8, r4 \n"
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" mov r9, r5 \n"
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" mov r10, r6 \n"
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" mov r11, r7 \n"
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" \n"
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" msr psp, r0 \n" /* Remember the new top of stack for the task. */
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" \n"
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" sub r0, r0, #32 \n" /* Go back for the low registers that are not automatically restored. */
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" ldmia r0!, {r4-r7} \n" /* Pop low registers. */
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" \n"
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" bx r3 \n"
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" \n"
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" .align 4 \n"
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"pxCurrentTCBConst: .word pxCurrentTCB "
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);
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}
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/*-----------------------------------------------------------*/
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void xPortSysTickHandler( void )
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{
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uint32_t ulPreviousMask;
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ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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/* Pend a context switch. */
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*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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}
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/*-----------------------------------------------------------*/
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#if configUSE_TICKLESS_IDLE == 1
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__attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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{
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
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TickType_t xModifiableIdleTime;
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/* Make sure the SysTick reload value does not overflow the counter. */
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if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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{
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xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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}
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/* Stop the SysTick momentarily. The time the SysTick is stopped for
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is accounted for as best it can be, but using the tickless mode will
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inevitably result in some tiny drift of the time maintained by the
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kernel with respect to calendar time. */
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portNVIC_SYSTICK_CTRL &= ~portNVIC_SYSTICK_ENABLE;
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|
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/* Calculate the reload value required to wait xExpectedIdleTime
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tick periods. -1 is used because this code will execute part way
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through one of the tick periods. */
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ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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if( ulReloadValue > ulStoppedTimerCompensation )
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{
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ulReloadValue -= ulStoppedTimerCompensation;
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}
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/* Enter a critical section but don't use the taskENTER_CRITICAL()
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method as that will mask interrupts that should exit sleep mode. */
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__asm volatile( "cpsid i" );
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/* If a context switch is pending or a task is waiting for the scheduler
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|
to be unsuspended then abandon the low power entry. */
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if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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{
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/* Restart from whatever is left in the count register to complete
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this tick period. */
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portNVIC_SYSTICK_LOAD = portNVIC_SYSTICK_CURRENT_VALUE;
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/* Restart SysTick. */
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portNVIC_SYSTICK_CTRL |= portNVIC_SYSTICK_ENABLE;
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/* Reset the reload register to the value required for normal tick
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periods. */
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portNVIC_SYSTICK_LOAD = ulTimerCountsForOneTick - 1UL;
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/* Re-enable interrupts - see comments above the cpsid instruction()
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above. */
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__asm volatile( "cpsie i" );
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}
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else
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{
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/* Set the new reload value. */
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portNVIC_SYSTICK_LOAD = ulReloadValue;
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/* Clear the SysTick count flag and set the count value back to
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zero. */
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portNVIC_SYSTICK_CURRENT_VALUE = 0UL;
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/* Restart SysTick. */
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portNVIC_SYSTICK_CTRL |= portNVIC_SYSTICK_ENABLE;
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/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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set its parameter to 0 to indicate that its implementation contains
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its own wait for interrupt or wait for event instruction, and so wfi
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should not be executed again. However, the original expected idle
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time variable must remain unmodified, so a copy is taken. */
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xModifiableIdleTime = xExpectedIdleTime;
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configPRE_SLEEP_PROCESSING( &xModifiableIdleTime );
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if( xModifiableIdleTime > 0 )
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{
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__asm volatile( "dsb" );
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__asm volatile( "wfi" );
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__asm volatile( "isb" );
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}
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configPOST_SLEEP_PROCESSING( &xExpectedIdleTime );
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/* Stop SysTick. Again, the time the SysTick is stopped for is
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|
accounted for as best it can be, but using the tickless mode will
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|
inevitably result in some tiny drift of the time maintained by the
|
|
kernel with respect to calendar time. */
|
|
ulSysTickCTRL = portNVIC_SYSTICK_CTRL;
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|
portNVIC_SYSTICK_CTRL = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE );
|
|
|
|
/* Re-enable interrupts - see comments above the cpsid instruction()
|
|
above. */
|
|
__asm volatile( "cpsie i" );
|
|
|
|
if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG ) != 0 )
|
|
{
|
|
uint32_t ulCalculatedLoadValue;
|
|
|
|
/* The tick interrupt has already executed, and the SysTick
|
|
count reloaded with ulReloadValue. Reset the
|
|
portNVIC_SYSTICK_LOAD with whatever remains of this tick
|
|
period. */
|
|
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE );
|
|
|
|
/* Don't allow a tiny value, or values that have somehow
|
|
underflowed because the post sleep hook did something
|
|
that took too long. */
|
|
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
|
{
|
|
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
|
}
|
|
|
|
portNVIC_SYSTICK_LOAD = ulCalculatedLoadValue;
|
|
|
|
/* The tick interrupt handler will already have pended the tick
|
|
processing in the kernel. As the pending tick will be
|
|
processed as soon as this function exits, the tick value
|
|
maintained by the tick is stepped forward by one less than the
|
|
time spent waiting. */
|
|
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
|
}
|
|
else
|
|
{
|
|
/* Something other than the tick interrupt ended the sleep.
|
|
Work out how long the sleep lasted rounded to complete tick
|
|
periods (not the ulReload value which accounted for part
|
|
ticks). */
|
|
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE;
|
|
|
|
/* How many complete tick periods passed while the processor
|
|
was waiting? */
|
|
ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
|
|
|
|
/* The reload value is set to whatever fraction of a single tick
|
|
period remains. */
|
|
portNVIC_SYSTICK_LOAD = ( ( ulCompleteTickPeriods + 1 ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
|
}
|
|
|
|
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD
|
|
again, then set portNVIC_SYSTICK_LOAD back to its standard
|
|
value. The critical section is used to ensure the tick interrupt
|
|
can only execute once in the case that the reload register is near
|
|
zero. */
|
|
portNVIC_SYSTICK_CURRENT_VALUE = 0UL;
|
|
portENTER_CRITICAL();
|
|
{
|
|
portNVIC_SYSTICK_CTRL |= portNVIC_SYSTICK_ENABLE;
|
|
vTaskStepTick( ulCompleteTickPeriods );
|
|
portNVIC_SYSTICK_LOAD = ulTimerCountsForOneTick - 1UL;
|
|
}
|
|
portEXIT_CRITICAL();
|
|
}
|
|
}
|
|
|
|
#endif /* #if configUSE_TICKLESS_IDLE */
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* Setup the systick timer to generate the tick interrupts at the required
|
|
* frequency.
|
|
*/
|
|
__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
|
|
{
|
|
/* Calculate the constants required to configure the tick interrupt. */
|
|
#if configUSE_TICKLESS_IDLE == 1
|
|
{
|
|
ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
|
|
xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
|
|
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
|
|
}
|
|
#endif /* configUSE_TICKLESS_IDLE */
|
|
/* Configure SysTick to interrupt at the requested rate. */
|
|
|
|
portNVIC_SYSTICK_LOAD = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
|
portNVIC_SYSTICK_CTRL = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
|