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700 lines
23 KiB
700 lines
23 KiB
//
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// Created by MightyPork on 2018/02/04.
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//
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// The core functionality of the ADC unit is defined here.
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//
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#include "platform.h"
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#include "unit_base.h"
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#include "unit_adc.h"
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#define ADC_INTERNAL
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#include "_adc_internal.h"
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#define DMA_POS(priv) ((priv)->buf_itemcount - (priv)->DMA_CHx->CNDTR)
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/**
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* Async job to send a chunk of the DMA buffer to PC.
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* This can't be done directly because the interrupt couldn't wait for the TinyFrame mutex.
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*
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* unit - unit
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* data1 - start index
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* data2 - number of samples to send
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* data3 - bit flags: 0x80 if this is the last sample and we should close
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* 0x01 if this was the TC interrupt (otherwise it's HT)
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*/
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static void UADC_JobSendBlockChunk(Job *job)
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{
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Unit *unit = job->unit;
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struct priv *priv = unit->data;
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const uint32_t start = job->data1;
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const uint32_t count = job->data2;
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const bool close = (bool) (job->data3 & 0x80);
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const bool tc = (bool) (job->data3 & 0x01);
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const TF_TYPE type = close ? EVT_CAPT_DONE : EVT_CAPT_MORE;
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TF_Msg msg = {
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.frame_id = priv->stream_frame_id,
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.len = (TF_LEN) (1 /*seq*/ + count * sizeof(uint16_t)),
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.type = type,
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};
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assert_param(true == TF_Respond_Multipart(comm, &msg));
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TF_Multipart_Payload(comm, &priv->stream_serial, 1);
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TF_Multipart_Payload(comm, (uint8_t *) (priv->dma_buffer + start), count * sizeof(uint16_t));
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TF_Multipart_Close(comm);
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// Clear the "busy" flags - those are checked in the DMA ISR to detect overrun
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if (tc) priv->tc_pending = false;
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else priv->ht_pending = false;
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priv->stream_serial++;
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}
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/**
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* Async job to send the trigger header.
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* The header includes info about the trigger + the pre-trigger buffer.
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*
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* data1 - index in the DMA buffer at which the captured data willl start
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* data2 - edge type - 1 rise, 2 fall, 3 forced
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* timestamp - event stamp
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* unit - unit
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*/
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static void UADC_JobSendTriggerCaptureHeader(Job *job)
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{
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Unit *unit = job->unit;
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struct priv *priv = unit->data;
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EventReport er = {
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.unit = unit,
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.type = EVT_CAPT_START,
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.timestamp = job->timestamp,
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.length = (priv->pretrig_len + ((priv->pretrig_len > 0)?1:0)) * // see below why +1
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priv->nb_channels *
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sizeof(uint16_t) +
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4 /*pretrig len*/ +
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1 /*edge*/ +
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1 /* seq */
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};
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uint32_t index_trigd = job->data1;
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uint8_t edge = (uint8_t) job->data2;
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EventReport_Start(&er);
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priv->stream_frame_id = er.sent_msg_id;
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{
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// preamble
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uint8_t buf[6];
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PayloadBuilder pb = pb_start(buf, 6, NULL);
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pb_u32(&pb, priv->pretrig_len);
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pb_u8(&pb, edge);
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pb_u8(&pb, priv->stream_serial++); // This is the serial counter for the first chunk
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// (containing the pre-trigger, or empty if no pretrig configured)
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EventReport_PB(&pb);
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if (priv->pretrig_len > 0) {
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// pretrig
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// +1 because we want pretrig 0 to exactly start with the triggering sample
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uint32_t pretrig_remain = (priv->pretrig_len + 1) * priv->nb_channels;
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assert_param(index_trigd <= priv->buf_itemcount);
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// this is one past the last entry of the triggering capture group
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if (pretrig_remain > index_trigd) {
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// used items in the wrap-around part of the buffer
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uint32_t items_from_end = pretrig_remain - index_trigd;
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assert_param(priv->buf_itemcount - items_from_end >= index_trigd);
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EventReport_Data((uint8_t *) &priv->dma_buffer[priv->buf_itemcount - items_from_end],
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items_from_end * sizeof(uint16_t));
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assert_param(items_from_end <= pretrig_remain);
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pretrig_remain -= items_from_end;
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}
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assert_param(pretrig_remain <= index_trigd);
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EventReport_Data((uint8_t *) &priv->dma_buffer[index_trigd - pretrig_remain],
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pretrig_remain * sizeof(uint16_t));
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}
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}
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EventReport_End();
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}
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/**
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* Async job to notify about end of stream
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*/
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static void UADC_JobSendEndOfStreamMsg(Job *job)
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{
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TF_Msg msg = {
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.type = EVT_CAPT_DONE,
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.frame_id = (TF_ID) job->data1
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};
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TF_Respond(comm, &msg);
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}
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/**
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* Schedule sending a event report to the PC that the current stream has ended.
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* The client library should handle this appropriately.
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*/
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void UADC_ReportEndOfStream(Unit *unit)
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{
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struct priv *priv = unit->data;
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Job j = {
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.unit = unit,
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.data1 = priv->stream_frame_id, // copy the ID, it may be invalid by the time the cb gets executed
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.cb = UADC_JobSendEndOfStreamMsg
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};
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scheduleJob(&j);
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}
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/**
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* This is a helper function for the ADC DMA interrupt for handing the different interrupt types (half / full transfer).
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* It sends the part of the buffer that was just captured via an async job, or aborts on overrun.
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*
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* It's split off here to allow calling it for the different flags without repeating code.
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*
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* @param unit
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* @param tc - true if this is the TC interrupt, else HT
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*/
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static void handle_httc(Unit *unit, bool tc)
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{
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struct priv *priv = unit->data;
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uint32_t start = priv->stream_startpos;
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uint32_t end;
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const bool ht = !tc;
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const bool m_trigd = priv->opmode == ADC_OPMODE_TRIGD;
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const bool m_stream = priv->opmode == ADC_OPMODE_STREAM;
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const bool m_fixcpt = priv->opmode == ADC_OPMODE_BLCAP;
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if (ht) {
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end = (priv->buf_itemcount >> 1); // div2
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}
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else {
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end = priv->buf_itemcount;
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}
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if (start != end) { // this sometimes happened after a trigger, may be unnecessary now
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if (end < start) {
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// this was a trap for a bug with missed TC irq, it's hopefully fixed now
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trap("end < start! %d < %d, tc %d", (int)end, (int)start, (int)tc);
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}
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uint32_t sgcount = (end - start) / priv->nb_channels;
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if (m_trigd || m_fixcpt) {
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sgcount = MIN(priv->trig_stream_remain, sgcount);
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priv->trig_stream_remain -= sgcount;
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}
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// Check for the closing condition
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const bool close = !m_stream && priv->trig_stream_remain == 0;
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if ((tc && priv->tc_pending) || (ht && priv->ht_pending)) {
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dbg("(!) ADC DMA not handled in time, abort capture");
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UADC_SwitchMode(unit, ADC_OPMODE_EMERGENCY_SHUTDOWN);
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return;
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}
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// Here we set the tc/ht pending flags for detecting overrun
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Job j = {
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.unit = unit,
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.data1 = start,
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.data2 = sgcount * priv->nb_channels,
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.data3 = (uint32_t) (close*0x80) | (tc*1), // bitfields to indicate what's happening
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.cb = UADC_JobSendBlockChunk
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};
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if (tc)
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priv->tc_pending = true;
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else
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priv->ht_pending = true;
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if (!scheduleJob(&j)) {
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// Abort if we can't queue - the stream would tear and we'd hog the system with error messages
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UADC_SwitchMode(unit, ADC_OPMODE_EMERGENCY_SHUTDOWN);
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return;
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}
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if (close) {
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// If auto-arm is enabled, we need to re-arm again.
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// However, EOS irq is disabled during the capture so the trigger edge detection would
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// work on stale data from before this trigger. We have to wait for the next full
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// conversion (EOS) before arming.
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UADC_SwitchMode(unit, (priv->auto_rearm && m_trigd) ? ADC_OPMODE_REARM_PENDING : ADC_OPMODE_IDLE);
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}
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}
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// Advance the starting position
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if (tc) {
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priv->stream_startpos = 0;
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}
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else {
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priv->stream_startpos = priv->buf_itemcount >> 1; // div2
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}
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}
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/**
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* IRQ handler for the DMA flags.
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*
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* We handle flags:
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* TC - transfer complete
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* HT - half transfer
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* TE - transfer error (this should never happen unless there's a bug)
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*
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* The buffer works in a circular mode, so we always handle the previous half
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* or what of it should be sent (if capture started somewhere inside).
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*
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* @param arg - the unit, passed via the irq dispatcher
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*/
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void UADC_DMA_Handler(void *arg)
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{
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Unit *unit = arg;
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struct priv *priv = unit->data;
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// First thing, grab the flags. They may change during the function.
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// Working on the live register might cause race conditions.
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const uint32_t isrsnapshot = priv->DMAx->ISR;
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if (priv->opmode == ADC_OPMODE_UNINIT) {
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// the IRQ occured while switching mode, clear flags and do nothing else
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LL_DMA_ClearFlag_HT(priv->DMAx, priv->dma_chnum);
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LL_DMA_ClearFlag_TC(priv->DMAx, priv->dma_chnum);
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LL_DMA_ClearFlag_TE(priv->DMAx, priv->dma_chnum);
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return;
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}
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if (LL_DMA_IsActiveFlag_G(isrsnapshot, priv->dma_chnum)) {
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// we have some flags set - check which
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const bool tc = LL_DMA_IsActiveFlag_TC(isrsnapshot, priv->dma_chnum);
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const bool ht = LL_DMA_IsActiveFlag_HT(isrsnapshot, priv->dma_chnum);
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const bool te = LL_DMA_IsActiveFlag_TE(isrsnapshot, priv->dma_chnum);
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if (ht) LL_DMA_ClearFlag_HT(priv->DMAx, priv->dma_chnum);
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if (tc) LL_DMA_ClearFlag_TC(priv->DMAx, priv->dma_chnum);
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if (te) {
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// this shouldn't happen - error
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adc_dbg("ADC DMA TE!");
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LL_DMA_ClearFlag_TE(priv->DMAx, priv->dma_chnum);
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return;
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}
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// check what mode we're in
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const bool m_trigd = priv->opmode == ADC_OPMODE_TRIGD;
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const bool m_stream = priv->opmode == ADC_OPMODE_STREAM;
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const bool m_fixcpt = priv->opmode == ADC_OPMODE_BLCAP;
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if (m_trigd || m_stream || m_fixcpt) {
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const uint32_t half = (uint32_t) (priv->buf_itemcount >> 1); // div2
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if (ht && tc) {
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// dual event interrupt - may happen if we missed both and they were pending after
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// interrupts became enabled again (this can happen due to the EOS or other higher prio irq's)
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if (priv->stream_startpos > half) {
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handle_httc(unit, true); // TC
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handle_httc(unit, false); // HT
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} else {
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handle_httc(unit, false); // HT
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handle_httc(unit, true); // TC
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}
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} else {
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if (ht && priv->stream_startpos > half) {
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// We missed the TC interrupt while e.g. setting up the stream / interrupt. catch up!
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// This fixes a bug with "negative size" for report.
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handle_httc(unit, true); // TC
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}
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handle_httc(unit, tc);
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}
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} else {
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// This shouldn't happen, the interrupt should be disabled in this opmode
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dbg("(!) not streaming, ADC DMA IT should be disabled");
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}
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}
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}
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/**
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* End of measurement group interrupt handler.
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* This interrupt records the measured values and checks for trigger.
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*
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* @param arg - unit, passed b y irq dispatcher
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*/
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void UADC_ADC_EOS_Handler(void *arg)
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{
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Unit *unit = arg;
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struct priv *priv = unit->data;
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const bool can_average = priv->cfg.enable_averaging &&
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priv->real_frequency_int < UADC_MAX_FREQ_FOR_AVERAGING;
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// Normally
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uint64_t timestamp = 0;
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if (priv->opmode == ADC_OPMODE_ARMED) {
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timestamp = PTIM_GetMicrotime();
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}
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LL_ADC_ClearFlag_EOS(priv->ADCx);
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if (priv->opmode == ADC_OPMODE_UNINIT) {
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goto exit;
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}
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uint32_t dmapos = DMA_POS(priv);
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// Wait for the DMA to complete copying the last sample
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// XXX
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// experiments revealed this was actually a bug somewhere else and DMA
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// is quick enough so we don't have to worry about this
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#if 0
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uint32_t err = (dmapos % priv->nb_channels);
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if (err != 0) {
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GPIOC->BSRR = 0x02;
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hw_wait_while(((dmapos = DMA_POS(priv)) % priv->nb_channels) != 0, 10);
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GPIOC->BRR = 0x02;
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}
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#endif
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// wrap dmapos to be past the last sample, even if outside the buffer
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// - so we can subtract nb_channels
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uint32_t sample_pos;
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if (dmapos == 0) {
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sample_pos = (uint32_t) (priv->buf_itemcount);
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} else {
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sample_pos = dmapos;
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}
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sample_pos -= priv->nb_channels;
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uint16_t val;
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#if 1
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for (uint32_t j = 0; j < priv->nb_channels; j++) {
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const uint8_t i = priv->channel_nums[j];
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val = priv->dma_buffer[sample_pos+j];
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if (can_average) {
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priv->averaging_bins[i] =
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priv->averaging_bins[i] * (1.0f - priv->avg_factor_as_float) +
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((float) val) * priv->avg_factor_as_float;
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}
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priv->last_samples[i] = val;
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}
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#else
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for (uint8_t i = 0; i < 18; i++) {
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if (channels_mask & (1 << i)) {
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val = priv->dma_buffer[sample_pos+cnt];
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cnt++;
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if (can_average) {
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priv->averaging_bins[i] =
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priv->averaging_bins[i] * (1.0f - priv->avg_factor_as_float) +
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((float) val) * priv->avg_factor_as_float;
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}
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priv->last_samples[i] = val;
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}
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}
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#endif
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switch (priv->opmode) {
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// Triggering condition test
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case ADC_OPMODE_ARMED:
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val = priv->last_samples[priv->trigger_source];
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if ((priv->trig_prev_level < priv->trig_level) &&
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val >= priv->trig_level &&
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(bool) (priv->trig_edge & 0b01)) {
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// Rising edge
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UADC_HandleTrigger(unit, 0b01, timestamp);
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}
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else if ((priv->trig_prev_level > priv->trig_level) &&
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val <= priv->trig_level &&
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(bool) (priv->trig_edge & 0b10)) {
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// Falling edge
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UADC_HandleTrigger(unit, 0b10, timestamp);
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}
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priv->trig_prev_level = val;
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break;
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// auto-rearm was waiting for the next sample
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case ADC_OPMODE_REARM_PENDING:
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if (!priv->auto_rearm) {
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// It looks like the flag was cleared by DISARM before we got a new sample.
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// Let's just switch to IDLE
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UADC_SwitchMode(unit, ADC_OPMODE_IDLE);
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} else {
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// Re-arming for a new trigger
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UADC_SwitchMode(unit, ADC_OPMODE_ARMED);
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}
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default:
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break;
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}
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exit:
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return;
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}
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/**
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* Handle a detected trigger - start capture if we're not in hold-off
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*
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* @param unit
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* @param edge_type - edge type, is included in the report
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* @param timestamp - event time
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*/
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void UADC_HandleTrigger(Unit *unit, uint8_t edge_type, uint64_t timestamp)
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{
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struct priv *priv = unit->data;
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if (priv->opmode == ADC_OPMODE_UNINIT) return;
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if (priv->trig_holdoff != 0 && priv->trig_holdoff_remain > 0) {
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// Trig discarded due to holdoff
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return;
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}
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if (priv->trig_holdoff > 0) {
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priv->trig_holdoff_remain = priv->trig_holdoff;
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// Start the tick
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unit->tick_interval = 1;
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unit->_tick_cnt = 1;
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}
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priv->stream_startpos = DMA_POS(priv);
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priv->trig_stream_remain = priv->trig_len;
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priv->stream_serial = 0;
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// This func may be called from the EOS interrupt, so it's safer to send the header message asynchronously
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Job j = {
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.unit = unit,
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.timestamp = timestamp,
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.data1 = priv->stream_startpos,
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.data2 = edge_type,
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.cb = UADC_JobSendTriggerCaptureHeader
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};
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scheduleJob(&j);
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UADC_SwitchMode(unit, ADC_OPMODE_TRIGD);
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}
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/**
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* Abort ongoing capture.
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*/
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void UADC_AbortCapture(Unit *unit)
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{
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struct priv *priv = unit->data;
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const enum uadc_opmode old_opmode = priv->opmode;
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priv->auto_rearm = false;
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if (old_opmode == ADC_OPMODE_BLCAP ||
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old_opmode == ADC_OPMODE_STREAM ||
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old_opmode == ADC_OPMODE_TRIGD) {
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UADC_ReportEndOfStream(unit);
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}
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UADC_SwitchMode(unit, ADC_OPMODE_IDLE);
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}
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/**
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* Start a manual block capture.
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*
|
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* @param unit
|
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* @param len - number of samples (groups)
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* @param frame_id - TF session to re-use for the report (client has a listener set up)
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|
*/
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void UADC_StartBlockCapture(Unit *unit, uint32_t len, TF_ID frame_id)
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{
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struct priv *priv = unit->data;
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if (priv->opmode == ADC_OPMODE_UNINIT) return;
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|
|
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priv->stream_frame_id = frame_id;
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priv->stream_startpos = DMA_POS(priv);
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priv->trig_stream_remain = len;
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priv->stream_serial = 0;
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UADC_SwitchMode(unit, ADC_OPMODE_BLCAP);
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}
|
|
|
|
/**
|
|
* Start a stream
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|
*
|
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* @param frame_id - TF session to re-use for the frames (client has a listener set up)
|
|
*/
|
|
void UADC_StartStream(Unit *unit, TF_ID frame_id)
|
|
{
|
|
struct priv *priv = unit->data;
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if (priv->opmode == ADC_OPMODE_UNINIT) return;
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|
|
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priv->stream_frame_id = frame_id;
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UADC_SwitchMode(unit, ADC_OPMODE_STREAM);
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}
|
|
|
|
/**
|
|
* End a stream by user request.
|
|
*/
|
|
void UADC_StopStream(Unit *unit)
|
|
{
|
|
struct priv *priv = unit->data;
|
|
if (priv->opmode == ADC_OPMODE_UNINIT) return;
|
|
|
|
UADC_ReportEndOfStream(unit);
|
|
UADC_SwitchMode(unit, ADC_OPMODE_IDLE);
|
|
}
|
|
|
|
/**
|
|
* Handle unit update tick - expire the trigger hold-off.
|
|
* We also check for the emergency shutdown condition and clear it.
|
|
*/
|
|
void UADC_updateTick(Unit *unit)
|
|
{
|
|
struct priv *priv = unit->data;
|
|
|
|
// Recover from shutdown after a delay
|
|
if (priv->opmode == ADC_OPMODE_EMERGENCY_SHUTDOWN) {
|
|
adc_dbg("ADC recovering from emergency shutdown");
|
|
|
|
UADC_ReportEndOfStream(unit);
|
|
LL_TIM_EnableCounter(priv->TIMx);
|
|
UADC_SwitchMode(unit, ADC_OPMODE_IDLE);
|
|
unit->tick_interval = 0;
|
|
return;
|
|
}
|
|
|
|
if (priv->trig_holdoff_remain > 0) {
|
|
priv->trig_holdoff_remain--;
|
|
|
|
if (priv->trig_holdoff_remain == 0) {
|
|
unit->tick_interval = 0;
|
|
unit->_tick_cnt = 0;
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
* Switch the ADC operational mode.
|
|
*
|
|
* @param unit
|
|
* @param new_mode - mode to set
|
|
*/
|
|
void UADC_SwitchMode(Unit *unit, enum uadc_opmode new_mode)
|
|
{
|
|
struct priv *priv = unit->data;
|
|
|
|
const enum uadc_opmode old_mode = priv->opmode;
|
|
if (new_mode == old_mode) return; // nothing to do
|
|
|
|
// if un-itied, can go only to IDLE
|
|
assert_param((old_mode != ADC_OPMODE_UNINIT) || (new_mode == ADC_OPMODE_IDLE));
|
|
|
|
priv->opmode = ADC_OPMODE_UNINIT;
|
|
|
|
if (new_mode == ADC_OPMODE_UNINIT) {
|
|
adc_dbg("ADC switch -> UNINIT");
|
|
// Stop the DMA, timer and disable ADC - this is called before tearing down the unit
|
|
LL_TIM_DisableCounter(priv->TIMx);
|
|
LL_ADC_ClearFlag_EOS(priv->ADCx);
|
|
LL_ADC_DisableIT_EOS(priv->ADCx);
|
|
|
|
// Switch off the ADC
|
|
if (LL_ADC_IsEnabled(priv->ADCx)) {
|
|
// Cancel ongoing conversion
|
|
if (LL_ADC_REG_IsConversionOngoing(priv->ADCx)) {
|
|
LL_ADC_REG_StopConversion(priv->ADCx);
|
|
hw_wait_while(LL_ADC_REG_IsStopConversionOngoing(priv->ADCx), 100);
|
|
}
|
|
|
|
LL_ADC_Disable(priv->ADCx);
|
|
hw_wait_while(LL_ADC_IsDisableOngoing(priv->ADCx), 100);
|
|
}
|
|
|
|
LL_DMA_DisableChannel(priv->DMAx, priv->dma_chnum);
|
|
LL_DMA_DisableIT_HT(priv->DMAx, priv->dma_chnum);
|
|
LL_DMA_DisableIT_TC(priv->DMAx, priv->dma_chnum);
|
|
LL_DMA_ClearFlag_HT(priv->DMAx, priv->dma_chnum);
|
|
LL_DMA_ClearFlag_TC(priv->DMAx, priv->dma_chnum);
|
|
}
|
|
else if (new_mode == ADC_OPMODE_IDLE || new_mode == ADC_OPMODE_REARM_PENDING) {
|
|
// IDLE and ARMED are identical with the exception that the trigger condition is not checked
|
|
// ARMED can be only entered from IDLE, thus we do the init only here.
|
|
|
|
priv->tc_pending = false;
|
|
priv->ht_pending = false;
|
|
|
|
// In IDLE, we don't need the DMA interrupts
|
|
LL_DMA_ClearFlag_HT(priv->DMAx, priv->dma_chnum);
|
|
LL_DMA_ClearFlag_TC(priv->DMAx, priv->dma_chnum);
|
|
LL_DMA_DisableIT_HT(priv->DMAx, priv->dma_chnum);
|
|
LL_DMA_DisableIT_TC(priv->DMAx, priv->dma_chnum);
|
|
|
|
// Use End Of Sequence to recover results for averaging from the DMA buffer and DR
|
|
LL_ADC_ClearFlag_EOS(priv->ADCx);
|
|
LL_ADC_EnableIT_EOS(priv->ADCx);
|
|
|
|
if (old_mode == ADC_OPMODE_UNINIT) {
|
|
// Nothing is started yet - this is the only way to leave UNINIT
|
|
LL_ADC_Enable(priv->ADCx);
|
|
LL_DMA_EnableChannel(priv->DMAx, priv->dma_chnum);
|
|
LL_TIM_EnableCounter(priv->TIMx);
|
|
|
|
LL_ADC_REG_StartConversion(priv->ADCx);
|
|
}
|
|
}
|
|
else if (new_mode == ADC_OPMODE_EMERGENCY_SHUTDOWN) {
|
|
adc_dbg("ADC switch -> EMERGENCY_STOP");
|
|
// Emergency shutdown is used when the job queue overflows and the stream is torn
|
|
// This however doesn't help in the case when user sets such a high frequency
|
|
// that the whole app becomes unresponsive due to the completion ISR, need to verify the value manually.
|
|
|
|
LL_DMA_ClearFlag_HT(priv->DMAx, priv->dma_chnum);
|
|
LL_DMA_ClearFlag_TC(priv->DMAx, priv->dma_chnum);
|
|
LL_DMA_DisableIT_HT(priv->DMAx, priv->dma_chnum);
|
|
LL_DMA_DisableIT_TC(priv->DMAx, priv->dma_chnum);
|
|
|
|
LL_TIM_DisableCounter(priv->TIMx);
|
|
UADC_SetSampleRate(unit, 10000); // fallback to a known safe value
|
|
|
|
LL_ADC_ClearFlag_EOS(priv->ADCx);
|
|
LL_ADC_DisableIT_EOS(priv->ADCx);
|
|
|
|
unit->tick_interval = 0;
|
|
unit->_tick_cnt = 250; // 1-off
|
|
}
|
|
else if (new_mode == ADC_OPMODE_ARMED) {
|
|
adc_dbg("ADC switch -> ARMED");
|
|
assert_param(old_mode == ADC_OPMODE_IDLE || old_mode == ADC_OPMODE_REARM_PENDING);
|
|
|
|
// avoid firing immediately by the value jumping across the scale
|
|
priv->trig_prev_level = priv->last_samples[priv->trigger_source];
|
|
}
|
|
else if (new_mode == ADC_OPMODE_TRIGD || new_mode == ADC_OPMODE_STREAM || new_mode == ADC_OPMODE_BLCAP) {
|
|
adc_dbg("ADC switch -> CAPTURE");
|
|
|
|
assert_param(old_mode == ADC_OPMODE_ARMED || old_mode == ADC_OPMODE_IDLE);
|
|
|
|
// during the capture, we disallow direct readout and averaging to reduce overhead
|
|
LL_ADC_DisableIT_EOS(priv->ADCx);
|
|
|
|
// Enable the DMA buffer interrupts
|
|
|
|
// we must first clear the flags, otherwise it will cause WEIRD bugs in the handler
|
|
LL_DMA_ClearFlag_HT(priv->DMAx, priv->dma_chnum);
|
|
LL_DMA_ClearFlag_TC(priv->DMAx, priv->dma_chnum);
|
|
|
|
// those must be as close as possible to the enabling
|
|
// if not trig'd, we don't care for lost samples before (this could cause a DMA irq miss / ht/tc mismatch with the startpos)
|
|
if (new_mode != ADC_OPMODE_TRIGD) {
|
|
priv->stream_startpos = DMA_POS(priv);
|
|
priv->stream_serial = 0;
|
|
}
|
|
LL_DMA_EnableIT_HT(priv->DMAx, priv->dma_chnum);
|
|
LL_DMA_EnableIT_TC(priv->DMAx, priv->dma_chnum);
|
|
}
|
|
|
|
priv->opmode = new_mode;
|
|
}
|
|
|