diff --git a/CMakeLists.txt b/CMakeLists.txt
index ba0507a..37c242d 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -19,6 +19,7 @@ add_definitions(
         -DUSE_STACK_MONITOR=1
         -DUSE_DEBUG_UART=1
         -DGEX_PLAT_F072_DISCOVERY
+        -DHAL_TSC_MODULE_ENABLED
 )
 
 FILE(GLOB_RECURSE SOURCE_FILES
diff --git a/Makefile b/Makefile
index 4d13dea..7d5285b 100644
--- a/Makefile
+++ b/Makefile
@@ -35,6 +35,7 @@ OPT = -Os
 #######################################
 # paths
 #######################################
+#Application/User/Src/stm32f0xx_hal_timebase_TIM.c \
 # source path
 SOURCES_DIR =  \
 Application \
@@ -45,7 +46,6 @@ Application/User/Src/freertos.c \
 Application/User/Src/gpio.c \
 Application/User/Src/main.c \
 Application/User/Src/stm32f0xx_hal_msp.c \
-Application/User/Src/stm32f0xx_hal_timebase_TIM.c \
 Application/User/Src/stm32f0xx_it.c \
 Application/User/Src/usb.c \
 Drivers \
@@ -107,10 +107,10 @@ Middlewares/Third_Party/FreeRTOS/Source/tasks.c \
 Middlewares/Third_Party/FreeRTOS/Source/timers.c \
 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c \
 Src/stm32f0xx_hal_msp.c \
-Src/stm32f0xx_hal_timebase_TIM.c \
-Src/stm32f0xx_it.c \
 Src/system_stm32f0xx.c \
 Src/main.c
+#Src/stm32f0xx_hal_timebase_TIM.c \
+#Src/stm32f0xx_it.c \
 
 C_SOURCES += $(foreach sdir,$(GEX_SRC_DIR),$(wildcard $(sdir)/*.c)) $(GEX_SOURCES)
 
diff --git a/Src/main.c b/Src/main.c
index 1958d8b..12e76de 100644
--- a/Src/main.c
+++ b/Src/main.c
@@ -135,6 +135,7 @@ void SystemClock_Config(void)
   RCC_ClkInitTypeDef RCC_ClkInitStruct;
   RCC_PeriphCLKInitTypeDef PeriphClkInit;
 
+#if 0
     /**Initializes the CPU, AHB and APB busses clocks 
     */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
@@ -148,6 +149,32 @@ void SystemClock_Config(void)
   {
     _Error_Handler(__FILE__, __LINE__);
   }
+#else
+  /* Set FLASH latency */
+  LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
+
+  LL_RCC_HSE_EnableBypass();
+  LL_RCC_HSE_Enable();
+  while(LL_RCC_HSE_IsReady() != 1) {}
+
+  /* Main PLL configuration and activation */
+  LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLL_MUL_6, LL_RCC_PREDIV_DIV_1);
+
+  LL_RCC_PLL_Enable();
+  while(LL_RCC_PLL_IsReady() != 1) {}
+
+  /* Sysclk activation on the main PLL */
+  LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
+  while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {}
+
+  /* Set APB1 prescaler */
+  LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
+
+  /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
+  LL_SetSystemCoreClock(48000000);
+#endif
+
 
     /**Initializes the CPU, AHB and APB busses clocks 
     */
diff --git a/User b/User
index a63f040..c4efa5d 160000
--- a/User
+++ b/User
@@ -1 +1 @@
-Subproject commit a63f04027178433015830012ae9caf495a409b97
+Subproject commit c4efa5ddaa716fbf1a6b767b8401b497aa3e2f90