Fix for double buffered USB and other cummulative fixes
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@@ -19,6 +19,7 @@ add_definitions(
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-DUSE_STACK_MONITOR=1
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-DUSE_DEBUG_UART=1
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-DGEX_PLAT_F072_DISCOVERY
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-DHAL_TSC_MODULE_ENABLED
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)
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FILE(GLOB_RECURSE SOURCE_FILES
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@@ -908,7 +908,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
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if (ep->xfer_len > ep->maxpacket)
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{
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len=ep->maxpacket;
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ep->xfer_len-=len;
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ep->xfer_len-=len;
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}
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else
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{
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@@ -938,7 +938,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
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pmabuffer = ep->pmaaddr0;
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}
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PCD_WritePMA(hpcd->Instance, ep->xfer_buff, pmabuffer, len);
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PCD_WritePMA(hpcd->Instance, ep->xfer_buff, pmabuffer, (uint16_t) len);
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PCD_FreeUserBuffer(hpcd->Instance, ep->num, ep->is_in)
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}
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@@ -1335,8 +1335,12 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
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/* clear int flag */
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PCD_CLEAR_TX_EP_CTR(hpcd->Instance, EPindex);
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/* IN double Buffering*/
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// This function is full of strange code that causes the double buffered mode to not work
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#define WANT_HAL_BUGS 0
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#if WANT_HAL_BUGS
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/* IN double Buffering*/
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if (ep->doublebuffer == 0U)
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{
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ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
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@@ -1365,13 +1369,36 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
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PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, ep->xfer_count);
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}
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}
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PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_IN)
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PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_IN)
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}
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/*multi-packet on the NON control IN endpoint*/
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ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
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#else
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/* IN double Buffering*/
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if (ep->doublebuffer == 0U)
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{
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ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
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}
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else
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{
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if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num)& USB_EP_DTOG_TX) == USB_EP_DTOG_TX)
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{
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/*read from endpoint BUF0Addr buffer*/
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ep->xfer_count = PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
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}
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else
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{
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/*read from endpoint BUF1Addr buffer*/
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ep->xfer_count = PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
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}
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}
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#endif
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ep->xfer_buff+=ep->xfer_count;
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/* Zero Length Packet? */
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/* Zero Length Packet? <- what? */
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if (ep->xfer_len == 0U)
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{
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/* TX COMPLETE */
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@@ -43,7 +43,7 @@
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#include "main.h"
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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#define USBD_NUM_ENDPOINTS 3
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#define USBD_NUM_ENDPOINTS 4
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/* ########################## Module Selection ############################## */
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/**
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@@ -35,6 +35,7 @@ OPT = -Os
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#######################################
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# paths
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#######################################
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#Application/User/Src/stm32f0xx_hal_timebase_TIM.c \
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# source path
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SOURCES_DIR = \
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Application \
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@@ -45,7 +46,6 @@ Application/User/Src/freertos.c \
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Application/User/Src/gpio.c \
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Application/User/Src/main.c \
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Application/User/Src/stm32f0xx_hal_msp.c \
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Application/User/Src/stm32f0xx_hal_timebase_TIM.c \
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Application/User/Src/stm32f0xx_it.c \
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Application/User/Src/usb.c \
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Drivers \
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@@ -107,10 +107,10 @@ Middlewares/Third_Party/FreeRTOS/Source/tasks.c \
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Middlewares/Third_Party/FreeRTOS/Source/timers.c \
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Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c \
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Src/stm32f0xx_hal_msp.c \
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Src/stm32f0xx_hal_timebase_TIM.c \
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Src/stm32f0xx_it.c \
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Src/system_stm32f0xx.c \
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Src/main.c
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#Src/stm32f0xx_hal_timebase_TIM.c \
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#Src/stm32f0xx_it.c \
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C_SOURCES += $(foreach sdir,$(GEX_SRC_DIR),$(wildcard $(sdir)/*.c)) $(GEX_SOURCES)
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+27
@@ -135,6 +135,7 @@ void SystemClock_Config(void)
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_PeriphCLKInitTypeDef PeriphClkInit;
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#if 0
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/**Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
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@@ -148,6 +149,32 @@ void SystemClock_Config(void)
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{
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_Error_Handler(__FILE__, __LINE__);
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}
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#else
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/* Set FLASH latency */
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
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LL_RCC_HSE_EnableBypass();
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LL_RCC_HSE_Enable();
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while(LL_RCC_HSE_IsReady() != 1) {}
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/* Main PLL configuration and activation */
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LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLL_MUL_6, LL_RCC_PREDIV_DIV_1);
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LL_RCC_PLL_Enable();
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while(LL_RCC_PLL_IsReady() != 1) {}
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/* Sysclk activation on the main PLL */
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {}
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/* Set APB1 prescaler */
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
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LL_SetSystemCoreClock(48000000);
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#endif
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/**Initializes the CPU, AHB and APB busses clocks
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*/
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+1
-1
Submodule User updated: a63f040271...c4efa5ddaa
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