Fix for double buffered USB and other cummulative fixes

CMakeLists.txt

@@ -19,6 +19,7 @@ add_definitions(
         -DUSE_STACK_MONITOR=1
         -DUSE_DEBUG_UART=1
         -DGEX_PLAT_F072_DISCOVERY
+        -DHAL_TSC_MODULE_ENABLED
 )
 
 FILE(GLOB_RECURSE SOURCE_FILES

Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c

@@ -938,7 +938,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
       pmabuffer = ep->pmaaddr0;
     }
 
-    PCD_WritePMA(hpcd->Instance, ep->xfer_buff, pmabuffer, len);
+    PCD_WritePMA(hpcd->Instance, ep->xfer_buff, pmabuffer, (uint16_t) len);
     PCD_FreeUserBuffer(hpcd->Instance, ep->num, ep->is_in)
   }
 
@@ -1336,6 +1336,10 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
         /* clear int flag */
         PCD_CLEAR_TX_EP_CTR(hpcd->Instance, EPindex);
 
+          // This function is full of strange code that causes the double buffered mode to not work
+#define WANT_HAL_BUGS 0
+
+#if WANT_HAL_BUGS
           /* IN double Buffering*/
         if (ep->doublebuffer == 0U)
         {
@@ -1367,11 +1371,34 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
           }
           PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_IN)
         }
+
         /*multi-packet on the NON control IN endpoint*/
         ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
+
+#else
+        /* IN double Buffering*/
+        if (ep->doublebuffer == 0U)
+        {
+          ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
+        }
+        else
+        {
+          if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num)& USB_EP_DTOG_TX) == USB_EP_DTOG_TX)
+          {
+            /*read from endpoint BUF0Addr buffer*/
+            ep->xfer_count = PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
+          }
+          else
+          {
+            /*read from endpoint BUF1Addr buffer*/
+            ep->xfer_count = PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
+          }
+        }
+#endif
+
         ep->xfer_buff+=ep->xfer_count;
 
-        /* Zero Length Packet? */
+        /* Zero Length Packet? <- what? */
         if (ep->xfer_len == 0U)
         {
           /* TX COMPLETE */

Inc/stm32f0xx_hal_conf.h

@@ -43,7 +43,7 @@
 #include "main.h"
 /* Exported types ------------------------------------------------------------*/
 /* Exported constants --------------------------------------------------------*/
-#define USBD_NUM_ENDPOINTS 3
+#define USBD_NUM_ENDPOINTS 4
 
 /* ########################## Module Selection ############################## */
 /**

Makefile

@@ -35,6 +35,7 @@ OPT = -Os
 #######################################
 # paths
 #######################################
+#Application/User/Src/stm32f0xx_hal_timebase_TIM.c \
 # source path
 SOURCES_DIR =  \
 Application \
@@ -45,7 +46,6 @@ Application/User/Src/freertos.c \
 Application/User/Src/gpio.c \
 Application/User/Src/main.c \
 Application/User/Src/stm32f0xx_hal_msp.c \
-Application/User/Src/stm32f0xx_hal_timebase_TIM.c \
 Application/User/Src/stm32f0xx_it.c \
 Application/User/Src/usb.c \
 Drivers \
@@ -107,10 +107,10 @@ Middlewares/Third_Party/FreeRTOS/Source/tasks.c \
 Middlewares/Third_Party/FreeRTOS/Source/timers.c \
 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c \
 Src/stm32f0xx_hal_msp.c \
-Src/stm32f0xx_hal_timebase_TIM.c \
-Src/stm32f0xx_it.c \
 Src/system_stm32f0xx.c \
 Src/main.c
+#Src/stm32f0xx_hal_timebase_TIM.c \
+#Src/stm32f0xx_it.c \
 
 C_SOURCES += $(foreach sdir,$(GEX_SRC_DIR),$(wildcard $(sdir)/*.c)) $(GEX_SOURCES)
 

Src/main.c

@@ -135,6 +135,7 @@ void SystemClock_Config(void)
   RCC_ClkInitTypeDef RCC_ClkInitStruct;
   RCC_PeriphCLKInitTypeDef PeriphClkInit;
 
+#if 0
     /**Initializes the CPU, AHB and APB busses clocks 
     */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
@@ -148,6 +149,32 @@ void SystemClock_Config(void)
   {
     _Error_Handler(__FILE__, __LINE__);
   }
+#else
+  /* Set FLASH latency */
+  LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
+
+  LL_RCC_HSE_EnableBypass();
+  LL_RCC_HSE_Enable();
+  while(LL_RCC_HSE_IsReady() != 1) {}
+
+  /* Main PLL configuration and activation */
+  LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLL_MUL_6, LL_RCC_PREDIV_DIV_1);
+
+  LL_RCC_PLL_Enable();
+  while(LL_RCC_PLL_IsReady() != 1) {}
+
+  /* Sysclk activation on the main PLL */
+  LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+  LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
+  while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {}
+
+  /* Set APB1 prescaler */
+  LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
+
+  /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
+  LL_SetSystemCoreClock(48000000);
+#endif
+
 
     /**Initializes the CPU, AHB and APB busses clocks 
     */