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118 lines
4.1 KiB
118 lines
4.1 KiB
//
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// Created by MightyPork on 2018/01/14.
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//
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// Internal defines and consts used by the USART unit.
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// Can be included only by the USART c files.
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//
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#ifndef GEX_F072_UUSART_INTERNAL_H
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#define GEX_F072_UUSART_INTERNAL_H
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#ifndef UUSART_INTERNAL
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#error "Bad include"
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#endif
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#include "platform.h"
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#define UUSART_RXBUF_LEN 128
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#define UUSART_TXBUF_LEN 128
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#define UUSART_DIRECTION_RX 1
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#define UUSART_DIRECTION_TX 2
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#define UUSART_DIRECTION_RXTX 3
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/** Private data structure */
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struct priv {
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uint8_t periph_num; //!< 1-6
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uint8_t remap; //!< UART remap option
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uint32_t baudrate; //!< baud rate
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uint8_t parity; //!< 0-none, 1-odd, 2-even
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uint8_t stopbits; //!< 0-half, 1-one, 2-one-and-half, 3-two (halves - 1)
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uint8_t direction; //!< 1-RX, 2-TX, 3-RXTX
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uint8_t hw_flow_control; //!< HW flow control 0-none, 1-RTC, 2-CTS, 3-full
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bool clock_output; //!< Output serial clock
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bool cpol; //!< clock CPOL setting
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bool cpha; //!< clock CPHA setting
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bool lsb_first; //!< bit order
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uint8_t width; //!< word width - 7, 8, 9 (this includes parity)
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bool data_inv; //!< Invert data bytes
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bool rx_inv; //!< Invert the RX pin levels
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bool tx_inv; //!< Invert the TX pin levels
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bool de_output; //!< Generate the Driver Enable signal for RS485
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bool de_polarity; //!< DE active level
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uint8_t de_assert_time; //!< Time to assert the DE signal before transmit
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uint8_t de_clear_time; //!< Time to clear the DE signal after transmit
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USART_TypeDef *periph; //!< USART peripheral
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DMA_TypeDef *dma; //!< DMA peripheral
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uint8_t dma_rx_chnum; //!< DMA rx channel number (resolved dynamically based on availability)
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uint8_t dma_tx_chnum; //!< DMA tx channel number (resolved dynamically based on availability)
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DMA_Channel_TypeDef *dma_rx; //!< DMA rx channel instance
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DMA_Channel_TypeDef *dma_tx; //!< DMA tx channel instance
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// DMA stuff
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volatile uint8_t *rx_buffer; //!< Receive buffer (malloc'd). Has configured TC and TH interrupts.
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volatile uint16_t rx_buf_readpos; //!< Start of the next read (sending to USB)
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volatile uint16_t rx_last_dmapos; //!< Last position of the DMA cyclic write. Used to detect timeouts and for partial data capture from the buffer
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volatile uint8_t *tx_buffer; //!< Transmit buffer (malloc'd)
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volatile uint16_t tx_buf_nr; //!< Next Read index
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volatile uint16_t tx_buf_nw; //!< Next Write index
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volatile uint16_t tx_buf_chunk; //!< Size of the currently being transmitted chunk (for advancing the pointers)
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volatile bool tx_dma_busy; //!< Flag that the Tx DMA request is ongoing
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};
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// ------------------------------------------------------------------------
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/** Load from a binary buffer stored in Flash */
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void UUSART_loadBinary(Unit *unit, PayloadParser *pp);
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/** Write to a binary buffer for storing in Flash */
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void UUSART_writeBinary(Unit *unit, PayloadBuilder *pb);
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// ------------------------------------------------------------------------
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/** Parse a key-value pair from the INI file */
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error_t UUSART_loadIni(Unit *unit, const char *key, const char *value);
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/** Generate INI file section for the unit */
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void UUSART_writeIni(Unit *unit, IniWriter *iw);
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// ------------------------------------------------------------------------
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/** Allocate data structure and set defaults */
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error_t UUSART_preInit(Unit *unit);
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/** Tear down the unit */
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void UUSART_deInit(Unit *unit);
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/** Finalize unit set-up */
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error_t UUSART_init(Unit *unit);
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/**
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* Handle received data (we're inside the IRQ)
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*
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* @param unit - handled unit
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* @param endpos - end position in the buffer
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*/
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void UUSART_DMA_HandleRxFromIRQ(Unit *unit, uint16_t endpos);
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/**
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* Put data on the queue. Only a part may be sent due to a buffer size limit.
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*
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* @param priv
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* @param buffer - buffer to send
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* @param len - buffer size
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* @return number of bytes that were really written (from the beginning)
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*/
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uint16_t UUSART_DMA_TxQueue(struct priv *priv, const uint8_t *buffer, uint16_t len);
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// ------------------------------------------------------------------------
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#endif //GEX_F072_UUSART_INTERNAL_H
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