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531 lines
13 KiB
531 lines
13 KiB
//
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// Created by MightyPork on 2017/11/26.
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//
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#include <utils/avrlibc.h>
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#include "hw_utils.h"
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#include "macro.h"
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#define PINS_COUNT 16
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/** Pin number to LL bitfield mapping */
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static const uint32_t ll_pins[PINS_COUNT] = {
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LL_GPIO_PIN_0,
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LL_GPIO_PIN_1,
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LL_GPIO_PIN_2,
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LL_GPIO_PIN_3,
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LL_GPIO_PIN_4,
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LL_GPIO_PIN_5,
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LL_GPIO_PIN_6,
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LL_GPIO_PIN_7,
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LL_GPIO_PIN_8,
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LL_GPIO_PIN_9,
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LL_GPIO_PIN_10,
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LL_GPIO_PIN_11,
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LL_GPIO_PIN_12,
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LL_GPIO_PIN_13,
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LL_GPIO_PIN_14,
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LL_GPIO_PIN_15,
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};
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COMPILER_ASSERT(16 == ELEMENTS_IN_ARRAY(ll_pins));
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/** Port number (A=0) to config struct pointer mapping */
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static GPIO_TypeDef * const port_periphs[] = {
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GPIOA,
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GPIOB,
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GPIOC,
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GPIOD,
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GPIOE,
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#if PORTS_COUNT>5
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GPIOF,
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#endif
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#if PORTS_COUNT>6
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GPIOG,
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#endif
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};
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COMPILER_ASSERT(PORTS_COUNT == ELEMENTS_IN_ARRAY(port_periphs));
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/** Convert pin number to LL bitfield */
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uint32_t hw_pin2ll(uint8_t pin_number, bool *suc)
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{
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assert_param(suc != NULL);
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if(pin_number >= PINS_COUNT) {
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dbg("Bad pin: %d", pin_number);
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// TODO proper report
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*suc = false;
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return 0;
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}
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return ll_pins[pin_number];
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}
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/** Convert port name (A,B,C...) to peripheral struct pointer */
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GPIO_TypeDef *hw_port2periph(char port_name, bool *suc)
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{
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assert_param(suc != NULL);
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if(port_name < 'A' || port_name >= ('A'+PORTS_COUNT)) {
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dbg("Bad port: %c", port_name); // TODO proper report
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*suc = false;
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return NULL;
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}
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uint8_t num = (uint8_t) (port_name - 'A');
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return port_periphs[num];
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}
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/** Convert a pin to resource handle */
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Resource hw_pin2resource(char port_name, uint8_t pin_number, bool *suc)
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{
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assert_param(suc != NULL);
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if(port_name < 'A' || port_name >= ('A'+PORTS_COUNT)) {
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dbg("Bad port: %c", port_name); // TODO proper report
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*suc = false;
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return R_NONE;
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}
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if(pin_number >= PINS_COUNT) {
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dbg("Bad pin: %d", pin_number); // TODO proper report
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*suc = false;
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return R_NONE;
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}
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uint8_t num = (uint8_t) (port_name - 'A');
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return R_PA0 + num*16 + pin_number;
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}
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/** Parse single pin */
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bool parse_pin(const char *value, char *targetName, uint8_t *targetNumber)
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{
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// discard leading 'P'
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if (value[0] == 'P') {
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value++;
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}
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size_t len = strlen(value);
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if (len<2||len>3) return false;
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*targetName = (uint8_t) value[0];
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if (!(*targetName >= 'A' && *targetName <= 'H')) return false;
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// lets just hope it's OK
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*targetNumber = (uint8_t) avr_atoi(value + 1);
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return true;
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}
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/** Parse port name */
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bool parse_port_name(const char *value, char *targetName)
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{
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*targetName = (uint8_t) value[0];
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if (!(*targetName >= 'A' && *targetName < 'A' + PORTS_COUNT)) return false;
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return true;
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}
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/** Parse a list of pin numbers with ranges and commans/semicolons to a bitmask */
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uint16_t parse_pinmask(const char *value, bool *suc)
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{
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uint32_t bits = 0;
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uint32_t acu = 0;
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bool inrange = false;
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uint32_t rangestart = 0;
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// shortcut if none are set
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if (value[0] == 0) return 0;
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char c;
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do {
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c = *value++;
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if (c == ' ' || c == '\t') {
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// skip
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}
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else if (c >= '0' && c <= '9') {
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acu = acu*10 + (c-'0');
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}
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else if (c == ',' || c == ';' || c == 0) {
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// end of number or range
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if (!inrange) rangestart = acu;
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// swap them if they're in the wrong order
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if (acu < rangestart) {
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uint32_t swp = acu;
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acu = rangestart;
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rangestart = swp;
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}
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for(uint32_t i=rangestart; i<=acu; i++) {
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bits |= 1<<i;
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}
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inrange = false;
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rangestart = 0;
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acu = 0;
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}
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else if (c == '-' || c == ':') {
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rangestart = acu;
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inrange = true;
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acu=0;
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} else {
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*suc = false;
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}
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} while (c != 0);
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if (bits > 0xFFFF) *suc = false;
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return (uint16_t) bits;
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}
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/** Convert a pin bitmask to the ASCII format understood by str_parse_pinmask() */
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char * pinmask2str(uint16_t pins, char *buffer)
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{
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char *b = buffer;
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uint32_t start = 0;
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bool on = false;
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bool first = true;
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// shortcut if none are set
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if (pins == 0) {
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buffer[0] = 0;
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return buffer;
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}
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for (int32_t i = 15; i >= -1; i--) {
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bool bit;
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if (i == -1) {
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bit = false;
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} else {
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bit = 0 != (pins & 0x8000);
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pins <<= 1;
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}
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if (bit) {
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if (!on) {
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start = (uint32_t) i;
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on = true;
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}
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} else {
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if (on) {
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if (!first) {
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b += SPRINTF(b, ", ");
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}
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if (start == (uint32_t)(i+1)) {
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b += SPRINTF(b, "%"PRIu32, start);
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}
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// else if (start == (uint32_t)(i+2)) {
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// // exception for 2-long ranges - don't show as range
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// b += SPRINTF(b, "%"PRIu32",%"PRIu32, start, i + 1);
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// }
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else {
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b += SPRINTF(b, "%"PRIu32"-%"PRIu32, start, i + 1);
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}
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first = false;
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on = false;
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}
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}
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}
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return buffer;
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}
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/** Spread packed port pins using a mask */
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uint16_t pinmask_spread(uint16_t packed, uint16_t mask)
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{
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uint16_t result = 0;
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uint16_t poke = 1;
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for (int i = 0; i<16; i++) {
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if (mask & (1<<i)) {
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if (packed & poke) {
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result |= 1<<i;
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}
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poke <<= 1;
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}
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}
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return result;
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}
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/** Pack spread port pins using a mask */
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uint16_t pinmask_pack(uint16_t spread, uint16_t mask)
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{
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uint16_t result = 0;
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uint16_t poke = 1;
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for (int i = 0; i<16; i++) {
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if (mask & (1<<i)) {
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if (spread & (1<<i)) {
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result |= poke;
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}
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poke <<= 1;
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}
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}
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return result;
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}
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/** Configure unit pins as analog (part of unit teardown) */
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void hw_deinit_unit_pins(Unit *unit)
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{
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for (uint32_t rsc = R_PA0; rsc <= R_PF15; rsc++) {
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if (RSC_IS_HELD(unit->resources, rsc)) {
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rsc_dbg("Freeing pin %s", rsc_get_name((Resource)rsc));
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GPIO_TypeDef *port = port_periphs[(rsc-R_PA0) / 16];
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uint32_t ll_pin = ll_pins[(rsc-R_PA0)%16];
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LL_GPIO_SetPinMode(port, ll_pin, LL_GPIO_MODE_ANALOG);
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}
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}
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}
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/** Configure a pin to alternate function */
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error_t hw_configure_gpio_af(char port_name, uint8_t pin_num, uint32_t ll_af)
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{
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#if PLAT_NO_AFNUM
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trap("Illegal call to hw_configure_gpio_af() on this platform");
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#else
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bool suc = true;
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GPIO_TypeDef *port = hw_port2periph(port_name, &suc);
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uint32_t ll_pin = hw_pin2ll(pin_num, &suc);
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if (!suc) return E_BAD_CONFIG;
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if (pin_num < 8)
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LL_GPIO_SetAFPin_0_7(port, ll_pin, ll_af);
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else
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LL_GPIO_SetAFPin_8_15(port, ll_pin, ll_af);
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LL_GPIO_SetPinMode(port, ll_pin, LL_GPIO_MODE_ALTERNATE);
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#endif
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return E_SUCCESS;
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}
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/** Configure pins using sparse map */
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error_t hw_configure_sparse_pins(char port_name, uint16_t mask, GPIO_TypeDef **port_dest,
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uint32_t ll_mode, uint32_t ll_otype)
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{
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bool suc = true;
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GPIO_TypeDef *port = hw_port2periph(port_name, &suc);
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if (!suc) return E_BAD_CONFIG;
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for (int i = 0; i < 16; i++) {
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if (mask & (1<<i)) {
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uint32_t ll_pin = hw_pin2ll((uint8_t) i, &suc);
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LL_GPIO_SetPinMode(port, ll_pin, ll_mode);
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LL_GPIO_SetPinOutputType(port, ll_pin, ll_otype);
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LL_GPIO_SetPinSpeed(port, ll_pin, LL_GPIO_SPEED_FREQ_HIGH);
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}
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}
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if (port_dest != NULL) {
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*port_dest = port;
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}
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return E_SUCCESS;
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}
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void hw_periph_clock_enable(void *periph)
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{
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// GPIOs are enabled by default on start-up
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// --- USART ---
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if (periph == USART1) __HAL_RCC_USART1_CLK_ENABLE();
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else if (periph == USART2) __HAL_RCC_USART2_CLK_ENABLE();
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#ifdef USART3
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else if (periph == USART3) __HAL_RCC_USART3_CLK_ENABLE();
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#endif
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#ifdef USART4
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else if (periph == USART4) __HAL_RCC_USART4_CLK_ENABLE();
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#endif
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#ifdef USART5
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else if (periph == USART5) __HAL_RCC_USART5_CLK_ENABLE();
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#endif
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// --- SPI ---
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else if (periph == SPI1) __HAL_RCC_SPI1_CLK_ENABLE();
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#ifdef SPI2
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else if (periph == SPI2) __HAL_RCC_SPI2_CLK_ENABLE();
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#endif
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#ifdef SPI3
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else if (periph == SPI3) __HAL_RCC_SPI3_CLK_ENABLE();
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#endif
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// --- I2C ---
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else if (periph == I2C1) __HAL_RCC_I2C1_CLK_ENABLE();
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else if (periph == I2C2) __HAL_RCC_I2C2_CLK_ENABLE();
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#ifdef I2C3
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else if (periph == I2C3) __HAL_RCC_I2C3_CLK_ENABLE();
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#endif
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// --- DMA ---
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else if (periph == DMA1) __HAL_RCC_DMA1_CLK_ENABLE();
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#ifdef DMA2
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else if (periph == DMA2) __HAL_RCC_DMA2_CLK_ENABLE();
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#endif
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// --- TIM ---
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else if (periph == TIM1) __HAL_RCC_TIM1_CLK_ENABLE();
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else if (periph == TIM2) __HAL_RCC_TIM2_CLK_ENABLE();
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else if (periph == TIM3) __HAL_RCC_TIM3_CLK_ENABLE();
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#ifdef TIM4
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else if (periph == TIM4) __HAL_RCC_TIM4_CLK_ENABLE();
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#endif
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#ifdef TIM5
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else if (periph == TIM5) __HAL_RCC_TIM5_CLK_ENABLE();
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#endif
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#ifdef TIM6
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else if (periph == TIM6) __HAL_RCC_TIM7_CLK_ENABLE();
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#endif
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#ifdef TIM7
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else if (periph == TIM7) __HAL_RCC_TIM7_CLK_ENABLE();
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#endif
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#ifdef TIM8
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else if (periph == TIM8) __HAL_RCC_TIM8_CLK_ENABLE();
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#endif
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#ifdef TIM9
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else if (periph == TIM9) __HAL_RCC_TIM9_CLK_ENABLE();
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#endif
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#ifdef TIM11
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else if (periph == TIM11) __HAL_RCC_TIM11_CLK_ENABLE();
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#endif
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#ifdef TIM12
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else if (periph == TIM12) __HAL_RCC_TIM12_CLK_ENABLE();
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#endif
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#ifdef TIM13
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else if (periph == TIM13) __HAL_RCC_TIM13_CLK_ENABLE();
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#endif
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#ifdef TIM14
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else if (periph == TIM14) __HAL_RCC_TIM14_CLK_ENABLE();
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#endif
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#ifdef TIM15
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else if (periph == TIM15) __HAL_RCC_TIM15_CLK_ENABLE();
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#endif
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#ifdef TIM16
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else if (periph == TIM16) __HAL_RCC_TIM15_CLK_ENABLE();
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#endif
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#ifdef TIM17
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else if (periph == TIM17) __HAL_RCC_TIM17_CLK_ENABLE();
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#endif
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// --- ADC ---
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#ifdef ADC1
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else if (periph == ADC1) __HAL_RCC_ADC1_CLK_ENABLE();
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#endif
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#ifdef ADC2
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else if (periph == ADC2) __HAL_RCC_ADC2_CLK_ENABLE();
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#endif
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// --- DAC ---
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#ifdef DAC1
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else if (periph == DAC1) __HAL_RCC_DAC1_CLK_ENABLE();
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#endif
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#ifdef DAC2
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else if (periph == DAC2) __HAL_RCC_DAC2_CLK_ENABLE();
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#endif
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else {
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dbg("Periph 0x%p missing in hw clock enable func", periph);
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trap("BUG");
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}
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}
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void hw_periph_clock_disable(void *periph)
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{
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// GPIOs are enabled by default on start-up
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// --- USART ---
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if (periph == USART1) __HAL_RCC_USART1_CLK_DISABLE();
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else if (periph == USART2) __HAL_RCC_USART2_CLK_DISABLE();
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#ifdef USART3
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else if (periph == USART3) __HAL_RCC_USART3_CLK_DISABLE();
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#endif
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#ifdef USART4
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else if (periph == USART4) __HAL_RCC_USART4_CLK_DISABLE();
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#endif
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#ifdef USART5
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else if (periph == USART5) __HAL_RCC_USART5_CLK_DISABLE();
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#endif
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// --- SPI ---
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else if (periph == SPI1) __HAL_RCC_SPI1_CLK_DISABLE();
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#ifdef SPI2
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else if (periph == SPI2) __HAL_RCC_SPI2_CLK_DISABLE();
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#endif
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#ifdef SPI3
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else if (periph == SPI3) __HAL_RCC_SPI3_CLK_DISABLE();
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#endif
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// --- I2C ---
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else if (periph == I2C1) __HAL_RCC_I2C1_CLK_DISABLE();
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else if (periph == I2C2) __HAL_RCC_I2C2_CLK_DISABLE();
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#ifdef I2C3
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else if (periph == I2C3) __HAL_RCC_I2C3_CLK_DISABLE();
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#endif
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// --- DMA ---
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else if (periph == DMA1) __HAL_RCC_DMA1_CLK_DISABLE();
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#ifdef DMA2
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else if (periph == DMA2) __HAL_RCC_DMA2_CLK_DISABLE();
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#endif
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// --- TIM ---
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else if (periph == TIM1) __HAL_RCC_TIM1_CLK_DISABLE();
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else if (periph == TIM2) __HAL_RCC_TIM2_CLK_DISABLE();
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else if (periph == TIM3) __HAL_RCC_TIM3_CLK_DISABLE();
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#ifdef TIM4
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else if (periph == TIM4) __HAL_RCC_TIM4_CLK_DISABLE();
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#endif
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#ifdef TIM5
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else if (periph == TIM5) __HAL_RCC_TIM5_CLK_DISABLE();
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#endif
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#ifdef TIM6
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else if (periph == TIM6) __HAL_RCC_TIM7_CLK_DISABLE();
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#endif
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#ifdef TIM7
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else if (periph == TIM7) __HAL_RCC_TIM7_CLK_DISABLE();
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#endif
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#ifdef TIM8
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else if (periph == TIM8) __HAL_RCC_TIM8_CLK_DISABLE();
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#endif
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#ifdef TIM9
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else if (periph == TIM9) __HAL_RCC_TIM9_CLK_DISABLE();
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#endif
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#ifdef TIM11
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else if (periph == TIM11) __HAL_RCC_TIM11_CLK_DISABLE();
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#endif
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#ifdef TIM12
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else if (periph == TIM12) __HAL_RCC_TIM12_CLK_DISABLE();
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#endif
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#ifdef TIM13
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else if (periph == TIM13) __HAL_RCC_TIM13_CLK_DISABLE();
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#endif
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#ifdef TIM14
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else if (periph == TIM14) __HAL_RCC_TIM14_CLK_DISABLE();
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#endif
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#ifdef TIM15
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else if (periph == TIM15) __HAL_RCC_TIM15_CLK_DISABLE();
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#endif
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#ifdef TIM16
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else if (periph == TIM16) __HAL_RCC_TIM15_CLK_DISABLE();
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#endif
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#ifdef TIM17
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else if (periph == TIM17) __HAL_RCC_TIM17_CLK_DISABLE();
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#endif
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// --- ADC ---
|
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#ifdef ADC1
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else if (periph == ADC1) __HAL_RCC_ADC1_CLK_DISABLE();
|
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#endif
|
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#ifdef ADC2
|
|
else if (periph == ADC2) __HAL_RCC_ADC2_CLK_DISABLE();
|
|
#endif
|
|
|
|
// --- DAC ---
|
|
#ifdef DAC1
|
|
else if (periph == DAC1) __HAL_RCC_DAC1_CLK_DISABLE();
|
|
#endif
|
|
#ifdef DAC2
|
|
else if (periph == DAC2) __HAL_RCC_DAC2_CLK_DISABLE();
|
|
#endif
|
|
else {
|
|
dbg("Periph 0x%p missing in hw clock disable func", periph);
|
|
trap("BUG");
|
|
}
|
|
}
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|
|