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221 lines
6.7 KiB
221 lines
6.7 KiB
//
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// Created by MightyPork on 2018/02/03.
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//
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#include "platform.h"
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#include "unit_base.h"
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#define TOUCH_INTERNAL
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#include "_touch_internal.h"
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/** Allocate data structure and set defaults */
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error_t UTOUCH_preInit(Unit *unit)
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{
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struct priv *priv = unit->data = calloc_ck(1, sizeof(struct priv));
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if (priv == NULL) return E_OUT_OF_MEM;
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priv->cfg.charge_time = 2;
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priv->cfg.drain_time = 2;
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priv->cfg.spread_deviation = 0;
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priv->cfg.ss_presc = 1;
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priv->cfg.pg_presc = 32;
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priv->cfg.sense_timeout = 7;
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memset(priv->cfg.group_scaps, 0, 8);
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memset(priv->cfg.group_channels, 0, 8);
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priv->cfg.binary_hysteresis = 10;
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priv->cfg.binary_debounce_ms = 20;
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return E_SUCCESS;
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}
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/** Finalize unit set-up */
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error_t UTOUCH_init(Unit *unit)
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{
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bool suc = true;
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struct priv *priv = unit->data;
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unit->tick_interval = 1; // sample every 1 ms
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// copy from conf
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priv->binary_debounce_ms = priv->cfg.binary_debounce_ms;
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priv->binary_hysteresis = priv->cfg.binary_hysteresis;
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TRY(rsc_claim(unit, R_TSC));
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// simple bound checks, just clamp without error
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if (priv->cfg.charge_time > 16) priv->cfg.charge_time = 16;
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if (priv->cfg.charge_time < 1) priv->cfg.charge_time = 1;
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if (priv->cfg.drain_time > 16) priv->cfg.drain_time = 16;
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if (priv->cfg.drain_time < 1) priv->cfg.drain_time = 1;
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if (priv->cfg.spread_deviation > 128) priv->cfg.drain_time = 128;
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if (priv->cfg.ss_presc > 2) priv->cfg.ss_presc = 2;
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if (priv->cfg.ss_presc < 1) priv->cfg.ss_presc = 1;
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if (priv->cfg.sense_timeout > 7) priv->cfg.sense_timeout = 7;
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if (priv->cfg.sense_timeout < 1) priv->cfg.sense_timeout = 1;
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uint8_t tmppgpresc = priv->cfg.pg_presc;
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if (tmppgpresc == 0) return E_BAD_CONFIG;
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uint8_t pgpresc_reg = 0;
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while ((tmppgpresc & 1) == 0 && tmppgpresc != 0) {
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pgpresc_reg++;
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tmppgpresc >>= 1;
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}
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if (tmppgpresc != 1 || pgpresc_reg > 7) {
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dbg("Bad pgpresc");
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return E_BAD_CONFIG; // TODO better reporting
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}
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if ((pgpresc_reg==0 && priv->cfg.drain_time<=2) || (pgpresc_reg==1 && priv->cfg.drain_time==0)) {
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dbg("Illegal PGPSC vs CTPL");
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return E_BAD_CONFIG;
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}
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// enable clock
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hw_periph_clock_enable(TSC);
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// reset
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__HAL_RCC_TSC_FORCE_RESET();
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__HAL_RCC_TSC_RELEASE_RESET();
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priv->all_channels_mask = 0;
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for (int gi = 0; gi < 8; gi++) {
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const uint8_t cap = priv->cfg.group_scaps[gi];
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const uint8_t ch = priv->cfg.group_channels[gi];
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if (cap == 0) {
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if (ch != 0) {
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dbg_touch("TSC group %d has no cap!", (int) (gi + 1));
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return E_BAD_CONFIG;
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}
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continue;
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}
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if (ch == 0) continue; // if no channels, don't bother setting up anything
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if (cap != 2 && cap != 4 && cap != 8 && cap != 16) {
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dbg_touch("TSC group %d has more than 1 cap!", (int) (gi + 1));
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return E_BAD_CONFIG;
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}
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if (cap & ch) {
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dbg_touch("TSC pin can't be both channel and cap! (gpr %d)", (int) (gi + 1));
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return E_BAD_CONFIG;
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}
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// This is a loop through the pins in a group gi
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int phasenum = 0;
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for (int pi = 0; pi < 4; pi++) {
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// pin numbers are 1-based in the config
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const bool iscap = 0 != (cap & (2 << pi));
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const bool isch = 0 != (ch & (2 << pi));
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if (!iscap && !isch) continue;
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Resource r = utouch_group_rscs[gi][pi];
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TRY(rsc_claim(unit, r));
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GPIO_TypeDef *port;
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uint32_t ll;
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assert_param(hw_pinrsc2ll(r, &port, &ll));
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LL_GPIO_SetPinOutputType(port, ll, isch ? LL_GPIO_OUTPUT_PUSHPULL : LL_GPIO_OUTPUT_OPENDRAIN);
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// 7 and 8 (1-based) use AF1, else AF3
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TRY(hw_configure_gpiorsc_af(r, gi >= 6 ? LL_GPIO_AF_1 : LL_GPIO_AF_3));
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uint32_t bit = (uint32_t) (1 << (gi * 4 + pi));
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if (iscap) {
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dbg_touch("TSC cap @ %s", rsc_get_name(r));
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// Sampling cap
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TSC->IOSCR |= bit;
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// Disable pin hysteresis (causes noise)
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TSC->IOHCR ^= bit;
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}
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else {
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dbg_touch("TSC ch @ %s", rsc_get_name(r));
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if (priv->cfg.interlaced) {
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// interlaced - only update the mask beforehand
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priv->all_channels_mask |= bit;
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} else {
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// channels are configured individually when read.
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// we prepare bitmaps to use for the read groups (all can be read in at most 3 steps)
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priv->channels_phase[phasenum] |= bit; // this is used for the channel selection register
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priv->groups_phase[phasenum] |= 1 << gi; // this will be used for the group enable register, if all 0, this and any following phases are unused.
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phasenum++;
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}
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}
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}
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}
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// common TSC config
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TSC->CR =
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((priv->cfg.charge_time - 1) << TSC_CR_CTPH_Pos) |
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((priv->cfg.drain_time - 1) << TSC_CR_CTPL_Pos) |
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((priv->cfg.ss_presc - 1) << TSC_CR_SSPSC_Pos) |
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(pgpresc_reg << TSC_CR_PGPSC_Pos) |
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((priv->cfg.sense_timeout - 1) << TSC_CR_MCV_Pos) |
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TSC_CR_TSCE;
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if (priv->cfg.spread_deviation > 0) {
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TSC->CR |= ((priv->cfg.spread_deviation - 1) << TSC_CR_SSD_Pos) | TSC_CR_SSE;
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}
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dbg_touch("CR = %08x, ht is %d, lt is %d", (int)TSC->CR,
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(int)priv->cfg.charge_time,
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(int)priv->cfg.drain_time);
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// iofloat is used for discharging
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// Enable the interrupts
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TSC->IER = TSC_IER_EOAIE | TSC_IER_MCEIE;
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irqd_attach(TSC, UTOUCH_HandleIrq, unit);
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if (!priv->cfg.interlaced) {
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dbg_touch("TSC phases:");
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for (int i = 0; i < 3; i++) {
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priv->all_channels_mask |= priv->channels_phase[i];
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dbg_touch(" %d: ch %08"PRIx32", g %02"PRIx32,
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i + 1,
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priv->channels_phase[i],
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(uint32_t) priv->groups_phase[i]);
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}
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}
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priv->status = UTSC_STATUS_BUSY; // first loop ...
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priv->next_phase = 0;
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// starts in the tick callback
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return E_SUCCESS;
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}
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/** Tear down the unit */
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void UTOUCH_deInit(Unit *unit)
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{
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struct priv *priv = unit->data;
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// de-init peripherals
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if (unit->status == E_SUCCESS) {
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hw_periph_clock_disable(TSC);
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// clear all registers to their default values
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__HAL_RCC_TSC_FORCE_RESET();
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__HAL_RCC_TSC_RELEASE_RESET();
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irqd_detach(TSC, UTOUCH_HandleIrq);
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}
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// Release all resources, deinit pins
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rsc_teardown(unit);
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// Free memory
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free_ck(unit->data);
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}
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